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WO2008112077A1 - Récepteur optoélectronique à haute vitesse - Google Patents

Récepteur optoélectronique à haute vitesse Download PDF

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Publication number
WO2008112077A1
WO2008112077A1 PCT/US2008/002527 US2008002527W WO2008112077A1 WO 2008112077 A1 WO2008112077 A1 WO 2008112077A1 US 2008002527 W US2008002527 W US 2008002527W WO 2008112077 A1 WO2008112077 A1 WO 2008112077A1
Authority
WO
WIPO (PCT)
Prior art keywords
demultiplexer
ground
photodiode
receiver
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2008/002527
Other languages
English (en)
Inventor
Andrew Larry Adamiecki
Lawrence L. Buhl
Jeffrey H. Sinsky
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia of America Corp
Original Assignee
Lucent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/772,105 external-priority patent/US7917042B2/en
Application filed by Lucent Technologies Inc filed Critical Lucent Technologies Inc
Publication of WO2008112077A1 publication Critical patent/WO2008112077A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/60—Receivers
    • H04B10/66—Non-coherent receivers, e.g. using direct detection
    • H04B10/69—Electrical arrangements in the receiver

Definitions

  • This disclosure relates to optical communication. More particularly, this disclosure relates to receivers for high speed optical communication systems.
  • Winzer, et al. 107-Gb/s Optical Signal Generation using Electronic Time-Division Multiplexing", IEEE JLT, Vol.24, pp.3107-3113, '06
  • receivers See, e.g., C. Schubert, et al., "107 Gbit/s Transmission Using an Integrated ETDM Receiver," ECOC 2006, TuI.5.5, Sept. 2006
  • full ETDM systems See, e.g., K. Schuh, et al., "100 Gbit/s ETDM transmission system based on We3.P.124, ECOC'06
  • OOK binary on/off keying
  • ETDM receivers employed a separately packaged photodiode and electronic demultiplexer.
  • electrical signal transmission between photodetector and demultiplexer is problematic due to reduced performance resulting from microwave signal integrity issues.
  • electro-optic packaging complexity at this data rate is one of the reasons for the recent push towards optical DQPSK architectures for IOOG systems (See, e.g., P. Winzer, G. Raybon, et al., "10 x 107-Gb/s NRZ-DQPSK transmission at 1.0 b/s/Hz over 12 x 100 km including 6 optical routing nodes," to be published ECOC 2007).
  • a photodiode integrated circuit is directly connected to the electrical demultiplexer by means of a short microwave transmission path.
  • this path may entail very short wire bonds, a flip chip architecture, or some sort of short high bandwidth microwave interface board.
  • the photodiode may have its own on-chip transmission line termination, for example, 50 ohms, while the demultiplexer would have a similar termination on-chip.
  • an ultra-broadband external termination may be provided in the required interface circuitry.
  • the photocurrent from the photodiode develops a voltage across the input of the demultiplexer through the termination resistors so as to provide the required input signal for the demultiplexer.
  • the demultiplexer reduces the data rate by at least a factor of two, thereby greatly easing the design requirements for the external microwave circuitry.
  • One embodiment of the invention described in the aforementioned Provisional Application involves hybrid integration of a 100 GHz indium phosphide (InP) photodiode with a silicon germanium (SiGe) high-speed 1:2 electronic demultiplexer in a single package.
  • InP indium phosphide
  • SiGe silicon germanium
  • FIG 1 is a diagram of an illustrative optoelectronic receiver in accordance with the invention.
  • FIG 2A is an equivalent circuit of an illustrative photodiode that may be used in the embodiment of the invention shown in FIG 1.
  • FIG 2B is a perspective view of a chip containing the photodiode of FIG 1.
  • FIG 3 is a schematic diagram of an illustrative demultiplexer that may be used in the embodiment of the invention shown in FIG 1.
  • FIG 3A is a schematic diagram representing a clock driver for the demultiplexer of FIG 1.
  • FIG 4 is a schematic block diagram of an illustrative optoelectronic receiver in accordance with this invention.
  • FIG 5 is a schematic diagram of the mode conversion board shown in Figure 4.
  • the basic idea of this invention is to DC couple a high speed photodiode to an electrical demultiplexer for ultra-high speed operation, for example, involving data rates over 100 Gb/s. This is done by directly connecting a photodiode integrated circuit with an electrical demultiplexer by means of a very short microwave transmission path. This path may entail very short wire bonds, a flip chip architecture, or some sort of short high bandwidth microwave planar microwave transmission structure that may be in the form of a small high bandwidth microwave interface board described in detail below.
  • the photodiode would typically have its own on-chip transmission line termination (typically 50 ohms) while the demultiplexer would have a similar termination on chip.
  • an ultra-broadband external termination is provided in the required interface circuitry.
  • the photocurrent from the diode is used to develop a voltage across the input of the demultiplexer through the termination resistors so as to provide the required input signal.
  • the demultiplexer by definition, reduces the data rate by at least a factor of two, thereby greatly easing the design requirements for external microwave circuitry.
  • a 100 Gbit/s InP photodiode is integrated with a silicon- germanium (SiGe) demultiplexer in a single package.
  • the photodiode has a coplanar waveguide microwave interface with a ground-signal-ground pad set.
  • the demultiplexer has a ground-signal pad set. Both devices are co-packaged in a single mechanical package with the required machining tolerances.
  • the photodiode is interfaced to the demultiplexer using a specially designed grounded coplanar waveguide circuit that transitions a balanced ground-signal-ground interface to an unbalanced ground-signal interface. This interface board is intentionally kept very small (less than a wavelength) to minimize circuit loss.
  • the photodiode and the demultiplexer have built in 50 ohm terminations so that the short microwave transmission structure is properly terminated reducing the incidence of standing waves and reflections.
  • the photocurrent developed during operation of the diode flows through the load resistors to generate a voltage on the input of the demultiplexer with adequate amplitude to exceed the sensitivity requirements of the demultiplexer.
  • optical preamplification may be used in order to increase the photocurrent to provide an adequate drive voltage.
  • a high speed interface board also contains an integrated termination resistor may terminate the unused second input of a differential demultiplexer.
  • FIG. 1 An example of an integrated optical demultiplexing receiver 10 in accordance with the invention is shown in FIG. 1. It has three active circuit components: a 100- GHz 3-dB bandwidth InP photodiode 12 with 0.6 A/W responsivity (See, e.g., A. Beling, et al., "Miniaturized Waveguide-Integrated p-i-n Photodetector With 120- GHz Bandwidth and High Responsivity", IEEE PTL, Vol.17, No. 10, 2152-2154, October 2005), a SiGe 85+ Gbit/s 1 :2 electrical demultiplexer 14, and a SiGe traveling wave clock amplifier 16 with a 3-dB bandwidth of about 55 GHz.
  • a 100- GHz 3-dB bandwidth InP photodiode 12 with 0.6 A/W responsivity See, e.g., A. Beling, et al., "Miniaturized Waveguide-Integrated p-i-n Photodetector With 120-
  • the optical input 18 in FIG 1 is a single mode fiber 20 (shown in FIG 2).
  • Microwave input CLK and microwave outputs Q 1 , Q 1 , Q 2 , and Q 2 are integrated V connectors, and the DC power 22 is provided through a high-density multi-pin connector.
  • the photodiode 12 and the demultiplexer 14 are connected together by a planar microwave transmission structure 13, which may, for example, be a planar transmission line in the form of a thin film of conductive material formed on a dielectric substrate.
  • the photodiode 12, transmission structure 13, and the demultiplexer 14 are mounted on support structure in the housing of the receiver so that these elements are in suitable spatial relationship to one another, for example, so that they are generally coplanar with one another.
  • the photodiode 12 is designed with an on-chip biasing network 24 shown in FIG 2B composed of a bias voltage source Vbias, a resistor Rbias, and a capacitor Cb,as-
  • the photodiode 12 also includes an integrated spot-size converter 26 shown in FIG 2A composed of a taper structure 28 and a waveguide 30 between the fiber 20 and the photodiode 12.
  • the photodiode 12 also has a termination resistor Rs 0 .
  • the integrated spot size converter 26 allows for the use of a cleaved fiber that reduces cost, and provides less sensitivity to misalignment. It also reduces vibrational sensitivity of the integrated assembly. This device boasts an external efficiency greater than 50%, a high optical power capability (> +15 dBm), and can sustain an average photocurrent of up to 20 mA.
  • the electrical demultiplexer 14 is a SiGe integrated circuit originally designed to operate at 85 Gbit/s (See, e.g., O. Wohlgemuth, et al.,"Digital SiGe-chips for data transmission up to 85 Gbit/s," EGAAS 2005, 3-4 Oct. 2005, pp.245- 248). However, with careful microwave packaging techniques, excellent performance can be achieved at 107 Gbit/s.
  • a schematic diagram of an illustrative demultiplexer 14 is shown in FIG 3. Data from the photodiode 12 enters two rows of series connected D flip flops that produce the Q 1 , Q 1 , Q 2 , and Q 2 outputs shown in FIG 1.
  • Data is clocked through the D flip flops by a clock signal 32 amplified by a traveling wave amplifier 16.
  • This device requires a Vi rate clock (53.5 GHz) which latches data on either the rising or falling edge of the clock for each of the respective output tributaries in FIG 3.
  • an extra D flip-flop may be used in one leg of the demultiplexer 14 to equalize the delays from the two data streams.
  • the SiGe clock amplifier 16 of FIG 3A may have a single-ended input 34 and differential output 36, and has a 3 dB bandwidth of 55 GHz. Since the demultiplexer 14 works better at higher data rates with a differential clock input, the clock device of FIG 3A allows the provision of a high voltage ( ⁇ 900 mVpp differential) balanced clock from a single ended external source clock.
  • the circuit architecture is illustrated in FIG. 4.
  • the photodiode 12 is DC coupled to one of the inputs of a differential demultiplexer 14, thereby minimizing microwave parasitics and improving performance over that which would result from trying to AC couple data from several hundred kHz to nearly 100 GHz to the demultiplexer 14.
  • the DC coupled photodiode-demultiplexer interface enables correct biasing of the photodiode 14. Knowledge of the demultiplexer input voltage during normal operation, over the expected range of photocurrents, allows accurate control of the diode bias.
  • the demultiplexer 14 has a differential input, composed of inputs 14a and 14b, so the unused input 14b must be presented with a good 50-ohm termination 14c over nearly a 100-GHz bandwidth (BW). This was accomplished using a quartz interface board 13 with a custom designed wideband termination 14c. During operation, a threshold adjust voltage 38 is presented to this terminated side of the demultiplexer 14 so that the voltage across this input of the demultiplexer 14 is approximately equal to the average voltage developed across the photodiode-driven side of the demultiplexer 14.
  • DC power 22 is supplied to the receiver 10 through a power conditioning board 15.
  • the power conditioning board 15 supplies DC power to the demultiplexer 14 by way of an RF decoupling network 17.
  • the power conditioning board 15 supplies DC power to the photodiode 12 by way of an RF decoupling network 19.
  • Tributary 1 outputs Q 1 and Q 1 of the demultiplexer 14 are output from the receiver
  • tributary 2 outputs Q 2 and Q 2 of the demultiplexer 14 are output from the receiver 10 by way of interface 25.
  • a half-rate clock input 29 is supplied to the demultiplexer 14 by means of a traveling wave amplifier 16. Since all 100-GHz interfaces are inside the package, design parameters can be tightly controlled resulting in improved performance. All receiver electrical inputs and outputs operate at half the input data rate, greatly simplifying the external interfaces, which makes this design approach inherently superior to separately packaged solutions with 100-Gbit/s interfaces.
  • the dimensions of the finished assembly may be is low profile and may measure about 2.6 cm x 2.4 cm x 6.3 cm. All microwave electronics in the device shown in FIG 1 may be fabricated on a 127- ⁇ m thick quartz substrate.
  • the demultiplexer outputs and clock input travel through the package using microstrip circuitry and are connected to the integrated circuits using wire bonds 40 (FIG 5) and coplanar waveguide biquadratic transitions for optimal bandwidth performance (See, e.g., W. Thomann, et al., "Characterization and simulation of bi-quadratic coplanar waveguide tapers for time-domain applications," IEEE MTT-S, June 1993, vol. 2, pp. 835-838).
  • All wirebonds are 25.4 ⁇ m in diameter and kept as short as possible (approximately 152 ⁇ m) in the microwave signal paths.
  • a cleaved fiber 20 couples light into the diode 12 and a ruby ring 21 is used to hold the fiber 20 in place.
  • the photodiode 12 has a balanced ground-signal-ground (GSG) electrical interface 38 (FIG 2B) while the demultiplexer 14 has an unbalanced ground-signal (GS) interface 39 (FIG 5).
  • GSG ground-signal-ground
  • GS ground-signal
  • This circuit effectively converts the unbalanced mode from the diode 12 to a balanced mode for the demultiplexer 14 using strategically placed via holes 42 and a grounded coplanar waveguide transmission structure.
  • This transmission structure comprises a two sided dielectric board having a thin film strip 46 of conductive material formed on the top side of the substrate.
  • a ground plane 48 formed on the top side of the substrate and insulated from the strip 46 of conductive material.
  • Another ground plane 50 is also formed on the top side of the substrate and insulated from the strip 46 conductive material.
  • a third ground plane not shown in FIG 5 coats the bottom side of the substrate.
  • a set of vias 42 extend through the substrate from the top side to the bottom side and connect the first and second ground planes 48 and 50 to the ground plane on the bottom side of the substrate.
  • an "edge via" 44 in the form of a notch or cutout in the edge of the substrate, is placed near the unbalanced ground pad of the demultiplexer 14, so that the currents can reach the backside ground plane as soon as possible, thus redistributing uniformly before arriving at the other side of the board.
  • the wirebonds 40 can be eliminated by means of a flip chip arrangement involving the ground plane previously on the bottom side of the board 13 now on the top side of the board 13 and the films 14c, 46, 48, and 50 on the bottom side of the board 13 directly contacting the appropriate terminals of the photodiode GSG interface 38 and the differential demultiplexer GS interface 39.
  • Other embodiments will occur to those skilled in the art.

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  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Light Receiving Elements (AREA)

Abstract

L'invention concerne un nouveau récepteur optoélectronique fonctionnant à plus de 100 Gbit/s qui fait appel à l'intégration hybride d'une photodiode et d'un démultiplexeur. La photodiode convertit un flux de données optiques à haute vitesse en un flux de données électriques qui est entré dans un démultiplexeur électronique. La photodiode et le démultiplexeur sont reliés entre eux par une nouvelle structure de transmission par faisceaux hertziens planaire.
PCT/US2008/002527 2007-03-14 2008-02-26 Récepteur optoélectronique à haute vitesse Ceased WO2008112077A1 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US90695607P 2007-03-14 2007-03-14
US60/906,956 2007-03-14
US11/772,105 US7917042B2 (en) 2007-06-29 2007-06-29 High speed optoelectronic receiver
US11/772,105 2007-06-29

Publications (1)

Publication Number Publication Date
WO2008112077A1 true WO2008112077A1 (fr) 2008-09-18

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8409817B2 (en) 2007-09-21 2013-04-02 Idexx Laboratories, Inc. Methods and compositions for detection of Ehrlichia chaffeensis (VLPT)

Citations (4)

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Publication number Priority date Publication date Assignee Title
US5611008A (en) * 1996-01-26 1997-03-11 Hughes Aircraft Company Substrate system for optoelectronic/microwave circuits
JPH11214904A (ja) * 1998-01-22 1999-08-06 Nippon Soken Inc 平衡不平衡変換器
US20020164107A1 (en) * 2001-05-07 2002-11-07 Boudreau Robert A. Electrical transmission frequency of SiOB
US20070132526A1 (en) * 2005-12-08 2007-06-14 Industrial Technology Research Institute Balanced-to-unbalanced transformer embedded with filter

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5611008A (en) * 1996-01-26 1997-03-11 Hughes Aircraft Company Substrate system for optoelectronic/microwave circuits
JPH11214904A (ja) * 1998-01-22 1999-08-06 Nippon Soken Inc 平衡不平衡変換器
US20020164107A1 (en) * 2001-05-07 2002-11-07 Boudreau Robert A. Electrical transmission frequency of SiOB
US20070132526A1 (en) * 2005-12-08 2007-06-14 Industrial Technology Research Institute Balanced-to-unbalanced transformer embedded with filter

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Title
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TAKAHASHI K ET AL: "High speed multichip modules using flip chip mount technology for 10Gbps optical transmission systems", ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE, 2001. PROCEEDINGS., 5 1ST MAY 29 - JUN 1, 2001, PISCATAWAY, NJ, USA,IEEE, 29 May 2001 (2001-05-29), pages 974 - 979, XP010546231, ISBN: 978-0-7803-7040-1 *
UMBACH A ET AL: "Photoreceivers for 100 Gbit/s Applications", 1 July 2007, LEOS SUMMER TOPICAL MEETINGS, 2007 DIGEST OF THE IEEE, IEEE, PI, PAGE(S) 258 - 259, ISBN: 978-1-4244-0926-6, XP031125424 *
USHIROZAWA M ET AL: "Small-sized 10Gb/s Transmitter And Receiver With Modulator Integrated DFB-LD And Multichip-module", 15 September 1996, 19960915; 19960915 - 19960919, PAGE(S) 195 - 198, XP010303132 *
YUJI AKAHORI ET AL: "High-Speed Photoreceivers Using Solder Bumps and Microstrip Lines Formed on a Silicon Optical Bench", IEEE PHOTONICS TECHNOLOGY LETTERS, IEEE SERVICE CENTER, PISCATAWAY, NJ, US, vol. 11, no. 4, 1 April 1999 (1999-04-01), XP011046520, ISSN: 1041-1135 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8409817B2 (en) 2007-09-21 2013-04-02 Idexx Laboratories, Inc. Methods and compositions for detection of Ehrlichia chaffeensis (VLPT)

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