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WO2007138250A3 - Computer system with lock- protected queues for sending and receiving data - Google Patents

Computer system with lock- protected queues for sending and receiving data Download PDF

Info

Publication number
WO2007138250A3
WO2007138250A3 PCT/GB2007/001821 GB2007001821W WO2007138250A3 WO 2007138250 A3 WO2007138250 A3 WO 2007138250A3 GB 2007001821 W GB2007001821 W GB 2007001821W WO 2007138250 A3 WO2007138250 A3 WO 2007138250A3
Authority
WO
WIPO (PCT)
Prior art keywords
lock
computer system
sending
queue
receiving data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/GB2007/001821
Other languages
French (fr)
Other versions
WO2007138250A2 (en
Inventor
David James Riddoch
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Solarflare Communications Inc
Original Assignee
Solarflare Communications Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GB0610506A external-priority patent/GB0610506D0/en
Priority claimed from GB0613556A external-priority patent/GB0613556D0/en
Priority claimed from GB0613975A external-priority patent/GB0613975D0/en
Priority claimed from GB0614220A external-priority patent/GB0614220D0/en
Application filed by Solarflare Communications Inc filed Critical Solarflare Communications Inc
Publication of WO2007138250A2 publication Critical patent/WO2007138250A2/en
Publication of WO2007138250A3 publication Critical patent/WO2007138250A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/544—Buffers; Shared memory; Pipes
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G06F9/526—Mutual exclusion algorithms
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/901—Buffering arrangements using storage descriptor, e.g. read or write pointers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9047—Buffering arrangements including multiple buffers, e.g. buffer pools
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9084—Reactions to storage capacity overflow
    • H04L49/9089—Reactions to storage capacity overflow replacing packets in a storage arrangement, e.g. pushout
    • H04L49/9094—Arrangements for simultaneous transmit and receive, e.g. simultaneous reading/writing from/to the storage element
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/54—Indexing scheme relating to G06F9/54
    • G06F2209/542—Intercept
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/54—Indexing scheme relating to G06F9/54
    • G06F2209/548—Queue

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer And Data Communications (AREA)

Abstract

A computer system which is capable of running a plurality of concurrent processes, the system being operable to establish a first queue in which items related to data for sending over the network are enqueued, and to which access is governed by a lock; and when a first of said processes is denied access to the first queue by the lock, to enqueue the items in to a second queue to which access is not governed by the lock, and to arrange for the items in the second queue to be dequeued with items in the first queue.
PCT/GB2007/001821 2006-05-25 2007-05-18 Computer system with lock- protected queues for sending and receiving data Ceased WO2007138250A2 (en)

Applications Claiming Priority (8)

Application Number Priority Date Filing Date Title
GB0610506A GB0610506D0 (en) 2006-05-25 2006-05-25 Computer system
GB0610506.8 2006-05-25
GB0613556A GB0613556D0 (en) 2006-07-07 2006-07-07 Computer system
GB0613556.0 2006-07-07
GB0613975.2 2006-07-13
GB0613975A GB0613975D0 (en) 2006-07-13 2006-07-13 Computer System
GB0614220.2 2006-07-17
GB0614220A GB0614220D0 (en) 2006-07-17 2006-07-17 Computer system

Publications (2)

Publication Number Publication Date
WO2007138250A2 WO2007138250A2 (en) 2007-12-06
WO2007138250A3 true WO2007138250A3 (en) 2008-01-17

Family

ID=38426542

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/GB2007/001821 Ceased WO2007138250A2 (en) 2006-05-25 2007-05-18 Computer system with lock- protected queues for sending and receiving data

Country Status (1)

Country Link
WO (1) WO2007138250A2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8346975B2 (en) 2009-03-30 2013-01-01 International Business Machines Corporation Serialized access to an I/O adapter through atomic operation

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9047121B2 (en) * 2013-02-25 2015-06-02 Texas Instruments Incorporated System and method for scheduling jobs in a multi-core processor
US9778963B2 (en) * 2014-03-31 2017-10-03 Solarflare Communications, Inc. Ordered event notification
US10547559B2 (en) * 2015-12-26 2020-01-28 Intel Corporation Application-level network queueing

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0466339A2 (en) * 1990-07-13 1992-01-15 International Business Machines Corporation A method of passing task messages in a data processing system
US5758184A (en) * 1995-04-24 1998-05-26 Microsoft Corporation System for performing asynchronous file operations requested by runnable threads by processing completion messages with different queue thread and checking for completion by runnable threads
US5951706A (en) * 1997-06-30 1999-09-14 International Business Machines Corporation Method of independent simultaneous queueing of message descriptors
EP1213892A2 (en) * 2000-12-05 2002-06-12 Microsoft Corporation System and method for implementing a client side HTTP stack
US20020174258A1 (en) * 2001-05-18 2002-11-21 Dale Michele Zampetti System and method for providing non-blocking shared structures
WO2003055157A1 (en) * 2001-12-19 2003-07-03 Inrange Technologies Corporation Deferred queuing in a buffered switch
US6651146B1 (en) * 2000-02-24 2003-11-18 International Business Machines Corporation Method and apparatus for managing access contention to a linear list without the use of locks
US20040031044A1 (en) * 2002-08-08 2004-02-12 Jones Richard A. Method for increasing performance of select and poll applications without recompilation
WO2005018179A1 (en) * 2003-08-07 2005-02-24 Intel Corporation Method, system, and article of manufacture for utilizing host memory from an offload adapter

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0466339A2 (en) * 1990-07-13 1992-01-15 International Business Machines Corporation A method of passing task messages in a data processing system
US5758184A (en) * 1995-04-24 1998-05-26 Microsoft Corporation System for performing asynchronous file operations requested by runnable threads by processing completion messages with different queue thread and checking for completion by runnable threads
US5951706A (en) * 1997-06-30 1999-09-14 International Business Machines Corporation Method of independent simultaneous queueing of message descriptors
US6651146B1 (en) * 2000-02-24 2003-11-18 International Business Machines Corporation Method and apparatus for managing access contention to a linear list without the use of locks
EP1213892A2 (en) * 2000-12-05 2002-06-12 Microsoft Corporation System and method for implementing a client side HTTP stack
US20020174258A1 (en) * 2001-05-18 2002-11-21 Dale Michele Zampetti System and method for providing non-blocking shared structures
WO2003055157A1 (en) * 2001-12-19 2003-07-03 Inrange Technologies Corporation Deferred queuing in a buffered switch
US20040031044A1 (en) * 2002-08-08 2004-02-12 Jones Richard A. Method for increasing performance of select and poll applications without recompilation
WO2005018179A1 (en) * 2003-08-07 2005-02-24 Intel Corporation Method, system, and article of manufacture for utilizing host memory from an offload adapter

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
FINKEL R A: "An Operating Systems Vade Mecum, CONCURRENCY", OPERATING SYSTEMS VADE MECUM, ENGLEWOOD CLIFFS, PRENTICE HALL, US, 1989, pages 274 - 313, XP002266962 *
KNESTRICK, C C: "Lunar: A User-Level Stack Library for Network Emulation", THESIS, 24 February 2004 (2004-02-24), pages I-VII,1 - 58, XP002457631 *
LEA D: "Concurrent Programming in Java: Design Principles and Patterns, Second Edition", PRENTICE HALL, 25 October 1999 (1999-10-25), pages 1 - 18, XP002457351, ISBN: 0-201-31009-0 *
MICHAEL M M ET AL: "SIMPLE, FAST, AND PRACTICAL NON-BLOCKING AND BLOCKING CONCURRENT QUEUE ALGORITHMS", PROCEEDINGS OF THE 15TH ANNUAL SYMPOSIUM ON PRINCIPLES OF DISTRIBUTED COMPUTING. PHILADELPHIA, MAY 23 - 26, 1996, PROCEEDINGS OF THE ANNUAL SYMPOSIUM ON PRINCIPLES OF DISTRIBUTED COMPUTING (PODC), NEW YORK, ACM, US, vol. SYMP. 15, 23 May 1996 (1996-05-23), pages 267 - 275, XP000681051, ISBN: 0-89791-800-2 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8346975B2 (en) 2009-03-30 2013-01-01 International Business Machines Corporation Serialized access to an I/O adapter through atomic operation

Also Published As

Publication number Publication date
WO2007138250A2 (en) 2007-12-06

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