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WO2007116352A3 - Image processing system having a simd processor and a processing unit communicating via a multi-ported memory - Google Patents

Image processing system having a simd processor and a processing unit communicating via a multi-ported memory Download PDF

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Publication number
WO2007116352A3
WO2007116352A3 PCT/IB2007/051220 IB2007051220W WO2007116352A3 WO 2007116352 A3 WO2007116352 A3 WO 2007116352A3 IB 2007051220 W IB2007051220 W IB 2007051220W WO 2007116352 A3 WO2007116352 A3 WO 2007116352A3
Authority
WO
WIPO (PCT)
Prior art keywords
processing unit
image processing
processing system
simd
memory unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/IB2007/051220
Other languages
French (fr)
Other versions
WO2007116352A2 (en
Inventor
Johannes B Schueler
Richard P Kleihorst
Alexander A Danilin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of WO2007116352A2 publication Critical patent/WO2007116352A2/en
Publication of WO2007116352A3 publication Critical patent/WO2007116352A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V10/00—Arrangements for image or video recognition or understanding
    • G06V10/94—Hardware or software architectures specially adapted for image or video understanding
    • G06V10/955—Hardware or software architectures specially adapted for image or video understanding using specific electronic processors

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Multimedia (AREA)
  • Image Processing (AREA)

Abstract

The invention relates to an image processing system, and to a wireless camera comprising such an image processing system. The invention relies on the idea that a Single Instruction Multiple Data processor (SIMD) and a processing unit (DSP) should communicate to each other by means of an addressable memory unit (RAM), to which they both can write data objects and from which they both can read data objects. The Single Instruction Multiple Data processor is connected to the memory unit in a special way, i.e. some of the address input lines of the memory unit must be connected to the output lines of the first processing unit. The Single Instruction Multiple Data processor (SIMD) can address the memory unit via its output channels. In this way the streaming mode of the SIMD processor can be transformed into a data mode, which is compatible with the mode of operation of the processing unit (DSP).
PCT/IB2007/051220 2006-04-12 2007-04-05 Image processing system having a simd processor and a processing unit communicating via a multi-ported memory Ceased WO2007116352A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP06112514.2 2006-04-12
EP06112514 2006-04-12

Publications (2)

Publication Number Publication Date
WO2007116352A2 WO2007116352A2 (en) 2007-10-18
WO2007116352A3 true WO2007116352A3 (en) 2007-12-21

Family

ID=38462505

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2007/051220 Ceased WO2007116352A2 (en) 2006-04-12 2007-04-05 Image processing system having a simd processor and a processing unit communicating via a multi-ported memory

Country Status (1)

Country Link
WO (1) WO2007116352A2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8570393B2 (en) 2007-11-30 2013-10-29 Cognex Corporation System and method for processing image data relative to a focus of attention within the overall image
US9451142B2 (en) 2007-11-30 2016-09-20 Cognex Corporation Vision sensors, systems, and methods
US9189670B2 (en) 2009-02-11 2015-11-17 Cognex Corporation System and method for capturing and detecting symbology features and parameters
US9336008B2 (en) * 2011-12-28 2016-05-10 Intel Corporation Shared function multi-ported ROM apparatus and method
CN103400153B (en) * 2013-07-15 2017-05-10 中国航天科工集团第三研究院第八三五八研究所 Serial filtering matching method and system for real-time image identification

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0547633A1 (en) * 1991-12-18 1993-06-23 Eastman Kodak Company Storage and retrieval of digitized photographic images
EP0851237A2 (en) * 1996-12-18 1998-07-01 Cal Corporation Apparatus and method for detecting a target light source

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0547633A1 (en) * 1991-12-18 1993-06-23 Eastman Kodak Company Storage and retrieval of digitized photographic images
EP0851237A2 (en) * 1996-12-18 1998-07-01 Cal Corporation Apparatus and method for detecting a target light source

Non-Patent Citations (5)

* Cited by examiner, † Cited by third party
Title
HANS-JOACHIM STOLBERG ET AL: "HiBRID-SoC: A Multi-Core SoC Architecture for Multimedia Signal Processing", THE JOURNAL OF VLSI SIGNAL PROCESSING, KLUWER ACADEMIC PUBLISHERS, BO, vol. 41, no. 1, 1 August 2005 (2005-08-01), pages 9 - 20, XP019216661, ISSN: 1573-109X *
KLEIHORST R ET AL: "A smart camera for face recognition", IMAGE PROCESSING, 2004. ICIP '04. 2004 INTERNATIONAL CONFERENCE ON SINGAPORE 24-27 OCT. 2004, PISCATAWAY, NJ, USA,IEEE, 24 October 2004 (2004-10-24), pages 2849 - 2852, XP010786390, ISBN: 0-7803-8554-3 *
KLEIHORST R P ET AL: "Xetal: a low-power high-performance smart camera processor", ISCAS 2001. PROCEEDINGS OF THE 2001 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS. SYDNEY, AUSTRALIA, MAY 6 - 9, 2001, IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, NEW YORK, NY : IEEE, US, vol. VOL. 1 OF 5, 6 May 2001 (2001-05-06), pages 215 - 218, XP010542070, ISBN: 0-7803-6685-9 *
PENG LIU ET AL: "MediaSoC: a system-on-chip architecture for multimedia application", VLSI DESIGN AND VIDEO TECHNOLOGY, 2005. PROCEEDINGS OF 2005 IEEE INTERNATIONAL WORKSHOP ON SUZHOU, CHINA MAY 28-30, 2005, PISCATAWAY, NJ, USA,IEEE, 28 May 2005 (2005-05-28), pages 161 - 164, XP010833341, ISBN: 0-7803-9005-9 *
WANG BAOLI ET AL: "The design and implementation of DSP TMS320C40 parallel processing system", SIGNAL PROCESSING, 1996., 3RD INTERNATIONAL CONFERENCE ON BEIJING, CHINA 14-18 OCT. 1996, NEW YORK, NY, USA,IEEE, US, vol. 1, 14 October 1996 (1996-10-14), pages 453 - 456, XP010209544, ISBN: 0-7803-2912-0 *

Also Published As

Publication number Publication date
WO2007116352A2 (en) 2007-10-18

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