WO2007085979A2 - Electronic device comprising multiple device elements - Google Patents

Abstract

An electronic device comprises a plurality of device elements, each device element being associated with an active matrix switching device (12;32). The switching devices (12;32) are grouped together into one or more regions (24), with switching devices within the or each region being physically packed more densely than the packing density of the device elements. Connecting lines (30) electrically couple each device element to its respective switching device. This provides a layout of the active matrix array in which the active elements (TFTs, MIMs, diodes or other devices) are concentrated together in only certain areas of the active matrix array. This enables the output production rate to be increased.

Description

Electronic device comprising multiple device elements

This invention relates to electronic devices with multiple active device elements, for example active matrix array devices. The invention is particularly aimed at low cost fabrication techniques for such devices.

The active matrix switching device in active matrix array devices is most commonly a transistor, although diodes or MIM (metal-insulator-metal) devices may also be used as switching devices. The most promising and viable low cost manufacturing technology for such devices is currently considered to be amorphous silicon thin film processing, for fabricating thin film transistors which form the active elements of an active matrix array. Other technologies are also being investigated, such as organic semiconductor based transistors. However, deposition based active matrix switches, such as amorphous silicon TFTs or diodes, are technologically more advanced and are industrially completely mature.

It has additionally been recognised that the ability to deposit thin film layers onto flexible (polymer or metal foil) substrates would enable significant further fabrication cost reductions, as this would enable the use of roll-to-roll processing rather than processing based on large glass substrates.

There is therefore currently a significant amount of research effort to enable fabrication of low cost roll-to-roll active matrix devices, particularly using thin film deposition based switching technology, with the most promising technology being amorphous silicon processing.

Current research is also largely focused on display applications, as the largest potential market for any emerging technology, and a number of different display technologies are being investigated as possible alternatives to the current dominant liquid crystal display technology. Electrophoretic display devices are one example of bistable display technology being investigated, which use the movement of particles within an electric field to provide a selective light scattering or absorption function.

In one example, white particles are suspended in an absorptive liquid, and the electric field can be used to bring the particles to the surface of the device. In this position, they may perform a light scattering function, so that the display appears white. Movement away from the top surface enables the colour of the liquid to be seen, for example black. In another example, there may be two types of particles, for example black negatively charged particles and white positively charged particles, suspended in a transparent fluid. There are a number of different possible configurations.

It has been recognised that electrophoretic display devices enable low power consumption as a result of their bistability (an image is retained with no voltage applied), and they can enable thin display devices to be formed as there is no need for a backlight or polariser. They may also be made from plastics materials, and there is also the possibility of low cost roll-to-roll processing in the manufacture of such displays.

These types of display can be used in a variety of applications. For example, the incorporation of an electrophoretic display device into a smart card has been proposed, taking advantage of the thin and intrinsically flexible nature of a plastic substrate, as well the low power consumption. Large electrophoretic display devices have been proposed as electronic billboards, providing advertisement images which can be electronically updated. Thus, these displays provide a further opportunity to reduce manufacturing costs, particularly if passive matrix drive schemes are used. However, when active matrix addressing is desired, the manufacture of the active matrix array still has significant cost implications. One major issue concerning the use of deposition based technology is the limited speed of deposition of the semiconductor layer (for example amorphous silicon). To obtain the required quality silicon layer, deposition rates are typically of the order of O.lnm/sec, whilst layer thickness of around lOOnm are required. This results in typical layer growth times of tens of minutes. These long growth times need not in themselves provide a limiting factor for the production output rate of a roll-to-roll based active matrix manufacturing line, as it is always possible to pass the roll through a series of such deposition machines either in series or even in parallel (if a series of rolls are processed simultaneously). However, such deposition machines will be very expensive, resulting in a large investment for realising a manufacturing capability.

It would therefore be desirable to increase the processing speed of a low cost (for example roll-to-roll) active matrix manufacturing line without requiring considerable additional manufacturing equipment costs. According to the invention, there is provided an electronic device comprising a plurality of device elements, each device element being associated with a switching device, wherein the switching devices are grouped together into one or more regions, with switching devices within the or each region being physically packed more densely than the packing density of the device elements, and wherein connecting lines electrically couple each device element to its respective switching device.

This provides a layout of the multiple element electronic device (such as an active matrix array device) in which the active elements, which may for example be TFTs, MIMs, diodes or other devices, are concentrated together in only certain areas of the active matrix array. This enables the output production rate to be increased of a low cost active matrix manufacturing line. This increase in output production rate may for example be increased by an order of magnitude or more without having to increase the number of deposition machines. The switching devices are preferably arranged in the at least one region as an array of switching devices. The array of switching devices then can have a pitch in a first direction equal to the pitch of the device elements in the corresponding first direction and a pitch in a perpendicular second direction smaller than the pitch of the device elements in the corresponding second direction. In this way, the layout of the switching devices is compressed along one axis to enable them to occupy a smaller area than the area of the device elements.

Alternatively, the array of switching devices can have a pitch in a first direction smaller than the pitch of the device elements in the corresponding first direction and a pitch in a perpendicular second direction smaller than the pitch of the device elements in the corresponding second direction. In this way, the switching devices are packed more closely in both dimensions.

The array of device elements preferably define an input or output interface (for example a display output or a 2D light sensor input), and the one or more regions comprise at least one region along an edge of the input or output interface area. The switching devices are then defined in a strip along one edge of the active matrix array. The at least one region can be outside the input or output interface area.

Alternatively, the one or more regions can comprise at least one elongated region parallel to an edge of the input or output interface area and within a central part of the input or output interface area. This enables the switching devices within the area to connect to device elements on opposite sides, and this enables the connecting lines to the device elements to be further apart.

The elongated region can then be within a part of the input or output interface area. By forming the connecting lines in a different layer within the structure to the device elements it is possible for the input or output interface not to be interrupted by the elongated region.

The switching devices can all be arranged in a single region with substantially uniform packing density, or they may be arranged in more regions, for example two regions which are separated by a region of the device element array. The two regions can for example be along opposite edges of the input or output interface area and outside the input or output interface area. Alternatively, the two regions can be inside the input or output interface area and divide the area into three regions.

In all cases, the higher packing density means that the switching devices occupy a smaller area, and therefore need a smaller area of deposited semiconductor than the area of the device element array.

In one example, at least one dimension of the or each region is less than a device element pitch, so that the region can be between rows or columns of device elements.

The device may be a display, for example an electrophoretic display, and it may have a flexible polymer substrate. This enables the device to be manufactured using roll- to-roll processing. Alternatively the device may be another output or actuator device, such as a light or heat generating device, or an input or sensing device such as a touch sensor, keypad, fingerprint sensor, document scanner, X-ray detector or a micro-fluidic or MEMS device.

The invention also provides a method of manufacturing an electronic device, comprising: defining a plurality of device elements over a substrate in a region defining an input or output interface area; defining a plurality of switching devices grouped together into one or more regions over the substrate, each device element being associated with one or more of the switching devices, and wherein the switching devices within the or each region are physically packed more densely than the packing density of the device elements; and defining connecting lines which electrically couple each device element to a respective switching device. This method enables the layer used to form the switching devices to be provided over an area which is a fraction of the size of the area occupied by the device element array.

Preferably, defining the switching devices comprises depositing a semiconductor layer in a discrete region or regions corresponding to the one or more regions, the discrete region or regions being smaller in area than the input or output interface area.

Examples of the invention will now be described in detail with reference to the accompanying drawings, in which:

Figure 1 shows a conventional active matrix layout; Figure 2 is used to show conceptually a first embodiment of the invention compared to the prior art of Figure 1;

Figure 3 shows one possible use of layers to define the example of layout of the invention shown in Figure 2;

Figure 4 shows in more detail one example of how the connection between active matrix elements and their associated switching devices is implemented;

Figure 5 shows a second example of how the connection between active matrix elements and their associated switching devices is implemented; Figure 6 is used to show conceptually a second embodiment of the invention;

Figure 7 is used to show conceptually a third embodiment of the invention; Figure 8 is used to show conceptually a fourth embodiment of the invention; and

Figure 9 is used to show conceptually a fifth embodiment of the invention.

Figure 1 shows a conventional active matrix array device. The amorphous silicon TFTs (or other active matrix switching devices) are distributed uniformly across the entire display, with a switch (or arrangement of switches) provided at each pixel of the display.

Each pixel has a pixel has a pixel electrode 10 and a single transistor 12 which connects to row conductors 14 and column conductors 16. A row driver circuit is shown as 18 and a column driver circuit is shown as 19. As the pixels cover the entire active area of the display, switches are required at all points on the display. As a consequence, the display is manufactured by depositing the amorphous silicon across the entire substrate to the full thickness required to form the TFTs. As mentioned above, this silicon layer has a thickness of the order of lOOnm. The deposition over the full area is generally provided by a plurality of deposition sources, situated adjacent to each other in order to provide a uniform layer thickness of the deposited layer across the entire substrate. This step is followed by lithography steps to remove unwanted amorphous silicon, leaving the TFT switches at all points across the display. This invention is based on the realisation that the deposition step has inefficiency resulting from the fact that the majority of the space within the pixel is not occupied by switching devices, yet the deposition covers the full display area. For example, in the case of a larger sized display, which would typically be manufactured using a low cost active matrix, the pixel size may typically be around lmm x lmm, whilst the active element occupies an area of around 0.1mm x 0.1 mm, representing only around 1% of the total area. The remaining 99% of the deposited semiconductor (covering the full area) is removed. This invention makes more effective use of the deposited semiconductor material by providing the switching devices only at certain portions of the area of the active matrix. As a result, the semiconductor layer only needs to be deposited at those areas where switching devices are to be realised, and consequently either the deposition sources may be placed further apart or only a single deposition source may be required for an entire active matrix.

The regions between the areas then do not contain any switching devices, and there is no requirement for any semiconductor deposition in these areas. After the deposition of one area is completed, and in the case of roll-to-roll processing, the roll can then be advanced by the distance to the next area where deposition is required and the process can then be repeated.

The invention is shown conceptually in Figure 2 as a comparison between the conventional active matrix array layout 20 and an example of layout 22 of the invention. As shown in layout 22, the active matrix area 24 has a smaller area than the display area 26. The display area includes an array of the device elements (display pixels in this example) and these are distributed uniformly in the display area 26. The horizontal and vertical pitch of the display pixels need not be the same, but the array is uniform throughout the display area. There is at least one switching element for each pixel, and there may be a small circuit of switching elements for each pixel. These switching elements may together be considered as a "switching device" which can be a single transistor or a small circuit, as the case may be. These switching devices are packed more densely than the display pixels. Thus, the switching devices are in a region which (including the spacing between switching devices) has an area less than the area occupied by the device elements (including the spacing between device elements).

The packing density of the switching devices may be increased compared to the packing density of the device elements in one direction only or in two directions, as will be apparent from the examples below. Consequently, the same deposition source can manufacture the semiconductor film for an entire display in a time which is shorter than for the conventional display by a ratio of the total device area to the switch containing area. As this area ratio may be as large as 100:1, there is the opportunity to increase the output of a low cost (for example roll-to- roll) active matrix manufacturing line by an order of magnitude or more. A first example of the invention will be described in greater detail with reference to Figure 3, which shows the layout 22 of the active matrix shown in Figure 2 on the left, and a schematic cross section of the active matrix on the right, illustrating the metal lines and switches at different levels.

The left part of Figure 3 shows connecting lines 30 which electrically couple each device element to its respective switching device.

The right part of Figure 3 shows the switching device 32 provided on the substrate 34, with metal lines 36 defining the row and columns within the switching device array, as well as providing the connecting lines 30. The pixel electrodes 36 connect to the lines 30 using vias 38 through a polymer dielectric layer. The switching devices (TFT switches in this example) are formed as a closely packed arrangement of switches within the area where the semiconductor is deposited. There are sufficient switches fabricated to connect to all of the pixel electrodes in the display.

Figure 4 shows the layout of the active matrix switches within a top area of the array. In the simplified example of Figure 4, there are three rows 40 of device elements, and three corresponding rows 42 of switching devices. The switching devices are compacted in the vertical direction compared to the layout of Figure 1.

The switches are electrically connected in the form of their own matrix array, by connecting the TFT gate electrodes to a row electrode (for controlling the switches row- by-row) and connecting the TFT source electrodes to the column electrode (for providing data to the pixels). This is the conventional electrical arrangement of the active matrix, but the physical layout is very different, because the TFTs are no longer situated within a respective pixel.

The TFTs are instead connected to their respective pixels by the conducting wires 30, running in this embodiment in the direction of the columns, and situated between two adjacent columns. In this manner, the wires do not cross over any other electrical lines once beyond the portion of the display with the active matrix switching devices.

The number of pixels which can be connected in this manner depends upon the size of the pixel and the width of the conducting lines. For example, with large 2mm wide pixels, and 10 micron wide lines, around 100 rows of pixels could be driven from one central active matrix area. As mentioned above, the wires are preferably situated in the lower layers (for example formed from the metal layer used for the column lines), and run under the pixel electrodes. They are then connected to the pixel electrodes through vias.

In the case of a reflective display, the wires will be invisible as they are below the pixel electrode. In a transmissive display, however, the wires must be made from a transparent conductor, as they will run under the pixel.

The switches do not need to be arranged in the simple row and column arrangement of Figure 4. The arrangement of Figure 4 reduces the active area of the substrate by compacting the layout of the TFTs in one dimension. This technique can result in a space saving of the order of 5-10, and no space saving is realised in the column direction in this example.

However, in an alternative arrangement shown in Figure 5, it is possible to increase the packing density of the switching devices in both dimensions.

Three rows 50 of switching devices can now be used to connect to six rows of pixels (only three of which are shown).

The switching device array no longer mirrors the device element array. For example TFTs which are physically arranged in the same row in the switching device array connect to different lines pixels rows in the display.

If necessary, pixel storage capacitances can also be fabricated in the active matrix area of the substrate.

A limitation of the layouts described above is that the number of rows of pixels which can be addressed from the active area is limited by the number of wires 30 which can be fitted into the area between two column electrodes. Figure 6 shows an alternative layout of the active matrix, again with a single area used to physically house the switching devices, but providing an increased number of addressable rows.

In this example, pixels are addressed on both sides of the active area 60, which divides the device element array into two portions, 62,64. In this manner, twice as many rows of pixels may be addressed, and the array of switching devices may be considered as two arrays back-to-back.

In a further embodiment, the number of rows to be addressed can again be increased if the wires connecting the pixels to the TFTs are stacked on top of each other. This can for example be achieved by using both the column metal and the row metal layers. In this manner, the number of rows could potentially be doubled. Clearly, it is possible to combine both of these approaches, to enable driving of four times the number of rows from a single active matrix area.

An alternative (or additional) way to increase the number of rows which can be addressed is to arrange for the width of the pixel (i.e. the distance between columns) to exceed its height. In this manner, more connecting wires could be accommodated in a pixel of the same area.

The layout of Figure 5 is particularly suitable for reflective displays, as the active matrix area forms a portion of the display area (otherwise there would be a gap in the display). This results in a layout with pixel electrodes situated both above the active area and adjacent to the active area.

A limitation of the embodiments described above is that for larger or higher resolution displays, there may be insufficient area of semiconductor deposited from a single deposition source to accommodate all the switching devices (and their associated row and column lines and storage capacitors and other circuitry) required for the display. It is however possible to enlarge the active area for example by providing a second deposition source, or moving the roll and depositing in an area adjacent to the first deposition area.

However, an alternative approach is shown in Figure 7, in which the switching devices for the entire active matrix are concentrated into multiple areas which do not contact each other. This arrangement has the advantage that pixels on both sides of the active areas of all deposited areas may be contacted (using the approach explained with reference to Figure 6), which further increases the number of pixels which can be contacted.

In Figure 7, two regions 70,72 of the switching devices divide the device element area into three portions 73,74,75. Row driver circuits 76 are located at the edges adjacent the regions, and the column driver circuits 77 connect to the switching devices in the active regions using data lines 78, which connect to all active regions. It is also possible to incorporate (portions of) the driver circuits into the active region of the device.

Again, the switching devices are realised as a closely packed arrangement of switches within the areas where the semiconductor is deposited. There are now sufficient switches fabricated to connect to all of the pixel electrodes in the display, but the switches are distributed across several areas.

Each of these areas has the increased packing density, with the result that the total area of the areas is less than the area of the device element array. The layout is again particularly suitable for reflective displays, as the active matrix area again ideally forms a portion of the display area, with pixel electrodes situated both above the active area and adjacent to the active area.

To implement this approach for a transmissive display, two active areas 80 can be situated adjacent to the display area 82 as shown in Figure 8. In this case, a transparent conductor will be required only for the wires to connect the switching devices to the pixel electrodes. In the example of Figure 8, the switching device regions are outside the display area.

If the switching device regions are to be incorporated into the display area of a transmissive display, this can only realistically be incorporated if the width of the switching device regions can be made less than the pitch of the pixels in the display, or if the entire active matrix can be made fairly transparent. If this is not the case, a highly visible line will appear across the display, which would be undesirable.

Figure 9 shows the possibility of the width of the switching device regions 90 being less than the width of a pixel 92 in the display, which is most appropriate for displays with extremely large pixels, for example of the order of lcm or more.

Figure 9 shows some of the pixel connection wires 94 and some of the data lines 96 from the column driver.

Different examples of the invention have been described above, but in the context of a display device. In such a device, an output interface is provided as a display pixel array. It is apparent that the invention could equally applied to low cost active matrices for other non-display applications, such as arrays of sensors for e.g. document scanners, fingerprint sensors, or X-ray detectors. In these devices, an input interface is provided as an array of sensor cells. Alternatively, the invention could be applied to general touch sensitive devices, output devices providing either lighting or heat, microfluidic devices or MEMS devices.

The invention is of particular benefit for methods using the deposition of semiconductor areas to be processed to form the switching devices. The most likely current applications will use amorphous silicon deposition, for example by a PECVD process, but processes using other semiconductor deposition techniques and materials or alternatively printing or coating techniques could benefit from the use of a smaller area of semiconductor material. This provides a reduction in waste as well as improving the production rate, and these two factors may have different importance in different applications. The design of the display device, or other possible devices, has not be described in detail, as the alternatives will be well known to those skilled in the art. As one example, the display technology may be electrophoretic displays. The invention then enables the low cost advantages of this type of display to be maintained even when an active matrix addressing scheme is to be used. The invention can equally be applied to liquid crystal displays.

The invention provides an alternative approach to the device layout. This layout requires additional connections to be made between the device element area(s) and the switching device area(s), and the implementation of these connections will also be readily apparent to those skilled in the art. The roll-to-roll manufacturing method has only been described briefly, as again there are numerous possible implementations which will be apparent. The invention provides a smaller area requiring certain of the processing steps, and this can give time savings, particularly when the roll-to-roll movement direction is perpendicular to the length of the elongate regions containing the switching devices. The switching devices of an active matrix array are those devices or circuits which provide independent access to the device elements by means of an array of row and column conductors. In addition, the switching devices may form a (portion of a) drive circuit or a logic circuit for example for receiving sensed signals. The device elements are the input or output devices, typically pixels in the form of display cells, sensor cells or output devices. Thus, the discrete areas of active circuitry may incorporate not only the standard active matrix addressing elements, but also additional circuitry which can be implemented with the same device technology as the active switching elements.

Various other modifications will be apparent to those skilled in the art.

Claims

CLAIMS:

1. An electronic device comprising a plurality of device elements (10), each device element being associated with a switching device (12;32), wherein the switching devices (12;32) are grouped together into one or more regions (24; 60; 73,7 '4, 75; 80), with switching devices (12;32) within the or each region being physically packed more densely than the packing density of the device elements (10), and wherein connecting lines (30) electrically couple each device element to its respective switching device.

2. A device as claimed in claim 1, comprising an active matrix array device in which the device elements (10) are provided in the form of an array or arrays.

3. A device as claimed in claim 1 or 2, wherein the switching devices (12;32) are arranged in the at least one region as an array of switching devices.

4. A device as claimed in claim 3, wherein the array of switching devices has a pitch in a first direction equal to the pitch of the device elements (10) in the corresponding first direction and has a pitch in a perpendicular second direction smaller than the pitch of the device elements in the corresponding second direction.

5. A device as claimed in claim 3, wherein the array of switching devices has a pitch in a first direction smaller than the pitch of the device elements (10) in the corresponding first direction and has a pitch in a perpendicular second direction smaller than the pitch of the device elements (10) in the corresponding second direction.

6. A device as claimed in any preceding claim, wherein the array of device elements define an input or output interface, and wherein the one or more regions comprise at least one region (24) along an edge of the input or output interface area (26).

7. A device as claimed in claim 6, wherein the at least one region (24) is outside the input or output interface area (26).

8. A device as claimed in any one of claims 1 to 4, wherein the device elements define an input or output interface, and wherein the one or more regions comprise at least one elongated region (60) within a central part of the input or output interface area.

9. A device as claimed in claim 8, wherein the elongated region (60) is parallel to an edge of the input or output interface area.

10. A device as claimed in claim 8 or 9, wherein the connecting lines (30) extend from the elongate region (60) to device elements on opposite sides of the elongate region

(60).

11. A device as claimed in claim 8, 9 or 10, wherein the elongated region (60) is within a part of the input or output interface area, and wherein the connecting lines are formed in a different layer within the structure to the device elements.

12. A device as claimed in any preceding claim, wherein the switching devices (12;32) are all arranged in a single region (24;60) with substantially uniform packing density.

13. A device as claimed in any one of claims 1 to 11, wherein the switching devices (12;32) are arranged in at least two regions (70,72;80) which are separated by a region (74;80) occupied by the device elements.

14. A device as claimed in claim 13, wherein the device elements (10) define an input or output interface, and wherein the at least two regions (80) are along opposite edges of the input or output interface area (82).

15. A device as claimed in claim 14, wherein the at least two regions (80) are outside the input or output interface area (82).

16. A device as claimed in claim 13, wherein the at least two regions (70,72) are inside the input or output interface area and divide the area into three regions (73,74,75).

17. A device as claimed in any preceding claim wherein one dimension of the or each region (90) is less than a device element pitch.

18. A device as claimed in any preceding claim, comprising a display device.

19. A device as claimed in claim 18, comprising an electrophoretic display device.

20. A device as claimed in any preceding claim, comprising a flexible or foil substrate (34).

21. A device as claimed in claim 20, wherein the device is manufactured using roll-to-roll processing.

22. A method of manufacturing an electronic device, comprising: defining a plurality of device elements (10) over a substrate in a region defining an input or output interface area (26; 62,64; 73,7 '4, 75; 82); defining a plurality of switching devices (12;32) grouped together into one or more regions (24; 60; 73,74,75; 80) over the substrate, each device element (10) being associated with one or more of the switching devices (12;32), and wherein the switching devices within the or each region are physically packed more densely than the packing density of the device elements; and defining connecting lines (30) which electrically couple each device element to a respective switching device.

23. A method as claimed in claim 22, wherein defining the switching devices comprises depositing a semiconductor layer in a discrete region or regions corresponding to the one or more regions (24; 60; 73,74,75; 80), the discrete region or regions being smaller in area than the input or output interface area.

24. A method as claimed in claim 23, wherein the semiconductor layer comprise amorphous silicon.

25. A method as claimed in claim 23 or 24, comprising a roll-to-roll manufacturing process.

26. A method as claimed in any one of claims 22 to 25, comprising a method of manufacturing an active matrix display device, the device elements comprising display pixels, and defining a display output interface.