WO2006107405A3 - Data archive system and method - Google Patents
Data archive system and method Download PDFInfo
- Publication number
- WO2006107405A3 WO2006107405A3 PCT/US2006/004830 US2006004830W WO2006107405A3 WO 2006107405 A3 WO2006107405 A3 WO 2006107405A3 US 2006004830 W US2006004830 W US 2006004830W WO 2006107405 A3 WO2006107405 A3 WO 2006107405A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- memory module
- data archive
- manager
- solid state
- communications bus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0629—Configuration or reconfiguration of storage systems
- G06F3/0632—Configuration or reconfiguration of storage systems by initialisation or re-initialisation of storage systems
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0604—Improving or facilitating administration, e.g. storage management
- G06F3/0607—Improving or facilitating administration, e.g. storage management by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0683—Plurality of storage devices
- G06F3/0685—Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0683—Plurality of storage devices
- G06F3/0688—Non-volatile semiconductor memory arrays
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Human Computer Interaction (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Hardware Redundancy (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Abstract
A data archive system and method are provided. A first version is a data archive connected to a high speed Ethernet link. The data archive includes a main central processing unit system coupled with both an Ethernet interface module and a communications switching circuit. A high speed communications bus communicatively couples the communications switching circuit with memory module managers. Each memory module manager includes a manager control module, a manager communications bus, and a plurality of paired memory module interfaces and solid state memory modules. The memory module interfaces are communicatively coupled with the manager communications bus and are each configured to enable (1.) communicative coupling of at least one solid state memory module, and (2.) hot swapping, coupling and decoupling of at least one solid state memory module. Certain alternate versions of the data archive include or present Redundant Array of Independent/ Inexpensive Disk architecture, capabilities, elements, and/or circuits.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US65225905P | 2005-02-11 | 2005-02-11 | |
| US60/652,259 | 2005-02-11 | ||
| US11/210,150 US20060072239A1 (en) | 2004-08-23 | 2005-08-23 | Portable memory system and device |
| US11/210,150 | 2005-08-23 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| WO2006107405A2 WO2006107405A2 (en) | 2006-10-12 |
| WO2006107405A3 true WO2006107405A3 (en) | 2007-11-08 |
Family
ID=37073900
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US2006/004830 Ceased WO2006107405A2 (en) | 2005-02-11 | 2006-02-10 | Data archive system and method |
Country Status (1)
| Country | Link |
|---|---|
| WO (1) | WO2006107405A2 (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5218510A (en) * | 1991-09-23 | 1993-06-08 | Bradford Company | Suspension packaging for static-sensitive products |
| US20010044863A1 (en) * | 1992-03-16 | 2001-11-22 | Takashi Oeda | Computer system including a device with a plurality of identifiers |
| US20040143703A1 (en) * | 2003-01-21 | 2004-07-22 | Emberty Robert George | Serial EEPROM for volume identification and drive specific information storage in a hard disk drive library |
-
2006
- 2006-02-10 WO PCT/US2006/004830 patent/WO2006107405A2/en not_active Ceased
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5218510A (en) * | 1991-09-23 | 1993-06-08 | Bradford Company | Suspension packaging for static-sensitive products |
| US20010044863A1 (en) * | 1992-03-16 | 2001-11-22 | Takashi Oeda | Computer system including a device with a plurality of identifiers |
| US20040143703A1 (en) * | 2003-01-21 | 2004-07-22 | Emberty Robert George | Serial EEPROM for volume identification and drive specific information storage in a hard disk drive library |
Non-Patent Citations (1)
| Title |
|---|
| TARATORIN A.: "Introduction to PRML", 1996, pages 1 - 2, Retrieved from the Internet <URL:http://www.guzik.com/solutions_chapter9.shtml> * |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2006107405A2 (en) | 2006-10-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI756488B (en) | SYSTEM AND METHOD FOR SUPPORTING MULTI-MODE AND/OR MULTI-SPEED NON-VOLATILE MEMORY (NVM) EXPRESS (NVMe) OVER FABRICS (NVMe-oF) DEVICES AND STORAGE DEVICE | |
| US6993610B2 (en) | Data storage system having two disk drive controllers each having transmit and receive path connected in common to single port of disk drive via buffer or multiplexer | |
| US6408343B1 (en) | Apparatus and method for failover detection | |
| US10467170B2 (en) | Storage array including a bridge module interconnect to provide bridge connections to different protocol bridge protocol modules | |
| EP1643608B1 (en) | Individually and redundantly addressable solid-state power controllers on multiple modules in a power distribution assembly | |
| CN107562667A (en) | Adapter card and method for supporting device with two interfaces | |
| US7519854B2 (en) | Internal failover path for SAS disk drive enclosure | |
| CN102446534A (en) | Systems and methods for connecting multiple hard drives | |
| TWI603202B (en) | Apparatuses and systems with redirection of lane resources | |
| US6954819B2 (en) | Peripheral bus switch to maintain continuous peripheral bus interconnect system operation | |
| EP0800675B1 (en) | Bus arrangement related to a magazine | |
| US6378084B1 (en) | Enclosure processor with failover capability | |
| CN1909559B (en) | Interface board based on rapid periphery components interconnection and method for switching main-control board | |
| US20030070027A1 (en) | System for interconnecting peripheral host computer and data storage equipment having signal repeater means | |
| KR20020046955A (en) | Method and system for directly interconnecting storage devices to controller cards within a highly available storage system | |
| AU768503B2 (en) | Fault tolerant virtual VMEbus backplane design | |
| US6675250B1 (en) | Fault tolerant communications using a universal serial bus | |
| WO2006107405A3 (en) | Data archive system and method | |
| US6542952B1 (en) | PCI computer system having a transition module and method of operation | |
| EP1895395A9 (en) | Information processing apparatus and control method therefor | |
| WO2006095838B1 (en) | Single port/multiple ring implementation of a data switch | |
| CN1815907A (en) | Intelligent master-and-spare exchanging system and relative tele communication apparatus | |
| US20060041703A1 (en) | Computer systems with multiple system configurations | |
| US20020075860A1 (en) | High density serverlets utilizing high speed data bus | |
| AU753341B2 (en) | Interconnection circuit for electronic modules |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
| NENP | Non-entry into the national phase |
Ref country code: DE |
|
| 122 | Ep: pct application non-entry in european phase |
Ref document number: 06734809 Country of ref document: EP Kind code of ref document: A2 |