[go: up one dir, main page]

WO2006025139A1 - Circuit board, manufacturing method thereof, and electronic parts using the same - Google Patents

Circuit board, manufacturing method thereof, and electronic parts using the same Download PDF

Info

Publication number
WO2006025139A1
WO2006025139A1 PCT/JP2005/010047 JP2005010047W WO2006025139A1 WO 2006025139 A1 WO2006025139 A1 WO 2006025139A1 JP 2005010047 W JP2005010047 W JP 2005010047W WO 2006025139 A1 WO2006025139 A1 WO 2006025139A1
Authority
WO
WIPO (PCT)
Prior art keywords
circuit board
hole
insulating substrate
main surface
conductive film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2005/010047
Other languages
French (fr)
Japanese (ja)
Inventor
Mitsuyuki Kimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2006531290A priority Critical patent/JPWO2006025139A1/en
Publication of WO2006025139A1 publication Critical patent/WO2006025139A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic elements; Electromechanical resonators
    • H03H9/02Details
    • H03H9/05Holders or supports
    • H03H9/10Mounting in enclosures
    • H03H9/1007Mounting in enclosures for bulk acoustic wave [BAW] devices
    • H03H9/1014Mounting in enclosures for bulk acoustic wave [BAW] devices the enclosure being defined by a frame built on a substrate and a cap, the frame having no mechanical contact with the BAW device
    • H03H9/1021Mounting in enclosures for bulk acoustic wave [BAW] devices the enclosure being defined by a frame built on a substrate and a cap, the frame having no mechanical contact with the BAW device the BAW device being of the cantilever type
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H03H3/007Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
    • H03H3/02Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4046Through-connections; Vertical interconnect access [VIA] connections using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10234Metallic balls
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04Soldering or other types of metallurgic bonding
    • H05K2203/049Wire bonding
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections

Definitions

  • Circuit board manufacturing method thereof, and electronic component using the same
  • the present invention relates to a circuit board on which a quartz crystal semiconductor element or the like is mounted, a manufacturing method thereof, and an electronic component using the circuit board.
  • an electrically conductive portion is formed by filling a through hole formed in a ceramic substrate with a conductive composition. Further, as a formation method thereof, a method of forming an electrically conductive portion through a drying step and a heat treatment step after filling the through hole with a conductive composition was used. Further, as an electronic component, there is one in which a circuit board on which an electronic element is mounted is covered and protected with a lid (for example, see Patent Document 1).
  • FIG. 7 is a cross-sectional view of an electronic component using the conventional circuit board described in Patent Document 1.
  • the conductive composition 108 is filled with a conductive composition in a through hole 110 formed at a predetermined position of the insulating substrate 102 having a ceramic material force, and heat treatment is performed. Is formed.
  • the conductive composition a mixture containing silver particles, glass powder, and a vehicle is used. In this mixture, the silver particle content is in the range of 85 to 90% by weight with respect to the total amount of silver particles and glass powder, and the soft temperature of the contained glass powder is about 550 to 650 ° C.
  • the insulating substrate 102 a substrate including an inorganic powder and a binder that is fired and then finished into a flat plate shape and further provided with a recess 105 is used.
  • the electronic component 104 includes a wiring layer 106 and a wiring layer 107, an electronic element (crystal piece) 101 mounted on the wiring layer 107, and a lid provided on the insulating substrate 102 so as to cover the electronic element 101.
  • the lid 103 and the wiring layer 107, and the electronic element 101 and the wiring layer 107 are bonded together via a bonding layer 109 having a force of gold-tin alloy or gold-silicon alloy.
  • Patent Document 1 Japanese Patent Laid-Open No. 2003-101181
  • a generally used ceramic substrate must contain an aggregate of alumina particles having a minimum diameter of about 0.7 ⁇ m. Since there is a grain boundary between the alumina particles, the thickness is 150 ⁇ m. If an electronic component is configured using a ceramic substrate of m or less, it may be difficult to maintain the airtightness of the electronic component. Further, when the thickness of the ceramic substrate is reduced, there is a possibility that the ceramic substrate is warped by heat treatment when forming the electrically conductive portion. For this reason, there is a possibility that it is more difficult to maintain the airtightness of the electronic component.
  • the present invention solves the above-described problem, and can be reduced in thickness and can be reduced in manufacturing cost, a manufacturing method thereof, and an electronic part capable of improving hermeticity using the circuit board Provide goods.
  • a first circuit board of the present invention connects an insulating substrate and a first main surface of the insulating substrate and a second main surface of the insulating substrate formed in the thickness direction of the insulating substrate.
  • a circuit board including a through hole for
  • a conductive film formed on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces;
  • a metal member that fills the through-hole and is bonded to the conductive film is bonded to the conductive film.
  • a second circuit board of the present invention connects an insulating substrate and a first main surface of the insulating substrate and a second main surface of the insulating substrate formed in the thickness direction of the insulating substrate.
  • a circuit board including a through hole for
  • a conductive film formed on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces;
  • the first manufacturing method of the circuit board of the present invention In the thickness direction of the insulating substrate, a through hole for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate is formed,
  • the through-hole is filled with a substantially spherical metal member, and the metal member and the conductive film are joined.
  • a through hole for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate is formed,
  • the opening on the first main surface side in the through hole is closed with a substantially spherical metal member, and the metal member and the conductive film are joined.
  • a first electronic component of the present invention connects an insulating substrate and a first main surface of the insulating substrate and a second main surface of the insulating substrate formed in the thickness direction of the insulating substrate.
  • a circuit board including a through hole for
  • An electronic component including a lid that covers the electronic element
  • the circuit board includes a conductive film formed on an inner wall of the through hole and around the opening of the through hole in the first and second main surfaces, and is filled in the through hole and bonded to the conductive film.
  • the electronic element is mounted on the conductive film formed around the opening in the first main surface via a conductive material.
  • a second electronic component of the present invention connects an insulating substrate and a first main surface of the insulating substrate and a second main surface of the insulating substrate formed in the thickness direction of the insulating substrate.
  • a circuit board including a through hole for
  • An electronic component including a lid that covers the electronic element
  • the circuit board includes a conductive film formed on an inner wall of the through hole and around the opening of the through hole in the first and second main surfaces, and an opening on the first main surface side in the through hole.
  • the electronic element is mounted on the metal member, and includes a metal member bonded to the conductive film.
  • the heat treatment at a high temperature is not required when forming the electrically conductive portion, for example, a substrate (such as a glass substrate) other than the ceramic substrate is used. Can do. Therefore, the thickness can be reduced and the manufacturing cost can be reduced. Further, according to the electronic component of the present invention, since the circuit board of the present invention is used, the airtightness can be improved.
  • FIG. 1A is a cross-sectional view of a circuit board according to a first embodiment of the present invention
  • FIG. 1B is a schematic plan view of the circuit board according to the first embodiment of the present invention.
  • FIG. 2 is a cross-sectional view of an electronic component according to a second embodiment of the present invention.
  • 3A to 3J are process cross-sectional views illustrating an example of a method for manufacturing an electronic component according to a second embodiment of the present invention.
  • FIG. 4 is a cross-sectional view of a circuit board according to a third embodiment of the present invention.
  • FIG. 5 is a cross-sectional view of an electronic component according to a fourth embodiment of the present invention.
  • 6A to 6D are process cross-sectional views illustrating an example of a method for manufacturing an electronic component according to a fourth embodiment of the present invention.
  • FIG. 7 is a cross-sectional view of an electronic component using a conventional circuit board.
  • a first circuit board of the present invention is for connecting an insulating substrate and a first main surface of the insulating substrate and a second main surface of the insulating substrate formed in the thickness direction of the insulating substrate. Including through-holes.
  • the “first main surface” means the main surface of the insulating substrate on the side where the electronic element is mounted when the circuit board is applied to an electronic component described later. The same applies to the second circuit board of the present invention described later.
  • the insulating substrate is preferably a glass substrate.
  • the glass substrate has a seamless structure made by connecting silicon oxide molecules, so it is denser than the ceramic substrate. Has been. Therefore, when the insulating substrate is a glass substrate, the airtightness of the electronic component can be improved when applied to the electronic component described later.
  • the glass substrate for example, borosilicate glass thermal expansion coefficient of 3 X 10- 6 Z ° C ⁇ 8 X 10- 6 Z ° C, also the thermal expansion coefficient of 3 X 10- 6 Z ° C ⁇ 8 X 10- 6 Z ° alkali-free glass and C, or a thermal expansion coefficient of 8 X 10- 6 Z ° C ⁇ 1. soda glass of 2 X 10- 5 Z ° C can be used.
  • the thickness is, for example, about 100 to 300 ⁇ m.
  • the diameter of the through hole gradually decreases from the first main surface to the second main surface. This is because the metal member described later can be easily filled.
  • the diameter of the through hole may be set appropriately according to the thickness of the insulating substrate.For example, when the thickness of the insulating substrate is 150 m, the opening diameter on the first main surface side is 100 m or more and 150 ⁇ m or less. The opening diameter on the second main surface side should be in the range of 50 ⁇ m to 100 ⁇ m.
  • the through hole can be formed by, for example, a sand blast method or an etching method. In particular, when a through hole is formed by the sand blast method, the inner wall of the through hole is appropriately roughened by the blasting medium, so that the adhesion between the inner wall of the through hole and the conductive film described later is improved.
  • the first circuit board of the present invention includes a conductive film formed on the inner wall of the through hole, the periphery of the opening of the through hole on the first and second main surfaces, and the through hole.
  • the metal member also has a metal material force such as gold and copper, for example, and therefore does not require a heat treatment at a high temperature (for example, 750 ° C. or higher) when joining the conductive film. Therefore, since a substrate other than a ceramic substrate (eg, a glass substrate) can be used, a circuit substrate that can be reduced in thickness and can be manufactured at a reduced cost can be provided.
  • the conductive film for example, a metal thin film made of chromium, titanium, nickel, noradium, gold or the like can be used.
  • the conductive film may be formed of one layer of metal thin film or a plurality of layers of metal thin film.
  • a conductive film in which a palladium thin film and a gold thin film are sequentially laminated on a chromium thin film is preferable. This is because the palladium thin film functions as an adhesion layer between the gold thin film and the chromium thin film because the palladium thin film is interposed between the chromium thin film and the gold thin film serving as the protective layer.
  • each metal thin film in the above combination is, for example, about 0.05-0.
  • a chromium thin film about 0.01-0.05 m for a radium thin film, 0.3 to 1. ⁇ ⁇ m.
  • the above-mentioned metal thin film can be formed using means such as a sputtering method or a plating method.
  • a chromium thin film, a titanium thin film, or a palladium thin film when a chromium thin film, a titanium thin film, or a palladium thin film is formed to a thickness of about 0.05 to 0.1 ⁇ m, it can be formed by a sputtering method.
  • a nickel thin film when a nickel thin film is formed to a thickness of about 1 to 2 m, it can be formed using an electroless plating method.
  • a gold thin film is formed to a thickness of about 0.3 to 1.0 m as a protective layer for a metal thin film formed by a sputtering method or a plating method, the electrolytic plating method should be used. Can do.
  • the gold thin film can also be formed by a sputtering method.
  • a silver thin film or a copper thin film may be used instead of the gold thin film.
  • a silver thin film or a copper thin film can be formed by a sputtering method or a plating method in the
  • the metal member is preferably formed in a substantially spherical shape. This is a force that enables uniform bonding between the conductive film formed on the inner wall of the through hole and the metal member.
  • the insulating substrate is formed in a sheet shape! When applied to electronic components, which will be described later, it is also a force that facilitates thinning of electronic components. Further, when the insulating substrate is formed in a sheet shape, when an electronic component to be described later is manufactured, a plurality of electronic elements are simultaneously mounted on the insulating substrate, and then the electronic components are separated into individual electronic components. As a result, it is possible to simplify the mounting process of the electronic element.
  • the second circuit board of the present invention is the same as the first circuit board of the present invention described above, and the first main substrate of the insulating substrate formed in the thickness direction of the insulating substrate.
  • the second circuit board of the present invention includes a metal member that closes the opening on the first main surface side of the through hole and is bonded to the conductive film.
  • the second circuit board of the present invention may be a circuit board in which the metal member is formed in a substantially hemispherical shape and the hemispherical surface of the metal member and the conductive film are joined. .
  • the conductive film formed around the opening on the first main surface side and the metal member can be uniformly joined, and the flat surface portion located on the opposite side of the hemispherical surface of the metal member. In addition, it is a force that can mount an electronic element to be described later.
  • the insulating substrate used for the second circuit board of the present invention is formed in a sheet shape, which is preferably a glass substrate, like the first circuit board of the present invention described above. It is preferable.
  • the first manufacturing method of the circuit board of the present invention is a preferable manufacturing method for manufacturing the above-described first circuit board of the present invention. Therefore, in the following description, description overlapping with the above-described first circuit board of the present invention may be omitted.
  • the first manufacturing method of the circuit board of the present invention first, through holes for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate are formed in the thickness direction of the insulating substrate. Then, a conductive film is formed on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces.
  • the through hole and conductive film are formed as described above.
  • the insulating substrate to be used is preferably formed in a sheet shape that is preferably a glass substrate in the same manner as the first circuit board of the present invention described above.
  • the through-hole is filled with a substantially spherical metal member, and the metal member and the conductive film are joined.
  • the “substantially spherical metal member” can be formed by using, for example, a single tool, and details of the forming method will be described later.
  • the ultrasonic combined thermocompression method is a method in which ultrasonic waves are applied and bonded to a bonding portion between the metal member and the conductive film while applying heat and a load.
  • the thermocompression bonding method using ultrasonic waves is a conventional method in which heat and load are applied (thermocompression bonding method).
  • the second manufacturing method of the circuit board of the present invention is a preferable manufacturing method for manufacturing the above-described second circuit board of the present invention.
  • the description which overlaps with the 1st manufacturing method of the 2nd circuit board of this invention mentioned above and the circuit board of this invention mentioned above may be abbreviate
  • the second manufacturing method of the circuit board of the present invention first, through holes for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate are formed in the thickness direction of the insulating substrate. Then, a conductive film is formed on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces. Then, the opening on the first main surface side of the through hole is closed with a substantially spherical metal member, and the metal member and the conductive film are joined. Thereby, the above-described second circuit board of the present invention can be easily manufactured.
  • the insulating substrate used in the second manufacturing method of the circuit board of the present invention is preferably a glass substrate as in the above-described first manufacturing method of the circuit board of the present invention. It is preferable that it is formed in a shape. Moreover, when joining the said metal member and the said electrically conductive film, it is preferable to join by the ultrasonic thermocompression bonding method as mentioned above.
  • the first electronic component of the present invention is an electronic component including the above-described first circuit board of the present invention. Therefore, in the following description, description of the same components as those of the above-described first circuit board of the present invention may be omitted.
  • a first electronic component of the present invention includes the above-described first circuit board of the present invention, an electronic element mounted on the first circuit board, and a lid that covers the electronic element. And the electron The element is mounted on a region formed around the opening of the first hole in the first main surface of the conductive film of the first circuit board of the present invention described above via a conductive material.
  • a substrate other than a ceramic substrate for example, a glass substrate
  • the airtightness of the electronic component can be improved.
  • the electronic element for example, a crystal piece or a semiconductor element can be used.
  • the electronic component is a crystal resonator.
  • the material for the lid is not particularly limited, and for example, glass or the like can be used.
  • the thickness of the lid is, for example, about 0.3 to 0.4 mm.
  • a conductive adhesive in which silver fine particles are mixed as conductive fine particles with epoxy resin can be used.
  • a recess may be formed in a region of the first main surface facing the electronic element. This is because it is easy to secure the operation space of the electronic element.
  • the second electronic component of the present invention is an electronic component including the above-described second circuit board of the present invention.
  • description of the same components as those of the second circuit board of the present invention described above and the first electronic component of the present invention described above may be omitted.
  • a second electronic component of the present invention includes the above-described second circuit board of the present invention, an electronic element mounted on the second circuit board, and a lid that covers the electronic element. And the said electronic element is mounted in the metal member of the 2nd circuit board of this invention mentioned above. Therefore, according to the second electronic component of the present invention, as with the first electronic component of the present invention described above, the air tightness of the electronic component can be improved.
  • the distance between the electronic element and the conductive film is preferably in the range of 30 to 50 ⁇ m. This is because it is possible to reduce the thickness of the electronic component while securing the operation space of the electronic element.
  • FIG. 1A 1 is a cross-sectional view of a circuit board according to a first embodiment of the present invention.
  • FIG. 1B to be referred to is a schematic plan view of the circuit board according to the first embodiment of the present invention.
  • the circuit board according to the first embodiment is an example of the first circuit board of the present invention described above.
  • the circuit board 1 is insulated from the first main surface 10a of the insulating substrate 10 and the insulating substrate 10 formed in the thickness direction of the insulating substrate 10.
  • a through hole 11 for connecting the second main surface 10 b of the substrate 10, a first conductive film 12, a second conductive film 13, and the through hole 11 are filled and joined to the first conductive film 12.
  • Metal member 14 The first conductive film 12 includes an electron element connection electrode 12a formed around the opening of the through hole 11 on the first main surface 10a, a connection conductive film 12b formed on the inner wall of the through hole 11, and a second main film 10a. It consists of an external connection electrode 12c formed around the opening of the through hole 11 on the surface 1 Ob.
  • the first conductive film 12 corresponds to the “conductive film” recited in the claims.
  • the metal member 14 is made of a metal material such as gold or copper, for example, heat treatment at a high temperature (for example, 750 ° C or higher) is not required when the metal member 14 is bonded to the first conductive film 12. As a result, the circuit board 1 can be thinned and the manufacturing cost can be reduced. Further, the metal member 14 is formed in a substantially spherical shape. As a result, the connection between the connection conductive film 12b formed on the inner wall of the through hole 11 and the metal member 14 can be performed uniformly.
  • the second conductive film 13 is formed on the outer edge portion of the first main surface 10a of the insulating substrate 10.
  • the second conductive film 13 serves as an adhesive surface with a lid, which will be described later, when an electronic component is manufactured using the circuit board 1.
  • the diameter of the through hole 11 gradually decreases from the first main surface 10a to the second main surface 10b.
  • the metal member 14 can be filled easily.
  • a recess 10c is formed in the first main surface 10a.
  • FIG. 2 to be referred to is a cross-sectional view of an electronic component according to the second embodiment of the present invention.
  • the electronic component according to the second embodiment includes the circuit board 1 according to the first embodiment described above. Therefore, in Figure 2, Figure 1 and The same components are denoted by the same reference numerals, and the description thereof is omitted.
  • the electronic component according to the second embodiment is an example of the first electronic component of the present invention described above.
  • the electronic component 2 according to the second embodiment includes the circuit board 1 according to the first embodiment described above, the electronic element 20 mounted on the circuit board 1, and the electronic element 20.
  • Covering lid 21 and The lid 21 has a concave portion 21a formed using a sandblasting method or an etching method.
  • the electronic element 20 is mounted on the electronic element connection electrode 12a via the conductive adhesive 22.
  • the second conductive film 13 and the lid 21 are bonded via an adhesive layer 23.
  • a gold-tin plating film, a gold-tin paste, low-melting glass, or the like can be used.
  • the electronic component 2 according to the second embodiment uses the circuit board 1 according to the first embodiment of the present invention described above, the airtightness of the electronic component 2 can be improved.
  • a recess 10 c is formed in a region of the first main surface 10 a of the insulating substrate 10 facing the electronic element 20. Thereby, it becomes easy to secure an operation space of the electronic element 20 (between the lid 21 and the first main surface 10a).
  • the distance between the lid 21 and the first main surface 10a be 200 / zm or more. In that case, the depth of the recess 10c may be about 30 to 50 ⁇ m.
  • the lid body can perform frequency adjustment by irradiating the crystal piece with a laser even after the electronic element 20 is covered with the lid body 21. It is preferable to use the glass having high laser transmittance as the constituent material 21. When a light emitting diode is used as the electronic element 20, it is preferable to use glass as a constituent material of the lid body 21 because it has a high visible light transmittance.
  • 3A to J to be referred to are process sectional views showing an example of a method for manufacturing the electronic component 2 according to the second embodiment.
  • 3A to 3G are process cross-sectional views illustrating an example of a method for manufacturing the circuit board 1 according to the first embodiment described above.
  • 3A to 3J the same components as those in FIGS. 1 and 2 are denoted by the same reference numerals, and the description thereof is omitted.
  • the thermal expansion coefficient of 3 X 10- 6 Z ° C ⁇ 8 X 10- 6 Z alkali-free glass force ° C is also an insulating substrate 10 (thickness: 0.99 m) prepared To do.
  • a recess 10c having a depth of 30 to 50 / zm is formed on the first main surface 10a of the insulating substrate 10 by sandblasting.
  • through-holes 11 are formed from the first main surface 10a side of the insulating substrate 10 by the sandblast method.
  • the through hole 11 is preferably formed so that the diameter of the through hole 11 gradually decreases from the first main surface 10a to the second main surface 10b.
  • the opening diameter of the through hole 11 may be, for example, 120 m on the first main surface 10a side and 80 m on the second main surface 10b side.
  • a conductive film 7 is formed on the surface of the insulating substrate 10 and the inner wall of the through hole 11.
  • a chromium thin film (thickness: 0.1 ⁇ m) is formed on the surface of the insulating substrate 10 and the inner wall of the through hole 11 by a sputtering method, and a palladium thin film (thickness: 0) is formed on the chromium thin film by a sputtering method.
  • a gold thin film is formed on the palladium thin film by an electrolytic plating method.
  • a conductive film 7 made of a thin film can be formed.
  • the diameter of the metal member 14 is about 3 to 4 times that of the metal wire 5. Therefore, for example, when the metal member 14 has a diameter of about 120 / zm, the metal wire 5 having a diameter of about 38 m may be used.
  • the metal member 14 generates a spark discharge between the tip of the metal wire 5 and a torch (not shown). It is formed from cocoon that can be born.
  • the first tool 6 is lowered, and the metal member 14 is filled into the through hole 11 while being pressed with a load of 100 to 300 gf.
  • the ultrasonic vibration is supported in the Y direction in FIG. 1B for the tool 6 and at the same time the mechanical vibration in the X direction in FIG.
  • the ultrasonic oscillation frequency at this time is preferably 60 to 120 kHz, and the ultrasonic application time is preferably 10 to 50 ms.
  • the vibration width in the X direction at this time is preferably about the same as the vibration width of ultrasonic waves (for example, 5 to: LO m).
  • the metal member 14 and the connection conductive film 12b are joined.
  • the lift tool 6 is raised and the metal wire 5 is cut.
  • the circuit board 1 shown in FIG. 3G is obtained.
  • a substantially spherical metal member 14 is formed simultaneously with the cutting, so that the circuit board 1 is continuously manufactured. Workability is improved.
  • the connection conductive film 12b and the metal member 14 are firmly bonded. Therefore, as described later, when the electronic component 2 (see FIG. 3J) is formed, the through-hole 11 is highly sealed, so that the electronic component 2 with high airtightness can be obtained.
  • the electronic device 20 is mounted on the electronic device connection electrode 12a of the circuit board 1 via the conductive adhesive 22.
  • the external connection electrode 12c of the circuit board 1 is electrically connected to the electronic element 20 via the connection conductive film 12b, the electronic element connection electrode 12a, and the conductive adhesive 22.
  • a crystal piece is used as the electronic element 20.
  • the heating time at this time is preferably 30 to 60 seconds.
  • the circuit board 1 and the lid 21 are joined by the adhesive layer 23, and the electronic component 2 having high airtightness is obtained (FIG. 3J).
  • the electronic component 2 shown in FIG. 3J has dimensions of 2. Omm and 1.6 mm and a thickness of 0.5 mm in the long and short cylinder directions, respectively, but the thickness is 0.5 mm. Can be manufactured at low cost. For example, electronic parts having dimensions of 1.6 mm and 1. Omm and a thickness of 0.4 mm can be manufactured at a low cost.
  • FIG. 4 to be referred to is a cross-sectional view of a circuit board according to the third embodiment of the present invention.
  • the circuit board according to the third embodiment is an example of the above-described second circuit board of the present invention.
  • FIG. 4 the same components as those in FIG. 1 are denoted by the same reference numerals, and the description thereof is omitted.
  • the circuit board 1 according to the first embodiment is placed in the through hole l ib of the two through holes 1 la and l ib ( The metal member 14 is filled as in FIG. 1A.
  • the through hole 11 a the opening on the first main surface 1 Oa side is closed with the metal member 30.
  • the metal member 30 is formed in a substantially hemispherical shape, and the hemispherical surface and the first conductive film 12 are joined. Further, no recess is formed on the first main surface 10a.
  • Others are the same as the circuit board 1 (refer FIG. 1A) which concerns on 1st Embodiment mentioned above.
  • an electronic element can be directly mounted on the flat surface portion 30a of the metal member 30 without using a conductive material or the like.
  • electronic components can be easily made thinner.
  • the diameter gradually decreases from the first main surface 10a to the second main surface 10b, but the diameter of the through holes 11a and l ib does not gradually decrease. May be. That is, the opening force on the first main surface 10a side of the through holes 11a, ib may be reduced by the same force vj as the opening diameter on the second main surface 10b side of the through holes 11a, ib.
  • FIG. 5 to be referred to is a cross-sectional view of an electronic component according to the fourth embodiment of the present invention.
  • the electronic component according to the fourth embodiment includes the circuit board 3 according to the third embodiment described above.
  • the electronic component according to the fourth embodiment is an example of the second electronic component of the present invention described above.
  • FIG. 5 the same components as those in FIGS. 2 and 4 are denoted by the same reference numerals, and the description thereof is omitted.
  • the electronic component 4 according to the fourth embodiment is different from the electronic component 2 according to the second embodiment described above (see FIG. 2) as a circuit board according to the third embodiment.
  • This is the same as the electronic component 2 according to the second embodiment except that the substrate 3 is used and the electronic element 20 is directly mounted on the metal member 30. Therefore, the electronic component 4 according to the fourth embodiment has the same effect as the electronic component 2 according to the second embodiment described above, and the electronic element 20 is mounted without using a conductive material or the like. Therefore, it is possible to easily reduce the thickness.
  • the distance between the electronic element 20 and the electronic element connection electrode 12a is preferably in the range of 30-50 ⁇ m.
  • 6A to 6D to be referred to are process sectional views showing an example of a method for manufacturing the electronic component 4 according to the fourth embodiment.
  • 6A and 6B are process cross-sectional views illustrating an example of a method for manufacturing the circuit board 3 according to the above-described third embodiment.
  • 6A to 6D the same components as those in FIGS. 4 and 5 are denoted by the same reference numerals, and the description thereof is omitted.
  • an insulating substrate 10 provided with through-holes 11a, l ib and first and second conductive films 12, 13 is prepared by performing the same steps as in FIGS. Figure 6A).
  • connection conductive film 12b and the metal member 14 are joined in the same manner as in the process of FIG. 3F described above. ( Figure 6B).
  • the opening portion on the first main surface 10a side of the through hole 11a is closed with a substantially spherical metal member 30 using a milling tool 6 (see FIG. 3F), and the first conductive film 12 and the metal member are closed. 30 is joined (not shown).
  • the metal member 30 by pressing the metal member 30 with a load of 100 to 300 gf, the metal member 30 formed into a substantially spherical shape by using the chiral tool 6 is as shown in FIG. 6B.
  • a substantially hemispherical metal member 30 is obtained.
  • the metal wire 5 see FIG.
  • the electrode portion of the electronic element 20 is formed on the metal member 30 of the circuit board 3.
  • the electronic member 20 is mounted by joining the metal member 30 and the electrode portion by a thermocompression bonding method using ultrasonic waves. Then, the electronic component 4 shown in FIG. 6D is obtained by performing the same steps as those shown in FIGS.
  • Unsaturated steam pressurization test according to IEC International Electrotechnical Commission: International Electrotechnical Commission
  • 68-2- 66 Test conditions: 130 ° C, 85% relative humidity (RH)) , 40 hours
  • the result of an airtightness test (100 each) confirmed that the airtightness of the electronic component 4 was good.
  • “good airtightness” refers to a state in which the leak rate of 1 X 1CT 9 Pa 'n ⁇ Zsec or less can be maintained in an airtightness tester using helium as the tracer gas.
  • the above airtightness test is a test based on JISZ2331 “Helium leak test method (vacuum spraying method)”, and was performed using a helium leak detector manufactured by ULVAC, Inc. as an airtightness tester.
  • the present invention is useful for an electronic component including a quartz piece or a semiconductor element, and particularly useful for an electronic component that requires high airtightness.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

A circuit board capable of being thinned and reduced in its manufacturing cost, a method for manufacturing the circuit board, and electronic parts using the circuit board and capable of improving gastightness. The circuit board (1) comprises an insulating substrate (10), a through hole (11) formed in the thickness direction of the insulating substrate (10) for connecting the first principal plane (10a) of the insulating substrate (10) and the second principal plane (10b) of the insulating substrate (10), a conductive film (12) formed on the inner wall of the through hole (11) and around the opening of the through hole (11) on the first and second principal planes (10a and 10b); and a metallic member (14) fitted in the through hole (11) and jointed to the conductive film (12).

Description

明 細 書  Specification

回路基板とその製造方法及びこれを用いた電子部品  Circuit board, manufacturing method thereof, and electronic component using the same

技術分野  Technical field

[0001] 本発明は、水晶片ゃ半導体素子等を搭載する回路基板とその製造方法及びこれ を用 、た電子部品に関する。  TECHNICAL FIELD [0001] The present invention relates to a circuit board on which a quartz crystal semiconductor element or the like is mounted, a manufacturing method thereof, and an electronic component using the circuit board.

背景技術  Background art

[0002] 従来、水晶片ゃ半導体素子等の電子素子を搭載する回路基板では、セラミック基 板に形成されたスルーホールに導電性組成物を充填し電気的導通部を形成してい た。また、その形成方法としては、スルーホール内へ導電性組成物を充填した後、乾 燥工程及び熱処理工程を経て電気的導通部を形成する方法を用いて!/、た。更に、 電子部品としては、電子素子を搭載した回路基板を蓋体で覆 ヽ保護して ヽるものが あった (例えば、特許文献 1参照)。  Conventionally, in a circuit board on which an electronic element such as a crystal piece or a semiconductor element is mounted, an electrically conductive portion is formed by filling a through hole formed in a ceramic substrate with a conductive composition. Further, as a formation method thereof, a method of forming an electrically conductive portion through a drying step and a heat treatment step after filling the through hole with a conductive composition was used. Further, as an electronic component, there is one in which a circuit board on which an electronic element is mounted is covered and protected with a lid (for example, see Patent Document 1).

[0003] 図 7は、特許文献 1に記載された従来の回路基板を用いた電子部品の断面図であ る。図 7に示すように、電子部品 104では、セラミック材料力もなる絶縁基板 102の所 定の位置に形成されたスルーホール 110に導電性組成物を充填し、熱処理を行って 電気的導通部 108が形成されている。また、上記導電性組成物としては、銀粒子、ガ ラス粉末及びビヒクル (Vehicle)を含む混合物が使用されている。この混合物は、銀 粒子とガラス粉末との合計量に対する銀粒子の含有量が 85〜90重量%の範囲であ り、含まれるガラス粉末の軟ィ匕温度が 550〜650°C程度である。また、絶縁基板 102 としては、無機粉末とバインダとを含む複合物を焼成した後、平板状に仕上げ加工し 、更に凹部 105を設けたものが用いられている。  FIG. 7 is a cross-sectional view of an electronic component using the conventional circuit board described in Patent Document 1. As shown in FIG. 7, in the electronic component 104, the conductive composition 108 is filled with a conductive composition in a through hole 110 formed at a predetermined position of the insulating substrate 102 having a ceramic material force, and heat treatment is performed. Is formed. Further, as the conductive composition, a mixture containing silver particles, glass powder, and a vehicle is used. In this mixture, the silver particle content is in the range of 85 to 90% by weight with respect to the total amount of silver particles and glass powder, and the soft temperature of the contained glass powder is about 550 to 650 ° C. In addition, as the insulating substrate 102, a substrate including an inorganic powder and a binder that is fired and then finished into a flat plate shape and further provided with a recess 105 is used.

[0004] 更に、電子部品 104は、配線層 106及び配線層 107と、配線層 107に実装された 電子素子 (水晶片) 101と、電子素子 101を覆って絶縁基板 102上に設けられた蓋 体 103とを含む。また、蓋体 103と配線層 107、及び電子素子 101と配線層 107は、 金 錫合金や金 -シリコン合金等力もなる接合層 109を介して接着されて 、る。 特許文献 1:特開 2003— 101181号公報  Further, the electronic component 104 includes a wiring layer 106 and a wiring layer 107, an electronic element (crystal piece) 101 mounted on the wiring layer 107, and a lid provided on the insulating substrate 102 so as to cover the electronic element 101. Including body 103. The lid 103 and the wiring layer 107, and the electronic element 101 and the wiring layer 107 are bonded together via a bonding layer 109 having a force of gold-tin alloy or gold-silicon alloy. Patent Document 1: Japanese Patent Laid-Open No. 2003-101181

[0005] しかし、前記従来の構成では、電気的導通部を形成する際、 750°C〜900°Cの熱 処理を要するため、セラミック基板以外の絶縁基板を用いることが困難であった。そ のため、製造コストに占める材料費の割合が大きくなり製造コストが上昇するおそれ かあつた。 However, in the conventional configuration, when the electrically conductive portion is formed, a heat of 750 ° C. to 900 ° C. Since processing is required, it is difficult to use an insulating substrate other than a ceramic substrate. As a result, the ratio of material costs to manufacturing costs increased and manufacturing costs could increase.

[0006] また、一般に使用されるセラミック基板は、最小径が 0. 7 μ m程度のアルミナ粒子 の集合体を含むこと力 アルミナ粒子間にお 、て粒界が存在するため、厚みが 150 μ m以下のセラミック基板を用いて電子部品を構成すると、電子部品の気密性を維 持することが困難となる可能性があった。また、セラミック基板の厚みを薄くすると、電 気的導通部を形成する際の熱処理によって、セラミック基板が反る可能性があった。 そのため、電子部品の気密性の維持が更に困難となる可能性があった。  [0006] Further, a generally used ceramic substrate must contain an aggregate of alumina particles having a minimum diameter of about 0.7 μm. Since there is a grain boundary between the alumina particles, the thickness is 150 μm. If an electronic component is configured using a ceramic substrate of m or less, it may be difficult to maintain the airtightness of the electronic component. Further, when the thickness of the ceramic substrate is reduced, there is a possibility that the ceramic substrate is warped by heat treatment when forming the electrically conductive portion. For this reason, there is a possibility that it is more difficult to maintain the airtightness of the electronic component.

発明の開示  Disclosure of the invention

[0007] 本発明は上記課題を解決するものであり、薄型化が可能な上、製造コストの低減が 可能な回路基板とその製造方法、及びこれを用いた気密性の向上が可能な電子部 品を提供する。  [0007] The present invention solves the above-described problem, and can be reduced in thickness and can be reduced in manufacturing cost, a manufacturing method thereof, and an electronic part capable of improving hermeticity using the circuit board Provide goods.

[0008] 本発明の第 1の回路基板は、絶縁基板と、前記絶縁基板の厚さ方向に形成された 、前記絶縁基板の第 1主面と前記絶縁基板の第 2主面とを接続するためのスルーホ 一ルとを含む回路基板であって、  [0008] A first circuit board of the present invention connects an insulating substrate and a first main surface of the insulating substrate and a second main surface of the insulating substrate formed in the thickness direction of the insulating substrate. A circuit board including a through hole for

前記スルーホールの内壁と前記第 1及び第 2主面における前記スルーホールの開 口部周囲とに形成された導電膜と、  A conductive film formed on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces;

前記スルーホールに充填され、かつ前記導電膜と接合する金属部材とを含むこと を特徴とする。  A metal member that fills the through-hole and is bonded to the conductive film.

[0009] 本発明の第 2の回路基板は、絶縁基板と、前記絶縁基板の厚さ方向に形成された 、前記絶縁基板の第 1主面と前記絶縁基板の第 2主面とを接続するためのスルーホ 一ルとを含む回路基板であって、  [0009] A second circuit board of the present invention connects an insulating substrate and a first main surface of the insulating substrate and a second main surface of the insulating substrate formed in the thickness direction of the insulating substrate. A circuit board including a through hole for

前記スルーホールの内壁と前記第 1及び第 2主面における前記スルーホールの開 口部周囲とに形成された導電膜と、  A conductive film formed on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces;

前記スルーホールにおける前記第 1主面側の開口部を塞ぎ、かつ前記導電膜と接 合する金属部材とを含むことを特徴とする。  And a metal member that closes the opening of the through hole on the first main surface side and is in contact with the conductive film.

[0010] 本発明の回路基板の第 1の製造方法は、 絶縁基板の厚さ方向に、前記絶縁基板の第 1主面と前記絶縁基板の第 2主面とを 接続するためのスルーホールを形成し、 [0010] The first manufacturing method of the circuit board of the present invention, In the thickness direction of the insulating substrate, a through hole for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate is formed,

前記スルーホールの内壁と前記第 1及び第 2主面における前記スルーホールの開 口部周囲とに導電膜を形成し、  Forming a conductive film on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces;

略球状の金属部材を前記スルーホールに充填し、前記金属部材と前記導電膜とを 接合する回路基板の製造方法である。  In this method, the through-hole is filled with a substantially spherical metal member, and the metal member and the conductive film are joined.

[0011] 本発明の回路基板の第 2の製造方法は、 [0011] The second manufacturing method of the circuit board of the present invention,

絶縁基板の厚さ方向に、前記絶縁基板の第 1主面と前記絶縁基板の第 2主面とを 接続するためのスルーホールを形成し、  In the thickness direction of the insulating substrate, a through hole for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate is formed,

前記スルーホールの内壁と前記第 1及び第 2主面における前記スルーホールの開 口部周囲とに導電膜を形成し、  Forming a conductive film on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces;

前記スルーホールにおける前記第 1主面側の開口部を略球状の金属部材で塞ぎ、 前記金属部材と前記導電膜とを接合する回路基板の製造方法である。  In the method of manufacturing a circuit board, the opening on the first main surface side in the through hole is closed with a substantially spherical metal member, and the metal member and the conductive film are joined.

[0012] 本発明の第 1の電子部品は、絶縁基板と、前記絶縁基板の厚さ方向に形成された 、前記絶縁基板の第 1主面と前記絶縁基板の第 2主面とを接続するためのスルーホ 一ルとを含む回路基板と、 [0012] A first electronic component of the present invention connects an insulating substrate and a first main surface of the insulating substrate and a second main surface of the insulating substrate formed in the thickness direction of the insulating substrate. A circuit board including a through hole for

前記回路基板に搭載された電子素子と、  Electronic elements mounted on the circuit board;

前記電子素子を覆う蓋体とを含む電子部品であって、  An electronic component including a lid that covers the electronic element,

前記回路基板は、前記スルーホールの内壁と前記第 1及び第 2主面における前記 スルーホールの開口部周囲とに形成された導電膜と、前記スルーホールに充填され 、かつ前記導電膜と接合する金属部材とを含み、  The circuit board includes a conductive film formed on an inner wall of the through hole and around the opening of the through hole in the first and second main surfaces, and is filled in the through hole and bonded to the conductive film. A metal member,

前記電子素子は、前記第 1主面における前記開口部周囲に形成された前記導電 膜に導電性材料を介して搭載されていることを特徴とする。  The electronic element is mounted on the conductive film formed around the opening in the first main surface via a conductive material.

[0013] 本発明の第 2の電子部品は、絶縁基板と、前記絶縁基板の厚さ方向に形成された 、前記絶縁基板の第 1主面と前記絶縁基板の第 2主面とを接続するためのスルーホ 一ルとを含む回路基板と、 [0013] A second electronic component of the present invention connects an insulating substrate and a first main surface of the insulating substrate and a second main surface of the insulating substrate formed in the thickness direction of the insulating substrate. A circuit board including a through hole for

前記回路基板に搭載された電子素子と、  Electronic elements mounted on the circuit board;

前記電子素子を覆う蓋体とを含む電子部品であって、 前記回路基板は、前記スルーホールの内壁と前記第 1及び第 2主面における前記 スルーホールの開口部周囲とに形成された導電膜と、前記スルーホールにおける前 記第 1主面側の開口部を塞ぎ、かつ前記導電膜と接合する金属部材とを含み、 前記電子素子は、前記金属部材に搭載されて 、ることを特徴とする。 An electronic component including a lid that covers the electronic element, The circuit board includes a conductive film formed on an inner wall of the through hole and around the opening of the through hole in the first and second main surfaces, and an opening on the first main surface side in the through hole. The electronic element is mounted on the metal member, and includes a metal member bonded to the conductive film.

[0014] 本発明の回路基板とその製造方法によれば、電気的導通部を形成する際、高温で の熱処理が不要となるため、例えばセラミック基板以外の基板 (ガラス基板等)を用い ることができる。よって、薄型化が可能な上、製造コストの低減が可能となる。また、本 発明の電子部品によれば、上記本発明の回路基板を用いるため、気密性の向上が 可能となる。 [0014] According to the circuit board of the present invention and the method for manufacturing the circuit board, since the heat treatment at a high temperature is not required when forming the electrically conductive portion, for example, a substrate (such as a glass substrate) other than the ceramic substrate is used. Can do. Therefore, the thickness can be reduced and the manufacturing cost can be reduced. Further, according to the electronic component of the present invention, since the circuit board of the present invention is used, the airtightness can be improved.

図面の簡単な説明  Brief Description of Drawings

[0015] [図 1]図 1Aは本発明の第 1実施形態に係る回路基板の断面図であり、図 1Bは本発 明の第 1実施形態に係る回路基板の概略平面図である。  FIG. 1A is a cross-sectional view of a circuit board according to a first embodiment of the present invention, and FIG. 1B is a schematic plan view of the circuit board according to the first embodiment of the present invention.

[図 2]図 2は、本発明の第 2実施形態に係る電子部品の断面図である。  FIG. 2 is a cross-sectional view of an electronic component according to a second embodiment of the present invention.

[図 3]図 3A〜Jは、本発明の第 2実施形態に係る電子部品の製造方法の一例を示す 工程断面図である。  3A to 3J are process cross-sectional views illustrating an example of a method for manufacturing an electronic component according to a second embodiment of the present invention.

[図 4]図 4は、本発明の第 3実施形態に係る回路基板の断面図である。  FIG. 4 is a cross-sectional view of a circuit board according to a third embodiment of the present invention.

[図 5]図 5は、本発明の第 4実施形態に係る電子部品の断面図である。  FIG. 5 is a cross-sectional view of an electronic component according to a fourth embodiment of the present invention.

[図 6]図 6A〜Dは、本発明の第 4実施形態に係る電子部品の製造方法の一例を示 す工程断面図である。  6A to 6D are process cross-sectional views illustrating an example of a method for manufacturing an electronic component according to a fourth embodiment of the present invention.

[図 7]図 7は、従来の回路基板を用いた電子部品の断面図である。  FIG. 7 is a cross-sectional view of an electronic component using a conventional circuit board.

発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION

[0016] 本発明の第 1の回路基板は、絶縁基板と、この絶縁基板の厚さ方向に形成された、 絶縁基板の第 1主面と絶縁基板の第 2主面とを接続するためのスルーホールとを含 む。ここで、「第 1主面」とは、上記回路基板を後述する電子部品に適用した際、電子 素子が搭載される側の絶縁基板の主面をいう。後述する本発明の第 2の回路基板に おいても同様である。 [0016] A first circuit board of the present invention is for connecting an insulating substrate and a first main surface of the insulating substrate and a second main surface of the insulating substrate formed in the thickness direction of the insulating substrate. Including through-holes. Here, the “first main surface” means the main surface of the insulating substrate on the side where the electronic element is mounted when the circuit board is applied to an electronic component described later. The same applies to the second circuit board of the present invention described later.

[0017] 上記絶縁基板は、ガラス基板であることが好ま ヽ。ガラス基板は酸化珪素分子が つながって出来た境目のない構造を有しているため、セラミック基板に比べ密に形成 されている。よって、上記絶縁基板がガラス基板の場合は、後述する電子部品に適 用した際、電子部品の気密性の向上が可能となる。ガラス基板としては、例えば、熱 膨張係数が 3 X 10— 6Z°C〜8 X 10— 6Z°Cの硼珪酸ガラスや、同じく熱膨張係数が 3 X 10— 6Z°C〜8 X 10— 6Z°Cの無アルカリガラス、あるいは熱膨張係数が 8 X 10— 6Z°C〜 1. 2 X 10— 5Z°Cのソーダガラス等が使用できる。また、その厚みは、例えば 100〜30 0 μ m程度である。 [0017] The insulating substrate is preferably a glass substrate. The glass substrate has a seamless structure made by connecting silicon oxide molecules, so it is denser than the ceramic substrate. Has been. Therefore, when the insulating substrate is a glass substrate, the airtightness of the electronic component can be improved when applied to the electronic component described later. As the glass substrate, for example, borosilicate glass thermal expansion coefficient of 3 X 10- 6 Z ° C~8 X 10- 6 Z ° C, also the thermal expansion coefficient of 3 X 10- 6 Z ° C~8 X 10- 6 Z ° alkali-free glass and C, or a thermal expansion coefficient of 8 X 10- 6 Z ° C~ 1. soda glass of 2 X 10- 5 Z ° C can be used. The thickness is, for example, about 100 to 300 μm.

[0018] 上記スルーホールは、上記第 1主面から上記第 2主面にかけてその径が漸次小さく なって 、ることが好ま 、。後述する金属部材の充填を容易に行うことができるからで ある。スルーホールの径は、絶縁基板の厚みに応じて適宜設定すればよいが、例え ば絶縁基板の厚みが 150 mの場合は、上記第 1主面側の開口径を 100 m以上 150 μ m以下の範囲とすればよぐ上記第 2主面側の開口径を 50 μ m以上 100 μ m 以下の範囲とすればよい。また、スルーホールの形成は、例えばサンドブラスト法や エッチング法等により行うことができる。特に、サンドブラスト法でスルーホールを形成 すると、スルーホールの内壁がブラストのメディアにより適度に粗面化されるため、ス ルーホールの内壁と後述する導電膜との密着性が向上する。  [0018] It is preferable that the diameter of the through hole gradually decreases from the first main surface to the second main surface. This is because the metal member described later can be easily filled. The diameter of the through hole may be set appropriately according to the thickness of the insulating substrate.For example, when the thickness of the insulating substrate is 150 m, the opening diameter on the first main surface side is 100 m or more and 150 μm or less. The opening diameter on the second main surface side should be in the range of 50 μm to 100 μm. The through hole can be formed by, for example, a sand blast method or an etching method. In particular, when a through hole is formed by the sand blast method, the inner wall of the through hole is appropriately roughened by the blasting medium, so that the adhesion between the inner wall of the through hole and the conductive film described later is improved.

[0019] そして、本発明の第 1の回路基板は、上記スルーホールの内壁と上記第 1及び第 2 主面における上記スルーホールの開口部周囲とに形成された導電膜と、上記スルー ホールに充填され、かつ上記導電膜と接合する金属部材とを含む。金属部材は、例 えば金、銅等の金属材料力もなるため、導電膜と接合する際において高温 (例えば 7 50°C以上)での熱処理を要しない。よって、セラミック基板以外の基板 (例えばガラス 基板等)を用いることができるため、薄型化が可能な上、製造コストの低減が可能な 回路基板を提供できる。  [0019] The first circuit board of the present invention includes a conductive film formed on the inner wall of the through hole, the periphery of the opening of the through hole on the first and second main surfaces, and the through hole. A metal member that is filled and bonded to the conductive film. The metal member also has a metal material force such as gold and copper, for example, and therefore does not require a heat treatment at a high temperature (for example, 750 ° C. or higher) when joining the conductive film. Therefore, since a substrate other than a ceramic substrate (eg, a glass substrate) can be used, a circuit substrate that can be reduced in thickness and can be manufactured at a reduced cost can be provided.

[0020] 上記導電膜としては、例えばクロム、チタン、ニッケル、ノ ラジウム、金等からなる金 属薄膜が使用できる。導電膜は、 1層の金属薄膜で形成してもよいし、複数層の金属 薄膜で形成してもよい。複数層の金属薄膜で形成する場合は、クロム薄膜上にパラ ジゥム薄膜及び金薄膜を順次積層した導電膜が好ましい。クロム薄膜と、保護層とな る金薄膜との間にパラジウム薄膜が介在するため、このパラジウム薄膜が金薄膜とク ロム薄膜との接着層として機能するからである。また、クロム薄膜はガラス基板との密 着性が高いため、上記絶縁基板としてガラス基板を使用する場合は、上記組み合わ せ (クロム薄膜 zパラジウム薄膜 Z金薄膜)の導電膜が特に好ましい。また、上記組 み合わせにおける各金属薄膜の厚みは、例えば、クロム薄膜が 0. 05-0. 程 度であり、ノ《ラジウム薄膜が 0. 01〜0. 05 m程度であり、金薄膜が 0. 3〜1. Ο μ m程度である。上述した金属薄膜は、例えばスパッタリング法やめつき法等の手段を 用いて形成できる。例えば、クロム薄膜やチタン薄膜やパラジウム薄膜を 0. 05〜0. 1 μ m程度の厚さに形成する場合は、スパッタリング法を用いて形成することができる 。また、例えばニッケル薄膜を 1〜2 m程度の厚さに形成する場合は、無電解めつ き法を用いて形成することができる。また、スパッタリング法やめつき法によって形成さ れた金属薄膜の保護層として、金薄膜を 0. 3〜1. 0 m程度の厚さに形成する場合 は、電解めつき法を用いて形成することができる。なお、金薄膜はスパッタリング法で 形成することもできる。また、上記金薄膜の代わりに銀薄膜や銅薄膜を用いてもよい。 銀薄膜や銅薄膜は、金薄膜と同様にスパッタリング法やめつき法によって形成するこ とがでさる。 [0020] As the conductive film, for example, a metal thin film made of chromium, titanium, nickel, noradium, gold or the like can be used. The conductive film may be formed of one layer of metal thin film or a plurality of layers of metal thin film. In the case of forming with a plurality of metal thin films, a conductive film in which a palladium thin film and a gold thin film are sequentially laminated on a chromium thin film is preferable. This is because the palladium thin film functions as an adhesion layer between the gold thin film and the chromium thin film because the palladium thin film is interposed between the chromium thin film and the gold thin film serving as the protective layer. In addition, the chrome thin film Since a glass substrate is used as the insulating substrate, a conductive film of the above combination (chrome thin film z palladium thin film Z gold thin film) is particularly preferable because of its high adhesion. The thickness of each metal thin film in the above combination is, for example, about 0.05-0. For a chromium thin film, about 0.01-0.05 m for a radium thin film, 0.3 to 1. Ο μm. The above-mentioned metal thin film can be formed using means such as a sputtering method or a plating method. For example, when a chromium thin film, a titanium thin film, or a palladium thin film is formed to a thickness of about 0.05 to 0.1 μm, it can be formed by a sputtering method. For example, when a nickel thin film is formed to a thickness of about 1 to 2 m, it can be formed using an electroless plating method. In addition, when a gold thin film is formed to a thickness of about 0.3 to 1.0 m as a protective layer for a metal thin film formed by a sputtering method or a plating method, the electrolytic plating method should be used. Can do. The gold thin film can also be formed by a sputtering method. A silver thin film or a copper thin film may be used instead of the gold thin film. A silver thin film or a copper thin film can be formed by a sputtering method or a plating method in the same manner as a gold thin film.

[0021] また、上記金属部材は、略球状に形成されて 、ることが好ま 、。スルーホールの 内壁に形成された導電膜と金属部材との間の接合を均一に行うことができる力 であ る。  [0021] The metal member is preferably formed in a substantially spherical shape. This is a force that enables uniform bonding between the conductive film formed on the inner wall of the through hole and the metal member.

[0022] また、上記絶縁基板はシート状に形成されて!、ることが好ま 、。後述する電子部 品に適用した際、電子部品の薄型化が容易となる力もである。また、上記絶縁基板が シート状に形成されていると、後述する電子部品を製造する際、上記絶縁基板上に 複数個の電子素子を同時に実装した後、電子素子毎に個片化して電子部品を製造 することができるため、電子素子の実装工程が簡略化する。  [0022] Preferably, the insulating substrate is formed in a sheet shape! When applied to electronic components, which will be described later, it is also a force that facilitates thinning of electronic components. Further, when the insulating substrate is formed in a sheet shape, when an electronic component to be described later is manufactured, a plurality of electronic elements are simultaneously mounted on the insulating substrate, and then the electronic components are separated into individual electronic components. As a result, it is possible to simplify the mounting process of the electronic element.

[0023] 次に、本発明の第 2の回路基板について説明する。なお、以下の記述において、 上述した本発明の第 1の回路基板と同じ構成要素についての説明を省略する場合 がある。  Next, the second circuit board of the present invention will be described. In the following description, description of the same components as those of the first circuit board of the present invention described above may be omitted.

[0024] 本発明の第 2の回路基板は、上述した本発明の第 1の回路基板と同様に、絶縁基 板と、この絶縁基板の厚さ方向に形成された、絶縁基板の第 1主面と絶縁基板の第 2 主面とを接続するためのスルーホールと、このスルーホールの内壁と第 1及び第 2主 面におけるスルーホールの開口部周囲とに形成された導電膜とを含む。そして、本 発明の第 2の回路基板は、上記構成に加え、上記スルーホールにおける上記第 1主 面側の開口部を塞ぎ、かつ上記導電膜と接合する金属部材を含む。これにより、上 述した本発明の第 1の回路基板と同様に、薄型化が可能な上、製造コストの低減が 可能な回路基板を提供できる。 [0024] The second circuit board of the present invention is the same as the first circuit board of the present invention described above, and the first main substrate of the insulating substrate formed in the thickness direction of the insulating substrate. A through hole for connecting the surface and the second main surface of the insulating substrate, and the inner wall of the through hole and the first and second main surfaces And a conductive film formed around the opening of the through hole on the surface. In addition to the above configuration, the second circuit board of the present invention includes a metal member that closes the opening on the first main surface side of the through hole and is bonded to the conductive film. As a result, similar to the above-described first circuit board of the present invention, it is possible to provide a circuit board that can be reduced in thickness and reduced in manufacturing cost.

[0025] また、本発明の第 2の回路基板は、上記金属部材が略半球状に形成され、上記金 属部材の半球面と上記導電膜とが接合されている回路基板であってもよい。上記第 1主面側の開口部周囲に形成された導電膜と金属部材との間の接合を均一に行うこ とができる上、上記金属部材における上記半球面側と反対側に位置する平面部に、 後述する電子素子を搭載することができる力もである。  [0025] Further, the second circuit board of the present invention may be a circuit board in which the metal member is formed in a substantially hemispherical shape and the hemispherical surface of the metal member and the conductive film are joined. . The conductive film formed around the opening on the first main surface side and the metal member can be uniformly joined, and the flat surface portion located on the opposite side of the hemispherical surface of the metal member. In addition, it is a force that can mount an electronic element to be described later.

[0026] また、本発明の第 2の回路基板に使用される絶縁基板は、上述した本発明の第 1の 回路基板と同様にガラス基板であることが好ましぐシート状に形成されていることが 好ましい。  [0026] In addition, the insulating substrate used for the second circuit board of the present invention is formed in a sheet shape, which is preferably a glass substrate, like the first circuit board of the present invention described above. It is preferable.

[0027] 次に、本発明の回路基板の第 1の製造方法について説明する。なお、本発明の回 路基板の第 1の製造方法は、上述した本発明の第 1の回路基板を製造するための好 適な製造方法である。よって、以下の記述において、上述した本発明の第 1の回路 基板と重複する説明を省略する場合がある。  Next, a first method for manufacturing a circuit board according to the present invention will be described. The first manufacturing method of the circuit board of the present invention is a preferable manufacturing method for manufacturing the above-described first circuit board of the present invention. Therefore, in the following description, description overlapping with the above-described first circuit board of the present invention may be omitted.

[0028] 本発明の回路基板の第 1の製造方法は、まず、絶縁基板の厚さ方向に、絶縁基板 の第 1主面と絶縁基板の第 2主面とを接続するためのスルーホールを形成し、このス ルーホールの内壁と上記第 1及び第 2主面における上記スルーホールの開口部周 囲とに導電膜を形成する。スルーホール及び導電膜の形成方法は、上述の通りであ る。また、使用する絶縁基板は、上述した本発明の第 1の回路基板と同様にガラス基 板であることが好ましぐシート状に形成されていることが好ましい。  [0028] In the first manufacturing method of the circuit board of the present invention, first, through holes for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate are formed in the thickness direction of the insulating substrate. Then, a conductive film is formed on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces. The through hole and conductive film are formed as described above. In addition, the insulating substrate to be used is preferably formed in a sheet shape that is preferably a glass substrate in the same manner as the first circuit board of the present invention described above.

[0029] そして、略球状の金属部材を上記スルーホールに充填し、上記金属部材と上記導 電膜とを接合する。これにより、上述した本発明の第 1の回路基板を容易に製造でき る。なお、「略球状の金属部材」は、例えばキヤビラリ一ツールを用いて形成すること ができ、その形成方法の詳細については後述する。  [0029] Then, the through-hole is filled with a substantially spherical metal member, and the metal member and the conductive film are joined. As a result, the above-described first circuit board of the present invention can be easily manufactured. The “substantially spherical metal member” can be formed by using, for example, a single tool, and details of the forming method will be described later.

[0030] また、上記金属部材と上記導電膜とを接合する際は、超音波併用熱圧着法により 接合するのが好ましい。この場合の「超音波併用熱圧着法」は、上記金属部材と上記 導電膜との接合箇所に対して熱と荷重を加えながら超音波を印カロして接合する方法 である。超音波併用熱圧着法は、従来の熱と荷重を加えて接合する方式 (熱圧着法[0030] Further, when the metal member and the conductive film are joined, the ultrasonic combined thermocompression method is used. It is preferable to join. In this case, the “ultrasonic combined thermocompression bonding method” is a method in which ultrasonic waves are applied and bonded to a bonding portion between the metal member and the conductive film while applying heat and a load. The thermocompression bonding method using ultrasonic waves is a conventional method in which heat and load are applied (thermocompression bonding method).

)の加熱温度(300°Cを超える温度)に比べて、低温(100〜300°C程度)で接合する ことができる。よって、絶縁基板の変形を防ぐことができる。また、超音波を併用するこ とで、導電膜と金属部材とが、超音波による摩擦熱で上記「熱圧着法」に比べより強 固に接合される。 ) Can be joined at a lower temperature (about 100 to 300 ° C) than the heating temperature (temperature exceeding 300 ° C). Therefore, deformation of the insulating substrate can be prevented. Further, by using ultrasonic waves in combination, the conductive film and the metal member are more strongly bonded to each other by the frictional heat generated by the ultrasonic waves as compared with the above-mentioned “thermocompression bonding method”.

[0031] 次に、本発明の回路基板の第 2の製造方法について説明する。なお、本発明の回 路基板の第 2の製造方法は、上述した本発明の第 2の回路基板を製造するための好 適な製造方法である。また、以下の記述において、上述した本発明の第 2の回路基 板、及び上述した本発明の回路基板の第 1の製造方法と重複する説明を省略する場 合がある。  [0031] Next, a second method for manufacturing a circuit board according to the present invention will be described. The second manufacturing method of the circuit board of the present invention is a preferable manufacturing method for manufacturing the above-described second circuit board of the present invention. Moreover, in the following description, the description which overlaps with the 1st manufacturing method of the 2nd circuit board of this invention mentioned above and the circuit board of this invention mentioned above may be abbreviate | omitted.

[0032] 本発明の回路基板の第 2の製造方法は、まず、絶縁基板の厚さ方向に、絶縁基板 の第 1主面と絶縁基板の第 2主面とを接続するためのスルーホールを形成し、このス ルーホールの内壁と上記第 1及び第 2主面における上記スルーホールの開口部周 囲とに導電膜を形成する。そして、上記スルーホールにおける上記第 1主面側の開 口部を略球状の金属部材で塞ぎ、上記金属部材と上記導電膜とを接合する。これに より、上述した本発明の第 2の回路基板を容易に製造できる。  [0032] In the second manufacturing method of the circuit board of the present invention, first, through holes for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate are formed in the thickness direction of the insulating substrate. Then, a conductive film is formed on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces. Then, the opening on the first main surface side of the through hole is closed with a substantially spherical metal member, and the metal member and the conductive film are joined. Thereby, the above-described second circuit board of the present invention can be easily manufactured.

[0033] また、本発明の回路基板の第 2の製造方法において使用する絶縁基板については 、上述した本発明の回路基板の第 1の製造方法と同様にガラス基板であることが好ま しぐシート状に形成されていることが好ましい。また、上記金属部材と上記導電膜と を接合する際は、上述したように超音波併用熱圧着法により接合するのが好ましい。  [0033] In addition, the insulating substrate used in the second manufacturing method of the circuit board of the present invention is preferably a glass substrate as in the above-described first manufacturing method of the circuit board of the present invention. It is preferable that it is formed in a shape. Moreover, when joining the said metal member and the said electrically conductive film, it is preferable to join by the ultrasonic thermocompression bonding method as mentioned above.

[0034] 次に、本発明の第 1の電子部品について説明する。なお、本発明の第 1の電子部 品は、上述した本発明の第 1の回路基板を含む電子部品である。よって、以下の記 述において、上述した本発明の第 1の回路基板と同じ構成要素についての説明を省 略する場合がある。  Next, the first electronic component of the present invention will be described. The first electronic component of the present invention is an electronic component including the above-described first circuit board of the present invention. Therefore, in the following description, description of the same components as those of the above-described first circuit board of the present invention may be omitted.

[0035] 本発明の第 1の電子部品は、上述した本発明の第 1の回路基板と、この第 1の回路 基板に搭載された電子素子と、この電子素子を覆う蓋体とを含む。そして、上記電子 素子は、上述した本発明の第 1の回路基板の導電膜のうち、第 1主面におけるスル 一ホールの開口部周囲に形成された領域に、導電性材料を介して搭載されている。 上述したように、本発明の第 1の回路基板は高温での熱処理が不要であるため、セラ ミック基板以外の基板 (例えばガラス基板等)を用いることができる。よって、本発明の 第 1の電子部品によれば、電子部品の気密性の向上が可能となる。 [0035] A first electronic component of the present invention includes the above-described first circuit board of the present invention, an electronic element mounted on the first circuit board, and a lid that covers the electronic element. And the electron The element is mounted on a region formed around the opening of the first hole in the first main surface of the conductive film of the first circuit board of the present invention described above via a conductive material. As described above, since the first circuit board of the present invention does not require heat treatment at a high temperature, a substrate other than a ceramic substrate (for example, a glass substrate) can be used. Therefore, according to the first electronic component of the present invention, the airtightness of the electronic component can be improved.

[0036] 上記電子素子としては、例えば水晶片ゃ半導体素子等が使用できる。例えば、上 記電子素子が水晶片である場合、上記電子部品は水晶振動子となる。上記蓋体の 材料については特に限定されないが、例えばガラス等を使用することができる。上記 蓋体の厚みは、例えば 0. 3〜0. 4mm程度である。また上記導電性材料としては、 例えばエポキシ榭脂に導電微粒子として銀微粒子を配合した導電性接着剤が使用 できる。 [0036] As the electronic element, for example, a crystal piece or a semiconductor element can be used. For example, when the electronic element is a crystal piece, the electronic component is a crystal resonator. The material for the lid is not particularly limited, and for example, glass or the like can be used. The thickness of the lid is, for example, about 0.3 to 0.4 mm. Further, as the conductive material, for example, a conductive adhesive in which silver fine particles are mixed as conductive fine particles with epoxy resin can be used.

[0037] また、上記第 1主面における上記電子素子と面する領域には、凹部が形成されてい てもよい。上記電子素子の動作空間の確保が容易となるからである。  [0037] In addition, a recess may be formed in a region of the first main surface facing the electronic element. This is because it is easy to secure the operation space of the electronic element.

[0038] 次に、本発明の第 2の電子部品について説明する。なお、本発明の第 2の電子部 品は、上述した本発明の第 2の回路基板を含む電子部品である。また、以下の記述 において、上述した本発明の第 2の回路基板、及び上述した本発明の第 1の電子部 品と同じ構成要素についての説明を省略する場合がある。  Next, the second electronic component of the present invention will be described. The second electronic component of the present invention is an electronic component including the above-described second circuit board of the present invention. In the following description, description of the same components as those of the second circuit board of the present invention described above and the first electronic component of the present invention described above may be omitted.

[0039] 本発明の第 2の電子部品は、上述した本発明の第 2の回路基板と、この第 2の回路 基板に搭載された電子素子と、この電子素子を覆う蓋体とを含む。そして、上記電子 素子は、上述した本発明の第 2の回路基板の金属部材に搭載されている。よって、 本発明の第 2の電子部品によれば、上述した本発明の第 1の電子部品と同様に、電 子部品の気密性の向上が可能となる。  [0039] A second electronic component of the present invention includes the above-described second circuit board of the present invention, an electronic element mounted on the second circuit board, and a lid that covers the electronic element. And the said electronic element is mounted in the metal member of the 2nd circuit board of this invention mentioned above. Therefore, according to the second electronic component of the present invention, as with the first electronic component of the present invention described above, the air tightness of the electronic component can be improved.

[0040] また、本発明の第 2の電子部品において、電子素子と導電膜との間の間隔は、 30 〜50 μ mの範囲であることが好ましい。上記電子素子の動作空間を確保した上で、 電子部品の薄型化が可能となるからである。  [0040] In the second electronic component of the present invention, the distance between the electronic element and the conductive film is preferably in the range of 30 to 50 µm. This is because it is possible to reduce the thickness of the electronic component while securing the operation space of the electronic element.

[0041] 以下、本発明の実施形態について、図面を参照しながら説明する。  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0042] [第 1実施形態]  [0042] [First embodiment]

まず、本発明の第 1実施形態について図面を参照して説明する。参照する図 1Aは 、本発明の第 1実施形態に係る回路基板の断面図である。また、参照する図 1Bは、 本発明の第 1実施形態に係る回路基板の概略平面図である。なお、第 1実施形態に 係る回路基板は、上述した本発明の第 1の回路基板の一例である。 First, a first embodiment of the present invention will be described with reference to the drawings. Refer to Figure 1A 1 is a cross-sectional view of a circuit board according to a first embodiment of the present invention. FIG. 1B to be referred to is a schematic plan view of the circuit board according to the first embodiment of the present invention. The circuit board according to the first embodiment is an example of the first circuit board of the present invention described above.

[0043] 図 1Aに示すように、第 1実施形態に係る回路基板 1は、絶縁基板 10と、絶縁基板 1 0の厚さ方向に形成された、絶縁基板 10の第 1主面 10aと絶縁基板 10の第 2主面 10 bとを接続するためのスルーホール 11と、第 1導電膜 12と、第 2導電膜 13と、スルー ホール 11に充填され、かつ第 1導電膜 12と接合する金属部材 14とを含む。第 1導電 膜 12は、第 1主面 10aにおけるスルーホール 11の開口部周囲に形成された電子素 子接続電極 12aと、スルーホール 11の内壁に形成された接続導電膜 12bと、第 2主 面 1 Obにおけるスルーホール 11の開口部周囲に形成された外部接続電極 12cとか らなる。なお、第 1導電膜 12は、特許請求の範囲に記載された「導電膜」に相当する As shown in FIG. 1A, the circuit board 1 according to the first embodiment is insulated from the first main surface 10a of the insulating substrate 10 and the insulating substrate 10 formed in the thickness direction of the insulating substrate 10. A through hole 11 for connecting the second main surface 10 b of the substrate 10, a first conductive film 12, a second conductive film 13, and the through hole 11 are filled and joined to the first conductive film 12. Metal member 14. The first conductive film 12 includes an electron element connection electrode 12a formed around the opening of the through hole 11 on the first main surface 10a, a connection conductive film 12b formed on the inner wall of the through hole 11, and a second main film 10a. It consists of an external connection electrode 12c formed around the opening of the through hole 11 on the surface 1 Ob. The first conductive film 12 corresponds to the “conductive film” recited in the claims.

[0044] 金属部材 14は、例えば金、銅等の金属材料カゝらなるため、第 1導電膜 12と接合す る際において高温 (例えば 750°C以上)での熱処理を要しない。これにより、薄型化 が可能な上、製造コストの低減が可能な回路基板 1とすることができる。また、金属部 材 14は略球状に形成されている。これにより、スルーホール 11の内壁に形成された 接続導電膜 12bと金属部材 14との間の接合を均一に行うことができる。 [0044] Since the metal member 14 is made of a metal material such as gold or copper, for example, heat treatment at a high temperature (for example, 750 ° C or higher) is not required when the metal member 14 is bonded to the first conductive film 12. As a result, the circuit board 1 can be thinned and the manufacturing cost can be reduced. Further, the metal member 14 is formed in a substantially spherical shape. As a result, the connection between the connection conductive film 12b formed on the inner wall of the through hole 11 and the metal member 14 can be performed uniformly.

[0045] また、図 1Bに示すように、第 2導電膜 13は、絶縁基板 10の第 1主面 10aの外縁部 に形成されている。この第 2導電膜 13は、回路基板 1を用いて電子部品を作製する 際、後述する蓋体との接着面となる。  As shown in FIG. 1B, the second conductive film 13 is formed on the outer edge portion of the first main surface 10a of the insulating substrate 10. The second conductive film 13 serves as an adhesive surface with a lid, which will be described later, when an electronic component is manufactured using the circuit board 1.

[0046] また、図 1Aに示すように、スルーホール 11は、第 1主面 10aから第 2主面 10bにか けてその径が漸次小さくなつている。これにより、金属部材 14の充填を容易に行うこと ができる。また、第 1主面 10aには凹部 10cが形成されている。これにより、回路基板 1を電子部品に適用した際、後述する電子素子の動作空間の確保が容易となる。  Further, as shown in FIG. 1A, the diameter of the through hole 11 gradually decreases from the first main surface 10a to the second main surface 10b. Thereby, the metal member 14 can be filled easily. In addition, a recess 10c is formed in the first main surface 10a. Thereby, when the circuit board 1 is applied to an electronic component, it becomes easy to secure an operation space of an electronic element described later.

[0047] [第 2実施形態]  [0047] [Second Embodiment]

次に、本発明の第 2実施形態について図面を参照して説明する。参照する図 2は、 本発明の第 2実施形態に係る電子部品の断面図である。第 2実施形態に係る電子部 品は、上述した第 1実施形態に係る回路基板 1を含む。よって、図 2において、図 1と 同一の構成要素には同一の符号を付し、その説明は省略する。なお、第 2実施形態 に係る電子部品は、上述した本発明の第 1の電子部品の一例である。 Next, a second embodiment of the present invention will be described with reference to the drawings. FIG. 2 to be referred to is a cross-sectional view of an electronic component according to the second embodiment of the present invention. The electronic component according to the second embodiment includes the circuit board 1 according to the first embodiment described above. Therefore, in Figure 2, Figure 1 and The same components are denoted by the same reference numerals, and the description thereof is omitted. The electronic component according to the second embodiment is an example of the first electronic component of the present invention described above.

[0048] 図 2に示すように、第 2実施形態に係る電子部品 2は、上述した第 1実施形態に係る 回路基板 1と、回路基板 1に搭載された電子素子 20と、電子素子 20を覆う蓋体 21と を含む。蓋体 21は、サンドブラスト法やエッチング法等の手段を用いて形成された凹 部 21aを有する。そして、電子素子 20は、電子素子接続電極 12aに導電性接着剤 2 2を介して搭載されている。また、第 2導電膜 13と蓋体 21とは、接着層 23を介して接 着されている。接着層 23の構成材料としては、金—錫めつき膜や金—錫ペースト、あ るいは低融点ガラス等が使用できる。このように、第 2実施形態に係る電子部品 2は、 上述した本発明の第 1実施形態に係る回路基板 1を用いるため、電子部品 2の気密 性の向上が可能となる。  As shown in FIG. 2, the electronic component 2 according to the second embodiment includes the circuit board 1 according to the first embodiment described above, the electronic element 20 mounted on the circuit board 1, and the electronic element 20. Covering lid 21 and The lid 21 has a concave portion 21a formed using a sandblasting method or an etching method. The electronic element 20 is mounted on the electronic element connection electrode 12a via the conductive adhesive 22. In addition, the second conductive film 13 and the lid 21 are bonded via an adhesive layer 23. As a constituent material of the adhesive layer 23, a gold-tin plating film, a gold-tin paste, low-melting glass, or the like can be used. Thus, since the electronic component 2 according to the second embodiment uses the circuit board 1 according to the first embodiment of the present invention described above, the airtightness of the electronic component 2 can be improved.

[0049] また、絶縁基板 10の第 1主面 10aにおける電子素子 20と面する領域には、凹部 10 cが形成されている。これにより、電子素子 20の動作空間(蓋体 21と第 1主面 10aと の間)の確保が容易となる。なお、電子素子 20として水晶片を用いる場合は、蓋体 2 1と第 1主面 10aとの間の間隔が 200 /z m以上であることが好ましい。その場合、凹部 10cの深さを 30〜50 μ m程度とすればよい。  Further, a recess 10 c is formed in a region of the first main surface 10 a of the insulating substrate 10 facing the electronic element 20. Thereby, it becomes easy to secure an operation space of the electronic element 20 (between the lid 21 and the first main surface 10a). When a crystal piece is used as the electronic element 20, it is preferable that the distance between the lid 21 and the first main surface 10a be 200 / zm or more. In that case, the depth of the recess 10c may be about 30 to 50 μm.

[0050] また、電子素子 20として水晶片を用いる場合は、電子素子 20を蓋体 21で覆った後 でも、水晶片にレーザーを照射することで周波数調整を行うことができるように、蓋体 21の構成材料として上記レーザーの透過性が高いガラスを使用するのが好ましい。 また、電子素子 20として発光ダイオードを用いる場合は、蓋体 21の構成材料として 可視光の透過性が高 、ガラスを使用するのが好ま 、。  [0050] In addition, when a crystal piece is used as the electronic element 20, the lid body can perform frequency adjustment by irradiating the crystal piece with a laser even after the electronic element 20 is covered with the lid body 21. It is preferable to use the glass having high laser transmittance as the constituent material 21. When a light emitting diode is used as the electronic element 20, it is preferable to use glass as a constituent material of the lid body 21 because it has a high visible light transmittance.

[0051] 次に、上述した第 2実施形態に係る電子部品 2の製造方法の一例について図面を 参照して説明する。参照する図 3A〜Jは、第 2実施形態に係る電子部品 2の製造方 法の一例を示す工程断面図である。このうち図 3A〜Gは、上述した第 1実施形態に 係る回路基板 1の製造方法の一例を示す工程断面図である。なお、図 3A〜Jにおい て、図 1及び図 2と同一の構成要素には同一の符号を付し、その説明は省略する。  Next, an example of a method for manufacturing the electronic component 2 according to the second embodiment will be described with reference to the drawings. 3A to J to be referred to are process sectional views showing an example of a method for manufacturing the electronic component 2 according to the second embodiment. 3A to 3G are process cross-sectional views illustrating an example of a method for manufacturing the circuit board 1 according to the first embodiment described above. 3A to 3J, the same components as those in FIGS. 1 and 2 are denoted by the same reference numerals, and the description thereof is omitted.

[0052] まず、図 3Aに示すように、熱膨張係数が 3 X 10—6Z°C〜8 X 10—6Z°Cの無アルカリ ガラス力もなる絶縁基板 10 (厚み: 150 m)を用意する。 [0053] 次に、図 3Bに示すように、絶縁基板 10の第 1主面 10aに、深さが 30〜50 /z mの凹 部 10cをサンドブラスト法により形成する。 [0052] First, as shown in FIG. 3A, the thermal expansion coefficient of 3 X 10- 6 Z ° C~8 X 10- 6 Z alkali-free glass force ° C is also an insulating substrate 10 (thickness: 0.99 m) prepared To do. Next, as shown in FIG. 3B, a recess 10c having a depth of 30 to 50 / zm is formed on the first main surface 10a of the insulating substrate 10 by sandblasting.

[0054] 続いて、図 3Cに示すように、絶縁基板 10の第 1主面 10a側からサンドブラスト法で スルーホール 11を形成する。この際、第 1主面 10aから第 2主面 10bにかけてスルー ホール 11の径が漸次小さくなるように形成することが好ましい。この場合、スルーホー ル 11の開口径は、例えば、第 1主面 10a側を 120 mとし、第 2主面 10b側を 80 m とすればよい。  Subsequently, as shown in FIG. 3C, through-holes 11 are formed from the first main surface 10a side of the insulating substrate 10 by the sandblast method. At this time, the through hole 11 is preferably formed so that the diameter of the through hole 11 gradually decreases from the first main surface 10a to the second main surface 10b. In this case, the opening diameter of the through hole 11 may be, for example, 120 m on the first main surface 10a side and 80 m on the second main surface 10b side.

[0055] 次に、図 3Dに示すように、絶縁基板 10の表面及びスルーホール 11の内壁に導電 膜 7を形成する。例えば、絶縁基板 10の表面及びスルーホール 11の内壁に、スパッ タリング法によりクロム薄膜 (厚み: 0. 1 μ m)を形成し、このクロム薄膜上に、スパッタ リング法によりパラジウム薄膜 (厚み: 0. 05 /z m)を形成した後、このパラジウム薄膜 上に、電解めつき法により金薄膜 (厚み: 0. 5〜1. 0 m)を形成することにより、クロ ム薄膜、ノ ラジウム薄膜及び金薄膜からなる導電膜 7を形成することができる。  Next, as shown in FIG. 3D, a conductive film 7 is formed on the surface of the insulating substrate 10 and the inner wall of the through hole 11. For example, a chromium thin film (thickness: 0.1 μm) is formed on the surface of the insulating substrate 10 and the inner wall of the through hole 11 by a sputtering method, and a palladium thin film (thickness: 0) is formed on the chromium thin film by a sputtering method. 05 / zm), a gold thin film (thickness: 0.5 to 1.0 m) is formed on the palladium thin film by an electrolytic plating method. A conductive film 7 made of a thin film can be formed.

[0056] 次に、導電膜 7上の所定の箇所にレジスト膜 (図示せず)を形成した後、導電膜 7上 の上記レジスト膜で覆われていない箇所をエッチングして、図 3Eに示す第 1及び第 2 導電膜 12, 13を形成する。  Next, after a resist film (not shown) is formed at a predetermined location on the conductive film 7, the portion on the conductive film 7 not covered with the resist film is etched, as shown in FIG. 3E. First and second conductive films 12 and 13 are formed.

[0057] 続 、て、還元性雰囲気 (Nガス等)中で 300°Cの加熱温度に設定されたヒーター(  [0057] Next, a heater (300 ° C heating temperature) in a reducing atmosphere (N gas, etc.)

2  2

図示せず)上に絶縁基板 10を押さえガイド(図示せず)でセットし、ワイヤーボンダ一 のボンディングヘッド(図示せず)に組み込まれた上下動式のキヤビラリ一ツール 6 ( 図 3F参照)をスルーホール 11の真上に合わせて配置する。この際の位置合わせは ワイヤーボンダ一に備えられた位置認識装置により行うことができる。このときの位置 精度は、例えば ± 5 m以下である。また、キヤビラリ一ツール 6には金属ワイヤ 5 (図 3F参照)が挿通されている。金属ワイヤ 5の構成材料としては、耐食性が高い金が好 ましい。そして、トーチ(図示せず)により金属ワイヤ 5の先端部を加熱溶融して、略球 状の金属部材 14 (図 3F参照)を形成する。この金属部材 14は、直径が金属ワイヤ 5 の約 3〜4倍程度となる。よって、例えば金属部材 14の直径を 120 /z m程度の大きさ にする場合は、金属ワイヤ 5として直径が 38 m程度のものを使用すればよい。なお 、金属部材 14は、金属ワイヤ 5の先端部とトーチ(図示せず)との間で火花放電を発 生させること〖こより形成している。 Set the insulating substrate 10 on the notch (not shown) with a holding guide (not shown), and use the vertical movement type tool 6 (see Fig. 3F) built into the bonding head (not shown) of the wire bonder. Arrange it directly above the through hole 11. The alignment at this time can be performed by a position recognition device provided in the wire bonder. The positional accuracy at this time is, for example, ± 5 m or less. Further, a metal wire 5 (see FIG. 3F) is inserted into the clearance tool 6. As a constituent material of the metal wire 5, gold having high corrosion resistance is preferable. Then, the tip portion of the metal wire 5 is heated and melted with a torch (not shown) to form a substantially spherical metal member 14 (see FIG. 3F). The diameter of the metal member 14 is about 3 to 4 times that of the metal wire 5. Therefore, for example, when the metal member 14 has a diameter of about 120 / zm, the metal wire 5 having a diameter of about 38 m may be used. The metal member 14 generates a spark discharge between the tip of the metal wire 5 and a torch (not shown). It is formed from cocoon that can be born.

[0058] 次に、図 3Fに示すように、キヤビラリ一ツール 6を下降させて、金属部材 14をスルー ホール 11内に 100〜300gfの荷重で押圧しながら充填する。この際、キヤビラリーツ ール 6に対し図 1Bの Y方向に超音波振動をカ卩え、同時にキヤビラリ一ツール 6に対し 図 1Bの X方向に機械的な微振動をカ卩える。この時の超音波の発振周波数は 60〜1 20kHzが好ましぐ超音波の印加時間は 10〜50msが好ましい。また、機械的な微 振動をカ卩える方法としては、例えばボンディングヘッドを上記 X方向に振動させる方 法が挙げられる。このときの X方向の振動幅は、超音波の振動幅と同程度 (例えば 5 〜: LO m)であることが好ましい。このようにして、金属部材 14と接続導電膜 12bとを 接合する。この後、キヤビラリ一ツール 6を上昇させ、金属ワイヤ 5を切断する。これに より、図 3Gに示す回路基板 1が得られる。なお、金属ワイヤ 5を切断する際に、トーチ (図示せず)で加熱することによって切断すると、切断と同時に略球状の金属部材 14 が形成されるため、回路基板 1を連続して製造する場合に作業性が向上する。また、 本実施形態では、上述したような超音波併用熱圧着法を用いるため、接続導電膜 12 bと金属部材 14とが強固に接合される。よって、後述するように、電子部品 2 (図 3J参 照)を形成した際、スルーホール 11の密閉性が高くなるため、気密性の高い電子部 品 2とすることができる。  Next, as shown in FIG. 3F, the first tool 6 is lowered, and the metal member 14 is filled into the through hole 11 while being pressed with a load of 100 to 300 gf. At this time, the ultrasonic vibration is supported in the Y direction in FIG. 1B for the tool 6 and at the same time the mechanical vibration in the X direction in FIG. The ultrasonic oscillation frequency at this time is preferably 60 to 120 kHz, and the ultrasonic application time is preferably 10 to 50 ms. Further, as a method for measuring mechanical micro-vibration, for example, there is a method of vibrating the bonding head in the X direction. The vibration width in the X direction at this time is preferably about the same as the vibration width of ultrasonic waves (for example, 5 to: LO m). In this way, the metal member 14 and the connection conductive film 12b are joined. After this, the lift tool 6 is raised and the metal wire 5 is cut. As a result, the circuit board 1 shown in FIG. 3G is obtained. When cutting the metal wire 5 by heating with a torch (not shown), a substantially spherical metal member 14 is formed simultaneously with the cutting, so that the circuit board 1 is continuously manufactured. Workability is improved. In this embodiment, since the ultrasonic combined thermocompression method as described above is used, the connection conductive film 12b and the metal member 14 are firmly bonded. Therefore, as described later, when the electronic component 2 (see FIG. 3J) is formed, the through-hole 11 is highly sealed, so that the electronic component 2 with high airtightness can be obtained.

[0059] 続いて、図 3Hに示すように、回路基板 1の電子素子接続電極 12a上に導電性接着 剤 22を介して電子素子 20を搭載する。これにより、回路基板 1の外部接続電極 12c は、接続導電膜 12b、電子素子接続電極 12a及び導電性接着剤 22を介して電子素 子 20と電気的に接続される。なお、本実施形態では、電子素子 20として水晶片を用 いている。  Subsequently, as shown in FIG. 3H, the electronic device 20 is mounted on the electronic device connection electrode 12a of the circuit board 1 via the conductive adhesive 22. As a result, the external connection electrode 12c of the circuit board 1 is electrically connected to the electronic element 20 via the connection conductive film 12b, the electronic element connection electrode 12a, and the conductive adhesive 22. In the present embodiment, a crystal piece is used as the electronic element 20.

[0060] 次に、真空雰囲気中で回路基板 1を位置決め用冶具(図示せず)にセットした後、 蓋体 21を回路基板 1の真上に位置合わせし(図 31参照)、蓋体 21と回路基板 1とを 接着する。この際、図 31に示すように、蓋体 21の回路基板 1との接続部には、接着層 23が予め設けられている。本実施形態では、接着層 23として、電解めつきにより形成 した金―錫合金 (厚み: 10〜 15 m)を用いて ヽる。この場合、金―錫合金の質量 比 (金:錫)は、例えば 4: 1とすればょ 、。 [0061] 次に、蓋体 21を 5 X 104〜6 X 104Paでカ卩圧しながら、 290〜310°Cの Nガス雰囲 [0060] Next, after the circuit board 1 is set on a positioning jig (not shown) in a vacuum atmosphere, the lid 21 is aligned directly above the circuit board 1 (see FIG. 31). And circuit board 1 are bonded together. At this time, as shown in FIG. 31, an adhesive layer 23 is provided in advance at the connection portion between the lid 21 and the circuit board 1. In this embodiment, a gold-tin alloy (thickness: 10 to 15 m) formed by electrolytic plating is used as the adhesive layer 23. In this case, if the mass ratio of gold-tin alloy (gold: tin) is, for example, 4: 1. [0061] Next, N 2 gas atmosphere of 290 to 310 ° C was applied while the lid 21 was pressurized with 5 X 10 4 to 6 X 10 4 Pa.

2 気炉中で回路基板 1と共に加熱する。この時の加熱時間は 30〜60秒が好ましい。こ れにより、回路基板 1と蓋体 21とが接着層 23によって接合され、気密性が高い電子 部品 2が得られる(図 3J)。なお、図 3Jに示す電子部品 2は、長胴方向及び短胴方向 の寸法がそれぞれ 2. Omm及び 1. 6mmで、厚みが 0. 5mmであるが、上記製造方 法によれば、更に薄型の電子部品を安価に製造することができる。例えば、長胴方 向及び短胴方向の寸法がそれぞれ 1. 6mm及び 1. Ommで、厚みが 0. 4mmの電 子部品を安価に製造することができる。  2 Heat together with circuit board 1 in a furnace. The heating time at this time is preferably 30 to 60 seconds. As a result, the circuit board 1 and the lid 21 are joined by the adhesive layer 23, and the electronic component 2 having high airtightness is obtained (FIG. 3J). The electronic component 2 shown in FIG. 3J has dimensions of 2. Omm and 1.6 mm and a thickness of 0.5 mm in the long and short cylinder directions, respectively, but the thickness is 0.5 mm. Can be manufactured at low cost. For example, electronic parts having dimensions of 1.6 mm and 1. Omm and a thickness of 0.4 mm can be manufactured at a low cost.

[0062] [第 3実施形態]  [0062] [Third embodiment]

次に、本発明の第 3実施形態について図面を参照して説明する。参照する図 4は、 本発明の第 3実施形態に係る回路基板の断面図である。なお、第 3実施形態に係る 回路基板は、上述した本発明の第 2の回路基板の一例である。また、図 4において、 図 1と同一の構成要素には同一の符号を付し、その説明は省略する。  Next, a third embodiment of the present invention will be described with reference to the drawings. FIG. 4 to be referred to is a cross-sectional view of a circuit board according to the third embodiment of the present invention. The circuit board according to the third embodiment is an example of the above-described second circuit board of the present invention. In FIG. 4, the same components as those in FIG. 1 are denoted by the same reference numerals, and the description thereof is omitted.

[0063] 図 4に示すように、第 3実施形態に係る回路基板 3において、 2つのスルーホール 1 la, l ibのうちスルーホール l ib内には、第 1実施形態に係る回路基板 1 (図 1A参 照)と同様に金属部材 14が充填されている。一方、スルーホール 11aは、第 1主面 1 Oa側の開口部が金属部材 30で塞がれている。金属部材 30は、略半球状に形成さ れており、その半球面と第 1導電膜 12とが接合されている。また、第 1主面 10aには 凹部が形成されていない。その他は、上述した第 1実施形態に係る回路基板 1 (図 1 A参照)と同様である。上記構成を有することにより、第 3実施形態に係る回路基板 3 は、上述した第 1実施形態に係る回路基板 1と同様の効果を発揮することができる。  As shown in FIG. 4, in the circuit board 3 according to the third embodiment, the circuit board 1 according to the first embodiment is placed in the through hole l ib of the two through holes 1 la and l ib ( The metal member 14 is filled as in FIG. 1A. On the other hand, in the through hole 11 a, the opening on the first main surface 1 Oa side is closed with the metal member 30. The metal member 30 is formed in a substantially hemispherical shape, and the hemispherical surface and the first conductive film 12 are joined. Further, no recess is formed on the first main surface 10a. Others are the same as the circuit board 1 (refer FIG. 1A) which concerns on 1st Embodiment mentioned above. By having the above configuration, the circuit board 3 according to the third embodiment can exhibit the same effects as the circuit board 1 according to the first embodiment described above.

[0064] また、第 3実施形態に係る回路基板 3によれば、金属部材 30の平面部 30aに、導 電性材料等を介さずに電子素子を直接搭載することができるため、電子部品に適用 した際、電子部品の薄型化を容易に行うことができる。なお、図 4に示すスルーホー ル 11a, l ibでは、第 1主面 10aから第 2主面 10bにかけてその径が漸次小さくなつて いるが、スルーホール 11a, l ibの径が漸次小さくなつていなくてもよい。即ち、スル 一ホール 11a, l ibの第 1主面 10a側の開口径力 スルーホール 11a, l ibの第 2主 面 10b側の開口径と同じ力 vj、さくてもよい。 [0065] [第 4実施形態] [0064] Further, according to the circuit board 3 according to the third embodiment, an electronic element can be directly mounted on the flat surface portion 30a of the metal member 30 without using a conductive material or the like. When applied, electronic components can be easily made thinner. In the through holes 11a and l ib shown in FIG. 4, the diameter gradually decreases from the first main surface 10a to the second main surface 10b, but the diameter of the through holes 11a and l ib does not gradually decrease. May be. That is, the opening force on the first main surface 10a side of the through holes 11a, ib may be reduced by the same force vj as the opening diameter on the second main surface 10b side of the through holes 11a, ib. [0065] [Fourth Embodiment]

次に、本発明の第 4実施形態について図面を参照して説明する。参照する図 5は、 本発明の第 4実施形態に係る電子部品の断面図である。第 4実施形態に係る電子部 品は、上述した第 3実施形態に係る回路基板 3を含む。なお、第 4実施形態に係る電 子部品は、上述した本発明の第 2の電子部品の一例である。また、図 5において、図 2及び図 4と同一の構成要素には同一の符号を付し、その説明は省略する。  Next, a fourth embodiment of the present invention will be described with reference to the drawings. FIG. 5 to be referred to is a cross-sectional view of an electronic component according to the fourth embodiment of the present invention. The electronic component according to the fourth embodiment includes the circuit board 3 according to the third embodiment described above. Note that the electronic component according to the fourth embodiment is an example of the second electronic component of the present invention described above. In FIG. 5, the same components as those in FIGS. 2 and 4 are denoted by the same reference numerals, and the description thereof is omitted.

[0066] 図 5に示すように、第 4実施形態に係る電子部品 4は、上述した第 2実施形態に係る 電子部品 2 (図 2参照)に対し、回路基板として第 3実施形態に係る回路基板 3を用い たことと、電子素子 20が金属部材 30上に直接搭載されていること以外は、第 2実施 形態に係る電子部品 2と同様である。よって、第 4実施形態に係る電子部品 4は、上 述した第 2実施形態に係る電子部品 2と同様の効果を有する上、導電性材料等を介 さずに電子素子 20が搭載されているため、薄型化を容易に行うことができる。なお、 電子素子 20の動作空間を確保するためには、電子素子 20と電子素子接続電極 12 aとの間の間隔が、 30-50 μ mの範囲であることが好ましい。  [0066] As shown in FIG. 5, the electronic component 4 according to the fourth embodiment is different from the electronic component 2 according to the second embodiment described above (see FIG. 2) as a circuit board according to the third embodiment. This is the same as the electronic component 2 according to the second embodiment except that the substrate 3 is used and the electronic element 20 is directly mounted on the metal member 30. Therefore, the electronic component 4 according to the fourth embodiment has the same effect as the electronic component 2 according to the second embodiment described above, and the electronic element 20 is mounted without using a conductive material or the like. Therefore, it is possible to easily reduce the thickness. In order to secure an operating space for the electronic element 20, the distance between the electronic element 20 and the electronic element connection electrode 12a is preferably in the range of 30-50 μm.

[0067] 次に、上述した第 4実施形態に係る電子部品 4の製造方法の一例について図面を 参照して説明する。参照する図 6A〜Dは、第 4実施形態に係る電子部品 4の製造方 法の一例を示す工程断面図である。このうち図 6A, Bは、上述した第 3実施形態に 係る回路基板 3の製造方法の一例を示す工程断面図である。なお、図 6A〜Dにお いて、図 4及び図 5と同一の構成要素には同一の符号を付し、その説明は省略する。  Next, an example of a method for manufacturing the electronic component 4 according to the above-described fourth embodiment will be described with reference to the drawings. 6A to 6D to be referred to are process sectional views showing an example of a method for manufacturing the electronic component 4 according to the fourth embodiment. 6A and 6B are process cross-sectional views illustrating an example of a method for manufacturing the circuit board 3 according to the above-described third embodiment. 6A to 6D, the same components as those in FIGS. 4 and 5 are denoted by the same reference numerals, and the description thereof is omitted.

[0068] まず、上述した図 3C〜Eと同様の工程を行って、スルーホール 11a, l ibと、第 1及 び第 2導電膜 12, 13とが設けられた絶縁基板 10を用意する(図 6A)。  First, an insulating substrate 10 provided with through-holes 11a, l ib and first and second conductive films 12, 13 is prepared by performing the same steps as in FIGS. Figure 6A).

[0069] 次に、キヤビラリ一ツール 6 (図 3F参照)を用いてスルーホール l ibに金属部材 14 を充填し、上述した図 3Fの工程と同様に接続導電膜 12bと金属部材 14とを接合す る(図 6B)。  [0069] Next, the metal member 14 is filled into the through hole l ib by using the tool 6 (see FIG. 3F), and the connection conductive film 12b and the metal member 14 are joined in the same manner as in the process of FIG. 3F described above. (Figure 6B).

[0070] 続いて、キヤビラリ一ツール 6 (図 3F参照)を用いてスルーホール 11aの第 1主面 10 a側の開口部を略球状の金属部材 30で塞ぎ、第 1導電膜 12と金属部材 30とを接合 する(図示せず)。この際、 100〜300gfの荷重で金属部材 30を押圧することにより、 キヤビラリ一ツール 6を用いて略球状に形成された金属部材 30が、図 6Bに示すよう な略半球状の金属部材 30となる。この際、キヤビラリ一ツール 6に挿通される金属ワイ ャ 5 (図 3F参照)としては、例えばスルーホール 11aの第 1主面 10a側の開口径が 12 0 m程度である場合、直径が 51 μ m程度のものを使用すればよい。その他の条件 は上述した図 3Fの工程と同様である。このようにして、図 6Bに示す回路基板 3が得ら れる。 [0070] Subsequently, the opening portion on the first main surface 10a side of the through hole 11a is closed with a substantially spherical metal member 30 using a milling tool 6 (see FIG. 3F), and the first conductive film 12 and the metal member are closed. 30 is joined (not shown). At this time, by pressing the metal member 30 with a load of 100 to 300 gf, the metal member 30 formed into a substantially spherical shape by using the chiral tool 6 is as shown in FIG. 6B. Thus, a substantially hemispherical metal member 30 is obtained. At this time, as the metal wire 5 (see FIG. 3F) inserted through the tool 1 for the drill, for example, when the opening diameter on the first main surface 10a side of the through hole 11a is about 120 m, the diameter is 51 μm. What is about m should be used. Other conditions are the same as those in the process of FIG. 3F described above. In this way, the circuit board 3 shown in FIG. 6B is obtained.

[0071] 続いて、図 6Cに示すように、回路基板 3の金属部材 30上に電子素子 20の電極部  Subsequently, as shown in FIG. 6C, the electrode portion of the electronic element 20 is formed on the metal member 30 of the circuit board 3.

(図示せず)を重ねた後、超音波併用熱圧着法により金属部材 30と上記電極部とを 接合することにより、電子素子 20を搭載する。そして、上述した図 31, Jと同様の工程 を行うことにより、図 6Dに示す電子部品 4が得られる。  After stacking (not shown), the electronic member 20 is mounted by joining the metal member 30 and the electrode portion by a thermocompression bonding method using ultrasonic waves. Then, the electronic component 4 shown in FIG. 6D is obtained by performing the same steps as those shown in FIGS.

[0072] 得られた電子部品 4を、 IEC (International Electorotechnical Commission :国際電気標準会議) 68 - 2- 66による不飽和型蒸気加圧試験 (試験条件: 130°C 、 85%相対湿度 (RH)、 40時間)での高湿条件下に曝した後、気密性試験を行った 結果 (各 100個)、電子部品 4の気密性は良好であることが確認できた。ここでいう「気 密性が良好」とは、ヘリウムをトレーサガスに用いた気密性試験機において、 1 X 1CT9 Pa 'n^Zsec以下の漏れ量に保持できる状態の事をいう。なお、上記気密性試験は 、 JISZ2331「ヘリウム漏れ試験方法 (真空吹き付け法)」に準拠する試験であり、気 密性試験機として、株式会社アルバック社製ヘリウムリークディテクターを用いて行つ た。 [0072] Unsaturated steam pressurization test according to IEC (International Electrotechnical Commission: International Electrotechnical Commission) 68-2- 66 (Test conditions: 130 ° C, 85% relative humidity (RH)) , 40 hours) after exposure to high humidity conditions, the result of an airtightness test (100 each) confirmed that the airtightness of the electronic component 4 was good. Here, “good airtightness” refers to a state in which the leak rate of 1 X 1CT 9 Pa 'n ^ Zsec or less can be maintained in an airtightness tester using helium as the tracer gas. The above airtightness test is a test based on JISZ2331 “Helium leak test method (vacuum spraying method)”, and was performed using a helium leak detector manufactured by ULVAC, Inc. as an airtightness tester.

産業上の利用可能性  Industrial applicability

[0073] 本発明は、水晶片ゃ半導体素子等を含む電子部品に有用であり、特に、高気密性 が要求される電子部品に有用である。 [0073] The present invention is useful for an electronic component including a quartz piece or a semiconductor element, and particularly useful for an electronic component that requires high airtightness.

Claims

請求の範囲 The scope of the claims [1] 絶縁基板と、前記絶縁基板の厚さ方向に形成された、前記絶縁基板の第 1主面と 前記絶縁基板の第 2主面とを接続するためのスルーホールとを含む回路基板であつ て、  [1] A circuit board including an insulating substrate and a through hole formed in the thickness direction of the insulating substrate for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate. So, 前記スルーホールの内壁と前記第 1及び第 2主面における前記スルーホールの開 口部周囲とに形成された導電膜と、  A conductive film formed on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces; 前記スルーホールに充填され、かつ前記導電膜と接合する金属部材とを含むこと を特徴とする回路基板。  A circuit board comprising: a metal member filled in the through hole and bonded to the conductive film. [2] 前記スルーホールは、前記第 1主面から前記第 2主面にかけてその径が漸次小さく なって 、る請求項 1に記載の回路基板。 [2] The circuit board according to [1], wherein the diameter of the through hole gradually decreases from the first main surface to the second main surface. [3] 前記金属部材は、略球状に形成されている請求項 1に記載の回路基板。 3. The circuit board according to claim 1, wherein the metal member is formed in a substantially spherical shape. [4] 絶縁基板と、前記絶縁基板の厚さ方向に形成された、前記絶縁基板の第 1主面と 前記絶縁基板の第 2主面とを接続するためのスルーホールとを含む回路基板であつ て、 [4] A circuit board including an insulating substrate and a through hole formed in the thickness direction of the insulating substrate for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate. So, 前記スルーホールの内壁と前記第 1及び第 2主面における前記スルーホールの開 口部周囲とに形成された導電膜と、  A conductive film formed on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces; 前記スルーホールにおける前記第 1主面側の開口部を塞ぎ、かつ前記導電膜と接 合する金属部材とを含むことを特徴とする回路基板。  A circuit board comprising: a metal member that closes an opening of the through hole on the first main surface side and is in contact with the conductive film. [5] 前記金属部材は、略半球状に形成されており、 [5] The metal member is formed in a substantially hemispherical shape, 前記金属部材の半球面と前記導電膜とが接合されている請求項 4に記載の回路基 板。  5. The circuit board according to claim 4, wherein the hemispherical surface of the metal member and the conductive film are joined. [6] 前記絶縁基板は、ガラス基板である請求項 1又は請求項 4に記載の回路基板。  6. The circuit board according to claim 1, wherein the insulating substrate is a glass substrate. [7] 前記絶縁基板は、シート状に形成されている請求項 1, 4, 6のいずれ力 1項に記載 の回路基板。 7. The circuit board according to claim 1, wherein the insulating substrate is formed in a sheet shape. [8] 絶縁基板の厚さ方向に、前記絶縁基板の第 1主面と前記絶縁基板の第 2主面とを 接続するためのスルーホールを形成し、  [8] A through hole is formed in the thickness direction of the insulating substrate to connect the first main surface of the insulating substrate and the second main surface of the insulating substrate; 前記スルーホールの内壁と前記第 1及び第 2主面における前記スルーホールの開 口部周囲とに導電膜を形成し、 略球状の金属部材を前記スルーホールに充填し、前記金属部材と前記導電膜とを 接合する回路基板の製造方法。 Forming a conductive film on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces; A method of manufacturing a circuit board, comprising filling a through-hole with a substantially spherical metal member and bonding the metal member and the conductive film. [9] 絶縁基板の厚さ方向に、前記絶縁基板の第 1主面と前記絶縁基板の第 2主面とを 接続するためのスルーホールを形成し、  [9] A through hole is formed in the thickness direction of the insulating substrate to connect the first main surface of the insulating substrate and the second main surface of the insulating substrate; 前記スルーホールの内壁と前記第 1及び第 2主面における前記スルーホールの開 口部周囲とに導電膜を形成し、  Forming a conductive film on the inner wall of the through hole and around the opening of the through hole in the first and second main surfaces; 前記スルーホールにおける前記第 1主面側の開口部を略球状の金属部材で塞ぎ、 前記金属部材と前記導電膜とを接合する回路基板の製造方法。  A method of manufacturing a circuit board, wherein an opening on the first main surface side of the through hole is closed with a substantially spherical metal member, and the metal member and the conductive film are joined. [10] 前記絶縁基板は、ガラス基板である請求項 8又は請求項 9に記載の回路基板の製 造方法。 [10] The method for manufacturing a circuit board according to [8] or [9], wherein the insulating substrate is a glass substrate. [11] 前記絶縁基板は、シート状に形成されている請求項 8〜10のいずれか 1項に記載 の回路基板の製造方法。  11. The method for manufacturing a circuit board according to claim 8, wherein the insulating substrate is formed in a sheet shape. [12] 前記金属部材と前記導電膜とを接合する際、前記金属部材と前記導電膜との接合 箇所に対して熱と荷重を加えながら超音波を印カロして接合する請求項 8又は請求項 9に記載の回路基板の製造方法。 [12] The invention according to claim 8 or claim 8, wherein, when joining the metal member and the conductive film, the ultrasonic wave is applied to the joining portion between the metal member and the conductive film while applying heat and a load. Item 10. A method for manufacturing a circuit board according to Item 9. [13] 絶縁基板と、前記絶縁基板の厚さ方向に形成された、前記絶縁基板の第 1主面と 前記絶縁基板の第 2主面とを接続するためのスルーホールとを含む回路基板と、 前記回路基板に搭載された電子素子と、 [13] A circuit board including an insulating substrate, and a through hole formed in the thickness direction of the insulating substrate for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate; An electronic element mounted on the circuit board; 前記電子素子を覆う蓋体とを含む電子部品であって、  An electronic component including a lid that covers the electronic element, 前記回路基板は、前記スルーホールの内壁と前記第 1及び第 2主面における前記 スルーホールの開口部周囲とに形成された導電膜と、前記スルーホールに充填され 、かつ前記導電膜と接合する金属部材とを含み、  The circuit board includes a conductive film formed on an inner wall of the through hole and around the opening of the through hole in the first and second main surfaces, and is filled in the through hole and bonded to the conductive film. A metal member, 前記電子素子は、前記第 1主面における前記開口部周囲に形成された前記導電 膜に導電性材料を介して搭載されていることを特徴とする電子部品。  The electronic component is mounted on the conductive film formed around the opening in the first main surface via a conductive material. [14] 前記第 1主面における前記電子素子と面する領域には、凹部が形成されている請 求項 13に記載の電子部品。 [14] The electronic component according to claim 13, wherein a recess is formed in a region of the first main surface facing the electronic element. [15] 絶縁基板と、前記絶縁基板の厚さ方向に形成された、前記絶縁基板の第 1主面と 前記絶縁基板の第 2主面とを接続するためのスルーホールとを含む回路基板と、 前記回路基板に搭載された電子素子と、 [15] A circuit board including an insulating substrate, and a through hole formed in the thickness direction of the insulating substrate for connecting the first main surface of the insulating substrate and the second main surface of the insulating substrate; , Electronic elements mounted on the circuit board; 前記電子素子を覆う蓋体とを含む電子部品であって、  An electronic component including a lid that covers the electronic element, 前記回路基板は、前記スルーホールの内壁と前記第 1及び第 2主面における前記 スルーホールの開口部周囲とに形成された導電膜と、前記スルーホールにおける前 記第 1主面側の開口部を塞ぎ、かつ前記導電膜と接合する金属部材とを含み、 前記電子素子は、前記金属部材に搭載されていることを特徴とする電子部品。 前記電子素子と前記導電膜との間の間隔が 30〜50 μ mである請求項 15に記載 の電子部品。  The circuit board includes a conductive film formed on an inner wall of the through hole and around the opening of the through hole in the first and second main surfaces, and an opening on the first main surface side in the through hole. The electronic component is mounted on the metal member, and a metal member that joins the conductive film. The electronic component according to claim 15, wherein a distance between the electronic element and the conductive film is 30 to 50 μm.
PCT/JP2005/010047 2004-09-01 2005-06-01 Circuit board, manufacturing method thereof, and electronic parts using the same Ceased WO2006025139A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2006531290A JPWO2006025139A1 (en) 2004-09-01 2005-06-01 Circuit board, manufacturing method thereof, and electronic component using the same

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2004254578 2004-09-01
JP2004-254578 2004-09-01
JP2005-066122 2005-03-09
JP2005066122 2005-03-09

Publications (1)

Publication Number Publication Date
WO2006025139A1 true WO2006025139A1 (en) 2006-03-09

Family

ID=35999803

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2005/010047 Ceased WO2006025139A1 (en) 2004-09-01 2005-06-01 Circuit board, manufacturing method thereof, and electronic parts using the same

Country Status (2)

Country Link
JP (1) JPWO2006025139A1 (en)
WO (1) WO2006025139A1 (en)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008193180A (en) * 2007-01-31 2008-08-21 Citizen Miyota Co Ltd Piezoelectric oscillator
JP2009246188A (en) * 2008-03-31 2009-10-22 Citizen Finetech Miyota Co Ltd Electrode structure, and electronic device
JP2010087248A (en) * 2008-09-30 2010-04-15 Kyocera Kinseki Corp Metal material burying device for wafer and metal material burying method for wafer
JP2010109833A (en) * 2008-10-31 2010-05-13 Kyocera Kinseki Corp Piezoelectric vibrator and manufacturing method thereof
JP2010187133A (en) * 2009-02-10 2010-08-26 Seiko Epson Corp Mounting structure of electronic component, and mounting method of electronic component
JP2013514196A (en) * 2009-12-18 2013-04-25 エアロクライン アクティエボラーグ Method for closing holes and closing holes
JP2014120635A (en) * 2012-12-18 2014-06-30 Seiko Instruments Inc Optical device and method of manufacturing optical device
JP2016054195A (en) * 2014-09-03 2016-04-14 セイコーインスツル株式会社 Manufacturing method of package and package
JP2017054979A (en) * 2015-09-10 2017-03-16 セイコーインスツル株式会社 Electronic component
JP2017054978A (en) * 2015-09-10 2017-03-16 セイコーインスツル株式会社 Manufacturing method of electronic parts
JP2017126865A (en) * 2016-01-13 2017-07-20 セイコーインスツル株式会社 Method of manufacturing electronic component, and the electronic component
JP2018014347A (en) * 2016-07-19 2018-01-25 日本電気株式会社 Circuit board and circuit board manufacturing method

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000031613A (en) * 1998-07-08 2000-01-28 Mitsubishi Electric Corp ELECTRIC CIRCUIT BOARD, PROJECT CONTACT FORMING METHOD, AND PROJECT CONTACT FORMING DEVICE
JP2001308481A (en) * 2000-04-25 2001-11-02 Toshiba Chem Corp Printed wiring board and method of production
JP2002270718A (en) * 2001-03-07 2002-09-20 Seiko Epson Corp Wiring board and its manufacturing method, semiconductor device and its manufacturing method, circuit board, and electronic equipment
JP2003101181A (en) * 2001-09-26 2003-04-04 Citizen Watch Co Ltd Circuit board, method of manufacturing the same, and electronic device
JP2003115658A (en) * 2001-10-05 2003-04-18 Advantest Corp Manufacturing method of wiring board, filling inserting method, wiring board and element package

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000031613A (en) * 1998-07-08 2000-01-28 Mitsubishi Electric Corp ELECTRIC CIRCUIT BOARD, PROJECT CONTACT FORMING METHOD, AND PROJECT CONTACT FORMING DEVICE
JP2001308481A (en) * 2000-04-25 2001-11-02 Toshiba Chem Corp Printed wiring board and method of production
JP2002270718A (en) * 2001-03-07 2002-09-20 Seiko Epson Corp Wiring board and its manufacturing method, semiconductor device and its manufacturing method, circuit board, and electronic equipment
JP2003101181A (en) * 2001-09-26 2003-04-04 Citizen Watch Co Ltd Circuit board, method of manufacturing the same, and electronic device
JP2003115658A (en) * 2001-10-05 2003-04-18 Advantest Corp Manufacturing method of wiring board, filling inserting method, wiring board and element package

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008193180A (en) * 2007-01-31 2008-08-21 Citizen Miyota Co Ltd Piezoelectric oscillator
JP2009246188A (en) * 2008-03-31 2009-10-22 Citizen Finetech Miyota Co Ltd Electrode structure, and electronic device
JP2010087248A (en) * 2008-09-30 2010-04-15 Kyocera Kinseki Corp Metal material burying device for wafer and metal material burying method for wafer
JP2010109833A (en) * 2008-10-31 2010-05-13 Kyocera Kinseki Corp Piezoelectric vibrator and manufacturing method thereof
JP2010187133A (en) * 2009-02-10 2010-08-26 Seiko Epson Corp Mounting structure of electronic component, and mounting method of electronic component
JP2013514196A (en) * 2009-12-18 2013-04-25 エアロクライン アクティエボラーグ Method for closing holes and closing holes
JP2014120635A (en) * 2012-12-18 2014-06-30 Seiko Instruments Inc Optical device and method of manufacturing optical device
JP2016054195A (en) * 2014-09-03 2016-04-14 セイコーインスツル株式会社 Manufacturing method of package and package
JP2017054979A (en) * 2015-09-10 2017-03-16 セイコーインスツル株式会社 Electronic component
JP2017054978A (en) * 2015-09-10 2017-03-16 セイコーインスツル株式会社 Manufacturing method of electronic parts
JP2017126865A (en) * 2016-01-13 2017-07-20 セイコーインスツル株式会社 Method of manufacturing electronic component, and the electronic component
JP2018014347A (en) * 2016-07-19 2018-01-25 日本電気株式会社 Circuit board and circuit board manufacturing method

Also Published As

Publication number Publication date
JPWO2006025139A1 (en) 2008-05-08

Similar Documents

Publication Publication Date Title
JP5262946B2 (en) Electronic devices
CN101272135B (en) Quartz crystal device and method for sealing the same
CN102377401B (en) The manufacture method of electronic device, electronic equipment and electronic device
US6452311B1 (en) Piezoelectric device, manufacturing method therefor, and method for manufacturing piezoelectric oscillator
CN101729037B (en) Package for electronic component, piezoelectric device and manufacturing method thereof
JP4891235B2 (en) Circuit board, manufacturing method thereof, and electronic component using the same
JP5538974B2 (en) Electronic device package manufacturing method and electronic device package
WO2008023465A1 (en) Microelectronic machine mechanism device, and its manufacturing method
JP5275155B2 (en) Manufacturing method of electronic device
JP4955786B2 (en) Surface-mount type piezoelectric device
JP2014067849A (en) Method for manufacturing electronic device container, method for manufacturing electronic device, electronic equipment, and mobile equipment
WO2006025139A1 (en) Circuit board, manufacturing method thereof, and electronic parts using the same
JP2009044123A (en) Manufacturing method of electronic component and electronic component
US20050239236A1 (en) Printed circuit board and fabrication method thereof
JP3438711B2 (en) Piezoelectric device and method of manufacturing the same
JPH10275826A (en) Semiconductor device and manufacturing method thereof
WO2004100364A1 (en) Tuning-fork piezoelectric device manufacturing method and tuning-fork piezoelectric device
JP2003318692A (en) Piezo device
JP2005033390A (en) Piezoelectric device and manufacturing method for the same
JP2002026679A (en) Package for piezoelectric vibration device
JP4556637B2 (en) Functional element body
JP2005151336A (en) Piezoelectric device and method of manufacturing lid, mobile phone device using piezoelectric device and piezoelectric device, and electronic apparatus using piezoelectric device
JP2006074567A (en) Piezoelectric device
JP2009239475A (en) Surface mounting piezoelectric oscillator
JP2009099806A (en) Electronic component and sealing method thereof

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KM KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NG NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SM SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): BW GH GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
DPE1 Request for preliminary examination filed after expiration of 19th month from priority date (pct application filed from 20040101)
WWE Wipo information: entry into national phase

Ref document number: 2006531290

Country of ref document: JP

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase