WO2006011299A1 - プリント配線基板、その製造方法および半導体装置 - Google Patents
プリント配線基板、その製造方法および半導体装置 Download PDFInfo
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- WO2006011299A1 WO2006011299A1 PCT/JP2005/010273 JP2005010273W WO2006011299A1 WO 2006011299 A1 WO2006011299 A1 WO 2006011299A1 JP 2005010273 W JP2005010273 W JP 2005010273W WO 2006011299 A1 WO2006011299 A1 WO 2006011299A1
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- WIPO (PCT)
- Prior art keywords
- wiring board
- printed wiring
- metal layer
- etching
- wiring pattern
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/26—Cleaning or polishing of the conductive pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/07—Electric details
- H05K2201/0753—Insulation
- H05K2201/0761—Insulation resistance, e.g. of the surface of the PCB between the conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1157—Using means for chemical reduction
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/067—Etchants
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/388—Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
Definitions
- the present invention relates to a printed wiring board in which a wiring pattern is directly formed on the surface of an insulating film, a method for manufacturing the printed wiring board, and a semiconductor device on which electronic components are mounted. More specifically, the present invention relates to a printed wiring board formed from a two-layer substrate film comprising an insulating film and a metal layer formed on the surface of the insulating film without an adhesive layer, and the production thereof. The present invention relates to a method and a semiconductor device in which an electronic component is mounted on the printed wiring board.
- a wiring board has been manufactured using a copper-clad laminate in which a copper foil is laminated using an adhesive on the surface of an insulating film such as a polyimide film.
- the copper-clad laminate as described above is manufactured by heat-pressing a copper foil to an insulating film having an adhesive layer formed on the surface. Therefore, when manufacturing such a copper-clad laminate, the copper foil must be handled alone. However, the thinner the copper foil, the weaker the waist, and the lower limit of the copper foil that can be handled alone is about 12 to 35 m. When using a copper foil thinner than this, use a copper foil with a support, for example. The handling becomes very complicated. In addition, when a wiring pattern is formed using a copper-clad laminate with the above thin copper foil adhered using an adhesive on the surface of the insulating film, the adhesive used to adhere the copper foil Warp deformation of the printed wiring board occurs due to heat shrinkage.
- printed wiring boards are becoming thinner and lighter, and such printed wiring boards have a three-layer structure consisting of an insulating film, adhesive, and copper foil. It is becoming impossible to cope with the copper-clad laminate.
- a two-layer laminate in which a metal layer is laminated directly on the insulating film surface without using an adhesive is used.
- Such a two-layer laminate is produced by depositing metal on the surface of an insulating film such as a polyimide film by vapor deposition or sputtering. And precipitation as above
- a desired wiring pattern can be formed by applying a photoresist to the surface of the exposed metal, exposing it to light, developing it, and etching it using a masking material made of photoresist.
- a two-layer laminate is suitable for manufacturing very fine wiring patterns in which the wiring pattern pitch width formed because the metal layer is thin is less than 30 m.
- Patent Document 1 Japanese Patent Laid-Open No. 2003-188495 describes a first metal layer (base metal layer) formed on a polyimide film by a dry film forming method, and a plating on the first metal layer.
- the etching An invention of a method for manufacturing a printed wiring board is disclosed in which the etching surface is later cleaned with an oxidizing agent.
- Example 5 of Patent Document 1 shows an example in which a nickel-chromium alloy is plasma-deposited to a thickness of 10 mm, and then copper is deposited to a thickness of 8 ⁇ m by a plating method. ing.
- the second metal layer (a layer made of conductive metal such as copper) on the surface is etched into a desired pattern. Then, it is necessary to etch the first metal layer (which can also be nickel, chromium alloy, etc.).
- an acid such as potassium permanganate or potassium dichromate is used.
- An etchant containing inertia is used. It is believed that the components contained in the etching solution are removed by washing the printed wiring board with water after etching the first metal layer using the etching solution having acidity in this way.
- such a printed wiring board includes a wiring pattern made of copper or a copper alloy.
- a base metal layer made of a metal such as chromium or nickel is formed between the conductive metal layer that forms the film and the polyimide film that is an insulating film.
- an etching solution containing an acidic inorganic compound such as potassium permanganate.
- Patent Document 1 JP 2003-188495 A
- the present invention continues to apply a voltage for a long time to a printed wiring board formed using a base film (ultra-thin metal-coated polyimide film) in which an insulating film is coated with an ultra-thin metal layer.
- a base film ultra-thin metal-coated polyimide film
- the purpose is to eliminate the problems peculiar to the printed wiring board using an ultra-thin metal-coated insulating film. That is, the present invention uses a substrate film (metal-coated polyimide film) in which an ultrathin metal layer is formed on at least one surface of an insulating film such as a polyimide film by a sputtering method or the like, and has an insulation resistance value.
- the purpose is to provide a method of manufacturing printed wiring boards that are not likely to fluctuate!
- Another object of the present invention is to provide a printed wiring board formed as described above, in which the insulation resistance value is unlikely to fluctuate.
- an object of the present invention is to provide a semiconductor device in which electronic components are mounted on the printed wiring board as described above.
- the method for producing a printed wiring board of the present invention includes an insulating film, a base metal layer formed on at least one surface of the insulating film, and a conductive metal layer formed on the base metal layer. Are etched selectively in a plurality of etching steps including a conductive metal etching step that mainly dissolves the conductive metal and a base metal etching step that mainly dissolves the base metal. After the wiring pattern is formed, the insulating film on which the wiring pattern is formed is brought into contact with a reducing aqueous solution containing a reducing substance.
- the base film is brought into contact with an etching solution that dissolves a conductive metal to form a wiring pattern, and then a metal that forms the base metal layer.
- the chemical composition is different from that of the first treatment liquid and Also, it is preferable to contact with the second treatment liquid that acts with high selectivity on the base metal layer forming metal, and further with the reducing aqueous solution containing the reducing substance.
- the metal layer of the base film is selectively removed by etching to form a wiring pattern, and then the base metal layer is formed. It is preferable to treat the metal with a treatment solution which can be dissolved and Z or passivated, and then contact the metal with a reducing aqueous solution containing a reducing substance.
- the base film is formed by A second treatment solution that can treat Ni contained in the metal layer with a first treatment solution that can dissolve, then dissolve Cr contained in the base metal layer, and remove the base metal layer of the insulating film. Then, the wiring pattern is formed, and the sputtering metal remaining on the surface of the insulating film is removed together with the surface of the insulating film, and further contacted with a reducing aqueous solution containing a reducing substance. Is preferred ⁇ .
- a printed wiring board of the present invention is a wiring formed by selectively etching a base metal layer and a conductive metal layer formed on at least one surface of an insulating film in a plurality of etching steps.
- the printed wiring board of the present invention is formed such that the width of the lower end portion of the conductive metal layer in the cross section of the wiring pattern is smaller than the width of the upper end portion of the base metal layer in the cross section.
- the residual amount of metal derived from the etching solution in the printed wiring board is preferably 0.05 ⁇ gZcm 2 or less.
- the base metal layer constituting the wiring pattern is formed so as to protrude in the width direction from the conductive metal layer constituting the wiring pattern.
- the residual metal amount derived from the etching solution is preferably 0.05 / z gZcm 2 or less.
- the wiring pattern of the insulating film is formed, and the thickness force of the insulating film of the portion is formed.
- the metal is formed thinly and the residual amount of metal derived from the etching solution in the printed wiring board is 0.05 gZcm 2 or less.
- the residual amount of metal derived from the etching solution in the printed wiring board is in the range of 0.0002 to 0.03 ⁇ g / cm 2 !
- the semiconductor device of the present invention is characterized in that an electronic component is mounted on a printed wiring board having a very small amount of metal derived from the etching solution as described above.
- the conductive film is conductive in a plurality of etching steps. It becomes necessary to etch the metal layer and the base metal layer.
- an etching solution containing an acidic compound such as potassium permanganate which is mainly used for etching the base metal layer, is used in a cleaning process after the etching process. It is difficult to remove by itself.
- the base metal layer and the conductive film are selectively etched by selectively etching the base film in which the base metal layer and the conductive metal layer are laminated in this order on at least one surface of the insulating film.
- the oxidizing metal or metal compound derived from the etching solution such as manganese contained in the etching solution used for etching the base metal layer is reduced. It is treated with an aqueous solution containing toxic substances.
- the metal or metal compound derived from the etching solution is very easily removed by washing with water, and the metal derived from the etching solution on the surface of the printed wiring board after washing with water is easily removed.
- the residual amount can be 0.05 g / cm 2 or less, preferably in the range of 0.0002 to 0.03 g / cm 2 .
- the residual amount of the metal derived from the etching solution can be remarkably reduced by washing the surface with an aqueous solution containing a reducing substance, which is used in the subsequent steps. Therefore, it is possible to effectively prevent bad appearance and deterioration of the quality of the printed wiring board of the present invention. Furthermore, it is possible to reduce the temporal change in the insulation resistance value between the wiring patterns, and to obtain a printed wiring board and a circuit board with high reliability.
- the substrate on which the wiring pattern is formed through a plurality of etching steps is washed with an aqueous solution containing a reducing substance.
- an aqueous solution containing a reducing substance By using such a reducing substance-containing aqueous solution and washing it, the metal derived from the etching solution adhering to the substrate surface can be removed very efficiently. That is, when manufacturing the printed wiring board of the present invention, the base metal layer and the surface of the base metal layer are formed. Using the base film formed on at least one surface of the insulating film, the base metal layer and the conductive metal layer are formed using different etching solutions.
- the wiring pattern is formed by selective etching, and when selectively etching the base metal on the surface of the insulating film, it is necessary to use potassium permanganate or sodium permanganate.
- the printed wiring board as described above is continuously manufactured in the form of a long tape, there are only a limited number of processes that can be assigned to the washing process. Therefore, the remaining amount of the metal derived from the etching solution on the surface of the printed wiring board cannot be reduced as defined in the present invention.
- the present invention has been made based on the finding that such a residual metal derived from an etching solution can be efficiently removed by using a reducing aqueous solution containing a reducing substance.
- a base film having a conductive metal layer such as copper or copper alloy on at least one surface of the insulating film via a base metal layer such as nickel or chromium After forming a wiring pattern by selectively etching the base metal layer and conductive metal layer using multiple etchants, the film surface contains a reducing substance such as a reducing organic acid. The remaining metal derived from the etching solution is removed by treatment with a reducing aqueous solution.
- the residual metal derived from the etching solution is efficiently removed from the surface of the printed wiring board of the present invention. Insulation resistance value between patterns is difficult to change. In addition, the wiring pattern is not easily altered by residual metal.
- the semiconductor device of the present invention can be used stably for a long time. .
- FIG. 1 is a process diagram showing an example of a process for producing a printed wiring board of the present invention.
- FIG. 2 is a diagram showing an example of a cross section of a wiring pattern and the like in each step of manufacturing the printed wiring board of the present invention.
- FIG. 3 is a diagram schematically showing an example of a cross section of a wiring pattern formed by the method of the present invention.
- FIG. 1 is a diagram showing an example of a process when manufacturing a printed wiring board of the present invention.
- FIG. 2 is a cross-sectional view showing an example of the cross-sectional shape of the wiring pattern and the like in each step
- FIG. 3 is an example of the cross-sectional shape of the wiring pattern in the printed wiring board manufactured by the method of the present invention. It is sectional drawing shown typically.
- common members are assigned common numbers
- number 11 is an insulating film
- number 12 is a base metal layer
- number 16 is a plating layer
- Number 20 is a conductive metal layer
- number 22 is a masking material.
- a base film having a base metal layer and a conductive metal layer formed on the surface of the base metal layer on at least one surface of the insulating film. Is used.
- the insulating film forming the base film examples include a polyimide film, a polyimide amide film, polyester, polyphenylene sulfide, polyether imide, fluorine resin, and a liquid crystal polymer. That is, these insulating films have such heat resistance that they are not deformed by heating, for example, when forming a base metal layer. In addition, it has acid / alkali resistance to such an extent that it is not eroded by an etching solution used for etching or an alkaline solution used for cleaning. As the insulating film, a polyimide film is preferable.
- Such an insulating film usually has an average thickness of 7 to 150 ⁇ m, preferably 7 to 50 ⁇ m, particularly preferably 15 to 40 / ⁇ ⁇ . Since the printed wiring board of the present invention is suitable for forming a thin board, it is preferable to use a thinner polyimide film. In addition, the surface of such an insulating film may be subjected to a roughening treatment using a hydrazine solution or a plasma treatment in order to improve the adhesion of the following base metal layer.
- a base metal layer is formed on the surface of such an insulating film.
- This base metal layer is formed on at least one surface of the insulating film. Therefore, in the present invention, the base metal layer and the conductive metal layer are laminated on one surface of the insulating film as the base film. Displacement of a film having a structure (single-sided coated base film) or a film having a structure in which the base metal layer and the conductive metal layer are laminated on both sides of an insulating film (double-sided coated base film) The base film can be used.
- the adhesion of the conductive metal layer formed on the surface of the base metal layer to the insulating film is improved.
- the base metal layer is, for example, a metal such as copper, nickel, chromium, molybdenum, tandasten, silicon, palladium, titanium, vanadium, iron, conoleto, manganese, aluminum, zinc, tin and tantalum. Can be formed from These metals are simple You may be alone or in combination.
- the base metal layer is preferably formed of nickel, chromium or an alloy containing these metals.
- Such a base metal layer is preferably formed on the surface of the insulating film by using a dry film forming method such as vapor deposition or sputtering.
- the thickness of such a base metal layer is usually in the range of 1 to 10 Onm, preferably 2 to 50 nm.
- This base metal layer is used to stably form a conductive metal layer on this layer, and the base metal layer is insulated with a kinetic energy that allows a portion of the base metal to physically bite into the insulating film surface. It is preferably formed by colliding with a film. Therefore, in the present invention, the base metal layer is particularly preferably a base metal sputtering layer as described above.
- a conductive metal layer is formed on the surface of the base metal layer.
- This conductive metal layer is usually formed of copper or a copper alloy.
- Such a conductive metal layer can be formed by depositing copper or a copper alloy on the surface of the base metal layer by a plating method.
- the plating method for forming the conductive metal layer includes a wet method such as an electric plating method and an electroless plating method, and a dry method such as a sputtering method and a vapor deposition method. May be formed.
- the conductive metal layer can be formed by a combination of a dry method and a wet method.
- the conductive metal layer by a wet plating method such as electric plating or electroless plating.
- the average thickness of the conductive metal layer thus formed is usually in the range of 0.5 to 40 ⁇ m, preferably 1 to 18 ⁇ m, more preferably 2 to 12 ⁇ m.
- the wet method and the dry method are combined, generally, the surface of the base metal layer is subjected to sputtering, for example, by sputtering. After the formation of the metal layer, a wet process conductive metal layer is formed on the surface of the spattering conductive metal layer.
- the average thickness of the sputtering conductive metal layer is usually in the range of 0.5 to 17.5 m, preferably 1.5 to: L I. 5 m. And the wet process conductive metal layer so that the total average thickness is within the above range.
- the conductive metal layer formed in this way is inseparable even if the conductive metal deposition method is different, and acts equally when forming a wiring pattern.
- the total average thickness of the base metal layer and the conductive metal layer thus formed is usually 0.5 to 40 ⁇ m, preferably 1 to 18 ⁇ m, more preferably 2 Within the range of ⁇ 12 ⁇ m.
- the ratio of the average thickness of the base metal layer and the conductive metal layer is usually in the range of 1: 400 00 to 1:10, preferably 1: 5000 to 1: 100.
- the base metal layer and the conductive metal layer are formed on the surface of at least one surface of the insulating film, using the base metal layer and the conductive metal layer.
- a wiring pattern is formed by selectively etching the conductive metal layer in a plurality of etching steps.
- the wiring pattern is a pattern made of a photosensitive resin by forming a photosensitive resin layer on the conductive metal layer of the base film and exposing and developing a desired pattern on the photosensitive resin. Can be formed by etching the pattern thus formed as a masking material.
- This etching process mainly includes a conductive metal etching process for etching the conductive metal layer and a base metal etching process for mainly etching the base metal layer.
- the conductive metal etching step is a step of etching copper or a copper alloy that forms the conductive metal layer, and the etching agent used here is an etching for copper or a copper alloy that is a conductive metal.
- Agent ie Cu etchant
- Examples of such conductive metal etchants include etching solutions based on ferric chloride, etching solutions based on salt and cupric copper, and etching using sulfuric acid + hydrogen peroxide and hydrogen peroxide.
- An agent can be mentioned.
- Such an etching agent for a conductive metal is capable of forming a wiring pattern by etching a conductive metal layer with excellent selectivity, and this etching solution contains a conductive metal layer and an insulating film. It also has a considerable etching function for the base metal between them.
- the processing temperature is usually 30 to 55 ° C., and the processing time is usually 5 to 120 seconds.
- a wiring pattern having a cross-sectional structure in which mainly the conductive metal layer 20 is etched is formed, for example, as shown in FIG. 2 (a).
- the conductive metal layer 20 on the surface of the base film is mainly etched, and a wiring pattern similar to the masking material used is formed.
- the base metal layer 12 below the conductive metal layer 20 is also subjected to considerable etching. The base metal layer 12 is not completely removed in this conductive metal etching step.
- the masking material 22 having a cured body strength of the photosensitive resin is selectively etched using the masking material 22 having a cured body strength of the photosensitive resin, and then the masking material 22 also having a cured body strength of the photosensitive resin. Removal by treatment with an aqueous solution containing an alkali such as sodium hydroxide or potassium hydroxide, specifically an aqueous solution containing NaOH + NaCO2 etc.
- an alkali such as sodium hydroxide or potassium hydroxide, specifically an aqueous solution containing NaOH + NaCO2 etc.
- the cross-sectional shape of the wiring pattern from which the masking material has been removed as described above is, for example, as shown in FIG.
- the base metal etching is performed mainly for selectively etching the base metal layer after removing the conductive metal layer mainly along the masking material pattern as described above.
- Force that dissolves and removes in a process to form a wiring pattern A pickling process (microetching process) can be provided before the base metal etching process. That is, after the conductive metal layer is selectively etched mainly by the conductive metal etching process as described above, the pattern made of the photosensitive resin used as a masking material in this conductive metal etching process is conductive.
- the force removed by, for example, alkali cleaning may cause an oxide film to be formed on the surface of the conductive metal layer or the surface of the base metal layer by contact with such an alkali cleaning solution.
- the conductive metal layer (Cu) surface (top of the wiring pattern) that comes into contact with the masking material, which has a hardened body of photosensitive resin does not have a history of contact with the etching material. The activity may be different from the slope of the wiring pattern. Therefore, by performing pickling (microetching) after the conductive metal etching step and making the wiring pattern surface (entire surface) uniform, it is possible to perform highly accurate etching in the subsequent steps.
- the base metal etching step is performed. Primarily, the base metal layer is dissolved and removed, and the remaining base metal is passivated.
- the base metal layer is formed of a metal such as copper, nickel, chromium, molybdenum, titanium, vanadium, iron, conoret, aluminum, zinc, tin and tantalum or an alloy containing these metals.
- a base metal layer selectively elutes the metal forming the base metal layer by using an etching solution corresponding to the forming metal, and slightly remains on the insulating film.
- the base metal layer forming metal is passivated.
- the base metal layer force nickel and chromium to be subjected to this base metal etching step are formed using nickel and chromium, for example, sulfuric acid / hydrochloric acid mixed solution or the like is used.
- the first treatment liquid (first treatment liquid capable of dissolving Ni) can be dissolved and removed.
- a second treatment liquid (for example, potassium permanganate + KOH aqueous solution) can be used.
- the second treatment solution capable of dissolving Cr can be dissolved and removed.
- examples of the first treatment liquid capable of dissolving Ni include sulfuric acid / hydrochloric acid mixed solution having a concentration of about 5 to 15% by weight, and potassium persulfate and sulfuric acid. Can give a mixture.
- the treatment temperature is usually 30 to 55 ° C.
- the treatment time is usually 5 to 40 seconds.
- the base metal remaining in a protruding shape on the side surface of the wiring pattern and the base metal remaining between Z or the wiring are dissolved and removed.
- the distance between the base metal layers constituting the adjacent wiring pattern is close to the planned value (design value).
- the distance between the base metal layers forming the wiring pattern differs depending on the design width of the wiring pitch to be formed, but for example, the wiring pitch is 30 m.
- the shortest distance between the base metals is in the range of 5 to 18 / zm when measured by an electron micrograph (SEM photograph). This is often the case.
- the shortest measured distance is 33% to 120% with respect to the design value.
- the shortest distance between the base metals is within the range of 10 to 16 ⁇ m, that is, It can be in the range of 66.7-106.7% of the design value.
- the actually measured wiring pattern width can be 10 to 120% of the design value.
- the base metal remaining in a protruding shape is dissolved and removed, as shown in FIG. 2 (e), formed by the base metal layer of the wiring pattern.
- the wiring pattern forming continuous line force is also the distance from the wiring pattern forming continuous line force to the tip (SA) force of the protruding part protruding in the width direction 0 to 6 m (0 to 40% of the design space width), preferably It means 0-5 / ⁇ , more preferably 0-3 / ⁇ , most preferably 0-2 m. Therefore, in the present invention, a wire having a distance from the wiring pattern forming continuous line to the tip is within the above range, and is regarded as forming a wiring pattern forming continuous line and is not called a protrusion.
- the wiring pattern formed in the present invention is a force that forms a plating layer on the surface thereof in order to prevent oxidation in a later process and to form an alloy layer during bonding of an IC chip or the like.
- a plating layer is formed on the surface, it is desirable to secure at least 5 m between the narrowest portions of the adjacent wiring patterns from the surface of the plating layer (the shortest interval between the wiring patterns).
- a microetching solution that can be used when performing microetching is, for example, an etchant of Cu, which is a conductive metal such as HC1 or HSO.
- the etching solution used for the chinching can be used, and potassium persulfate (K S 0
- K S 0 potassium persulfate
- Na S 0 sodium persulfate
- a clear step is formed between the upper end portions of the metal layers.
- the portion formed by the conductive metal (Cu) of the wiring pattern is retracted by the microetching toward the central portion of the cross section of the wiring pattern by this micro-etching process. Since the base metal layer is hardly dissolved by this microetching, the shape of the wiring pattern formed by the base metal layer is maintained. Therefore, the wiring pattern formed through this microetching process has a shape in which an overhanging portion of the base metal layer is formed around the wiring pattern made of the conductive metal layer.
- the width W1 of the upper end portion of the formed base metal layer is clearly different from the width W2 of the lower end portion of the conductive metal layer 20, and the difference W3—W2 (2 X (W3Z2) is usually It is within the range of 0.05 to 2.0 m, preferably 0.2 to 1.0 m.
- the microetching step is performed as described above during the treatment step using the first treatment liquid and the treatment of the base metal layer using the second treatment solution having a composition different from the treatment step.
- the formed wiring pattern has a strip-shaped protrusion consisting of the base metal layer 12 of W3 X 1Z2 width around the wiring pattern of 20 or more conductive metal layers such as Cu. The resulting wiring pattern is obtained.
- this microetching step is an optional step, and if this microetching step is not carried out, usually, the wiring pattern has a belt-like shape composed of the base metal layer 12 as shown in FIG. 2 (h). No protrusion is formed. This protrusion is treated with the second treatment liquid. Migration can be suppressed.
- microetching is performed as described above, followed by processing using the second processing solution.
- the second treatment liquid used here is a treatment liquid that can passivate this residual Cr when Cr contained in the base metal layer is dissolved and Cr remains.
- the Ni that forms the base metal layer 12 is almost dissolved and removed.
- Cr which is the metal that forms the layer 12, still remains on the insulating film 11. If such Cr remains between the wiring patterns, the insulation resistance value between the wiring patterns will not be stable, so the Cr contained in the base metal layer 12 on the insulating film 11 may be dissolved or removed, or Even if Cr remains, a second treating agent containing a component that can passivate the remaining Cr is used.
- the second treating agent used here Cr contained in the base metal layer can be dissolved and removed, and even when there is Cr remaining on the surface of the insulating film, this residual Cr is removed.
- Examples of such second treatment liquid include a potassium permanganate / water solution and a sodium permanganate + NaOH solution.
- the concentration of potassium permanganate is usually 10 to 60 gZ liter, preferably 25 to 55 gZ liter, and the concentration of KOH is Preferably it is 10-30gZ liter.
- the treatment temperature is usually 40 to 70 ° C.
- the treatment time is usually 10 to 60 seconds.
- this second treatment liquid can be used to produce a solution as shown in FIG. As shown in FIG. 3, the surface of the insulating film 11 can be polished. Accordingly, the base metal layer 12 can be removed by suitably using the second treatment liquid, and the second treatment liquid is usually l-100 nm, preferably from the surface of the insulating film 11. Can cut (dissolve) the insulating film 11 at a depth of 5 to 50 nm. By using the second treatment liquid as described above, Cr remaining on the surface layer of the insulating film 11 can be removed together with the surface layer of the insulating film.
- the wiring pattern of the printed wiring board obtained in this way is not subjected to micro-etching.
- the width of the lower end portion of the conductive metal layer) and the upper end portion of the base metal layer 12 are formed with the same width or substantially the same width in the cross section. Insulation of the portion where the wiring pattern is not formed
- the surface of the film 11 (polyimide film) is usually cut to a depth in the range of 1 to 100 nm, preferably 2 to 50 nm, and the portion where the wiring pattern is formed has a height of 1 to 100 nm, Preferably, a base material base portion 17 having a trapezoidal cross section having a height of 2 to 50 mm is formed.
- etching containing an acid-soluble inorganic compound such as potassium permanganate is highly useful. If you use an etchant containing an acidic inorganic compound, A metal derived from such an etching solution remains on the surface of the wire substrate. That is, after the etching process is completed, the printed wiring board is subjected to the water washing process. The metal derived from the etching solution cannot be completely removed by the normal water washing process after the etching process. In other words, it may cause contamination of the processing liquid used in the subsequent process, and may cause deterioration of the reliability of the printed wiring board, such as the occurrence of migration due to such residual metal. Absent.
- the insulating film on which the wiring pattern is formed is brought into contact with a reducing aqueous solution containing a reducing substance.
- Examples of the reducing substance used herein include organic acids having reducibility, and examples of such organic acids having reducibility include oxalic acid, citrate, ascorbic acid and organic carboxylic acids. And so on. These organic acids having reducibility can be used alone or in combination. These organic acids may form a salt.
- Such an organic acid having reducibility is used by dissolving in water at a concentration that does not affect the formed wiring pattern and can remove the metal derived from the remaining etching solution. It is used by dissolving in water at a concentration of 2 to 10% by weight, preferably 3 to 5% by weight.
- a concentration of 2 to 10% by weight preferably 3 to 5% by weight.
- various methods such as a method of immersing an insulating film on which a wiring pattern is formed in the treatment liquid, a method of spraying the treatment liquid on an insulating film on which a wiring pattern is formed, and the like can be adopted. Furthermore, these methods may be combined.
- Such a reducing treatment liquid is usually adjusted to a temperature in the range of 25 to 60 ° C, preferably 30 to 50 ° C, and the reducing treatment liquid adjusted to such a temperature.
- the contact time with is usually 2 to 150 seconds, preferably 10 to 60 seconds. In this way, the reducing treatment liquid and By this contact, the metal derived from the etching solution remaining on the wiring pattern and the insulating film surface is efficiently removed.
- the wiring substrate (insulating film and wiring pattern formed on this surface) that has been contact-treated with the reducing treatment solution in this way can be processed as it is in the next step.
- U prefer to handle.
- the remaining amount of the metal derived from the etching solution on the surface of the printed wiring board is as follows: 1) One wiring pattern is formed from a long electronic component mounting film carrier tape 1 Cut out a piece (for example, cut a 35mm wide tape into a length of 47.5mm, which is 10 perforations on which one wiring pattern is formed), and 2) Place in pure water (lOOcc) as a solution and boil at 100 ° C for 5 hours to extract Mn contained in the sample into hot water. 3) Calculate the amount of Mn eluted in hot water by ICP-MS Analytical measurement was performed using an inductively coupled plasma mass spectrometer (ICP mass), and the amount of extracted Mn was determined. The total amount of Mn obtained was divided by the total area of the cut sample (total area on both sides). .
- ICP mass inductively coupled plasma mass spectrometer
- the amount of residual metal derived from the etching solution on the surface of the printed wiring board is 0.05 / z gZcm 2 or less, and the contact with the solution containing the reducing substance and the conditions for washing with water are suitably adjusted. , it can be an amount within the range of 0. 000002 ⁇ 0. 03 g / cm 2 . As described above, the remaining amount of the metal derived from the etching solution is within a range that cannot be achieved in a short time by ordinary water washing.
- the wiring pattern formed on the printed wiring board in this manner is covered with a resin protective layer so that the terminal portion is exposed.
- a resin protective layer Before forming the resin protective layer, at least a base of the formed wiring pattern is formed. It is also possible to cover the material metal layer so as to cover it. That is, after forming the wiring pattern, after processing with an aqueous solution containing a reducing substance so as to remove the metal derived from the etching solution remaining on the formed wiring pattern and the exposed insulating film, and further washing with water Before forming the resin coating layer, a plating layer can be formed so as to conceal the exposed portion of the base metal layer at the lower end of the wiring pattern.
- the concealed plating layer formed here is at least a base metal layer at the lower end of the wiring pattern, and the concealing coating layer can also be formed over the entire wiring pattern.
- Examples of concealed plating layers thus formed include tin plating layers, gold plating layers, nickel-gold plating layers, solder plating layers, lead-free solder plating layers, Pd plating layers, Ni plating layers, Zn plating layers, and Cr plating layer, etc., and these plating layers may be a single layer or a composite plating layer in which a plurality of plating layers are laminated.
- a nickel-gold plating layer is preferred.
- the concealment mask may be formed on the exposed terminal portion after forming the resin protective layer so as to cover the terminal portion of the formed wiring pattern.
- the thickness of such a concealed plating layer can be appropriately selected depending on the type of plating, but is usually in the range of 0.005 to 5.0 m, preferably 0.005 to 3.0 m. Is set to the thickness of Further, after concealing the entire surface and exposing the terminal portion to form the resin protective layer, the portion exposed from the resin protective layer may be further processed using the same metal for the terminal portion. . Also by forming the concealed plating layer having such a thickness, it is possible to prevent migration from the base metal layer forming the wiring pattern.
- Such a concealed plating layer is formed by an electrolytic plating method or an electroless plating method. be able to.
- the concealing plating process on the wiring pattern By performing the concealing plating process on the wiring pattern in this way, the surface and the side wall portion of the passivated base metal layer on the insulating substrate side of the wiring pattern are concealed by the concealing coating layer, and a potential difference between different metals is generated. Even if it occurs, since the insulation resistance between the wiring patterns is sufficiently high, the occurrence of migration from the base metal layer can be effectively prevented.
- the concealment mask as described above, the side wall portion of the base metal layer is covered with the concealment mask layer, and the base metal is not exposed, so that the insulation reliability between the wiring patterns is high. Insulation failure over time due to migration or the like hardly occurs.
- This concealment mesh is mainly intended for the occurrence of migration from the base metal layer. Force This is not limited to such concealment of the base metal layer. The purpose may be to prevent the occurrence of pitting corrosion.
- a resin protective layer is formed so as to cover the wiring pattern and the insulating film in the part where the wiring pattern is formed, leaving the terminal part of the wiring pattern.
- This resin protective layer can be formed, for example, by applying a solder resist ink to a desired part using a screen printing technique, or a resin film having an adhesive layer in a desired shape in advance. It can also be formed by sticking this shaped resin film.
- a plating layer is formed on the surface of the wiring pattern where the resin protective layer force is also exposed. That is, the terminals exposed from the solder resist layer or the resin protective layer are subjected to a plating treatment.
- This soldering process is to electrically connect the bump electrodes formed on the electronic component and the terminals of the printed wiring board when the electronic component is mounted on the printed wiring board. This is for establishing an electrical connection between the printed wiring board and other members when the mounted printed wiring board (semiconductor device) is incorporated into an electronic device.
- Examples of the plating layer formed in this way include a tin plating layer, a gold plating layer, a silver plating layer, a nickel-gold plating layer, a solder plating layer, a lead-free solder plating layer, a non-radium plating layer, and a nickel plating layer. Layer, sub-10 layer, and chrome layer.
- the This plating layer may be a single layer or a composite plating layer in which a plurality of plating layers are laminated.
- the metal plating layer as described above may be a pure metal layer having the above-described metal force or may have a diffusion layer in which another metal is diffused. In the case of forming a diffusion layer, a metal plating layer that forms a diffusion layer is formed on the surface of the metal (or metal plating layer) to be diffused. The upper metal layer diffuses with each other to form a diffusion layer.
- such a plating layer is usually a plating layer having the same metal force in a single printed wiring board.
- This metal plating layer is not necessarily formed from the same metal in a single printed wiring board. It is not necessary that the type of metal that forms the plating layer differs depending on the terminal that is not necessary.
- the plating layer as described above can be formed by a normal plating method such as an electric plating method or an electroless plating method.
- the average thickness of such a plating layer varies depending on the type of plating layer to be formed, and is usually in the range of 5 to 12 / ⁇ ⁇ .
- the average thickness of the plating layer is the total thickness of the plating layers formed in the wiring pattern.
- FIG. 3 Examples of the cross-sectional shape of the wiring pattern formed as described above are shown in (1) to (4) of FIG.
- number 11 is an insulating film
- number 12 is a base metal layer
- number 20 is a conductive metal layer
- number 16 is a plating layer.
- the terminals of the printed wiring board formed as described above and electrodes such as bump electrodes formed on the electronic component are electrically connected to mount an electronic component such as an IC chip.
- a semiconductor device can be manufactured by encapsulating the electronic component and its surroundings including the connecting portion.
- the printed wiring board and the semiconductor device of the present invention are formed because the metal derived from the etching solution used in a plurality of etching processes is removed by treating with an aqueous solution containing a reducing substance.
- the remaining amount of metal derived from the etching solution between the wiring patterns is 0.05 / zg / cm 2 or less, more preferably 0.00 0002-0.003 g / cm 2 Can therefore be attributed to residual metal Therefore, it is possible to obtain a highly reliable printed wiring board in which the remaining metal does not contaminate the plating solution used in the subsequent process.
- the printed wiring board or semiconductor device of the present invention has a remarkably small amount of metal derived from the etching solution on the wiring pattern and the insulating film. Therefore, the electrical resistance value between the wiring patterns does not fluctuate significantly due to migration. That is, the printed wiring board and the semiconductor device of the present invention have an extremely small residual amount of metal derived from the etching solution, and the insulation after the voltage is continuously applied for a long time that migration due to the residual metal is difficult to occur. There is no substantial variation between the resistance and the insulation resistance before applying the voltage, and the printed circuit board has very high reliability.
- the printed wiring board of the present invention has a wiring pattern (or lead) width of 30 m or less, preferably 25 to 5 ⁇ m, and a pitch width of 50 ⁇ m or less. It is suitable for a printed wiring board having a pitch width of 40 to 20 ⁇ m.
- the printed wiring board of the present invention includes a printed circuit board (PWB), FPC (Flexible Printed Circuit), TAB (Tape Automated Bonding) tape, COF (Chip On Film), CSP (Chip Size Package), BGA ( Ball Grid Array) and ⁇ -BGA (-Ball Grid Array).
- PWB printed circuit board
- FPC Flexible Printed Circuit
- TAB Tunnel Automated Bonding
- COF Chip On Film
- CSP Chip Size Package
- BGA Ball Grid Array
- ⁇ -BGA Ball Grid Array
- a polyimide film is used as an insulating film, and the printed wiring board having a wiring pattern formed on the surface of the insulating film has been mainly described.
- This semiconductor device is formed by mounting electronic components on this wiring pattern and sealing the periphery of the mounted electronic components with grease. This semiconductor device also has very high reliability. Have it.
- Example 1 One surface of a 35 mm wide polyimide film (Ube Industries, Ltd., Upilex S) with an average thickness of 38 ⁇ m was roughened by reverse sputtering and then treated under the following conditions. A chromium / nickel alloy layer with an average thickness of 40 nm was formed by sputtering gold to form a base metal layer.
- the chromium-prime nickel alloy is degassed in the apparatus to a pressure of 100 ° CX 0. 5 Pa Sputtering was performed to form a base metal layer.
- the surface of the electrolytic copper layer thus formed is coated with a photosensitive resin, exposed and developed, and the comb electrode is formed so that the wiring pitch is 30 m (line width: 15 ⁇ m, space width: 15 ⁇ m).
- the electrolytic copper layer was etched for 30 seconds using a 12% salty copper cupric etchant containing HCl; 100 g / liter to form a wiring pattern. Manufactured.
- the masking material formed of photosensitive resin on the obtained wiring pattern was removed by treatment with NaOH + NaC0 solution at 40 ° C for 30 seconds.
- the Cu conductor was selectively dissolved so that the treatment depth was 0.3 m as it was directed inward from the edge (Cu conductor receding).
- the treatment was performed at 65 ° C. for 30 seconds to dissolve Cr contained in the base metal layer.
- This second treatment solution was able to dissolve and remove chromium in the base metal layer, and to slightly pass the remaining chromium and passivate it.
- the substrate was washed at 40 ° C for 1 minute to dissolve and remove the remaining Mn. Thereafter, it was washed with pure water at 23 ° C for 15 seconds.
- the Mn remaining on the substrate when washed with an aqueous oxalic acid solution at 40 ° C. for 1 minute was 0.0003 gZcm 2 .
- 0.14 gZcm 2 is obtained when the oxalic acid aqueous solution is not used for cleaning (Reference Example 1), and when the oxalic acid aqueous solution is not washed, a considerable amount of Mn is deposited on the substrate.
- the printed wiring board may be formed while this Mn remains without being removed in a subsequent process, which may cause deterioration of the quality of the printed wiring board.
- Mn remaining in this way may contaminate chemicals used in the subsequent processes and cause deterioration in the appearance or quality of the printed wiring board.
- solder resist layer was formed so as to expose the connection terminals and the external connection terminals.
- the printed wiring board on which the comb-shaped electrode was formed was subjected to a 1000-hour continuity test (HHBT) by applying a voltage of 40 V at 85 ° C and 85% RH.
- This continuity test is an accelerated test, in which the time until a short circuit occurs (for example, the time until the insulation resistance value becomes less than 1 X 10 8 ⁇ ) is set to about 1000 hours. If the insulation resistance value is less than 1 ⁇ 10 8 ⁇ , it cannot be used as a general board. Moreover, if the insulation resistance value after 1000 hours is less than 1 X 10 14 ⁇ , there is a possibility that a problem may occur in practice.
- the printed wiring board manufactured in Example 1 has an insulation resistance of 6 X before the insulation reliability test. 10 is a 14 Omega, insulating the measured insulation resistance after reliability test was 6 X 10 " ⁇ , the insulation resistance due to the voltage and it is marked Caro therebetween substantial difference is that observed ChikaraTsuta.
- the insulation resistance measured after the insulation reliability test of the sample that had not been treated with oxalic acid was 1. ⁇ ⁇ 10 14 ⁇ , and the sample was treated with oxalic acid. As a result, the insulation reliability of the obtained printed wiring board was improved.
- One surface of a polyimide film having an average thickness of 38 ⁇ m was subjected to roughing by reverse sputtering, and then sputtered with nickel and chromium alloy under the following conditions. Then, a chromium / nickel alloy layer having an average thickness of 40 mm was formed as a base metal layer.
- 38 mu after m thick polyimide film was treated for 10 minutes with 3 chi 10- 5 Pa at 100 ° C, sputtering chromium-prime nickel alloys by pressure instrumentation ⁇ to 100 ° CX O. 5 Pa To form a base metal layer.
- electrolytic copper layer electroplated copper layer having a thickness of 8 ⁇ m.
- the surface of the electrolytic copper layer thus formed is coated with a photosensitive resin, exposed and developed to form a comb electrode pattern with a wiring pitch of 30 m (line width; 15 ⁇ m, space width; 15 ⁇ m). Then, using this pattern as a masking material, the electrolytic copper layer was formed with a photosensitive resin by etching for 30 seconds using a salty cupric copper etchant containing HCl; 100 g / liter and having a concentration of 12%. A wiring pattern similar to the turn was manufactured.
- the masking material formed of the photosensitive resin on the obtained wiring pattern was removed by treatment with NaOH + NaCO solution at 40 ° C for 30 seconds.
- the metal layer (Ni-Cr alloy) was pickled.
- the substrate was washed with the solution at 40 ° C. for 1 minute to dissolve and remove residual Mn. Thereafter, it was washed with pure water at 23 ° C for 15 seconds.
- the Mn remaining on the substrate when washed with an aqueous oxalic acid solution at 40 ° C. for 1 minute was 0.00056 gZcm 2 .
- the residual Mn content was 0.11 ⁇ gZcm 2 .
- the cross-sectional shape of the wiring pattern thus formed had a shape approximated to FIG. 3 (1).
- the printed wiring board on which the comb-shaped electrode was formed was subjected to a 1000-hour continuity test (HHBT) by applying a voltage of 40 V at 85 ° C and 85% RH.
- the insulation resistance of this printed circuit board before the insulation reliability test was 5 ⁇ 10 14 ⁇ , and the insulation resistance measured after the insulation reliability test was 5 ⁇ 10 " ⁇ . A voltage was applied between the two. No substantial difference in insulation resistance was observed
- the insulation resistance measured after the insulation reliability test of the sample that was not treated with oxalic acid was 3.5 to 10 " ⁇ , and the treatment with oxalic acid was performed. As a result, the insulation reliability of the obtained printed wiring board was improved.
- One surface of a polyimide film having an average thickness of 38 ⁇ m (Upilex S, manufactured by Ube Industries, Ltd.) was roughened by reverse sputtering and then sputtered with nickel and chromium alloy under the following conditions. Then, a chromium / nickel alloy layer having an average thickness of 40 mm was formed as a base metal layer.
- 38 mu after m thick polyimide film was treated for 10 minutes with 3 chi 10- 5 Pa at 100 ° C, the instrumentation ⁇ , of 100 ° CX O. 5 Pa to adjust the chromium-prime nickel alloy sputtering To form a base metal layer.
- electrolytic copper layer electroplated copper layer
- a photosensitive resin is applied to the surface of the electrolytic copper layer thus formed, exposed and developed to form a comb-shaped electrode pattern with a wiring pitch of 30 m (line width: 15 m, space width: 15 m).
- the electrolytic copper layer was etched for 30 seconds using a 12% salt / cupric copper etchant containing HCl; 100 g / liter, and formed with a photosensitive resin.
- a similar wiring pattern was manufactured.
- a masking material formed of photosensitive resin on the obtained wiring pattern was used as NaOH + Na C
- Ni in the N-to-Cr alloy overhang 26 was melted over 30 seconds and polyimide, which is an insulating film, was exposed between the wiring patterns.
- the metal between the wiring patterns is treated by treatment with 40 g / liter potassium permanganate +20 g / liter KOH solution.
- the lower polyimide film was dissolved and removed together with a thickness of 50 nm.
- the substrate was washed with the solution at 40 ° C. for 1 minute to dissolve and remove residual Mn. Thereafter, it was washed with pure water at 23 ° C for 15 seconds.
- Mn was 0.00028 gZcm 2 .
- the residual amount of Mn was 0.056 ⁇ gZcm 2 .
- solder resist layer is formed so that the internal connection terminals and external connection terminals are exposed, and the other exposed internal connection terminals and external connection terminals are subjected to 311 plating with a thickness of 0.5 111 and heated. Thus, a predetermined pure Sn layer was formed.
- the printed wiring board on which the comb-shaped electrode is formed in this way is charged with 40V at 85 ° C and 85% RH. Pressure was applied!] And a 1000 hour continuity test (HHBT) was performed.
- the insulation resistance of the printed printed circuit board before insulation reliability test was 7 ⁇ 10 14 ⁇ , and the insulation resistance measured after the insulation reliability test was 8 X 10 " ⁇ . There was no substantial difference in insulation resistance.
- the insulation resistance measured after the insulation reliability test of the powerful sample that was not treated with oxalic acid was 4.6 to 10 14 ⁇ , and the treatment with oxalic acid was performed. As a result, the insulation reliability of the obtained printed wiring board was improved.
- Example 2 38 ⁇ 40nm wm 8 ⁇ Cupric chloride None 0.00056 0.5 ⁇ 5 ⁇ 10 '* ⁇
- the printed wiring board of the present invention removes the metal derived from the etching solution by treating with an aqueous solution containing a reducing substance, so that the etching solution-derived metal remains on the surface of the printed wiring board. It is possible to prevent the occurrence of migration due to such residual metal having a remarkably small amount, and to obtain a highly reliable printed wiring board and a semiconductor device. Further, when the printed wiring board is manufactured, the metal derived from the etching solution is removed, so that the processing solution and the apparatus in the subsequent process may be contaminated by the metal derived from the etching solution. The printed wiring board and the semiconductor device can be manufactured efficiently. In addition, since the metal derived from the etching solution can be efficiently removed with the treatment liquid containing the reducing substance, the water washing process can be shortened, and the use of the production method of the present invention can improve the efficiency. A printed wiring board can be manufactured well.
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
- ing And Chemical Polishing (AREA)
Abstract
Description
Claims
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020077001530A KR100874743B1 (ko) | 2004-07-29 | 2005-06-03 | 프린트 배선 기판, 그 제조 방법 및 반도체 장치 |
| US11/632,793 US20080236872A1 (en) | 2004-07-29 | 2005-06-03 | Printed Wiring Board, Process For Producing the Same and Semiconductor Device |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004222186A JP4585807B2 (ja) | 2003-12-05 | 2004-07-29 | プリント配線基板の製造方法 |
| JP2004-222186 | 2004-07-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2006011299A1 true WO2006011299A1 (ja) | 2006-02-02 |
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| PCT/JP2005/010273 Ceased WO2006011299A1 (ja) | 2004-07-29 | 2005-06-03 | プリント配線基板、その製造方法および半導体装置 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20080236872A1 (ja) |
| KR (1) | KR100874743B1 (ja) |
| CN (1) | CN1994033A (ja) |
| TW (1) | TWI395531B (ja) |
| WO (1) | WO2006011299A1 (ja) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113054068A (zh) * | 2019-12-27 | 2021-06-29 | 山东浪潮华光光电子股份有限公司 | 一种砷化镓基发光二极管粗化后取管芯的方法 |
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| JP4736703B2 (ja) * | 2005-10-14 | 2011-07-27 | 宇部興産株式会社 | 銅配線ポリイミドフィルムの製造方法 |
| JP4728828B2 (ja) * | 2006-02-09 | 2011-07-20 | パナソニック株式会社 | 配線基板の製造方法 |
| KR101482429B1 (ko) * | 2013-08-12 | 2015-01-13 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조방법 |
| KR20150057032A (ko) * | 2013-11-18 | 2015-05-28 | 삼성전기주식회사 | 터치 패널 및 그의 제조 방법 |
| US9142416B1 (en) * | 2014-05-13 | 2015-09-22 | Lam Research Corporation | Process to reduce nodule formation in electroless plating |
| CN107484330A (zh) * | 2016-06-07 | 2017-12-15 | 鹏鼎控股(深圳)股份有限公司 | 高频铜银混合导电线路结构及其制作方法 |
| JP6820736B2 (ja) * | 2016-12-27 | 2021-01-27 | 東京エレクトロン株式会社 | 基板処理方法および基板処理装置 |
| KR102679250B1 (ko) * | 2018-09-12 | 2024-06-28 | 엘지이노텍 주식회사 | 연성 회로기판 및 이를 포함하는 칩 패키지, 및 이를 포함하는 전자 디바이스 |
| US11342256B2 (en) * | 2019-01-24 | 2022-05-24 | Applied Materials, Inc. | Method of fine redistribution interconnect formation for advanced packaging applications |
| USD926208S1 (en) | 2019-07-12 | 2021-07-27 | GE Precision Healthcare LLC | Display screen with graphical user interface |
| CN111499915A (zh) * | 2019-12-30 | 2020-08-07 | 瑞声科技(新加坡)有限公司 | 一种lcp薄膜的表面处理方法 |
| JP7387453B2 (ja) * | 2020-01-10 | 2023-11-28 | 住友電気工業株式会社 | フレキシブルプリント配線板及びその製造方法 |
| GB2593864B (en) * | 2020-02-28 | 2023-01-04 | X Fab France Sas | Improved transfer printing for RF applications |
| CN114080088B (zh) * | 2020-08-10 | 2024-05-31 | 鹏鼎控股(深圳)股份有限公司 | 电路板及其制备方法 |
| US11978698B2 (en) * | 2021-04-23 | 2024-05-07 | Changxin Memory Technologies, Inc. | Method for forming a semiconductor package structure |
| CN120035052A (zh) * | 2025-04-22 | 2025-05-23 | 深圳市大正瑞地科技有限公司 | 一种印制电路板选化工艺中退除湿膜的方法及印制电路板 |
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- 2005-06-03 KR KR1020077001530A patent/KR100874743B1/ko not_active Expired - Fee Related
- 2005-06-03 US US11/632,793 patent/US20080236872A1/en not_active Abandoned
- 2005-06-03 CN CNA2005800254933A patent/CN1994033A/zh active Pending
- 2005-06-03 WO PCT/JP2005/010273 patent/WO2006011299A1/ja not_active Ceased
- 2005-06-06 TW TW094118541A patent/TWI395531B/zh not_active IP Right Cessation
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| JP2000294900A (ja) * | 1999-04-02 | 2000-10-20 | Dainippon Printing Co Ltd | 配線基板の加工方法 |
| JP2003188495A (ja) * | 2001-12-13 | 2003-07-04 | Sumitomo Metal Mining Co Ltd | プリント配線基板の製造方法 |
| JP2004014888A (ja) * | 2002-06-10 | 2004-01-15 | Mitsui Mining & Smelting Co Ltd | プリント配線板の製造方法及びその製造方法で得られたプリント配線板 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113054068A (zh) * | 2019-12-27 | 2021-06-29 | 山东浪潮华光光电子股份有限公司 | 一种砷化镓基发光二极管粗化后取管芯的方法 |
| CN113054068B (zh) * | 2019-12-27 | 2022-04-05 | 山东浪潮华光光电子股份有限公司 | 一种砷化镓基发光二极管粗化后取管芯的方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1994033A (zh) | 2007-07-04 |
| US20080236872A1 (en) | 2008-10-02 |
| TWI395531B (zh) | 2013-05-01 |
| KR100874743B1 (ko) | 2008-12-19 |
| KR20070029812A (ko) | 2007-03-14 |
| TW200607424A (en) | 2006-02-16 |
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