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WO2006066000A1 - Filtre suiveur pour syntoniseur - Google Patents

Filtre suiveur pour syntoniseur Download PDF

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Publication number
WO2006066000A1
WO2006066000A1 PCT/US2005/045428 US2005045428W WO2006066000A1 WO 2006066000 A1 WO2006066000 A1 WO 2006066000A1 US 2005045428 W US2005045428 W US 2005045428W WO 2006066000 A1 WO2006066000 A1 WO 2006066000A1
Authority
WO
WIPO (PCT)
Prior art keywords
filter
tracking filter
gain
tracking
signal
Prior art date
Application number
PCT/US2005/045428
Other languages
English (en)
Inventor
Peter Shah
Yongsik Youn
Martin Alderton
Original Assignee
Rf Magic, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rf Magic, Inc. filed Critical Rf Magic, Inc.
Publication of WO2006066000A1 publication Critical patent/WO2006066000A1/fr

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03JTUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J3/00Continuous tuning
    • H03J3/20Continuous tuning of single resonant circuit by varying inductance only or capacitance only
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03JTUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J3/00Continuous tuning
    • H03J3/24Continuous tuning of more than one resonant circuit simultaneously, the circuits being tuned to substantially the same frequency, e.g. for single-knob tuning
    • H03J3/26Continuous tuning of more than one resonant circuit simultaneously, the circuits being tuned to substantially the same frequency, e.g. for single-knob tuning the circuits being coupled so as to form a bandpass filter
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03JTUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J2200/00Indexing scheme relating to tuning resonant circuits and selecting resonant circuits
    • H03J2200/07Calibration of receivers, using quartz crystal oscillators as reference
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03JTUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J2200/00Indexing scheme relating to tuning resonant circuits and selecting resonant circuits
    • H03J2200/10Tuning of a resonator by means of digitally controlled capacitor bank
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03JTUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J2200/00Indexing scheme relating to tuning resonant circuits and selecting resonant circuits
    • H03J2200/28Automatic self-alignment of a receiver
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03JTUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J2200/00Indexing scheme relating to tuning resonant circuits and selecting resonant circuits
    • H03J2200/29Self-calibration of a receiver
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03JTUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J2200/00Indexing scheme relating to tuning resonant circuits and selecting resonant circuits
    • H03J2200/32Tuning of tracking filter

Definitions

  • the present invention relates to filters used with radio frequency tuners and specifically to tunable tracking filters.
  • Broadband receivers such as TV and cable tuners that are built with discrete components often incorporate tracking filters that operate on the radio frequency (RF) input signal prior to conversion from RF to intermediate frequency (IF) or baseband.
  • the filters are tune-able such that they can be set to have their center frequencies at the desired channel. This has several benefits: . .
  • Harmonic suppression In addition to LO-RF, the subsequent mixer also to some extent down-converts signal at the harmonics of the LO, i.e. 2LO-RF, 3LO-RF, etc.
  • the filtering suppresses signals that might reside at multiples of the LO and thereby helps in preventing contamination of the down-converted desired channel.
  • Prior art techniques implement RF tracking filters with discrete components.
  • the tacking filters are built using very low loss, high Q, passive components as well as varactors, which usually achieve the necessary linearity by utilizing a very high tuning voltage. With this method, very sharp low loss filtering can be achieved.
  • This type of component choice is normally not available in integrated circuit technologies and therefore the circuit techniques are not applicable to these types of receivers implemented in integrated circuit technology.
  • the present invention is an implementation of an RF tracking filter that can be created in integrated circuit technology.
  • the tracking filter is tuned using switched-in capacitors in conjunction with a fixed inductor, which can be on-chip or off-chip.
  • Optional switched-in resistors loading the filter provide adjustment for gain and Q of the filter.
  • the filters can be driven by an active low gain buffer stage and passive voltage gain is achieved in the filter from the Q of the LC tank circuit.
  • a low gain active stage provides high linearity compared to a high gain active stage.
  • the advantages of the tunable filter are superior performance in the presence of jammers, image rejection, and harmonic suppression.
  • the tunable filter includes selectable resistors to adjust the Q of the filter and provide an automatic gain control (AGC) function.
  • AGC automatic gain control
  • the invention includes a method of circuit calibration for gain and frequency, wherein a test tone is selectively injected into the tracking filters and filter center frequency and gain response can be calibrated.
  • the level of the test tone is limited to insure minimal emissions of the test tone.
  • One or more tracking filters can be used in a tuner, with each tracking filter covering part of the frequency range of the tuner operation.
  • the tracking filters preferably have some overlap in frequency range.
  • the tracking filter can be used in conjunction with a low noise amplifier (LNA).
  • LNA low noise amplifier
  • Figure 1 shows a tracking filter block diagram according to the present invention.
  • FIG. 2 shows an LNA Calibration/ AGC block diagram according to the present invention.
  • Figure 3 shows an example of a calibration procedure according to the present invention.
  • Fig. 1 shows that tracking filter 100 relies on inductor and capacitor (LC) filtering using fixed inductors and variable capacitors.
  • the variable capacitors are implemented as arrays of capacitors 101 with switches 102.
  • the switches can easily be implemented using metal-oxide-semiconductor (MOS) transistors but other methods are possible too such as diode switches.
  • MOS metal-oxide-semiconductor
  • the switches connect the capacitors to a common signal point, for example AC ground.
  • the switches are shown on the AC ground side of the capacitors but could also be on the signal side of the capacitors.
  • Fig. 1 shows how low noise amplifier (LNA) 104 can be split up into several banks using different values of inductors to limit the required range of each capacitor bank.
  • the variable capacitors can be implemented in other well-known ways such as with varactors or a combination of varactors with switched capacitors.
  • the LNA is to use active gain elements.
  • Another implementation of Fig. 1 can use unity gain or low gain buffers, for example, emitter followers, and gain is provided by the tracking filter.
  • the tracking filter gain is the passive voltage multiplication provided by the Q of the LC tanks; therefore, the voltage gain would be equal to Q, the circuit's quality factor.
  • a circuit's Q is defined as two times the product of pi and the ratio of the maximum energy stored to the energy dissipated per cycle.
  • the LNA/tracking filter can also provide voltage gain at its input due to intentionally mismatching, for example, the input impedance is set higher than the signal source impedance, which causes less voltage division from the source than if the input impedance had been power- matched.
  • emitter followers in the LNA as opposed to active gain blocks enables very high linearity and high input impedance. It is especially an advantage that the load impedance for the emitter followers increases significantly for frequencies away from the resonance frequency of the LC circuit. This greatly improves linearity for jammers at larger frequency offsets from the desired channel without sacrificing noise figure for the desired signal.
  • Fig. 1 shows the LNA consisting of pre-buffer or amplifier 103 driving three buffers or amplifiers, of which only one is active at a time, depending on which band is selected.
  • the number of bands could be any number from 1 upwards.
  • the pre-buffer can be omitted - its main benefit is to reduce parasitic loading of the RF input from the disabled tracking filter buffers.
  • the switches (Sl, S2, S3) can be omitted if the test signal buffer is designed so that it has relatively high output impedance when off. The same argument applies to switch S4 in stage 106 of Fig. 1.
  • the mentioned buffers do not have to be emitter-followers; they could be implemented as source followers or as any other known buffer technique.
  • variable automatic gain control ( AGC) gain can be obtained by using variable parallel resistors across the tank circuits, which can de-Q the filter and thereby lower the gain.
  • the variability can be achieved by a resistor network 110 with switches 111 connecting the resistors to ground. This should be construed as AC ground, for example a suitable reference voltage or a capacitor connected to the circuit ground or any other technique for providing an AC signal ground. Alternatively, the switches could be placed between the resistors and the signal node. Variability of the resistors can be achieved in other well know ways, including using MOS transistors.
  • the LNA optionally incorporates calibration signal input 107. This can be used for auto- calibration of the center frequency that, for example, would determine the correct capacitor switch settings.
  • the test signal can either be passed through the LNA or it can be routed directly to the output. The latter feature also enables gain calibration if desired.
  • Fig. 2 shows LNA calibration circuitry comprising calibration block 200 and calibration clock generator circuit 202.
  • the purpose of the calibration circuit is twofold: to tune the filter to the desired channel by adjustment of the capacitor arrays, and to optionally adjust the gain.
  • the gain can be adjusted at several locations, for example, in the LNA, before the LNA or, by adjusting the tank circuit Q and therefore the filter gain to a nominal value.
  • Calibration clock generator circuit 202 produces calibration test tone 201 and clock signals for the sample/hold and state machine circuits.
  • the filter calibration is done by injection of test tone 201 in the signal path and by adjustment of the capacitor array while detecting the level of the test tone after it has passed through the receiver and dedicated detection circuitry 210.
  • the filter is centered by detecting the point at which, as the capacitor array is adjusted, the receive path gain is maximized.
  • One way of achieving this is to monotonically adjust the capacitor array until the gain stops increasing and starts to decrease.
  • the circuit yields the peak receive path gain that is also for this filter topology the center frequency of the filter.
  • This method requires some storage mechanism in order to determine change in gain from one step to the next. This can be achieved in several well-known ways, including sample-hold circuits 220 for analog implementations or registers in digital implementations.
  • the gain calibration is done by injection of test tone 201 in the signal path, and establishing a reference receive path gain "A" with the LNA bypassed.
  • the LNA is then switched in using the calibration through path and a new receive gain path gain "B" is established.
  • the difference between U A" and "B” is the gain of the LNA and tracking filter.
  • the filter gain is then optimized by adjustment of a resistor array. In one implementation, an attenuator loss of predetermined value is switched in into the calibration block during the "B" phase only.
  • the filter gain is optimized by adjustment of a resistor array while detecting the level of the test tone, after passing through the receiver and dedicated detection circuitry.
  • Path gain "B” is compared with the previously established reference receive path gain "A".
  • the filter gain is optimized and equal to the predetermined attenuator loss when gains "A" and "B” are equal, since the LNA gain exactly offsets the attenuator loss.
  • the LNA gain can be precisely set and in addition, if several attenuator values are available then several LNA gain settings can be achieved. Similar to the filter calibration, a storage function is needed. For the gain calibration, the signals representing gain "B” and the previously determined gain "A” need to be stored and compared.
  • the LNA calibration of determining center frequency and gain can be implemented in several ways, spanning from complete analog to complete digital or software implementation.
  • Fig. 2 shows a mainly analog implementation in which the aforementioned storage function is implemented with sample-hold circuits.
  • This invention also addresses some potential issues with the calibration method. Situations to consider include leakage of the test tone out the RF pins could violate emissions specifications, noise and strong co-channel interference at the input can corrupt the calibration, thus making reliable signal level measurements difficult, and off-channel jammers can corrupt calibration by overwhelming the test tone signal and thereby causing the calibration machine to center on the jammer instead of the test tone.
  • test tone level control circuit can optionally be implemented which minimizes the level of the test tone while ensuring that noise or interference does not corrupt the measurement.
  • the test tone level is set to a minimal value and gradually increased until a minimum required ratio of calibration test tone to noise and interference is achieved. This also ensures that emission of test tone power is minimized during the calibration period.
  • Fig. 3 shows details of an example of the described calibration procedure.
  • the calibration procedure can be implemented in various other ways.
  • Fig. 2 shows an example implementation of an AGC loop around the LNA/tracking filter. This can take any number of inputs from any locations in the signal path.
  • two sense points are used, input 203 of the mixer and input 204 of the main part of the channel filter.
  • the front-end gain is determined by avoidance of overloading the channel filter as well as avoidance of overloading the mixer input. It is advantageous to use a sense point after the tracking filter but before the mixer. This enables the AGC to react to off-channel jammers.
  • the jammer level at which the AGC starts reducing the gain then depends on the frequency offset from the desired channel; the further the frequency offset is, the higher the tolerable jammer level before the onset of gain reduction.
  • the AGC loop can advantageously be implemented in digital form, for example as an up/down counter whose output word controls the resistor array.
  • the counter would be clocked with a reference frequency and the up/down control would be determined by the outputs of the power or peak detection circuits.
  • the analog outputs can be compared to reference, called "set point”, values by using comparators and the digital outputs of these comparators can then be logically OR'ed together to form the up/down control signal for the counter.
  • the jammers are analog video signals asymmetric AGC attack and decay times can be used, one implementation would be to sample a number of consecutive samples of the error signal to detect a ramp up/down and use this to slow down the counter clock using a divider.
  • a maximum filter Q can be set by limiting the maximum value of the variable resistors.
  • One way to implement a resistance limit with switched resistors is to have a separate control register to store the limit value; the value may be different based on frequency. The resistor control word is then prevented from setting the resistance beyond the limit value.

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  • Circuits Of Receivers In General (AREA)

Abstract

L'invention concerne un syntoniseur qui utilise une banque de filtres suiveurs pour présélectionner un canal à recevoir. Chaque filtre suiveur recouvre une gamme de fréquences. Les filtres suiveurs peuvent être réglés en fréquence au moyen de condensateurs commutés et en gain au moyen de résistances commutées. Ces dernières peuvent être commandées par un circuit de commande de gain automatique qui surveille le signal choisi et ajuste le gain du filtre suiveur pour atteindre un niveau de signal recherché. Un commutateur oriente le signal reçu ou le signal émanant d'un générateur de tonalité d'essai vers les filtres suiveurs. La tonalité d'essai, produite par un circuit agile en fréquence, peut être utilisée pour étalonner les filtres, aussi bien en fréquence qu'en gain.
PCT/US2005/045428 2004-12-16 2005-12-14 Filtre suiveur pour syntoniseur WO2006066000A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US63664204P 2004-12-16 2004-12-16
US60/636,642 2004-12-16

Publications (1)

Publication Number Publication Date
WO2006066000A1 true WO2006066000A1 (fr) 2006-06-22

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PCT/US2005/045428 WO2006066000A1 (fr) 2004-12-16 2005-12-14 Filtre suiveur pour syntoniseur

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2747283A1 (fr) * 2012-12-18 2014-06-25 Nxp B.V. Circuits résonant au ajustement automatique

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4685150A (en) * 1983-03-11 1987-08-04 Deutsche Thomson-Brandt Gmbh Tuning of a resonant circuit in a communications receiver
DE4329705A1 (de) * 1993-09-02 1995-03-09 Froehlich Reimar Dr Ing Schaltungsanordnung für mikrorechnersteuerbare Induktivitäten, Kapazitäten und L/C-Schaltungen
DE19904604A1 (de) * 1999-02-05 2000-06-15 Temic Semiconductor Gmbh Verfahren zum Abgleichen eines Bandpasses und Schaltungsanordnung zur Durchführung des Verfahrens
US6307442B1 (en) * 1999-05-17 2001-10-23 Maxim Integrated Products Enhanced LC filter with tunable Q
US20040212447A1 (en) * 2001-03-09 2004-10-28 Christian Nystrom Filter trimming

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4685150A (en) * 1983-03-11 1987-08-04 Deutsche Thomson-Brandt Gmbh Tuning of a resonant circuit in a communications receiver
DE4329705A1 (de) * 1993-09-02 1995-03-09 Froehlich Reimar Dr Ing Schaltungsanordnung für mikrorechnersteuerbare Induktivitäten, Kapazitäten und L/C-Schaltungen
DE19904604A1 (de) * 1999-02-05 2000-06-15 Temic Semiconductor Gmbh Verfahren zum Abgleichen eines Bandpasses und Schaltungsanordnung zur Durchführung des Verfahrens
US6307442B1 (en) * 1999-05-17 2001-10-23 Maxim Integrated Products Enhanced LC filter with tunable Q
US20040212447A1 (en) * 2001-03-09 2004-10-28 Christian Nystrom Filter trimming

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
FREDERIK EMMONS TERMAN: "Radio Engineering", 1947, MCGRAW-HILL BOOK COMPANY, INC, NEW YORK AND LONDON, XP002377627, 13465 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2747283A1 (fr) * 2012-12-18 2014-06-25 Nxp B.V. Circuits résonant au ajustement automatique

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