WO2006053173A3 - Multipurpose multiply-add functional unit - Google Patents
Multipurpose multiply-add functional unit Download PDFInfo
- Publication number
- WO2006053173A3 WO2006053173A3 PCT/US2005/040852 US2005040852W WO2006053173A3 WO 2006053173 A3 WO2006053173 A3 WO 2006053173A3 US 2005040852 W US2005040852 W US 2005040852W WO 2006053173 A3 WO2006053173 A3 WO 2006053173A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- functional unit
- operations
- add functional
- multiply
- multipurpose
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30025—Format conversion instructions, e.g. Floating-Point to Integer, decimal conversion
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
- G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
- G06F9/30079—Pipeline control instructions, e.g. multicycle NOP
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Software Systems (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Mathematical Optimization (AREA)
- Computational Mathematics (AREA)
- Computing Systems (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Quality & Reliability (AREA)
- Computer Hardware Design (AREA)
- Advance Control (AREA)
- Emergency Protection Circuit Devices (AREA)
Abstract
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007541334A JP4891252B2 (en) | 2004-11-10 | 2005-11-09 | General-purpose multiply-add function unit |
| CN2005800424120A CN101133389B (en) | 2004-11-10 | 2005-11-09 | Multipurpose multiply-add functional unit |
Applications Claiming Priority (8)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/985,674 US7428566B2 (en) | 2004-11-10 | 2004-11-10 | Multipurpose functional unit with multiply-add and format conversion pipeline |
| US10/985,674 | 2004-11-10 | ||
| US10/985,291 | 2004-11-10 | ||
| US10/986,531 | 2004-11-10 | ||
| US10/985,291 US7225323B2 (en) | 2004-11-10 | 2004-11-10 | Multi-purpose floating point and integer multiply-add functional unit with multiplication-comparison test addition and exponent pipelines |
| US10/985,695 US7240184B2 (en) | 2004-11-10 | 2004-11-10 | Multipurpose functional unit with multiplication pipeline, addition pipeline, addition pipeline and logical test pipeline capable of performing integer multiply-add operations |
| US10/985,695 | 2004-11-10 | ||
| US10/986,531 US20060101244A1 (en) | 2004-11-10 | 2004-11-10 | Multipurpose functional unit with combined integer and floating-point multiply-add pipeline |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| WO2006053173A2 WO2006053173A2 (en) | 2006-05-18 |
| WO2006053173A3 true WO2006053173A3 (en) | 2007-05-10 |
Family
ID=36337229
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US2005/040852 Ceased WO2006053173A2 (en) | 2004-11-10 | 2005-11-09 | Multipurpose multiply-add functional unit |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JP4891252B2 (en) |
| KR (1) | KR100911786B1 (en) |
| TW (1) | TWI389028B (en) |
| WO (1) | WO2006053173A2 (en) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8106914B2 (en) * | 2007-12-07 | 2012-01-31 | Nvidia Corporation | Fused multiply-add functional unit |
| JP5367552B2 (en) * | 2009-12-15 | 2013-12-11 | 株式会社東芝 | Image processing apparatus and image processing program |
| US8667042B2 (en) * | 2010-09-24 | 2014-03-04 | Intel Corporation | Functional unit for vector integer multiply add instruction |
| GB2484654B (en) | 2010-10-12 | 2013-10-09 | Advanced Risc Mach Ltd | Conditional selection of data elements |
| KR101735677B1 (en) | 2010-11-17 | 2017-05-16 | 삼성전자주식회사 | Apparatus for multiply add fused unit of floating point number, and method thereof |
| DE102013212840B4 (en) * | 2013-07-02 | 2022-07-07 | Robert Bosch Gmbh | Model calculation unit and control unit for calculating a data-based function model with data in various number formats |
| DE102013224694A1 (en) * | 2013-12-03 | 2015-06-03 | Robert Bosch Gmbh | Method and device for determining a gradient of a data-based function model |
| US9875084B2 (en) * | 2016-04-28 | 2018-01-23 | Vivante Corporation | Calculating trigonometric functions using a four input dot product circuit |
| US10979054B1 (en) * | 2020-01-14 | 2021-04-13 | Nuvotonn Technology Corporation | Coupling of combinational logic circuits for protection against side-channel attacks |
| CN114968175B (en) * | 2022-06-06 | 2023-03-07 | 湖南毂梁微电子有限公司 | Configurable shift addition fusion unit for intelligent computation acceleration |
| KR102733737B1 (en) * | 2022-06-24 | 2024-11-26 | 서울대학교산학협력단 | Apparatus and method computing low-latency convolution optimized for mobile devices |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6243732B1 (en) * | 1996-10-16 | 2001-06-05 | Hitachi, Ltd. | Data processor and data processing system |
| US6363476B1 (en) * | 1998-08-12 | 2002-03-26 | Kabushiki Kaisha Toshiba | Multiply-add operating device for floating point number |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0480867A (en) * | 1990-07-23 | 1992-03-13 | Mitsubishi Electric Corp | Arithmetic circuit |
| JPH10207863A (en) * | 1997-01-21 | 1998-08-07 | Toshiba Corp | Arithmetic processing unit |
| JPH1173409A (en) * | 1997-08-29 | 1999-03-16 | Matsushita Electric Ind Co Ltd | Product-sum operation device and product-sum operation method |
| US6480872B1 (en) * | 1999-01-21 | 2002-11-12 | Sandcraft, Inc. | Floating-point and integer multiply-add and multiply-accumulate |
-
2005
- 2005-11-09 WO PCT/US2005/040852 patent/WO2006053173A2/en not_active Ceased
- 2005-11-09 KR KR1020077012628A patent/KR100911786B1/en not_active Expired - Lifetime
- 2005-11-09 JP JP2007541334A patent/JP4891252B2/en not_active Expired - Lifetime
- 2005-11-10 TW TW094139409A patent/TWI389028B/en active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6243732B1 (en) * | 1996-10-16 | 2001-06-05 | Hitachi, Ltd. | Data processor and data processing system |
| US6363476B1 (en) * | 1998-08-12 | 2002-03-26 | Kabushiki Kaisha Toshiba | Multiply-add operating device for floating point number |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI389028B (en) | 2013-03-11 |
| WO2006053173A2 (en) | 2006-05-18 |
| KR100911786B1 (en) | 2009-08-12 |
| KR20070085755A (en) | 2007-08-27 |
| JP4891252B2 (en) | 2012-03-07 |
| JP2008520048A (en) | 2008-06-12 |
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