WO2005013382A1

WO2005013382A1 - Semiconductor light emitting device

Info

Publication number: WO2005013382A1
Application number: PCT/KR2004/001927
Authority: WO
Inventors: Tae Kyung Yoo
Original assignee: EpiValley Co Ltd
Current assignee: EpiValley Co Ltd
Priority date: 2003-07-30
Filing date: 2004-07-30
Publication date: 2005-02-10
Anticipated expiration: 2006-01-30
Also published as: KR20050014343A; KR100601143B1

Abstract

The present invention relates to a GaN based semiconductor light emitting device including a substrate, a plurality of semiconductor layers which is formed on the substrate and has an active layer for generating light by recombination o f electrons and holes, a transparent electrode formed on the plurality of semiconductor layers, a p-type pad electrode which is in electrical contact with the transparent electrode, and an n-type electrode formed o n a place formed by etching a part of the plurality of semiconductor layers, the p-type pad electrode is located at the surface of the substrate exposed by etching a part of the plurality of semiconductor layers, and the p-type pad electrode contacts the transparent electrode electrically, thereby improves the external quantum efficiency.

Description

SEMICONDUCTOR LIGHT EMITTING DEVICE

[Technical Field] The present invention relates to a GaN-based semiconductor light emitting device having an electrode structure for improving the external quantum efficiency.

[Background Art] Semiconductor materials constituting a general light emitting device have a refractive index higher than an external environment such as an epoxy or air. Therefore, most photons generated by a combination of electrons and holes remain in the interior of the device and thus external quantum efficiency is greatly influenced by the structural form of the device and the optical characteristics of the materials constituting the device. The photons generated from the interior of the device pass through a thin film, a substrate, an electrode etc. via various paths before escaping to the exterior, and the absorption of the photons during this process decreases the external quantum efficiency. Especially, in a GaN-based column Ill-nitride compound semiconductor optical device, since a p-type GaN has low conductivity, a transparent conductive film having a given thickness is formed on almost all regions of an upper layer in o rder to effectively diffuse current. The absorption of photons caused by such a transparent conductive film lowers efficiency of a device due to a decrease in external efficiency. Therefore, the transparent conductive film is fabricated as thinly as possible in order to ensure optical transmittance within the range of sufficient current diffusion. A generally used semitransparent conductive film consists of Ni/Au-based materials having a thickness of several tens of angstrom to several hundred angstroms. For wire bonding of Au with an external package, there is needed a metal electrode having a thickness of several hundred to thousand nm. However, it is not possible to construct the metal electrode by the above-mentioned transparent conductive film. Therefore, an Au pad is additionally formed on the transparent conductive film as illustrated in FIG. 1. As shown, light emitted to an upper layer from an active layer is reflected or absorbed from or into the Au pad, thereby abruptly lowering external quantum efficiency. FIG. 1 shows a cross-sectional view of a conventional LED. A buffer layer 11, a lower n-type AI(x)Ga(y)ln(z)N (where 0<x<1 , 0<y<1 , 0≤z<1) layer 12, an AI(x)Ga(y)ln(z)N (where 0≤x<1, 0≤y≤1 , 0≤z≤1) active layer 13, and a p-type AI(x)Ga(y)ln(z)N (where 0≤x≤1 , 0≤y≤1 , 0≤z≤1 ) layer 14 are sequentially formed on a substrate 10. A transparent electrode 15 is formed on the whole or partial surface of the uppermost layer. A first electrode 16 is formed to be in contact with the n-type AI(x)Ga(y)ln(z)N layer 12 by eliminating a part of the p-type AI(x)Ga(y)ln(z)N layer 14, the active layer 13 and the n-type AI(x)Ga(y)ln(z)N layer 12. A second electrode 17 of the Au pad is formed to be in contact with the transparent electrode 15. Thereafter, a transparent i nsulation layer 18 is formed. FIG. 2 shows a plan view of the conventional LED. As illustrated, the Au pad 17 occupies a large amount of area on the transparent electrode 15. FIG. 3 shows the absorption of light emitted from the active layer 13 into the Au pad 17 and the transparent electrode 15. Since the light emitted to the upper side is reflected or absorbed, external quantum efficiency deteriorates abruptly.

[Disclosure] [Technical Problem] Accordingly, it is an object of the present invention to provide a structure for maximizing external quantum efficiency by arranging on a sapphire substrate a boding pad formed at the upper layer of a transparent conductive film of a column Ill-nitride LED to ensure a path of light emitted to the upper layer and to minimize light absorbed or reflected into or from the bonding pad.

[Technical Solution] According to an aspect of the present invention, in a semiconductor light emitting device including a substrate, a plurality of semiconductor layers which is formed on the substrate and has an active layer for generating light by a recombination of electrons and holes, a transparent electrode formed on the plurality of semiconductor layers, a p-type pad electrode which is in electrical contact with the transparent electrode, and an n-type electrode formed by etching a part of the plurality of semiconductor layers, the p-type pad electrode is located at the surface of the substrate exposed by etching a part of the plurality of semiconductor layers, and the p-type pad electrode contacts the transparent electrode electrically. Preferably, the semiconductor light emitting device is a rectangle chip and the p-type and n-type electrodes are formed on a diagonal line of the rectangle chip. Preferably, the transparent electrode is at least one selected from groups consisting of Ni, Au, Ag, Pt, Cr, Ti, Al, In, and Rh. Preferably, the p-type electrode is at lest one selected from groups consisting of Ti, Al, Cr, Au, Ni, Ag, Pt, In, and Rh. Preferably, the semiconductor light emitting device is a rectangle chip, the p-type electrode adjoins one side of the rectangle chip, and the n-type electrode adjoins a side opposite to a side at which the p-type electrode is formed. Preferably, the semiconductor light emitting device is a rectangle chip, the p-type and n-type electrodes are formed on a diagonal line of the rectangle chip, the p-type and n-type electrodes have respective electrodes for uniform current diffusion density, and these electrodes are expanded from the p-type and n-type electrodes to sides of the rectangle chip to face each other. Preferably, the transparent insulation layer is silicon oxide.

[Advantageous Effects] In a general GaN-based column I ll-N compound semiconductor LED device, a thin transparent conductive film is formed on a p-type AI(x)Ga(y)ln(z)N (where 0≤x≤1 , 0≤y≤1 , 0≤z≤1 ) layer, and a pad for bonding is formed on the transparent conductive film. Therefore, a part of light emitted to an upper layer is reflected or absorbed from or into the bonding pad, thereby lowering external quantum efficiency. According to the present invention, a p-type bonding pad which decreases the external quantum efficiency is formed on a sapphire substrate. Then the external quantum efficiency is greatly increased by maximally ensuring a path of light escaping to the upper layer of the transparent conductive film. I f c hips are separated by eliminating a GaN between the chips and performing a scribing process at a front side, the yield of the chips can remarkably improved.

[Description of Drawings] Further objects and advantages of the invention can be more fully understood from the following detailed description taken in conjunction with the accompanying drawings in which: FIG. 1 is a cross-sectional view of a conventional LED; FIG. 2 is a plan view of a conventional LED; FIG. 3 is a diagram illustrating an optical absorption principle into a p-type pad and a transparent electrode of a conventional LED; FIG. 4 is a c ross-sectional view of a n LED according to the present invention; FIG. 5 is a plan view of an LED according to the present invention; and FIG. 6 is a diagram illustrating an LED structure optimizing current diffusion according to the present invention.

[Mode for Invention] The present invention will now be described in detail in connection with preferred embodiments with reference to the accompanying drawings. For reference, like reference characters designate corresponding parts throughout several views. In a conventional LED optical device, a p-type bonding pad is arranged at the upper side of a transparent electrode as shown in FIG. 1. Therefore, a large amount of light escaping to the upper side is reflected or absorbed from or into the bonding pad. A cross-sectional view and plan view of an LED for solving such a problem are shown in FIG. 4 and FIG. 5, respectively. An LED according to the present invention has a basic structure of a compound semiconductor including a buffer layer 11 , a lower n-type AI(x)Ga(y)ln(z)N (where 0≤x≤1 , 0≤y≤1 , 0≤z≤1) layer 12, an AI(x)Ga(y)ln(z)N (where 0≤x≤1 , 0≤y≤1 , 0≤z≤1) active layer 13, and a p-type AI(x)Ga(y)ln(z)N (where 0≤x≤1 , 0≤y≤1 , 0≤z≤1) layer 14 which are formed on a substrate 10. A transparent electrode 15 is formed on the entire or partial surface of the p-type AI(x)Ga(y)ln(z)N layer 14. At a edge of a rectangle, the p-type AI(x)Ga(y)ln(z)N layer 14, the active layer 13 and the lower n-type AI(x)Ga(y)ln(z)N layer 12 are partially eliminated to expose the substrate 10. Further, at another edge of the rectangle, the p-type AI(x)Ga(y)ln(z)N layer 14, the active layer 13 and a part of the lower n-type AI(x)Ga(y)ln(z)N layer 12 are eliminated to expose the n-type AI(x)GA(y)ln(z)N layer 12. A transparent insulation layer 18 is formed on the whole surface except on a part of the exposed substrate, a prat of the exposed n-type AI(x)Ga(y)ln(z) layer and a part of the transparent electrode. A first electrode 17 is formed to connect the exposed substrate to the exposed transparent electrode. A second electrode 16 is formed on the exposed n-type AI(x)Ga(y)ln(z)N layer 12. As illustrated in FIG. 4, the p-type bonding pad concerned with the deterioration of external quantum efficiency is formed not on the transparent conductive film but on the sapphire substrate, and only its wiring for electric conduction is formed with a minimum size at the upper surface of the transparent conductive film. In a general LED, the effective size of a chip except the width of a scribing line is W1 x W2 (for example, 260 urn x 260 urn), and the area of the p-type bonding pad is 7850 urn² for a circle with a diameter of D=100 μm. The area of the n-type bonding pad is 7850 urn² for a circle with a diameter of 100 urn. If the effective area of a chip, which is a light emitting area except the n-type pad and p-type pad, is W1 x W2 - 2 x (3.14 x D/2 x D/2) = 51900 urn², the ratio of the area occupied by the p-type pad is 15 percent (7850/51900=0.15) out of the effective area of the chip. As indicated in FIG. 5, if only an electric wiring is taken into consideration, the area of two wirings each having a width of 5 urn and a length of 100 urn is 1000 urn². Consequently, the ratio of the area occupied b y the p-type wiring out of the effective area of the chip is 1.9 percent. Therefore, light emitted to the upper surface is remarkably increased and thus external quantum efficiency can be improved. This effect becomes more useful when the size of the chip is small. FIG. 6 illustrates a structure in which current density flowing into the n-type electrode 16 from the p-type electrode 17 is uniform by expanding a part of the n-type and p-type electrodes toward facing sides. An additional effect can be obtained by this process. That is, the yield of the chip can be maximized because a scribing process can be performed at a front side by all etching GaN between chips. In a general LED, GaN exists between chips, and the scribing is implemented at a back side to separate chips up to the front side. Then since the crystal direction of the sapphire or GaN may not coincide with the scribing direction, the chips are separated from the back side to the front side at a slant. Therefore, in some cases, the chip encroaches on a light emitting part at its front side. However, according to the present invention, it is possible to perform the scribing at the front side and thus the yield of the chip is increased. Moreover, the reliability of a device can be remarkably improved by minimizing the stress toward the active layer generated during Au wire bonding on a p-type pad. While the present invention has been described with reference to the particular illustrative embodiments, it is not to be restricted by the embodiments but only by the appended claims. It is to be appreciated that those skilled in the art can change or modify the embodiments without departing from the scope and spirit of the present invention.

Claims

1. A semiconductor light emitting device sequentially comprising a substrate 10, a buffer layer 11 , an n-type AI(x)Ga(y)ln(z)N (where 0≤x≤1, 0≤y<1 , O≤z≤l) layer 12, an AI(x)Ga(y)ln(z)N (where 0≤x<1 , 0≤y<1, O≤z≤l) active layer 13, and a p-type AI(x)Ga(y)ln(z)N (where O≤x≤l, 0≤y≤1 , O≤z≤l) layer 14, wherein a transparent electrode 15 is formed on the p-type AI(x)Ga(y)ln(z)N layer 14, wherein a portion of the substrate 10 is exposed by partially eliminating the p-type AI(x)Ga(y)ln(z)N layer 14, the active layer 13 and the n-type AI(x)Ga(y)ln(z)N layer 12, wherein a portion of the n-type AI(x)Ga(y)ln(z) layer 12 is exposed by partially eliminating the p-type AI(x)Ga(y)ln(z)N layer 14, the active layer 13 and the n-type AI(x)Ga(y)ln(z)N layer 12, wherein a transparent insulation layer 18 is formed except on the exposed portion of the substrate 10, the exposed portion of the n-type AI(x)Ga(y)ln(z) layer 12 and a part of the transparent electrode 15, wherein a first electrode 17 is formed to connect the exposed portion of the substrate 10 to a part of the transparent electrode 15 on which the transparent insulation layer 18 is not formed, and wherein a second electrode 16 is formed on the exposed portion of the n-type AI(x)Ga(y)ln(z) layer 12.

2. The semiconductor light emitting device of claim 1 , wherein the semiconductor light emitting device is a rectangle chip and the first electrode 17 and the second electrode 16 are formed on a diagonal line of the rectangle chip.

3. The semiconductor light emitting device of claim 1 , wherein the transparent electrode 15 is at least one selected from groups consisting of Ni, Au, Ag, Pt, Cr, Ti, Al, In, and Rh.

4. The semiconductor light emitting device of claim 1 , wherein the first electrode 17 is at lest one selected from groups consisting of Ti, Al, Cr, Au, Ni, Ag, Pt, In, and Rh.

5. The semiconductor light emitting device of claim 1 , wherein the semiconductor light emitting device is a rectangle chip, the first electrode 17 adjoins one side of the rectangle chip, and the second electrode 16 adjoins a side opposite to the side at which the first electrode 17 is formed.

6. The semiconductor light emitting device of claim 1, wherein the semiconductor light emitting device is a rectangle chip, the first electrode 17 and the second electrode 16 are formed on a diagonal line of the rectangle chip, each of the first electrode 17 and the second electrode 16 has an electrode for uniform current diffusion density, and these electrodes are expanded from the associated electrode to a side of the rectangle chip to face each other.

7. The semiconductor light emitting device of claim 1 , wherein the transparent insulation layer 18 is made of silicon oxide.

8. A semiconductor light emitting device comprising: a substrate, a plurality of semiconductor layers which is formed on the substrate and has an active layer for generating light by recombination of electrons and holes, a transparent electrode formed on the plurality of semiconductor layers, a p-type pad electrode which is in electrical contact with the transparent electrode, and an n-type electrode formed on a place formed by etching a part of the plurality of semiconductor layers, the p-type pad electrode is located at the surface of the substrate exposed by etching a part of the plurality of semiconductor layers, and the p-type pad electrode contacts the transparent electrode electrically.