WO2004084597A1 - Material for multilayer printed circuit board with built-in capacitor, substrate for multilayer printed circuit board, multilayer printed circuit board and methods for producing those - Google Patents

Abstract

A material for a multilayer printed circuit board with built-in capacitor is characterized in that a dielectric thin film having a relative dielectric constant of 10-2,000 and a thickness of 0.05-2 μm is formed on a surface of a metal foil. A substrate for a multilayer printed circuit board, a multilayer printed circuit board, and methods for producing them are also disclosed. By using such a material, a multilayer printed circuit board with built-in capacitor which is excellent in high-density wiring and economical efficiency can be obtained.

Description

 Specification

Material for multilayer wiring board with built-in capacitor, substrate for multilayer wiring board, multilayer wiring board, and manufacturing method thereof

 The present invention relates to a multilayer wiring board material having a built-in capacitor, a multilayer wiring board substrate and a multilayer wiring board, and a method of manufacturing these. Background art

 In recent years, the demand for smaller and more sophisticated electronic devices has been increasing. As the functionality of devices increases, the number of electronic components such as passive elements such as semiconductor chips and capacitors mounted increases, and it becomes extremely difficult to respond to miniaturization with conventional high-density technology. ing. Therefore, it has become necessary to incorporate some of the mounted components inside the wiring board for more efficient mounting.

The capacitance of the capacitor built in the multilayer wiring board is several hundred pF to several / xF, and a capacitance density of 500 pF / mm ² or more is required. As the dielectric of the capacitor, there are a method using a resin and a composite material of a high dielectric constant inorganic filler and a method using an inorganic thin film material. In order to form a capacitor with a high capacitance density, it is effective to 1) use a dielectric having a high relative dielectric constant and 2) use a dielectric having a small thickness. With the former composite material, 1) the resin itself has a relatively low dielectric constant, so there is a limit in increasing the dielectric constant; 2) an insulating film with no leakage current and a film thickness of several / level is formed. Is technically difficult, it has been difficult to obtain a capacitor having a capacitance density of 500 pF / mm ² or more. Therefore, in order to obtain a capacitor having a capacitance density of 500 pF / mm ² or more, it is necessary to use an inorganic thin film that can be formed with a film thickness of several meters or less. As a method of incorporating a thin film capacitor in a multilayer wiring board using a resin, there is a method using a CVD method (see page 4 and FIG. 1 of JP-A-5-191503; FIG. 4, page 4 of Japanese Laid-Open Patent Application No. 5-222684, and a method using a sputtering method (page 6, page 2 of Japanese Patent Application Laid-Open No. 2002-2525). (Fig. 1), or a method using the sol-gel method (see page 12 of JP-A-8-213375, Fig. 21; Fig. 21 of JP-A-8-213375). 14 page, Fig. 21) and so on. By these techniques, a thin dielectric thin film can be formed in a multilayer wiring board using a resin.

 However, according to the methods disclosed in JP-A-5-191503 and JP-A-5-226684, a draw-out pattern cannot be formed at an arbitrary position with respect to the capacitor electrode. There was a limit to high-density wiring. Also, it was difficult to control the thickness of the thin film because a thin film was formed on the circuit pattern. Also, in the method disclosed in Japanese Patent Application Laid-Open No. 2002-252922, if a drawing pattern is to be formed at an arbitrary position, the process becomes complicated, and the economic efficiency is poor. Further, it is difficult to form independent power supply patterns on the same plane by the methods disclosed in Japanese Patent Application Laid-Open Nos. Hei 8-2-13754 and Hei 8-213758. Disclosure of the invention

 The present invention provides a multilayer wiring board with a built-in capacitor, wherein a dielectric thin film having a relative dielectric constant of 100 to 200 and a film thickness of 0.05 to 2 am is provided on a surface of a metal foil. The present invention relates to a material for use, a substrate for a multilayer wiring board with a built-in capacitor, and a method for manufacturing a multilayer wiring board with a built-in capacitor.

 According to the embodiment of the present invention, it is possible to provide a multilayer wiring board with a built-in capacitor having a uniform thickness and a small variation in capacitance.

A. The present invention relates to the following embodiments.

 (1) For a multilayer wiring board with a built-in capacitor, wherein a dielectric thin film having a relative dielectric constant of 100 to 200 and a film thickness of 0.05 to 2 m is provided on the surface of a metal foil. material.

(2) The dielectric thin film is made of barium titanate, strontium titanate, titanate Calcium, magnesium titanate, lead titanate, bismuth titanate, titanium dioxide, barium zirconate, calcium zirconate, lead zirconate, barium strontium titanate, lead zirconate titanate, lead magnesium niobate, lead monotitanate (1) The material for a multilayer wiring board with a built-in capacitor, wherein the material is a film formed of any one of them, a solid solution containing any two or more of these, or a laminate containing any two or more of these.

 (3) A metal selected from the group consisting of platinum, gold, silver, palladium, ruthenium, and iridium, as a metal that is made of copper and that serves as a copper oxidation protective film on the surface on which the dielectric thin film is formed. (1) The material for a multilayer wiring board with a built-in capacitor according to (1) or (2), wherein the metal film is provided.

 (4) One or more metal films selected from the group consisting of chromium, molybdenum, titanium, and nickel are provided as the metal whose metal foil is made of copper and forms a stable self-oxidizing film on its surface. A material for a multilayer wiring board with a built-in capacitor according to (1) or (2), characterized in that:

 (5) The metal foil has a surface roughness of 0.01 to 0.5 m (1)

(4) Materials for multilayer wiring boards with built-in capacitors.

 (6) A material for a multilayer wiring board with a built-in capacitor, characterized in that a dielectric thin film having a relative dielectric constant of 10 to 2000 and a thickness of 0.05 to 2 m is formed on the surface of a metal foil by a vacuum evaporation method. Manufacturing method.

 (7) A material for a multilayer wiring board with a built-in capacitor, characterized in that a dielectric thin film having a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 m is formed on a metal foil surface by an ion plating method. Manufacturing method.

 (8) The formation of a dielectric thin film with a relative dielectric constant of 10 to 2000 and a thickness of 0.05 to 2 m on the surface of metal foil by CVD (Chemica 1 Va or Deposition) method. Manufacturing method of material for multilayer wiring boards with built-in capacitors.

(9) The dielectric constant is 10 to 2000 and the film thickness is 0.05 to 2 on the surface of the metal foil. A method for producing a material for a multilayer wiring board with a built-in capacitor, comprising forming a βm dielectric thin film by a sputtering method.

 (10) Manufacture of materials for multilayer wiring boards with built-in capacitors, characterized in that a dielectric thin film having a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 m is formed on the surface of a metal foil by a sol-gel method. Method.

 (11) The dielectric thin film is formed by using a rolled metal foil and moving the metal foil continuously in a heating furnace whose temperature is controlled to be constant. (6) to (10) Manufacturing method of multilayer wiring board material with built-in capacitor.

 (12) Barium titanate, strontium titanate, calcium titanate, magnesium titanate, lead titanate, bismuth titanate, titanium dioxide, barium zirconate, calcium zirconate, lead zirconate, titanate Any of barium strontium oxide, lead zirconate titanate, lead magnesium niobate and lead monotitanate, or a solid solution containing any two or more of these, or a laminate containing any two or more of these (6) The method for producing a material for a multilayer wiring board with a built-in capacitor according to any one of (6) to (11).

 (13) The metal foil is made of copper, and is selected from the group consisting of platinum, gold, silver, palladium, ruthenium, and iridium as a metal that forms a copper oxidation protection film on the surface on which the dielectric thin film is formed. The method for producing a material for a multilayer wiring board with a built-in capacitor according to any one of (6) to (12), wherein at least one kind of metal film is provided.

 (1) The metal foil is made of copper, and at least one metal film selected from the group consisting of chromium, molybdenum, titanium, and nickel is provided as a metal that forms a stable self-oxidizing film on its surface. The method for producing a material for a multilayer wiring board with a built-in capacitor according to any one of (6) to (12).

 (15) The method for producing a material for a multilayer wiring board with a built-in capacitor according to (6) to (14), wherein the surface roughness of the metal foil is 0.01 to 0.5 m.

(16) Use a multilayer wiring board material with a built-in capacitor in which a dielectric thin film with a relative dielectric constant of 10 to 2000 and a thickness of 0.05 to 2 m is provided on the surface of a metal foil. A method for manufacturing a multilayer wiring board with a built-in capacitor, comprising: 1) laminating a metal foil of a material for a multilayer wiring board with a built-in capacitor on a substrate having a conductor circuit via a pre-predader; 2) a surface of a dielectric thin film. 3) a step of forming a desired capacitor electrode 1 by etching away leaving an arbitrary portion of the metal layer, and 4) at least a capacitor electrode of a dielectric thin film. Etching to form the desired capacitor dielectric, leaving any portion, including 1), and5) removing the dielectric thin film, leaving at least any portion of the exposed metal layer including the capacitor dielectric. Forming a conductor pattern including the desired capacitor electrode 2 by etching and removing the conductor pattern by etching.

 (17) The multi-layer with a built-in capacitor according to (16), wherein the metal layer formed on the surface of the dielectric thin film includes at least one or more metal layers selected from the group consisting of chromium, molybdenum, titanium, and nickel. Manufacturing method of wiring board.

(18) A multilayer wiring board with a built-in capacitor using a material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film with a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 zm is provided on the surface of a metal foil A manufacturing method, comprising: 1) laminating a metal foil of a material for a multilayer wiring board with a built-in capacitor on a substrate having a conductive circuit via a pre-predader; and 2) 0.1 to 5 3) a step of forming a metal plating resist while leaving any part including the capacitor electrode 1), and 4) forming a 10 to 50 m capacitor electrode 1 by metal plating. 5) removing the metal-plated resist; 6) etching away the 0.1 to 5 m metal layer formed on the surface of the dielectric thin film; and 7) removing at least the dielectric thin film. Etch and remove any part including capacitor electrode 1 to obtain the desired capacitor. 8) a conductor including the desired capacitor electrode 2 by removing the dielectric thin film and removing the dielectric thin film by etching except for at least an arbitrary portion including the capacitor dielectric of the exposed metal layer. A method for producing a multilayer wiring board with a built-in capacitor, comprising a step of forming a pattern. (19) The capacitor according to (1.8), wherein the metal layer formed on the surface of the dielectric thin film includes at least one metal layer selected from the group consisting of chromium, molybdenum, titanium, and nickel. A method for manufacturing a multilayer wiring board.

 (20) The multilayer wiring with a built-in capacitor according to (18) or (19), wherein the metal plating includes at least one metal selected from the group consisting of copper, silver, tin, nickel and zinc. Plate manufacturing method.

 (21) A multilayer wiring board with a built-in capacitor using a material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film with a relative dielectric constant of 10 to 2000 and a thickness of 0.05 to 2 m is provided on the surface of a metal foil A manufacturing method, comprising: 1) laminating a metal foil of a material for a multilayer wiring board with a built-in capacitor on a substrate having a conductive circuit via a pre-predader, and 2) chemically coating an arbitrary portion of the surface of the dielectric thin film. Forming a desired capacitor electrode 1 by forming a metal layer of 10 to 50 m using a conductive paste that is metallized by a typical reaction; and3) including at least the capacitor electrode 1 of a dielectric thin film. Forming a desired capacitor dielectric by etching away leaving an arbitrary portion; and4) etching away by removing the dielectric thin film while leaving at least an arbitrary portion including the capacitor dielectric of the exposed metal layer. Desired capacitor electrode 2 Method of manufacturing a capacitor built multilayer wiring board characterized by having a step of forming a including conductor patterns.

 (22) The metal particles of the conductive paste which are metallized by a chemical reaction contain at least 金属 or more metals selected from the group consisting of gold, platinum, silver, copper, palladium and ruthenium, and their average particle size (21) The method for producing a multilayer wiring board with a built-in capacitor according to (21), wherein the diameter is 0.1 to 10 nm.

(23) Multilayer wiring board with built-in capacitors using a material for multi-layer wiring boards with built-in capacitors in which a dielectric thin film with a relative dielectric constant of 10 to 2000 and a thickness of 0.05 to 2 m is provided on the surface of metal foil 1) laminating a metal foil surface of a multilayer wiring board material with a built-in capacitor on a substrate having a conductor circuit via a pre-predder, and 2) leaving an arbitrary portion of a dielectric thin film. Remove the desired condition by etching 3) forming a 10-50 m metal layer on the surface of the substrate on which the capacitor dielectric is formed, and 4) etching away the metal layer while leaving any part of the metal layer. A method for manufacturing a multilayer wiring board with a built-in capacitor, comprising a step of forming an arbitrary conductor pattern electrically insulated from a desired capacitor electrode 1, capacitor electrode 2, and capacitor electrode.

 (24) The surface of the metal foil and the conductive circuit, which is a material for a multilayer wiring board with a built-in capacitor, has a dielectric thin film with a relative dielectric constant of 10 to 2000 and a thickness of 0.05 to 2 m provided on the surface of the metal foil. In the pre-predger that is laminated with a substrate having a through hole, it is required that through-holes of insulating material are provided at arbitrary locations, and that the through-holes are filled with a conductive paste containing a thermosetting resin and a metal filler. The method for producing a multilayer wiring board with a built-in capacitor according to any one of (16) to (23).

 (25) The metal foil surface and the conductor circuit of the multilayer wiring board with a built-in capacitor in which a dielectric thin film with a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 m is provided on the surface of the metal foil In a pre-predger that is laminated via a substrate that has a through hole, through holes of insulating material are provided at arbitrary locations, and the through holes are filled with a conductive paste that is metallized by a chemical reaction. (16) The method for producing a multilayer wiring board with a built-in capacitor according to any one of (16) to (23).

(26). Multilayer wiring board with a built-in capacitor using a material for a multi-layer wiring board with a built-in capacitor, provided with a dielectric thin film having a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 on the surface of the metal foil 1) laminating a metal foil of a material for a multilayer wiring board with a built-in capacitor on a substrate having a conductive circuit via a pre-predder, and 2) forming a 10-50 layer on a surface of a dielectric thin film. A step of forming a metal layer; 3) a step of forming a desired capacitor electrode 1 by etching and removing any part of the metal layer; and 4) an arbitrary part of the dielectric thin film including at least the capacitor electrode 1. 5) forming a desired capacitor dielectric by etching away while leaving a thin film, and 5) removing any part of the metal layer appearing by removing the dielectric thin film to expose the hardened insulating layer of the pre-preda. 6) Exposed by laser irradiation Removing the removed insulating layer to form a hole and exposing the inner conductor circuit; 7) forming a 0.1 to 5 m metal layer on the substrate surface; and8) 9_) A process of forming a plating resist excluding any part including holes, and 9_) Forming a metal layer of 10 to 50 / m on the substrate surface other than the part where the plating resist was formed, 10) etching away the 0.1 to 5 m metal layer formed on the substrate surface; and11) any process including at least a capacitor dielectric and a hole made conductive. A method for manufacturing a multilayer wiring board with a built-in capacitor, comprising a step of forming a conductor pattern including a desired capacitor electrode 2 by etching and removing a portion thereof.

 (27) The capacitor according to (26), wherein the metal layer formed on the surface of the dielectric thin film includes at least one or more metal layers selected from the group consisting of chromium, molybdenum, titanium, and Nigel. A method for manufacturing a multilayer wiring board.

(28) A multilayer wiring board with a built-in capacitor using a material for a multilayer wiring board with a built-in capacitor that has a dielectric thin film with a relative dielectric constant of 10 to 2000 and a thickness of 0.05 to 2 m on the surface of a metal foil A manufacturing method, comprising: 1) laminating a metal foil of a material for a multilayer wiring board with a built-in capacitor on a substrate having a conductive circuit via a pre-predader; and 2) 0.1 to 5 on a surface of a dielectric thin film. m) forming a metal layer, 3) forming a metal-plated resist while leaving any part including the capacitor electrode 1, and 4) forming a 10-50 / m capacitor electrode 1 by metal-plated. 5) a step of removing the metal-plated resist; 6) a step of etching away a 0.1 to 5 m metal layer formed on the surface of the dielectric thin film; and 7) a dielectric thin film. To remove a desired part including at least a part including the capacitor electrode 1 by etching. 8) A step of exposing the cured insulating layer of the prepreg by removing any part of the metal layer that has appeared by removing the dielectric thin film, and 9) Exposing by laser irradiation. Forming a hole by removing the insulating layer, and exposing a conductive circuit which is a layer; 10) forming a 0.1 to 5 m metal layer on the substrate surface; 1 1) Except for any part including holes 12) forming a metal layer of 10 to 50 / m on the surface of the substrate other than where the plating resist is formed, and electrically connecting the circuit patterns between the layers. 13) Etching and removing the 0.1 to 5 m metal layer formed on the substrate surface; and14) Etching and removing the desired portion by leaving at least an arbitrary portion including at least the capacitor dielectric and conductive holes. A method for manufacturing a multilayer wiring board with a built-in capacitor, comprising a step of forming a conductor pattern including a capacitor electrode 2.

 (29) The capacitor according to (28), wherein the metal layer formed on the surface of the dielectric thin film includes at least one metal layer selected from the group consisting of chromium, molybdenum, titanium, and nickel. A method for manufacturing a multilayer wiring board.

 (30) The multilayer wiring with a built-in capacitor according to (28) or (29), wherein the metal plating includes at least one metal selected from the group consisting of copper, silver, tin, nickel and zinc. Plate manufacturing method.

(31) Manufacture of multilayer board with built-in capacitor using material for multilayer board with built-in capacitor in which dielectric thin film with relative dielectric constant of 10 to 2000 and thickness of 0.05 to 2 is provided on the surface of metal foil A method of laminating a metal foil of a material for a multilayer wiring board with a built-in capacitor on a substrate having a conductive circuit via a pre-predader, and 2) a method of chemically coating an arbitrary part of the surface of a dielectric thin film. Forming a desired capacitor electrode 1 by forming a metal layer of 10 to 50 m using a conductive paste which is metallized by an appropriate reaction; 3) any dielectric layer including at least the capacitor electrode 1 of a dielectric thin film 4) removing the dielectric thin film to remove the dielectric thin film and etching away any exposed portions of the metal layer to expose the cured insulating layer of the pre-preda. 5) Laser irradiation Removing the more exposed insulating layer to form a hole to expose the inner conductor circuit; 6) forming a 0.1 to 5 im metal layer on the substrate surface; 7) A step of forming a plating resist except for an arbitrary portion including a hole; and 8) A 10-5 O ^ m metal layer is formed on the substrate surface other than the portion where the resist is formed. 9) a step of electrically removing the 0.1 to 5 m metal layer formed on the surface of the substrate by etching, and 10) a hole made of at least a capacitor dielectric and a conductor. A method for manufacturing a multilayer wiring board with a built-in capacitor, comprising a step of forming a conductor pattern including a desired capacitor electrode 2 by etching and removing an arbitrary portion including the same.

 (32) The metal particles of the conductive paste that are metallized by a chemical reaction contain at least one metal selected from the group consisting of gold, platinum, silver, copper, palladium, and ruthenium, and have an average particle size of the metal particles. (31) The method for producing a multilayer wiring board with built-in capacitors according to (31), wherein the diameter is 0.1 to 1 Onm. '

 (33) A multilayer wiring board with a built-in capacitor using a material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film with a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 zm is provided on the surface of a metal foil A manufacturing method, comprising: 1) laminating a metal foil of a material for a multilayer wiring board with a built-in capacitor on a substrate having a conductive circuit via a pre-predeer, and 2) etching away leaving any part of the dielectric thin film. Forming a desired capacitor dielectric, 3) removing the dielectric thin film and etching away any part of the metal layer that has appeared, thereby exposing the cured insulating layer of the pre-predator, 4). Removing the insulating layer exposed by the laser irradiation to form a hole and exposing the inner conductor circuit; and5) forming a hole of 10 to 50 m on the surface of the substrate on which the capacitor dielectric is formed and the surface of the hole. Forming a metal layer, 6) at least A method of manufacturing a multilayer wiring board with a built-in capacitor, comprising a step of forming a conductor pattern including a desired capacitor electrode 2 by etching and removing an arbitrary portion including a capacitor dielectric and a hole formed as a conductor. .

(34) Via a pre-preparer, a metal foil surface of a multilayer wiring board material with a built-in capacitor, in which a dielectric thin film with a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 m is provided on the surface of the metal foil. The circuit board is characterized in that there are two or more conductor layers on the board, and the circuit pattern of the adjacent conductor layer is connected at any location by holes made into conductors. (16)-(33) A method for producing the multilayer wiring board with a built-in capacitor according to the above.

 (35) The method of etching and removing the dielectric thin film is characterized in that it is any one of an ion beam etching method, an RIE (Reactive Ion Etching) method, and a solution etching method. (16) to (34) ) The method for manufacturing a multilayer wiring board with a built-in capacitor as described in the above.

 (36) The method for producing a multilayer wiring board with a built-in capacitor according to any one of (16) to (35), wherein the capacitor electrode 2 is a ground layer or an electrofiltration layer of the multilayer wiring board.

 (37) The method for producing a multilayer wiring board with a built-in capacitor according to any one of (16) to (36), wherein the insulating material of the substrate comprises a resin and glass woven T or glass non-woven fabric. .

(38) The multi-layer capacitor with a built-in capacitor according to (16) to (37), wherein the resin used as the insulating material of the substrate is a thermosetting resin, and has a glass transition temperature of 170 ° C. or higher. Manufacturing method of wiring board.

B. Further, the present invention relates to the following embodiments.

 (1) The substrate has a via hole that connects the conductive layers inside the substrate and has a smooth metal layer on the surface. The surface of the substrate has a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 m. A substrate for a multilayer wiring board with a built-in capacitor, characterized in that a dielectric thin film is formed.

 (2) The substrate for a multilayer wiring board with a built-in capacitor according to (1), wherein via holes for connecting the conductor layers are electrically connected to the inside of the substrate by metal plating.

 (3) For a multilayer wiring board with a built-in capacitor according to (1), wherein via holes for connecting conductive layers inside the substrate are electrically connected by a conductive paste made of metal powder and resin. substrate.

(4) The via holes connecting the conductor layers inside the substrate are electrically connected by a conductive paste which is metallized by a chemical reaction. Substrate for multilayer wiring board with built-in capacitor of (1) or (3).

 (5) The dielectric thin film is any of barium titanate, strontium titanate, calcium titanate, magnesium titanate, lead titanate, bismuth titanate, titanium dioxide, barium zirconate, calcium zirconate, lead zirconate, or The film according to any one of (1) to (4), characterized in that the film is a film composed of two or more solid solutions containing any of these, or a laminate of two or more containing any of these. Substrate for multilayer wiring board with built-in capacitor.

 (6) The method of forming a dielectric thin film is any one of a vacuum deposition method, an ion plating method, a CVD (Chemical Vapor Deposition) method, a sputtering method, and a sol-gel method (1) to (5). A substrate for a multilayer wiring board with a built-in capacitor according to any one of the above.

 (7) The substrate for a multilayer wiring board with a built-in capacitor according to any one of (1) to (6), wherein the substrate temperature at the time of forming the dielectric thin film is 25 ° C. (to 350 ° C.).

 (8) The substrate for a multilayer wiring board with a built-in capacitor according to any one of (1) to (7), wherein the insulating material of the substrate comprises a resin and a glass woven fabric or a glass nonwoven fabric.

 (9) The resin used for the insulating material of the substrate is a thermosetting resin, and its glass transition point temperature is 170 ° C or higher. A substrate for a multilayer wiring board with a built-in capacitor as described in the above.

 (10) One or more metals selected from the group consisting of platinum, gold, silver, palladium, ruthenium, and iridium, as the metal on the surface of the substrate being made of copper and being a copper oxide protective film on the surface. Characterized by providing a film (1) or

The substrate for a multilayer wiring board with a built-in capacitor according to any one of (9) to (9).

(11) At least one metal film selected from the group consisting of chromium, molybdenum, titanium, and nickel as a metal whose surface metal layer is made of copper and forms a stable self-oxidizing skin on its surface. (1) A substrate for a multilayer wiring board with a built-in capacitor according to any one of (9) to (9).

 (12) The substrate for a multilayer wiring board with a built-in capacitor according to any one of (1) to (11), wherein the surface roughness of the metal layer on the surface of the substrate is 0.01 to 0.5 m.

 (13) A method for producing a multilayer wiring board with a built-in capacitor using the substrate for a multilayer wiring board with a built-in capacitor according to any one of (1) to (12) as an inner layer board, wherein: Forming a 5 O ^ m metal layer; 2) forming a desired first capacitor electrode by etching away leaving an arbitrary portion of the metal layer; and 3) forming at least a layer of the dielectric thin film. (1) a step of forming a desired capacitor dielectric by etching away leaving an arbitrary portion including the capacitor electrode of (1); and4) an optional metal layer including at least the capacitor dielectric of a metal layer that appears after removing the dielectric thin film. A method for manufacturing a multilayer wiring board with a built-in capacitor, comprising a step of forming a conductor pattern including a desired second capacitor electrode by etching and removing a part of the multilayer wiring board.

 (14) The multi-layer with built-in capacitor according to (13), wherein the metal layer formed on the surface of the dielectric thin film includes at least one metal layer selected from the group consisting of chromium, molybdenum, titanium, and nickel. Manufacturing method of wiring board.

(15) A method for producing a multilayer wiring board with a built-in capacitor, wherein the substrate for a multilayer wiring board with a built-in capacitor according to any one of (1) to (12) is used as an inner layer board. 1) forming a metal layer of 1 to 5; 2) forming a metal plating resist while leaving an arbitrary portion including the first capacitor electrode; and 3) forming a metal plating resist of 10 to 50 by metal plating. 4) a step of removing the metal-plated resist; 5) a step of etching away a 0.1 to 5 m metal layer formed on the surface of the dielectric thin film; 6) Forming a desired capacitor dielectric by etching away any portion of the dielectric thin film, including at least the first capacitor electrode; and7) removing at least the capacitor dielectric of the metal layer that has emerged by removing the dielectric thin film. Etsu leaving any part including the body A method for producing a multilayer wiring board with a built-in capacitor, comprising a step of forming a conductor pattern including a desired second capacitor electrode by removing a chip.

 (16) The built-in capacitor of (15), wherein the metal layer formed on the surface of the dielectric thin film includes at least one metal layer selected from the group consisting of chromium, molybdenum, titanium, and nickel. A method for manufacturing a multilayer wiring board.

 (17) The multilayer wiring board with a built-in capacitor according to (15) or (16), wherein the metal plating contains at least one metal selected from the group consisting of copper, silver, tin, nickel and zinc. Manufacturing method.

 (18) A method for producing a multilayer wiring board with a built-in capacitor using the substrate for a multilayer wiring board with a built-in capacitor according to any one of (1) to (12) as an inner layer board,

1のコンデンサ 電極を形成する工程と、 2) 誘電体薄膜の少なくとも第 1のコンデンサ電極を 含む任意の部分を残してエッチング除去して所望のコンデンサ誘電体を形成す る工程と、 3) 誘電体薄膜を除去して現れた金属層の少なくともコンデンサ誘 電体を含む任意の部分を残してエッチング除去して所望の第 2のコンデンサ電 極を含む導体パターンを形成する工程を有することを特徴とするコンデンサ内 蔵多層配線板の製造方法。 1) Use a conductive paste that is metallized on any part of the surface of the dielectric thin film by a chemical reaction.

(1) a step of forming a capacitor electrode; (2) a step of forming a desired capacitor dielectric by etching and removing at least an arbitrary portion of the dielectric thin film including at least the first capacitor electrode; and (3) a dielectric. Forming a conductor pattern including a desired second capacitor electrode by removing the thin film by etching while leaving at least an arbitrary portion including the capacitor dielectric of the metal layer appearing. Manufacturing method of multilayer wiring board with built-in capacitor.

 (19) The metal particles of the conductive paste that are metallized by a chemical reaction include at least one metal selected from the group consisting of gold, platinum, silver, copper, palladium, and ruthenium, and (18) The method for manufacturing a multilayer wiring board with a built-in capacitor, wherein the particle size is 0.1 to 10 nm.

(20) A method of manufacturing a multilayer wiring board with a built-in capacitor using the substrate for a multilayer wiring board with a built-in capacitor according to any one of (1) to (12) as an inner layer board, comprising the steps of: Forming a desired capacitor dielectric by removing and etching the remaining capacitor; 2) forming a 10 to 50 m metal layer on the surface of the substrate on which the capacitor dielectric is formed; and 3) forming the metal layer. Etsu leaving any part A multi-layer wiring board with a built-in capacitor, comprising a step of forming an arbitrary conductor pattern electrically insulated from a desired first capacitor electrode, second capacitor electrode, and capacitor electrode by removing a ring. Manufacturing method.

 (21) The method for etching and removing a dielectric thin film is any one of an ion beam etching method, an RIE (Reactive Ion Etching) method, and a solution etching method. (13) to (20) The method for manufacturing a multilayer wiring board with a built-in capacitor described in Crab.

 (22) The method for manufacturing a multilayer wiring board with a built-in capacitor according to any one of (13) to (21), wherein the second capacitor electrode is a ground layer or a power supply layer of the multilayer wiring board.

 (23) A multilayer wiring board having a plurality of insulating layers, a plurality of conductive layers, and conductive via holes electrically connecting the conductive layers, and a dielectric constant of at least one insulating layer of 20 or more. A dielectric thin film with a thickness of 0.1 to 1 m and a thickness of 0.1 to 1 m, which is a multilayer wiring board with built-in capacitors having electrodes facing the insulating layer.1) Form the first capacitor electrode The pattern of the conductor layer forms all the electrodes of the capacitor, 2) the projection surface of the dielectric thin film includes the projection surface of the first capacitor electrode, and 3) the second layer is formed on the conductor layer forming the second capacitor electrode. A multilayer wiring board with a built-in capacitor, characterized by having a capacitor electrode and at least one pattern electrically insulated from the electrode.

(24) A multilayer wiring board having a plurality of insulating layers, a plurality of conductive layers, and conductive via holes electrically connecting the conductive layers, and having a dielectric constant of at least one insulating layer of 20 or more. This is a dielectric thin film with a thickness of 0.1 to 1 m and a thickness of 0.1 to 1 m.It is a multilayer wiring board with a built-in capacitor that has electrodes facing the insulating layer. A first capacitor electrode included in the projection surface of the body thin film, and 2) a conductor layer forming the first capacitor electrode is electrically connected to the second capacitor electrode at all ends of the dielectric thin film. A multilayer wiring board with a built-in capacitor. (25) The multilayer wiring board with a built-in capacitor according to (23) or (24), wherein the second capacitor electrode is a ground layer or a power supply layer of the multilayer wiring board.

 (26) The dielectric thin film is made of barium titanate, strontium titanate, calcium titanate, magnesium titanate, lead titanate, bismuth titanate, titanium dioxide, barium zirconate, calcium zirconate, or lead zirconate. Or a film comprising two or more solid solutions containing any of these, or a laminate consisting of two or more solid solutions containing any of them. (23) to (25) A multilayer wiring board with a built-in capacitor according to the description.

 (27) The multilayer wiring board with a built-in capacitor according to any one of (23) to (26), wherein the insulating material of the substrate is made of resin and glass woven fabric or glass nonwoven fabric.

 (28) Any of (23) to (27), characterized in that the resin used as the insulating material of the substrate is a thermosetting resin and has a glass transition temperature of 170 ° C or more. 2. The multilayer wiring board with a built-in capacitor according to the item 1.

 (29) The second capacitor electrode is made of copper, and has on its surface at least one kind selected from the group consisting of platinum, gold, silver, palladium, ruthenium, iridium, chromium, molybdenum, titanium, and nickel. (22) The multilayer wiring board with a built-in capacitor according to any one of (23) to (28). (30) The multilayer wiring board with a built-in capacitor according to any one of (23) to (29), wherein the surface roughness of the second capacitor electrode is 0.01 to 0.5 m.

 (3 1) The first capacitor electrode includes at least one metal layer selected from the group consisting of copper, silver, tin, nickel, zinc, chromium, molybdenum, titanium, and nickel. (23) The multilayer wiring board with a built-in capacitor according to any one of (30) to (30).

(32) The conductive capacitor whose first capacitor electrode is metallized by a chemical reaction (23) to (30), wherein the metal comprises at least one metal selected from the group consisting of platinum, gold, silver, copper, tin, palladium, and ruthenium. A multilayer wiring board with a built-in capacitor according to the item (1). (33) A semiconductor device having a semiconductor chip mounted on the multilayer wiring board with a built-in capacitor according to any of (23) to (32).

C. Further, the present invention relates to the following embodiments.

 (1) The metal foil comes in contact with the insulating material on a multilayer wiring board with a built-in capacitor in which a dielectric thin film with a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 im is provided on one side of the metal foil. Is a method for manufacturing a multilayer wiring board with a built-in capacitor using a substrate provided on at least one side of an insulating material as described above.1) Forming a metal layer to be a capacitor electrode at a predetermined position on a dielectric thin film on the surface of the substrate 2) a step of forming an etching resist on at least the metal layer on the substrate surface; 3) a step of wet-etching the dielectric thin film with an etchant containing a chelating agent and hydrogen peroxide; and 4) a wet etching. Removing the etching resist later. A method for manufacturing a multilayer wiring board with a built-in capacitor, comprising:

 (2) The concentration of the chelating agent of the etchant is 0.001 to 0.5 mo 1 Z1, the concentration of hydrogen peroxide is 1 to 5 Owt%, and the pH of the etchant is 2 to 7 (1) The method for producing a multilayer wiring board with a built-in capacitor.

 (3) The chelating agent is selected from the group consisting of ethylenediaminetetraacetic acid (EDTA), hydroxyethyliminodiacetic acid (HI DA), imino diacetic acid (IDA;), dihydroxyethyl lysine (DHEG), and alkali salts thereof. The method for producing a multilayer wiring board with a built-in capacitor according to (1) or (2), wherein at least one is provided.

(4) A material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film with a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2] ^ 1 is provided on one side of the metal foil. Using a substrate provided on at least one side of an insulating material so as to be in contact with A method for manufacturing a multilayer wiring board with a built-in capacitor, comprising: 1) forming a metal layer serving as a capacitor electrode at a predetermined position on a dielectric thin film on a substrate surface; and 2) forming a metal layer on at least the metal layer on a substrate surface. 3) wet etching the dielectric thin film with an etchant containing hydrogen peroxide and at least one acid selected from the group consisting of sulfuric acid, hydrochloric acid, phosphoric acid, nitric acid, and acetic acid. And 4) a step of removing the etching resist after the wet etching.

 (5) The method for producing a multilayer wiring board with a built-in capacitor according to (4), wherein the acid concentration of the etchant is 1 to 3 Owt% and the hydrogen peroxide concentration is 1 to 5 Owt%.

 (6) The method for producing a multilayer wiring board with a built-in capacitor according to any one of (1) to (5), wherein a photosensitive dry film is used as an etching resist.

(7) The photosensitive dry film is characterized in that the thickness of the photosensitive dry film is 1 to 3 times the thickness of the metal layer serving as a capacitor electrode which is protected from wet etching by the etching resist formed by the photosensitive dry film. (6) A method for manufacturing a multilayer wiring board with a built-in capacitor.

 (8) The method for producing a multilayer wiring board with a built-in capacitor according to any one of (1) to (7), wherein the wet etching of the dielectric thin film is performed at an etching temperature of 20 to 45 t :.

 (9) The dielectric thin film is made of barium titanate, strontium titanate, calcium titanate, magnesium titanate, lead titanate, bismuth titanate, titanium dioxide, barium zirconate, calcium zirconate, and lead zirconate. (1) The capacitor according to any one of (1) to (8), which is a film formed of a solid solution containing any two or more of these, or a laminate containing any two or more of these. Manufacturing method of built-in multilayer wiring board.

D. Further, the present invention relates to the following embodiments.

(1) One side of metal foil A has a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to A method for manufacturing a multilayer wiring board with a built-in capacitor using a material for a multilayer wiring board with a built-in capacitor provided with a 2 / m dielectric thin film, comprising: 1) a metal foil A of a material for a multilayer wiring board with a built-in capacitor; A step of laminating a metal foil B via an insulating material to form a substrate; 2) a step of etching and removing an arbitrary portion of the metal foil B to expose an insulating layer formed of the insulating material; and 3) a laser. Irradiation removes the exposed insulating layer to form a hole, exposing the metal foil A; 4) forming metal layers on both sides of the board surface including the inside of the hole; 5) multilayer capacitor built-in A step of etching a capacitor electrode of an arbitrary shape from a metal layer on a dielectric thin film of a wiring board material and a pattern, and 6) a capacitor dielectric of an arbitrary shape including a capacitor electrode A pattern from the exposed dielectric thin film. D 7) A capacitor characterized by having a step of etching a capacitor electrode B of an arbitrary shape including a capacitor dielectric pattern from a metal foil A that has appeared after removing the dielectric thin film. Manufacturing method of built-in multilayer wiring board.

 (2) The method for manufacturing a multilayer wiring board with a built-in capacitor according to (1), wherein in the etching step (5) or (7), a circuit having an arbitrary shape is formed on the surface of the substrate on which the metal foil B is laminated. Of manufacturing a multilayer wiring board with a built-in capacitor.

(3) Use a material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 100 to 200 and a film thickness of 0.05 to 2 m is provided on one side of the metal foil A. 1) a process of laminating a metal foil B on a surface of a metal foil A of a material for a multilayer wiring board with a built-in capacitor via an insulating material to form a substrate, and 2) a metal foil B. Irradiating a laser beam to an arbitrary part of the metal foil B and the insulating layer formed of the above insulating material at the same time to form a hole, thereby exposing the metal foil A, and 3) including the inside of the hole A) forming a metal layer on both sides of the substrate surface; 4) forming a capacitor electrode A pattern of any shape by etching from the metal layer on a dielectric thin film of a material for a multilayer wiring board with a built-in capacitor; 5). From the exposed dielectric thin film, any shape including capacitor electrode A pattern Forming a capacitor dielectric by etching, 6) of a metal foil A appearing by removing a dielectric thin film A method for manufacturing a multilayer wiring board with a built-in capacitor, comprising a step of forming a capacitor electrode B of an arbitrary shape including a capacitor dielectric pattern by etching.

 (4) The method for producing a multilayer wiring board with a built-in capacitor according to (3), wherein in the etching step (4) or (6), a circuit having an arbitrary shape is formed on the surface of the substrate on which the metal foil B is laminated. Of manufacturing a multilayer wiring board with a built-in capacitor.

 (5) A material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 100 to 200 and a film thickness of 0.05 to 2 II m is provided on one side of the metal foil A is used. A method of manufacturing a multilayer wiring board with a built-in capacitor, comprising: 1) a through-hole is provided at an arbitrary position on a surface of a metal foil A of a material for a multilayer wiring board with a built-in capacitor, and the through-hole is formed of a thermosetting resin and a metal; A step of laminating a metal foil B via an insulating material filled with a conductive paste containing a filler to form a substrate; 2) a step of forming a metal layer on at least the dielectric thin film side of the substrate surface; and 3) a capacitor. A step of etching a capacitor electrode A pattern of an arbitrary shape from a metal layer on a dielectric thin film of a material for a built-in multilayer wiring board; and4) an arbitrary shape including a capacitor electrode A pattern from an exposed dielectric thin film. Etching capacitor dielectric And 5) etching of the capacitor electrode B of any shape including the capacitor dielectric pattern on the metal foil A that has appeared by removing the dielectric thin film. A method for manufacturing a multilayer wiring board.

(6) A capacitor using a material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 100 to 200 and a film thickness of 0.05 to 2 is provided on one side of a metal foil A. This is a method of manufacturing a built-in multilayer wiring board. Laminating a metal foil B via an insulating material filled with a conductive paste to be formed into a substrate; 2) forming a metal layer on at least the dielectric thin film side of the substrate surface; 3) The capacitor electrode A pattern of any shape can be etched from the metal layer on A) forming a capacitor dielectric of an arbitrary shape including a capacitor electrode A pattern from the exposed dielectric thin film by etching; and 5) removing a metal foil A that has appeared by removing the dielectric thin film. A method for manufacturing a multilayer wiring board with a built-in capacitor, comprising a step of forming a capacitor electrode B of an arbitrary shape including a capacitor dielectric pattern by etching.

 (7) The method for manufacturing a multilayer wiring board with a built-in capacitor according to (5) or (6), wherein in the etching step 3) or 5), a circuit having an arbitrary shape is formed on the surface of the substrate on which the metal foil B is laminated. A method for manufacturing a multilayer wiring board with a built-in capacitor.

 (8) A step of forming at least one other metal layer selected from the group consisting of chromium, molybdenum, titanium, and nickel between the dielectric thin film and the metal layer. 1) to (7) The method for producing a multilayer wiring board with a built-in capacitor according to any one of the above.

(9) Multilayer wiring board with built-in capacitor using a material for multi-layer wiring board with built-in capacitor in which a dielectric thin film with a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 zm is provided on one side of metal foil A 1) a step of laminating a metal foil B on a surface of a metal foil A of a material for a multilayer wiring board with a built-in capacitor and a metal foil B via an insulating material to form a substrate; A step of exposing the insulating layer formed from the insulating material by etching and removing; 3) a step of removing the insulating layer exposed by laser irradiation to form a hole and exposing the metal foil A; 4) Forming a metal layer of 0.1 to 5 m on both sides of the substrate including the inside of the hole, and 5) forming a metal-plated resist on the surface of the substrate except for the part to be the capacitor electrode A and any part including the hole 6) Due to the metal plating, the above-mentioned part that becomes the capacitor electrode A and the hole A) forming a conductive pattern in a portion including a metal layer; 7) removing a metal-plated resist; and 8) etching away a 0.1 to 5 m metal layer exposed on the substrate surface. ) Etching the capacitor dielectric of any shape including the capacitor zero-pole A pattern from the exposed dielectric thin film, and 10) the dielectric. A step of forming a capacitor electrode B of an arbitrary shape including a capacitor dielectric pattern by etching from the metal foil A that appears after removing the thin film; and11) forming a circuit by etching the exposed metal foil B. A method for producing a multilayer wiring board with a built-in capacitor, comprising the steps of:

 (10) Use a multilayer wiring board material with a built-in capacitor in which a dielectric thin film with a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 m is provided on one side of metal foil A. A manufacturing method comprising: 1) laminating a metal foil B on a surface of a metal foil A of a material for a multilayer wiring board with a built-in capacitor via an insulating material to form a substrate; and 2) a laser at an arbitrary position of the metal foil B. By irradiating, the metal foil B and the insulating layer formed of the above-mentioned insulating material are simultaneously removed to form a hole, and the metal foil A is exposed. a) forming a metal layer of l to 5 zm; 4) forming a metal-plated resist on the substrate surface except for a portion serving as the capacitor electrode A and an arbitrary portion including a hole; 5) metal Due to the plating, the conductor pattern is formed on the part that becomes the capacitor electrode A and the part that includes the hole. 6) removing the metal-plated resist; 7) etching away the 0.1 to 5 m metal layer exposed on the substrate surface; and 8) exposing the dielectric. A process of etching a capacitor dielectric of an arbitrary shape including the capacitor electrode A pattern from the thin film by etching; and 9) an arbitrary shape including the capacitor dielectric pattern from the metal foil A that appears after removing the dielectric thin film. Forming a capacitor electrode B, and 10) forming a circuit by etching the exposed metal foil B. A method for manufacturing a multilayer wiring board with a built-in capacitor.

(1 1) A multilayer wiring board with a built-in capacitor that uses a dielectric thin film with a dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 zm provided on one side of metal foil A 1) A conductive paste containing a thermosetting resin and a metal filler, wherein a through hole is provided at an arbitrary position on the surface of the metal foil A of the multilayer wiring board material with a built-in capacitor. Laminating a metal foil B via a prepreg filled with A step of forming a metal layer of 0.1 to 5 im on the surface on the thin film side; and3) a step of forming a metal-plated resist on the substrate surface except for an arbitrary part including a part to be the capacitor electrode A. 4) a step of forming a conductor pattern on a portion including the portion that becomes the capacitor electrode A by metal plating; 5) a step of removing the metal-plated resist; and 6) 0.1-5 exposed on the substrate surface. 7) Etching a metal layer of m in thickness, 7) Etching a capacitor dielectric of any shape including the capacitor electrode A pattern from the exposed dielectric thin film, and 8) Removing the dielectric thin film Forming a capacitor electrode B having an arbitrary shape including a capacitor dielectric pattern by etching from the metal foil A that appears, and forming a circuit by etching the exposed metal foil B. To be Method of manufacturing a capacitor built-in multilayer wiring board.

(12) A multilayer wiring board with a built-in capacitor that uses a dielectric thin film with a dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 / zm on one side of metal foil A 1) A conductive base in which a through-hole is provided at an arbitrary position on the surface of the metal foil A of the material for a multilayer wiring board with a built-in capacitor, and the through-hole is metallized by a chemical reaction. Laminating a metal foil B via a pre-filler filled in a single step to form a substrate; 2) forming a 0.1 to 5 / m metal layer on at least the surface of the substrate on the side of the dielectric thin film 3) a step of forming a metal-plated resist on the surface of the substrate while leaving an arbitrary part including a part to be the capacitor electrode A; and 4) a conductor path to the part including the part to be the capacitor electrode A due to the metallization. 5) Step of removing metal-coated resist 6) Etching and removing the 0.1 to 5 m metal layer exposed on the substrate surface; and 7) Etching capacitor dielectric of any shape including capacitor electrode A pattern from the exposed dielectric thin film. 8) From the metal foil A that appeared after removing the dielectric thin film, a capacitor electrode B of any shape including the capacitor dielectric pattern was formed by etching, and the exposed metal foil B was removed. A multilayer wiring with a built-in capacitor, characterized by having a step of forming a circuit by etching. Plate manufacturing method.

 (13) At least 0.1 to 5 im of the metal layer formed on the surface of the dielectric thin film is: at least one metal layer selected from the group consisting of chromium, molybdenum, titanium, and nickel; At least one metal layer selected from the group consisting of silver, tin, nickel and zinc; or at least one metal layer selected from the group consisting of chromium, molybdenum, titanium and nickel and copper The multilayer wiring with a built-in capacitor according to any one of (9) to (12), wherein the multilayer wiring includes at least one metal layer selected from the group consisting of tin, ni, gel and zinc. Plate manufacturing method.

 (14) The conductor pattern formed by metal plating includes at least one metal selected from the group consisting of copper, silver, tin, nickel and zinc. (9) to ( 13) The method for producing a multilayer wiring board with a built-in capacitor according to any one of the above.

 (15) Use a multilayer wiring board material with a built-in capacitor in which a dielectric thin film with a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 m is provided on one side of metal foil A. 1) A through hole is provided at an arbitrary position on the surface of the metal foil A of the material for a multilayer wiring board with a built-in capacitor, and the through hole is made of a conductive paste containing a thermosetting resin and a metal filler. Laminating a metal foil B via a filled insulating material to form a substrate; and 2) a metal layer using a conductive paste that is metallized by chemical reaction on any part of the surface of the dielectric thin film. Forming a desired capacitor electrode A, and 3) forming a desired capacitor dielectric by etching and removing at least an arbitrary portion of the dielectric thin film including at least the capacitor electrode A. 4) ) Gold that appeared after removing the dielectric thin film Capacitor electrode B of any shape including capacitor dielectric pattern is formed from metal foil A by etching, and circuit is formed by etching exposed metal foil B. Manufacturing method of wiring board.

(16) One side of metal foil A has a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 A method for manufacturing a multilayer wiring board with a built-in capacitor using a material for a multilayer wiring board with a built-in capacitor provided with a dielectric thin film of up to 2 m, comprising: 1) a metal foil A of a material for a multilayer wiring board with a built-in capacitor; A step of laminating a metal foil B via an insulating material filled with a conductive paste in which a through-hole is provided at a location and filled with a conductive paste by a chemical reaction, and 2) dielectric A step of forming a desired capacitor electrode A by forming a metal layer using a conductive paste which is metallized by a chemical reaction on an arbitrary portion of the surface of the body thin film; 4) A step of forming a desired capacitor dielectric by etching and removing an arbitrary portion including the capacitor electrode A; and 4) etching the capacitor dielectric pattern from the metal foil A that appears after removing the dielectric thin film. Any capacitor electrode B are formed of shape, method of manufacturing the capacitor built-in multilayer wiring board characterized by having a step of the exposed metal foil B are circuit formed by etching including.

 (17) Use a material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film with a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 im is provided on the surface of the metal foil A. The manufacturing method includes: 1) a step of laminating a metal foil B, which is a material for a multilayer wiring board with a built-in capacitor, on a surface of a metal foil B via an insulating material to form a substrate; and 2) an arbitrary portion of a dielectric thin film. 3) a step of forming a desired capacitor dielectric by etching away while leaving a portion, 3) a step of exposing an arbitrary portion of the metal foil B to expose an insulating layer formed from the insulating material; ) Removing the insulating layer exposed by laser irradiation to form a hole and exposing the metal foil A; 5) forming metal layers on both surfaces of the substrate surface including the inside of the hole; and 6) forming the metal layer. And etching to remove the desired portion of the metal foil A, leaving the desired core. Method of manufacturing a capacitor built multilayer wiring board characterized by having a capacitor electrode A and the step of forming the capacitor electrode B.

(18) Use a material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film with a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to; tim is provided on the surface of the metal foil A. 1) Multilayer wiring with built-in capacitor A step of laminating a metal foil B on a surface of a metal foil A of a plate via an insulating material to form a substrate; 2) etching and removing an arbitrary portion of the dielectric thin film to leave a desired capacitor dielectric; 3) Irradiating a laser on an arbitrary portion of the metal foil B, thereby simultaneously removing the metal foil B and the insulating layer formed from the above insulating material to form a hole, thereby exposing the metal foil A. And 4) a step of forming a metal layer on both sides of the substrate surface including the inside of the hole; and 5) an arbitrary portion of the metal layer and the metal foil A; A method for producing a multilayer wiring board with a built-in capacitor, comprising a step of forming a capacitor electrode B.

 (19) A material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 ^ m is provided on one surface of a metal foil A. The method for manufacturing a multilayer wiring board with a built-in capacitor to be used is as follows: 1) A through-hole is provided at an arbitrary position on a surface of a metal foil A of a material for a multilayer wiring board with a built-in capacitor, and the through-hole is formed of a thermosetting resin and a metal. Laminating a metal foil B via an insulating material filled with a conductive paste containing a filler to form a substrate; 2) etching and removing any part of the dielectric thin film to obtain a desired capacitor dielectric 3) forming a metal layer on at least the surface of the substrate having the capacitor dielectric, and 4) etching away the metal layer and any portion of the metal foil A to remove the desired portion. Step of forming capacitor electrode A and capacitor electrode B A method for producing a multilayer wiring board with a built-in capacitor, comprising:

(20) A material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 m is provided on one side of a metal foil A is used. This is a method for manufacturing a multilayer wiring board with a built-in capacitor. Laminating a metal foil B via a dielectric material filled with a conductive paste to be used as a substrate, and 2) etching and removing any desired portion of the dielectric thin film to obtain a desired capacitor dielectric. Forming a metal layer on at least the surface of the substrate having the capacitor dielectric; 4) A method for manufacturing a multilayer wiring board with a built-in capacitor, comprising a step of forming desired capacitor electrodes A and capacitor electrodes B by etching and removing any portions of the metal layer and the metal foil A.

 (21) The conductive paste to be metallized by a chemical reaction contains at least one or more metal particles selected from the group consisting of gold, platinum, silver, copper, palladium and ruthenium; and The method for producing a multilayer wiring board with a built-in capacitor according to (6), (12), (15), (16) or (20), wherein the average particle diameter is 0.1 to 10 nm.

 (22) The method for etching and removing the dielectric thin film is any one of an ion beam etching method, an RIE (Reactive Ion Etching) method, and a solution etching method. (21) The method for manufacturing a multilayer wiring board with a built-in capacitor according to any one of (1) to (4).

 (23) The method for manufacturing a multilayer wiring board with a built-in capacitor according to any one of (1) to (22), wherein the capacitor electrode B is a ground layer or a power supply layer of the multilayer wiring board.

 (24) The multilayer wiring with a built-in capacitor according to any one of (1) to (23), wherein the insulating material used for forming the insulating layer of the substrate is a pre-predader made of resin and glass woven fabric or glass non-woven fabric. Plate manufacturing method.

 (25) The insulating material used for forming the insulating layer of the substrate is a pre-preda containing a thermosetting resin as a resin, and the glass transition temperature of the thermosetting resin is 170 or more. (1) The method for producing a multilayer wiring board with a built-in capacitor according to any one of (1) to (24).

(26) The dielectric thin film is made of barium titanate, strontium titanate, calcium titanate, magnesium titanate, lead titanate, bismuth titanate, titanium dioxide, barium zirconate, calcium zirconate, lead zirconate, titanium Any one of barium bromide, lead zirconate titanate and lead magnesium magnesium niobate-lead titanate, or a solid containing at least two of them (1) The capacitor according to any one of (1) to (25), wherein a material for a multilayer wiring board with a built-in capacitor, which is a film made of a solution or a laminated body containing at least two of these, is used. Manufacturing method of built-in multilayer wiring board.

 (27) Metal foil A is made of copper, and is selected from the group consisting of platinum, gold, silver, palladium, ruthenium, and iridium as a metal that serves as a copper oxide protective film on the surface on which the dielectric thin film is formed. The method for producing a multilayer wiring board with a built-in capacitor according to any one of (1) to (26), wherein the material for a multilayer wiring board with a built-in capacitor provided with at least one kind of metal film is used.

 (28) One or more metals selected from the group consisting of chromium, molybdenum, titanium, and nickel as a metal in which the metal foil A is made of copper and forms a stable self-oxidizing film on the surface on which the dielectric thin film is formed. The method for manufacturing a multilayer wiring board with a built-in capacitor according to any one of (1) to (26), wherein a material for a multilayer wiring board with a built-in capacitor provided with a metal film is used.

 (29) A material for a multilayer wiring board with a built-in capacitor, wherein the surface roughness of the surface of the metal foil A on which the dielectric thin film is formed is 0.01 to 0.5 / zm. (28) The method for producing a multilayer wiring board with a built-in capacitor according to any of the above.

 The contents disclosed in this specification are Japanese Patent Application 2003-077695 (filing date: March 20, 2003), 2003-078324 (filing date: March 20, 2003), 2003-368857 (filing date: Oct. 2003 29) and 2003—376604 (filing date November 6, 2003), which are incorporated herein in their entirety. BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is a cross-sectional view showing a material for a multilayer wiring board with a built-in capacitor according to an embodiment of the present invention. FIG. 2 is a cross-sectional view showing the process of Example A-1, Example A-2, and Example A-5. FIG. 3 is a cross-sectional view showing a process of Example A-3. FIG. 4 is a cross-sectional view showing the process of Example A-4. Figure 5 shows FIG. 9 is a cross-sectional view showing a process of Example A-6. FIG. 6 is a sectional view showing a process of Example A-7. FIG. 7 is a cross-sectional view showing a process of Example A-8. FIG. 8 is a cross-sectional view showing a process of Comparative Example A_1.

 9 to 11 are cross-sectional views showing the inner substrate used in Example B of the present invention. FIG. 12 is a cross-sectional view showing a part of the process of Example B-1 and the processes of Examples B-4 and B-5. FIG. 13 is a cross-sectional view showing a process of Example B-6. FIG. 14 is a cross-sectional view showing the process of Example B-7. FIG. 15 is a cross-sectional view showing a process of Example B-8. FIG. 16 is a cross-sectional view showing a process of Comparative Example B-1.

 Further, FIGS. 17 to 19 are cross-sectional views showing manufacturing steps of Experimental Examples C-11 to C-19.

 FIG. 20 is a cross-sectional view showing the process of Example D-1. FIG. 21 is a cross-sectional view showing a process of Example D-2. FIG. 22 is a cross-sectional view showing a process of Example D-3. FIG. 23 is a cross-sectional view showing a process of Example D-4 and Example D_5. FIG. 24 is a cross-sectional view showing a process of Example D-6. FIG. 25 is a cross-sectional view showing a process of Example D-7. FIG. 26 is a cross-sectional view showing the process of Example D-8 and Example D-9. FIG. 27 is a cross-sectional view showing a process of Example D_10 and Example D-11. FIG. 28 is a cross-sectional view showing a process of Example D-12. FIG. 29 is a cross-sectional view showing a process of Example D-13. FIG. 30 is a cross-sectional view showing a process of Example D-14 and Example D-15. FIG. 31 is a cross-sectional view illustrating a process of Comparative Example D-1. BEST MODE FOR CARRYING OUT THE INVENTION

 (Material for multilayer wiring board with built-in capacitor)

One embodiment of the present invention is characterized in that a dielectric thin film having a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 ^ m is provided on the surface of the metal foil. Capacitor It relates to a material for a built-in multilayer wiring board. With this multilayer wiring board material, it is easy to obtain a dielectric thin film having a uniform film thickness because the dielectric thin film is formed on the surface of the metal foil.

The thickness of the dielectric thin film is preferably at least 0.05 m, more preferably at least 0.1 im, in order to secure insulation and suppress leakage current. In consideration of economy, the film thickness is preferably 2 m or less, more preferably 1 or less. Therefore, the film thickness is preferably from 0.05 to 2 m, more preferably from 0.1 to lm. The relative dielectric constant required to obtain a capacitance density of 500 pF / mm ² or more is 2.9 or more when the film thickness is 0.05 m, 5.7 or more when the film thickness is 0.1 m, and 1 2] It is 57 or more for 1 and 113 or more for 2 m. Therefore, if a thin film dielectric having a relative dielectric constant of 2.9 to 113 is used, a thin film capacitor of 500 pF / mm ² can be formed with a thickness of 0.05 to 2 m. However, the higher the relative dielectric constant of the thin film dielectric, the more advantageous the miniaturization of the built-in capacity, and is preferably 10 to 2000, more preferably 20 to 2000. Here, the relative permittivity indicates a value measured at a frequency of 1 MHz in accordance with IPC-650 2.5.5.2 in an environment controlled at 25 ° C. The value of the film thickness can be obtained by using a device capable of observing a cross section of the capacitor on which the electrodes are formed, such as a scanning electron microscope, capable of observing a thickness of less than 0.05 m.

The dielectric thin film is not limited as long as it can form a dielectric thin film having a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 am, but barium titanate, strontium titanate, and calcium titanate , Magnesium titanate, lead titanate, bismuth titanate, titanium dioxide, barium zirconate, calcium zirconate, lead zirconate, barium strontium titanate, lead zirconate titanate, lead magnesium niobate and lead monotitanate It is preferable to use a film made of a dielectric such as. At this time, two or more types of solid solutions and laminates can be used. In general, metal oxides having a belovskite crystal structure are known to exhibit a high dielectric constant, and can be preferably used. Examples of the metal foil include a copper foil, a silver foil, a tin foil, a nickel foil, and a zinc foil. Among them, copper foil is preferable in consideration of electrical characteristics and economy. The thickness of the metal foil is preferably from 10 to 50 / m. When a copper foil is used, it is preferable to provide a metal layer that forms an oxidation protective film of copper and / or a metal layer that forms a stable self-oxidizing film on the surface of the copper foil. These coatings are preferably between 0.1 and 3 tm.

 As a metal layer to be a copper oxide protective film, a metal film such as platinum, gold, silver, palladium, ruthenium, and iridium is preferable. When copper foil is used as the metal foil, if a dielectric thin film of metal oxide is formed directly on the surface of copper, oxygen is supplied from the metal oxide to copper and copper oxide is generated at the interface, reducing adhesion Let it. Therefore, it is preferable to form an oxidation protection film that blocks oxygen supplied from the metal oxide and ensures adhesion to copper.

 As the metal layer forming the self-oxidizing film, a metal film of chromium, molybdenum, titanium, nickel or the like is preferable. When copper foil is used as the metal foil, the adhesion may be reduced due to the generation of copper oxide.Therefore, the oxygen supplied from the metal oxide dielectric thin film is blocked, and the adhesion to copper is reduced. It is preferable to form a self-oxidizing film to secure.

 The metal foil preferably has a surface roughness of 0.01 to 0.5 m. The thickness of the dielectric thin film is as described above (preferably, 0.05 to 2 m, more preferably 0.1 to l zm. The surface roughness of the substrate on which the dielectric thin film is formed is at least dielectric constant. It is necessary that the thickness be smaller than the thickness of the body thin film, and in order to ensure reliability as an insulating film such as leakage current, the thickness is preferably less than 50% of the thickness of the dielectric thin film. ^ Therefore, a surface roughness of 0.025 to 0.5 xm is preferable, but a surface roughness of 0.01 to 0.5 m is most preferable for securing reliability. Here, the surface roughness refers to the average value of the difference in unevenness at any ten points when the surface is observed using a scanning microscope.

Methods for forming a dielectric thin film on a metal foil include, for example, a vacuum deposition method and an ion plate. It may be formed by a sputtering method, a CVD (Chemical Vapor Deposition) method, a sputtering method, or a sol-gel method.

Vacuum deposition method, 1. a thin film material is heated evaporation in a high vacuum of 3 X 10- ⁴ P a, it is a technique for forming a dielectric thin film by adhering the vapor particles onto the substrate. The ion plating method is a technique for forming a dielectric thin film by ionizing vaporized particles, accelerating them by an electric field, and then adhering them to the substrate in order to increase the strength of adhesion of the vacuum deposited film to the substrate. The CVD method involves the thermal decomposition, oxidation, reduction, polymerization, or gas phase chemical reaction of halides, sulfides, hydrides, organometallic compounds, etc., containing the elements that form the thin film, at high temperatures or in plasma. This technology forms a dielectric thin film by depositing a thin film composition on a substrate. The sputtering method is a technique of irradiating a target with ions and depositing a sputter-evaporated target material on a substrate to form a dielectric thin film. The sol-gel method is a technique in which a sol solution containing an element for forming a thin film is coated on a substrate, gelled by a condensation reaction, and then annealed at a high temperature to form a dielectric thin film.

 When forming a dielectric thin film on the surface of the metal foil, use a roll-shaped metal foil and form the dielectric thin film while moving the metal foil continuously in a heating furnace where the temperature is kept constant. Is preferred. By performing continuous processing, it is possible to form a dielectric thin film of uniform quality, which is economically excellent.

(Substrate for multilayer wiring board with built-in capacitor)

 Further, in one embodiment of the present invention, the substrate has a via hole for connecting conductive layers inside the substrate, and has a relative dielectric constant of 10 to 2,000 on the surface of the substrate having a smooth metal layer on the surface, and The present invention relates to a multilayer wiring board substrate with a built-in capacitor on which a dielectric thin film having a thickness of 0.05 to 2 m is formed.

According to this embodiment, it is possible to arbitrarily design a wiring pattern connected to a capacitor electrode by using a substrate having a via hole inside the substrate. In addition, a uniform thin film is formed on the surface of the metal layer with a smooth surface. It is easy to obtain a dielectric thin film with a large thickness, and there is little variation in capacitor capacitance.

 The metal layer is preferably copper, and it is preferable to provide an oxidation protective film and / or a self-oxidizing film on the surface of the copper foil to prevent oxidation of copper. As the dielectric thin film, the same as the dielectric thin film used for the material for the multilayer wiring board with a built-in capacitor can be used, and can be formed in the same manner as described above.

 The connection between the conductor layers by via holes can be made by metal plating or conductive paste.

 Metals such as copper, silver, nickel, sub forceps, tin, and alloys thereof can be used as the metal plating. The method of connection between layers by metal plating is: 1) Through holes are formed by drilling or laser drilling in metal-clad laminates, 2) Plating catalyst, 3) Thin electroless plating, 4) Thickening Electric plating, 5) Filling the through holes with thermosetting resin, 6) Curing thermosetting resin, 7) Polishing for smoothing of substrate surface, 8) Applying plating catalyst, 9) Thin Electroless plating, 10) Thickening may be performed by a method of electrical plating. The thick electric plating may be replaced with a thick electric plating.

 Examples of the conductive paste include a conductive paste composed of a metal filler and a resin, and a conductive paste that is metallized by a chemical reaction.

The conductive paste made of the metal filler (metal powder) and the resin is preferably made of a metal filler and a thermosetting resin. Examples of the metal filler include silver, copper, tin, zinc, and alloys thereof. Its particle size is between 0.5 and 10 m. Examples of the thermosetting resin include a phenol resin, an epoxy resin, and a sanne resin. The content of the metal filler in the conductive paste is preferably 60 to 80% by volume. Commercially available conductive pastes composed of a thermosetting resin and a metal filler include DD paste (trade name, manufactured by Tatta System Electronics Co., Ltd.), Dortite (trade name, manufactured by Fujikura Kasei Co., Ltd.), Use a conductive paste such as a conductive paste (trade name, manufactured by Namics Corporation) Can be

 A conductive paste that is metallized by a chemical reaction has a lower volume resistivity than a conductive paste composed of a thermosetting resin and a metal foil, and is advantageous in electrical characteristics. Examples of such a conductive paste include a paste made of fine metal particles, a dispersant, and a solvent. The content of the metal particles in the conductive paste is preferably 60 to 80% by weight. Examples of the metal particles of the conductive paste that are metallized by a chemical reaction include gold, platinum, silver, copper, palladium, ruthenium, and the like. Preferably, the average particle size is 0.1 to 10 nm. This conductive paste behaves almost the same as a liquid at room temperature because very fine metal particles formed by gas evaporation method are protected by a dispersant.Printing, coating, impregnation It is possible to form a circuit or the like. When heated to a certain temperature (150 ° C to 200 ° C), the supplementary substance is activated, and the fine metal particles are brought into contact by a chemical reaction such as removal of the dispersant, and fusion and fusion occur. Has the property of accelerating deposition and forming a metallized electrical conductor. In order to metallize at a temperature at the time of heating and pressurizing for lamination, that is, at a temperature below the melting point of the metal, it is preferable to increase the reaction activity by using metal particles of 0.1 to 10 nm. In order to suppress the reaction with oxygen, it is preferable to use metal particles such as gold, platinum, silver, copper, palladium, and ruthenium, which are hardly oxidized metals. Commercially available products such as nanopaste (trade name, manufactured by Harima Chemicals, Inc.) can be used as the conductive paste that is metallized by such a chemical reaction, but the conductive paste is not limited to this.

The method of connecting layers using conductive paste is as follows: 1) a step of forming a through-hole by drilling or laser drilling in the pre-preda to be an insulating layer; 2) a step of filling the through-hole with a conductive paste; ) The method may include a step of sandwiching between metal foils, heating under pressure, and curing. The heating temperature is preferably from 25 ° C. to 350 ° C. If the temperature exceeds 350 ° C, thermal decomposition occurs in general resins. For connection between layers by both metal plating and conductive paste, 2 The present invention is not limited to a layer substrate, and even in a substrate having three or more layers, via holes for connecting conductor layers may be electrically connected to the inside of the substrate by metal. The insulating material used for the substrate is preferably made of resin and glass woven fabric or glass nonwoven fabric. In order to heat the substrate, it is necessary to ensure the rigidity of the substrate even at high temperatures. Therefore, it is preferable to use an insulating material consisting of resin and glass woven fabric or glass nonwoven fabric, rather than an insulating material consisting only of resin and inorganic filler or an insulating material consisting of resin and paper such as cellulose or synthetic resin. It is. It is also possible to use a sheet of a thermoplastic resin such as a fluororesin or a polyetheretherketone having a high heat resistance, or a thermosetting resin such as a polyimide-polyamideimide, but it is economically inferior. The material of the woven fabric / nonwoven fabric is not limited as long as it has high rigidity at high temperature, that is, a material having a high elastic modulus, and D glass, E glass, S glass and the like can be used.

The resin used for the insulating material of the substrate is a thermosetting resin, and preferably has a glass transition temperature of 170 ° C or higher. Substrates using an insulating material made of thermosetting resin and glass woven fabric or glass nonwoven fabric are excellent in workability and economy. Further, when the glass transition point temperature is 170 ° C or more, it is possible to suppress deterioration due to heat during the formation of the dielectric thin film. Examples of the thermosetting resin having a glass transition temperature of 170 ° C. or more include epoxy resin, modified polyimide resin, modified triazine resin, modified polyphenylene oxide resin, modified polyphenylene ether resin, and modified shear resin. Nate ester resins and the like can be used, but are not limited. Commercially available substrate materials using epoxy resin include MCL-E-679, MCL-E-679F (these are Hitachi Chemical Industries, Ltd., trade names), R-1755, R-1515 (Matsushita Electric Works, Ltd., trade name), ELC-4781 (Sumitomo Bakelite Co., Ltd., trade name), CS-3665, CS—3365S, CS-3287 (Rissho Kogyo Co., Ltd.) , Product name) can be used. A commercially available copper-clad laminate using a modified polyimide resin is available from MCL-1-671 (Hitachi Chemical Industry Co., Ltd.). R-4705 (made by Matsushita Electric Works, Ltd.) can be used. As the copper-clad laminate using the modified triazine resin, commercially available products such as CCL-830, CCL-832, CCL-832HS (the above names, manufactured by Mitsubishi Gas Chemical Company, Ltd.) can be used. . Examples of copper-clad laminates using a modified polyphenylene ether resin include CS-3376B (trade name, manufactured by Risho Kogyo Co., Ltd.) and TLC-W-596 (trade name, manufactured by Kyocera Chemical Corporation). Can be used. Multi-layered insulating materials (pre-leaders) corresponding to each of the above-mentioned copper-clad laminates are also commercially available from each manufacturer and can be used. (Multilayer wiring board with built-in capacitor)

 The multilayer wiring board with a built-in capacitor uses the above-mentioned material for a multilayer wiring board with a built-in capacitor, and laminates a substrate having a conductor circuit on the copper foil surface via an insulating layer to form a capacitor, and form the copper foil and the conductive pattern. It may be manufactured by conducting the above. The multilayer wiring board with a built-in capacitor may be manufactured by forming a capacitor using the above-described substrate for a multilayer wiring board with a built-in capacitor. Further, a metal foil (hereinafter, referred to as metal foil B) is laminated on a metal foil (hereinafter, referred to as metal foil A) of the above-mentioned material for a multilayer wiring board with a built-in capacitor via an insulating layer to form a capacitor. It may be manufactured by conducting the metal foil A and the metal foil B. These are described below.

 (Formation of the first capacitor electrode)

 A capacitor electrode (hereinafter, referred to as a first capacitor electrode) is formed on a dielectric thin film on a substrate surface.

The thickness of the first capacitor electrode is preferably from 10 to 50. If the thickness is less than 10, when a non-through hole is provided as a lead-out pattern of the electrode when an insulating layer is further formed on the outer layer of the electrode 1, the metal layer below the dielectric thin film is damaged by laser processing. And the problem of easy damage. On the other hand, if it exceeds 5, processing accuracy when forming an electrode pattern by etching may be poor. You.

 As a method of forming the first capacitor electrode at a predetermined position on the dielectric thin film, a method in which a metal layer is formed on the entire surface of the dielectric thin film and then formed by etching (

Method 1), metal plating after plating resist formation (second method), and printing with conductive paste (third method).

 The first method may include a step of forming a metal layer of 10 to 50 m by metal plating or sputtering, and a step of etching and removing an arbitrary portion. Various metals can be used as the metal layer to be the first capacitor electrode, but copper is preferable in consideration of electrical characteristics and economy. If copper is used as the metal layer, the metal layer may further include chromium, molybdenum, titanium, nickel, or the like, or the metal layer and the dielectric may be used to prevent oxidation of the copper due to transfer of oxygen from the dielectric thin film. It is preferable to provide a metal layer serving as a self-oxidizing film such as chromium, molybdenum, titanium, or nickel between the thin films.

The second method includes a step of forming a metal layer of 0.1 to 5 / xm on the surface of the dielectric thin film, and a step of forming a metal-plated resist while leaving an arbitrary portion including the first capacitor electrode. Forming a first capacitor electrode of 10 to 50 / m by metal plating; etching and removing a metal-plated resist; and forming a first capacitor electrode on the surface of the dielectric thin film. etching the metal layer of m. Examples of the metal layer of 0.1 to 5 include various metals, and copper is preferable in consideration of electrical characteristics and economy. When copper is used, it is preferable to provide a metal layer for forming a self-oxidizing film between the metal layer and the metal layers of 0.1 to 5 in order to prevent oxidation of copper. The metal layer forming the self-oxidizing film is preferably a metal layer of chromium, molybdenum, titanium, nickel or the like. It is preferable that the metal layer of 10 to 50 m formed by metal plating contains copper, silver, tin, nickel, or zinc in consideration of electrical characteristics and economy. As the plating resist, for example, Photek H-9330 (trade name, manufactured by Hitachi Chemical Co., Ltd.) can be used. Plating resist etchant and 0.1 to 5 As the etching solution for the metal layer of m, a known solution can be used.

 The third method may include a step of printing and hardening a conductive paste to be metallized by a chemical reaction at an arbitrary position on the dielectric thin film where the first capacitor electrode is to be formed. Further, a conductive paste may be printed on a portion including a portion to be the first capacitor electrode, and an unnecessary portion may be etched to form the first capacitor electrode. As the conductive paste which is metallized by a chemical reaction, the above-mentioned conductive paste which can be used for a substrate for a multilayer wiring board with a built-in capacitor can be used. Are preferred. By using a conductive paste that is metallized by a chemical reaction, the first capacitor electrode can be formed without using a plating process with many processing steps, and the number of days for manufacturing a multilayer wiring board with a built-in capacitor is reduced. Can be.

 (Formation of capacitor dielectric)

 The material for the multilayer wiring board with a built-in capacitor or the dielectric thin film of the substrate is removed by etching while leaving a portion serving as a capacitor dielectric, thereby forming a capacitor dielectric.

 Examples of the etching removal method include an ion beam etching method, an R I (Reactiv e IonEtching) method, and an etching method.

 The ion beam etching method is a technique in which ions of an inert gas such as argon are accelerated by an electric field and then irradiated on a substrate to remove a dielectric thin film.

 The RIE method is a technique in which a reactive gas plasma such as a fluorocarbon-based gas is generated under a reduced pressure and a strong electric field, thereby removing the dielectric thin film.

The wet etching method is a technique for removing a dielectric thin film using an etching solution (etchant) such as an etching solution (etchant) capable of dissolving a dielectric. Known etchants can be used, and examples thereof include a solution containing hydrofluoric acid, an aqueous solution containing ammonia and hydrogen peroxide, and an aqueous solution containing EDTA, ammonia and hydrogen peroxide. However, hydrofluoric acid is dangerous because of its high reactivity. Aqueous solutions containing ammonia and hydrogen peroxide, and aqueous solutions containing EDTA, ammonia and hydrogen peroxide are alkaline. Therefore, when patterning is performed by etching, it is necessary to use an alkali-resistant resist, that is, a rubber-based resist, as the etching resist. Since such a resist uses a special chemical or solvent for a developing solution or a stripping solution, it is necessary to provide a dedicated facility. Therefore, the dielectric thin film may be etched by a method using an etch by the following two methods.

 The two methods include a method using an etchant containing a chelating agent and hydrogen peroxide (first method), and at least one acid selected from the group consisting of sulfuric acid, hydrochloric acid, phosphoric acid, nitric acid, and acetic acid, and hydrogen peroxide. This is a method (second method) that uses an etchant containing Etching of the dielectric thin film performed in the first and second methods is wet etching, and has higher productivity than etching by a dry process. It is economical because it can handle large substrates. Furthermore, the use of an alkali-developed etching resist used in the normal photolithography process eliminates the need for special equipment, and does not use special chemicals, so it is inexpensive and can perform thin film patterning efficiently. It is possible.

In the first method, an etchant containing a chelating agent and hydrogen peroxide is used as an etchant for a dielectric thin film. Usually, the etchant is an aqueous solution. Since the dielectric thin film can be etched with an aqueous solution containing a chelating agent and hydrogen peroxide without using hydrofluoric acid, handling of the chemical solution is easy and danger can be reduced. In addition, the chelating agent—hydrogen peroxide is used in a normal printed wiring board manufacturing process, and does not require a large new load when used. Preferably, the chelant concentration of the etchant is between 0.001 and 0.5 mol Zl. For etching of the dielectric thin film, at least 0.001mo1 is required _: it can be arbitrarily set up to the limit concentration of 0.5mo1. More desirably, the stability is set to 0.1 to 0.3 mo 11. Good etching rate can be obtained. It is desirable that the concentration of hydrogen peroxide be 1 to 5 O wt%. The etching rate can be adjusted by arbitrarily setting the concentration of hydrogen peroxide within this range. At least lwt% of hydrogen peroxide is necessary to obtain the minimum etch rate for use, and it can be set arbitrarily within the range up to 5 O wt% where there is no problem in handling chemicals. I can do it. More desirably, by setting the content to 20 to 3 O wt%, an appropriate etching rate can be obtained, and the liquid concentration can be easily controlled. The etchant controlled to the concentration described above is an acidic etchant, and the pH of the etchant is desirably controlled in the range of 2 to 7. It is also possible to adjust the pH to the alkaline side by using a buffer solution.However, in this case, it is necessary to use an alkali-resistant etching resist, and a resist having alkali resistance generally requires special equipment and a chemical solution. It is. Therefore, for the above reason, it is desirable that the pH of the etchant is controlled in the range of 2 to 7.

The chelating agent used in the present invention is at least one selected from the group consisting of ethylenediaminetetraacetic acid (EDTA), hydroxyethyliminodiacetic acid (HIDA), iminoniacetic acid (IDA), dihydroxyethylglycine (DHEG) and alkali salts thereof. It is preferably a chelating agent. Since the chelating agent is a water soluble, NH ₄ 0H, the N a 0 H such as Al force Li solution such need used Le ^ which is effective for obtaining an acidic Etsuchanto described above, Regis Bok of In addition to being easy to select, it also contributes to reducing chemical solution costs.

 The etchant of the dielectric thin film used in the second method contains an acid selected from the group consisting of sulfuric acid, hydrochloric acid, phosphoric acid, nitric acid and acetic acid and hydrogen peroxide, and is usually an aqueous solution. The above-mentioned acids are also used in the manufacture of ordinary wiring boards, and are easier to handle than hydrofluoric acid. The aqueous solution of these acids and hydrogen peroxide makes it possible to easily etch the dielectric thin film.

It is preferable that the concentration of at least one acid selected from the group consisting of sulfuric acid, hydrochloric acid, phosphoric acid, nitric acid and acetic acid is 1 to 30 wt%. Higher concentration The higher the etching rate, the higher the etching rate, but the more difficult it is to handle chemicals. Therefore, the concentration is preferably set to 3 O wt% as the upper limit. Further, in order to obtain an etching rate which is at least allowable in use, it is preferable that the content be lwt% or more. More preferably, by setting the content to 5 to 3 wt%, it is possible to obtain excellent etching characteristics and an appropriate etching rate. In addition, the handling of the chemical solution is easy, and an excellent etching rate can be obtained. In the first and second methods, it is sufficient that an etching resist is formed on at least a metal layer serving as a capacitor electrode formed at a predetermined position on the substrate surface. As the etching resist, a commercially available photosensitive dry film or an alkali developing type resist ink can be used, but it is preferable to use a photosensitive dry film. Photosensitive dry film is the most versatile resist material in the printed wiring board manufacturing process. Not only is it possible to form low-cost resists, but it also has excellent workability. The etching resist to be used is not particularly limited. ), H-940 (manufactured by Hitachi Chemical Co., Ltd., trade name) and the like. Examples of commercially available alkaline development type resist inks include PER-20 (trade name, manufactured by Taiyo Ink Mfg. Co., Ltd.). An etching resist is formed on the metal layer to be the capacitor electrode on the substrate surface and on the dielectric thin film, and the circuit pattern is baked and developed. An aqueous sodium carbonate solution can be used for development, and an aqueous sodium hydroxide solution can be used for stripping the etching resist, which is also characterized by a small environmental load. Further, an etching resist may be formed only on the metal layer serving as the capacitor electrode by using an ink-like etching resist by screen printing or the like.

When a photosensitive dry film is used, its thickness is desirably 1 to 3 times the thickness of the metal layer to be the capacitor electrode. If the thickness of the metal layer to be protected is smaller than the thickness of the metal layer to be etched, the gap between the metal layer and the surface of the layer to be etched is poorly embedded and voids are generated. And cause poor etching. On the other hand, when the ratio is more than three times, the etching property is reduced, so that it is difficult to miniaturize the pattern. More desirably, the thickness is two to three times the metal layer. By setting it to 2 to 3 times, it has good followability to steps and excellent etching properties.

 In the first and second methods, the method is a method for manufacturing a multilayer wiring board with a built-in capacitor, in which the dielectric thin film is etched at 20 to 45 ° C. If the temperature is lower than 20 ° C, the etching rate is remarkably reduced, so that a large amount of time is required for etching, which is uneconomical. On the other hand, if it exceeds 45 t :, the adhesiveness of the resist is reduced, and etching failure is likely to occur. Therefore, the etching temperature is preferably 20 to 45 ° C. More preferably, by setting the temperature to 20 to 30 ° C., a good etching rate and resist adhesion can be achieved at the same time, and workability and yield can be improved.

 It is preferable to provide a metal layer between the dielectric thin film and the first capacitor electrode as the above-mentioned oxidation protective film or self-oxidizing film. The same material as that used for the material for the multilayer wiring board with a built-in capacitor can be used.

 (Formation of the second capacitor electrode)

 A capacitor electrode (second capacitor electrode) is obtained by etching a metal foil or a metal layer contained in the above-mentioned material for a multilayer wiring board with a built-in capacitor or a substrate for a multilayer wiring board with a built-in capacitor, leaving an arbitrary portion. be able to. Etching can be performed by a known method.

 The formation of the second capacitor electrode may be performed simultaneously with the formation of the first capacitor electrode or after the formation of the first capacitor electrode. In particular, when the formation of the second capacitor electrode is performed simultaneously with the formation of the first capacitor electrode, the manufacturing process is simplified, the number of manufacturing days is reduced, and the economy is excellent. In this case, a capacitor dielectric is formed, a metal layer to be a first capacitor electrode is formed thereon, and then the first and second capacitor electrodes are simultaneously etched.

If the second capacitor electrode is common to the ground layer or power layer of the multilayer wiring board, use the second capacitor electrode as the ground layer or power layer. Is preferred. Generally, the pattern of the ground layer or the power supply layer has a larger area than the wiring pattern. The area of the capacitor electrode manufactured in the present invention is formed by patterning the metal layer covering the substrate surface when forming the dielectric thin film more than the first capacitor electrode formed on the dielectric thin film. Since the second capacitor electrode becomes larger, it is preferable to use the second capacitor electrode in a ground layer or a power supply layer.

 (Connection between Second Capacitor Electrode and Conductor on Substrate Having Conductor Circuit) In the case of manufacturing a capacitor inner-layer multilayer wiring board using a material for a multilayer wiring board with a built-in capacitor according to one embodiment of the present invention, the capacitor A substrate having a conductive circuit may be laminated on the copper foil surface of the built-in multilayer wiring board material via an insulating layer. In this capacitor inner layer multilayer wiring board, the connection between the second capacitor electrode and the conductor circuit may be performed by removing the insulating layer and connecting by electrolytic plating (first method); The connection may be made by using an insulating layer in which the paste is filled in the through holes (second method).

 The first method is a step of forming a hole by removing the insulating layer exposed by laser irradiation after forming the first and second capacitor electrodes and the capacitor dielectric, and exposing a conductor circuit serving as an inner layer. A step of forming a metal layer of 0.1 to 5 m on the surface of the substrate; a step of forming a plating resist except for any part including a hole; and a step of forming a plating resist on the surface of the substrate other than the part where the plating resist is formed. Forming a metal layer of 10 to 50 m and electrically connecting circuit patterns between layers; etching and removing a metal layer of 0.1 to 5 m formed on the substrate surface; The method may include a step of etching and removing an arbitrary portion including a denser dielectric and a hole converted into a conductor. With respect to the metal layer, the plating resist, and the like, those similar to those used for the first capacitor electrode can be used.

The second method involves forming a through-hole with a drill laser in an insulating material, such as a pre-preda, which is to be an insulating layer, and printing a conductive paste that is metallized by a chemical reaction on a screen. And filling the through-holes using the holes. As the conductive paste, the same conductive paste as that used for the above-described multilayer array substrate with a built-in capacitor can be used.

 In the case of manufacturing a multilayer wiring board with a built-in capacitor using a substrate for a multilayer wiring board with a built-in capacitor, which is one embodiment of the present invention, since a via hole is provided inside the board to connect between the conductor eyebrows, it is particularly conductive. Need not be performed. '

 In the case of manufacturing a capacitor internal multilayer wiring board by using a capacitor internal multilayer wiring board material according to an embodiment of the present invention, an insulating layer is interposed on the copper foil surface of the capacitor internal multilayer wiring board material. Metal foil B can be laminated. In this capacitor multilayer wiring board, after the insulating layer and the metal foil B are removed and a hole is formed, a connection may be made by forming a metal layer in the hole (first method); May be connected by using an insulating layer filled in a through hole.

(Second method).

In the first method, the insulating layer can be removed by a laser, and the metal foil B can be removed by a laser or etching. If holes are formed by removing the metal foil B and the insulating layer at the same time using a laser, the manufacturing process is simplified, the number of manufacturing days is reduced, and the economy is excellent. The metal foil B that enables such a manufacturing method is preferably subjected to a process that easily absorbs the energy of laser light. In the case of copper foil, such a treatment is effective for surface roughening treatment such as copper oxide treatment, microetching treatment, roughening plating treatment, and the surface roughness is 0.1 to 3 xm. preferable. If it is less than 0.1 m, the absorption of laser light is not sufficient, resulting in poor workability. If it exceeds 3 / im, processing accuracy is poor. The thickness of the copper foil is preferably from 1 to 18 ^ m. Copper foil less than l ^ m is inferior in handleability, and copper foil exceeding 18 / im is inferior in workability. In addition to the copper surface roughening treatment, a metal layer such as nickel which easily absorbs laser light may be provided on the surface. Examples of a method for forming such a metal layer or a metal layer on the surface of a substrate include a sputter ring method, an electroless plating method, an electrolytic plating method, and a combination thereof. Next, by forming a metal layer in the formed hole, the metal foil B and the metal foil A (capacitor electrode) can be electrically connected. This electrical connection can be made, for example, by electroplating or by forming a conductive paste. The first method is to form a metal layer of 0.1 to 5 m on both sides of the substrate including the inside of the hole, and to form a metal-plated resist on the surface of the substrate except for an arbitrary portion including the hole. Process, forming a conductive pattern in a portion including a hole by metal plating, removing unnecessary metal-coated resist, and forming a 0.1 to 5 m metal layer in an unnecessary portion. Removing step. As the metal layer, the plating resist, and the like, the same ones as those used for the first capacitor electrode can be used.

 Before forming the metal layer 2 on the dielectric thin film of the material for the multilayer wiring board with a built-in capacitor, if the metal layers are formed on both sides of the substrate surface including the hole, the formation of the metal layer in the hole and the first capacitor This is preferable because the formation of the metal layer serving as the electrode is performed simultaneously. The metal layer is formed by forming a metal layer of 0.1 to 5 im on both sides of the substrate including the inside of the hole, and forming a metal plating resist on the surface of the substrate except for an arbitrary portion including the hole. Forming a conductive pattern in a portion including a hole by metal plating, removing a metal-plated resist, and etching the metal layer of 0.1 to 5 im exposed on the substrate surface. Removing step. Further, the electrical connection between the metal foil B and the metal foil A (capacitor electrode) may be performed by the conductive base described above.

 In the second method, a step of forming a through-hole by drilling or laser drilling in an insulating material such as a pre-predder serving as an insulating layer, and a screen printing or the like using a conductive paste which is metallized by a chemical reaction. And filling the through-holes by using them. The conductive paste is the same as the conductive paste used for the above-mentioned substrate for a multilayer array with a built-in capacitor.

In the invention, if necessary, one or more circuit layers are formed on both sides or one side of the substrate with an insulating layer interposed therebetween, so that three or more layers with built-in capacitors can be obtained. A layer wiring board can be obtained.

 In one embodiment of the present invention, in the multilayer wiring board with a built-in capacitor, the pattern of the conductor layer forming the first capacitor electrode forms all the electrodes of the capacitor, and the projection surface of the dielectric thin film is formed of the first capacitor electrode. The conductor layer including the projection surface and forming the second capacitor electrode may include a second capacitor electrode and at least one pattern electrically insulated from the second capacitor electrode.

 In one embodiment of the present invention, in the multilayer wiring board with a built-in capacitor manufactured by these manufacturing methods, the metal layer forming the second capacitor electrode is formed below the metal layer pattern forming the first capacitor electrode. There is a pattern. Therefore, if a wiring pattern is formed on the metal layer that forms the first capacitor electrode, a parasitic capacitance is generated between the metal layer and the metal layer that forms the second capacitor electrode, and the electrical signal transmission characteristics deteriorate. This is not preferable. Therefore, it is preferable that the wiring pattern is provided on the metal layer of the second capacitor electrode. Further, in one embodiment of the present invention, in the multilayer wiring board with built-in capacitors manufactured by these manufacturing methods, 1) the first capacitor electrode included in the projection surface of the dielectric thin film forming the dielectric of the capacitor is provided. 2) The conductor layer forming the first capacitor electrode may be electrically connected to the second capacitor electrode at all ends of the dielectric thin film. According to this, it is a multilayer wiring board with a built-in capacitor that simplifies the manufacturing process steps, reduces manufacturing days, and is economical.

 In one embodiment of the present invention, a semiconductor chip may be mounted on a multilayer wiring board with a built-in capacitor manufactured by these manufacturing methods. Since the capacitor is built into the board, the number of components to be mounted can be reduced, and a small semiconductor device can be provided.

 A method for manufacturing a multilayer wiring board with a built-in capacitor will be specifically described.

The following manufacturing method uses a material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 10 to 2000 and a film thickness of 0.5 to 2 is provided on the surface of a metal foil. This is a specific example of a method for manufacturing a multilayer wiring board with a built-in capacitor. (a-1) 1) A step of laminating a metal foil of a material for a multilayer wiring board with a built-in capacitor on a substrate having a conductive circuit via a pre-predader, and 2) A metal of 1.0 to 50 Forming a layer, 3) etching away leaving an arbitrary portion of the metal layer to form a desired first capacitor electrode, and 4) forming at least a first capacitor electrode of the dielectric thin film. 5) forming a desired capacitor dielectric by etching away leaving any part including the capacitor dielectric; and 5) removing the dielectric thin film to leave at least any part of the metal foil that has appeared, including the capacitor dielectric. Forming a conductor pattern including a desired second capacitor electrode by etching.

 (a-2) 1) a step of laminating on a substrate having a conductor circuit via a pre-preder on a metal foil surface of a material for a multilayer wiring board with a built-in capacitor; and Forming a metal layer; 3) forming a metal-plated resist while leaving any portion including the first capacitor electrode; and 4) forming a first capacitor of 10 to 50 z ^ m by metal-plated. Forming an electrode; 5) removing a metal-plated resist; 6) etching away a 0.1 to 5 / m metal layer formed on the surface of the dielectric thin film; and 7) dielectric. A step of forming a desired capacitor dielectric by etching and removing an arbitrary portion including at least the first capacitor electrode of the body thin film; and8) at least a capacitor of a metal foil that has emerged by removing the dielectric thin film. Etch away leaving any part including the dielectric and leave the desired second Forming a conductor pattern including a capacitor electrode.

(a-3) 1) a step of laminating a metal foil surface of a material for a multilayer wiring board with a built-in capacitor on a substrate having a conductive circuit via a pre-predader; Forming a desired first capacitor electrode by forming a metal layer of 10 to 50 m using a conductive paste which is metallized by a reaction; and3) at least a first capacitor electrode of a dielectric thin film. Removing the etching to form a desired capacitor dielectric while leaving any part including the following; and 4) removing the dielectric thin film and leaving at least any part of the metal foil that has appeared containing the capacitor dielectric. Forming a conductor pattern including a desired second capacitor electrode by etching.

 (a-4) 1) laminating on a substrate having a conductive circuit via a pre-preder on a metal foil surface of a material for a multilayer wiring board with a built-in capacitor; and 2) etching and removing any part of the dielectric thin film while leaving it 3) forming a metal layer of 10 to 50 xm on the surface of the substrate on which the capacitor dielectric has been formed, and 4) etching leaving any part of the metal layer. Removing to form a desired first capacitor electrode, second capacitor electrode, and any conductive pattern electrically insulated from the capacitor electrode.

を形成する工程と、 8) 穴を含む任意の箇所を除 いてめつきレジストを形成する工程と、 9) めっきレジストを形成した箇所以 外の基板表面に 10〜50 の金属層を形成して層間の回路パターンを電気 的に接続させる工程と、 10) 基板表面に形成した 0. l〜5 ^mの金属層を エッチング除去する工程と、 11) 少なくともコンデンサ誘電体と導体化され た穴を含む任意の部分を残してエッチング除去して所望の第 2のコンデンサ電 極を含む導体パターンを形成する工程を有する。 (a-5) 1) A step of laminating on a substrate having a conductor circuit via a pre-preder on the surface of a metal foil of a material for a multilayer wiring board with a built-in capacitor; and Forming) a desired first capacitor electrode by etching away leaving any portion of the metal layer; and4) an optional portion including at least the first capacitor electrode of the dielectric thin film. 5) forming a desired capacitor dielectric by etching away leaving a portion, and 5) removing the dielectric thin film to remove any part of the metal foil that has appeared by etching to cure the hardened pre-predeer insulating layer. Exposing; 6) removing the insulating layer exposed by laser irradiation to form a hole to expose the inner conductor circuit; and 7) 0.1 to 5 on the substrate surface.

8) A step of forming a plating resist by removing any part including a hole; and 9) Forming a 10 to 50 metal layer on the substrate surface other than the part where the plating resist is formed. A step of electrically connecting circuit patterns between layers; 10) a step of etching away a metal layer of 0.1-5 m formed on the surface of the substrate; and 11) at least a hole formed as a conductor with a capacitor dielectric. And forming a conductor pattern including a desired second capacitor electrode by etching away leaving any portion including the second capacitor electrode.

(a-6) 1) laminating on the surface of the metal foil of the material for the multilayer wiring board with a built-in capacitor to the substrate having a conductive circuit via a pre-predader, and 2) applying 0. Forming a metal layer of 1 to 5 / m; 3) forming a metal plating resist while leaving any part including the first capacitor electrode; and 4) forming a metal plating resist of 10 to 50 m. A) forming a first capacitor electrode; 5) removing a metal plating resist; and 6) etching and removing a 0.1 to 5 m metal layer formed on the surface of the dielectric thin film. 7) a step of forming a desired capacitor dielectric by etching away leaving at least an arbitrary portion of the dielectric thin film including at least the first capacitor electrode; and 8) a metal appearing after removing the dielectric thin film. Exposing any part of the foil by etching to expose the cured insulating layer of the pre-preda; and 9) Removing the insulating layer exposed by laser irradiation to form holes and expose the inner conductor circuit. And 10) 0.1 to 5 im metal on the substrate surface Layer forming step, 1 1) step of forming a plating resist except for any part including a hole, and 12) a metal layer of 10 to 50 m on the substrate surface other than the part where the plating resist is formed. Forming and electrically connecting circuit patterns between layers; 13) Etching and removing a 0.1 to 5 xm metal layer formed on the substrate surface; and 14) Conducting at least a capacitor dielectric. Forming a conductor pattern including a desired second capacitor electrode by etching and removing an arbitrary portion including a hole.

(a-7) 1) a step of laminating a metal foil surface of a material for a multilayer wiring board with a built-in capacitor on a substrate having a conductive circuit via a pre-predader; A step of forming a desired first capacitor electrode by forming a metal layer of 10 to 50 m using a conductive paste which is metallized by the reaction, and 3) including at least a first capacitor electrode of a dielectric thin film A step of forming a desired capacitor dielectric by etching while leaving an arbitrary portion; and 4) an insulating layer of a pre-preda cured by etching and removing an arbitrary portion of a metal foil that appears by removing a dielectric thin film. 5) removing the insulating layer exposed by the laser irradiation, forming a hole to expose the inner conductor circuit, and 6) exposing the substrate surface to 0.1 to 0.1%. 5) forming a metal layer and 7) including holes Any place 8) forming a 10-50 m metal layer on the surface of the substrate other than where the plating resist is formed, and connecting the circuit patterns between the layers. 9) a step of etching away a 0.1 to 5 mm metal layer formed on the surface of the substrate; and10) a desired step of etching and removing at least an arbitrary portion including at least a capacitor dielectric and a conductive hole. Forming a conductor pattern including the second capacitor electrode.

 (a-8) 1) A step of laminating a metal foil surface of a material for a multilayer wiring board with a built-in capacitor on a substrate having a conductive circuit via a pre-predader, and 2) Etching and removing any part of the dielectric thin film 3) a step of forming a desired capacitor dielectric, 3) a step of exposing a hardened pre-preda insulating layer by removing an arbitrary portion of the metal foil that has appeared by removing the dielectric thin film, and 4) laser irradiation. Forming a hole by removing the insulating layer exposed by the step (c), and exposing the conductor circuit as an inner layer; and5) 10 to 50 zm of gold on the surface of the substrate on which the capacitor dielectric is formed and the surface in the hole. Forming a metal layer, and 6) forming a conductor pattern including a desired second capacitor electrode by etching and removing at least an arbitrary portion including a capacitor dielectric and a hole converted into a conductor. .

 In the following manufacturing method, the substrate has a via hole for connecting the conductor layers inside the substrate, has a smooth metal layer on the surface, has a relative dielectric constant of 10 to 2,000, and has a film thickness of 0. This is a specific example of a method for manufacturing a multilayer wiring board with a built-in capacitor, which uses a substrate for a multilayer wiring board with a built-in capacitor characterized by forming a dielectric thin film of 05 to 2 m as an inner layer board.

(b-1) 1) a step of forming a 10 to 50 m metal layer on the surface of the dielectric thin film; and 2) a desired first capacitor electrode by etching and removing any part of the metal layer. Forming a desired capacitor dielectric by etching away the dielectric thin film, leaving at least an arbitrary portion including at least the first capacitor electrode; and 4) removing the dielectric thin film. The metal layer that has appeared is etched away leaving at least an arbitrary portion including the capacitor dielectric to obtain a desired second capacitor. Forming a conductor pattern including the electrode.

 (b-2) 1) a step of forming a metal layer of 0.1 to 5 on the surface of the dielectric thin film; and 2) a step of forming a metal plating resist while leaving any part including the first capacitor electrode. 3) a step of forming a 10 to 50 m first capacitor electrode by metal plating; 4) a step of removing the metal plating resist; and 5) a 0.1 to 5 m formed on the surface of the dielectric thin film. 6) etching away the metal layer of 6), forming a desired capacitor dielectric by etching away the dielectric thin film leaving at least an arbitrary portion including at least the first capacitor electrode, and 7) forming the dielectric thin film. Forming a conductive pattern including a desired second capacitor electrode by removing the film by etching away leaving at least an arbitrary portion of the exposed metal layer including the capacitor dielectric.

 (b-3) 1) Using a conductive paste that is metallized by a chemical reaction on any part of the surface of the dielectric thin film to form a metal layer of 10 to 50 m, and forming the desired first capacitor electrode 2) a step of forming a desired capacitor dielectric by etching and removing any part of the dielectric thin film including at least a portion including the first capacitor electrode; and 3) removing the dielectric thin film. Forming a conductor pattern including a desired second capacitor electrode by etching and removing at least an arbitrary portion including the capacitor dielectric of the metal layer appearing. Manufacturing method of wiring board.

 (b-4) 1) a step of forming a desired capacitor dielectric by etching and removing any part of the dielectric thin film; and 2) a 10-50 metal layer on the surface of the substrate on which the capacitor dielectric is formed. And 3) a desired first capacitor electrode, a second capacitor electrode, and any conductor pattern electrically insulated from the capacitor electrode by etching away leaving any portion of the metal layer. Forming a step.

The method for manufacturing a material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 / m is provided on one side of a metal foil, The present invention relates to a specific example of a method for manufacturing a multilayer wiring board with a built-in capacitor using a substrate provided on at least one surface of an insulating material such that a metal foil is in contact with the insulating material.

 (c-1) 1) a step of forming a metal layer to be a capacitor electrode at a predetermined position on the dielectric thin film on the substrate surface; and 2) a step of forming an etching resist on at least the metal layer on the substrate surface. And 3) a step of wet-etching the dielectric thin film with an etchant containing a chelating agent and hydrogen peroxide; and 4) a step of removing the etching resist after wet-etching.

 (c-1) 1) a step of forming a metal layer serving as a capacitor electrode at a predetermined position on the dielectric thin film on the substrate surface; and 2) a step of forming an etching resist on at least the metal layer on the substrate surface. 3) a step of wet-etching the dielectric thin film with an etchant containing hydrogen peroxide and at least one acid selected from the group consisting of sulfuric acid, hydrochloric acid, phosphoric acid, nitric acid and acetic acid; and 4) after the wet etching. Removing the etching resist.

 The following manufacturing method uses a multilayer wiring board with a built-in capacitor that uses a dielectric multilayer board with a dielectric thin film with a relative dielectric constant of 10 to 2000 and a thickness of 0.05 to 2 m on one side of metal foil A. It is a specific example of a method for manufacturing a wiring board.

(d-1) 1) A process of laminating a metal foil B on the surface of a metal foil A of a material for a multilayer wiring board with a built-in capacitor via an insulating material to form a substrate; 2) Etching an arbitrary portion of the metal foil B Removing the insulating layer formed from the insulating material, and 3) removing the exposed insulating layer by laser irradiation to form a hole and exposing the metal foil A, 4) a step of forming metal layers on both sides of the substrate surface including the inside of the holes, and 5) forming a first capacitor electrode pattern of any shape from the metal layer on the dielectric thin film of the multilayer wiring board material with built-in capacitors by etching. 6) a step of etching a capacitor dielectric of an arbitrary shape including the first capacitor electrode pattern from the exposed dielectric thin film, and 7) a step of removing the dielectric thin film to form gold. . Any including capacitor dielectric pattern from metal foil A A second capacitor electrode of Jo comprising forming at etching. (d-2) 1) a process of laminating a metal foil B on the surface of the metal foil A of the material for the multilayer wiring board with a built-in capacitor via an insulating material to form a substrate; Irradiating the metal foil B and the insulating layer formed from the insulating material at the same time to form a hole, thereby exposing the metal foil A; and 3) forming a hole on both sides of the substrate surface including the inside of the hole. Forming a metal layer; 4) etching a first capacitor electrode pattern of any shape from the metal layer on the dielectric thin film of the multilayer wiring board material with a built-in capacitor; and 5) exposing the exposed dielectric. Forming a capacitor dielectric of an arbitrary shape including the first capacitor electrode pattern by etching from the body thin film; and6) removing the capacitor dielectric pattern from the metal foil A that has appeared after removing the dielectric thin film. Including a second capacitor electrode of any shape A step of forming at Tsuchingu.

 (d-3) 1) A through-hole is provided at an arbitrary location on the surface of the metal foil A of the multilayer wiring board material with a built-in capacitor, and the through-hole is filled with a conductive paste containing a thermosetting resin and a metal filler. 2) forming a metal layer on at least the dielectric thin film side of the substrate surface, 3) forming a metal layer on at least the dielectric thin film side of the substrate surface, and 3) forming a material for a multilayer wiring board with a built-in capacitor. Forming a first capacitor electrode pattern of an arbitrary shape by etching from a metal layer on the dielectric thin film; and 4) a capacitor of an arbitrary shape including the first capacitor electrode pattern from the exposed dielectric thin film. A step of forming a dielectric by etching; and 5) a step of etching by etching a second capacitor electrode having an arbitrary shape including a capacitor dielectric pattern on the metal foil A that has appeared after removing the dielectric thin film.

(d-4) 1) A conductive paste in which a through-hole is provided at an arbitrary point on the surface of the metal foil A of the material for a multilayer wiring board with a built-in capacitor, and the through-hole is metallized by a chemical reaction. A process of laminating a metal foil B via an insulating material filled with a material to form a substrate, 2) a process of forming a metal layer on at least the dielectric thin film side of the substrate surface, and 3) a material for a multilayer wiring board with a built-in capacitor. Forming a first capacitor electrode pattern of an arbitrary shape from a metal layer on the dielectric thin film by etching, and Forming a capacitor dielectric of an arbitrary shape including the first capacitor electrode pattern from the obtained dielectric thin film by etching; and5) converting the capacitor dielectric pattern from the metal foil A that has appeared after removing the dielectric thin film. And forming a second capacitor electrode of an arbitrary shape by etching.

 (d-5) 1) A process of laminating a metal foil B on the surface of a metal foil A of a material for a multilayer wiring board with a built-in capacitor via an insulating material to form a substrate, and 2) Etching an arbitrary portion of the metal foil B. Removing to expose the insulating layer formed from the insulating material; 3) removing the insulating layer exposed by laser irradiation to form a hole, thereby exposing the metal foil A; 4). A step of forming a 0.1 to 5 m metal layer on both sides of the substrate including the inside of the hole, and 5) a metal-plated resist on the surface of the substrate except for a portion serving as the first capacitor electrode and an arbitrary portion including the hole. 6) a step of forming a conductor pattern on the part including the first capacitor electrode and the part including the hole by metal plating, and 7) a step of removing the metal plating resist. 8) etching away the 0.1-5 m metal layer exposed on the substrate surface; 9) A step of etching a capacitor dielectric of an arbitrary shape including the first capacitor electrode pattern from the obtained dielectric thin film by etching; and10) etching the metal foil A, which is obtained by removing the dielectric thin film, by etching. Forming a second capacitor electrode having an arbitrary shape including a capacitor dielectric pattern; and 11) forming a circuit by etching the exposed metal foil B.

(d-6) 1) a process of laminating a metal foil B on the surface of the metal foil A of the material for the multilayer wiring board with a built-in capacitor via an insulating material to form a substrate; By irradiating, the metal foil B and the insulating layer formed from the insulating material are simultaneously removed to form a hole, thereby exposing the metal foil A. 4) a step of forming a metal layer of 1 to 5; 4) a step of forming a metal plating resist on the surface of the substrate except for a portion to be a first capacitor electrode and any portion including a hole. ) A step of forming a conductive pattern on the portion including the first capacitor electrode and the portion including the hole by metal plating; and 6) metal plating. Removing the resist; 7) etching away the 0.1-5 m metal layer exposed on the substrate surface; and) including the first capacitor electrode pattern from the exposed dielectric thin film. 9) a step of forming a capacitor dielectric of an arbitrary shape by etching, and 9) a step of forming a second capacitor electrode of an arbitrary shape including a capacitor dielectric pattern from the metal foil A that has appeared after removing the dielectric thin film. And 10) forming a circuit by etching the exposed metal foil B.

 (d-7) 1) On the surface of the metal foil A of the multilayer wiring board with a built-in capacitor, a through hole is provided at an arbitrary position, and the through hole is filled with a conductive paste containing a thermosetting resin and a metal filler. Laminating a metal foil B via a provided insulating material to form a substrate; 2) forming a metal layer of 0.1 to 5 m on at least the surface of the substrate on the side of the dielectric thin film; ) A step of forming a metal-plated resist on the substrate surface, leaving an arbitrary part including a part to be the first capacitor electrode; and4) a conductor in a part including the part to be the first capacitor electrode due to the metallization. Forming a pattern, 5) removing the metal plating resist, 6) etching away the 0.1-5 m metal layer exposed on the substrate surface, and 7) exposing the dielectric. From the thin film, a capacitor of any shape including the first capacitor electrode pattern 8) A step of forming a dielectric by etching, and 8) A second capacitor electrode having an arbitrary shape including a capacitor dielectric pattern is formed by etching from the metal foil A that has appeared after removing the dielectric thin film, and is exposed. Forming a circuit by etching the metal foil B thus etched.

(d-8) 1) A conductive paste in which a through hole is provided at an arbitrary location on the surface of the metal foil A of the material for a multilayer wiring board with a built-in capacitor, and the through hole is metallized by a chemical reaction. A step of laminating a metal foil B via an insulating material filled with to form a substrate; 2) a step of forming a metal layer of 0.1 to 5 im on at least the surface of the substrate on the side of the dielectric thin film; ) A step of forming a metal-plated resist on the substrate surface while leaving an arbitrary part including a part to be the first capacitor electrode; and 4) Including a part to be the first capacitor electrode due to the metal plating. Step of forming conductor pattern on part 5) removing the metal plating resist; 6) etching away the 0.1 to 5 metal layers exposed on the substrate surface; and 7) removing the exposed dielectric thin film from the first 8) forming a capacitor dielectric of any shape including the capacitor electrode pattern by etching; and 8) etching the metal foil A that has appeared by removing the dielectric thin film to form a capacitor of any shape including the capacitor dielectric pattern. The second capacitor electrode is formed, and the exposed metal foil B is formed by etching.

 (d-9) 1) A through hole is provided at an arbitrary position on the surface of the metal foil A of the multilayer wiring board material with a built-in capacitor, and the through hole is made of a conductive paste containing a thermosetting resin and a metal filler. Laminating a metal foil B via a filled insulating material to form a substrate; 2) using a conductive paste to metallize any part of the surface of the dielectric thin film by a chemical reaction Forming a layer to form a desired first capacitor electrode; and3) forming a desired capacitor dielectric by etching away the dielectric thin film leaving at least an arbitrary portion including the first capacitor electrode. And 4) forming a second capacitor electrode of any shape including a capacitor dielectric pattern by etching from the metal foil A that appeared after removing the dielectric thin film, and exposing the exposed metal foil B The etching by circuit type Comprising the step of.

(d-10) 1) Conductive paste in which through-holes are provided at arbitrary locations on the surface of metal foil A, which is a material for multilayer wiring boards with built-in capacitors, and the through-holes are metallized by a chemical reaction Laminating a metal foil B via a filled insulating material to form a substrate; 2) using a conductive paste to metallize any part of the surface of the dielectric thin film by a chemical reaction Forming a layer to form a desired first capacitor electrode; and3) forming a desired capacitor dielectric by etching away the dielectric thin film, leaving at least an arbitrary portion including the second capacitor electrode. And 4) forming a second capacitor electrode of any shape including a capacitor dielectric pattern from the metal foil A that appeared by removing the dielectric thin film, and exposing the exposed metal foil. Circuit formation by etching B The step of performing (d—1 1) Γ) A process of laminating a metal foil B on the surface of a metal foil A of a material for a multilayer wiring board with a built-in capacitor via an insulating material to form a substrate, and 2) an arbitrary portion of a dielectric thin film. 3) a step of forming a desired capacitor dielectric by etching away while leaving a portion, 3) a step of etching and removing an arbitrary portion of the metal foil B to expose an insulating layer formed from the insulating material; ) Removing the insulating layer exposed by the laser irradiation to form a hole and exposing the metal foil A; 5) forming a metal layer on both surfaces of the substrate including the hole; and 6) forming the metal. Forming a desired first capacitor electrode and a desired second capacitor electrode by etching and removing the layer and any portion of the metal foil A.

 (d-12) 1) A step of laminating a metal foil B on the surface of the metal foil A, which is a material for a multilayer wiring board with a built-in capacitor, via an insulating material to form a substrate, and 2) leaving any part of the dielectric thin film 3) irradiating a laser on an arbitrary portion of the metal foil B, thereby simultaneously removing the metal foil B and the insulating layer formed from the insulating material. Forming a hole to expose the metal foil A, 4) forming a metal layer on both sides of the substrate surface including the inside of the hole, and 5) etching leaving an arbitrary portion of the metal layer and the metal foil A. Removing to form desired first and second capacitor electrodes.

 (d-13) 1) On the surface of metal foil A of the multilayer wiring board with a built-in capacitor, through-holes are provided at arbitrary locations and the through-holes are made of conductive paste containing thermosetting resin and metal filler. Laminating a metal foil B via a filled insulating material to form a substrate; 2) etching and removing any part of the dielectric thin film to form a desired capacitor dielectric; 3) Forming a metal layer on at least the surface of the substrate having the capacitor dielectric; 4) etching away the metal layer and any portions of the metal foil A, leaving the desired first capacitor electrode and the second Forming a capacitor electrode.

(d-14) 1) A through hole is provided at an arbitrary position on the surface of the metal foil A of the multilayer wiring board material with a built-in capacitor, and the through hole is metallized by a chemical reaction. Laminating a metal foil B via an insulating material filled with a conductive paste to form a substrate; 2) forming a desired capacitor dielectric by etching away leaving any part of the dielectric thin film 3) forming a metal layer on at least the surface of the substrate having the capacitor dielectric; and4) etching away the metal layer and any portion of the metal foil A, leaving the desired first layer. Forming a capacitor electrode and a second capacitor electrode. .

 Hereinafter, embodiments of the present invention will be described more specifically with reference to the drawings.

 (Example A)

Material for multilayer wiring board with built-in capacitor A-1

 Rolled copper foil M-BNH-18 (trade name, manufactured by Mitsui Mining & Smelting Co., Ltd.) with a thickness of 35 which is copper foil 102, titanium tetraisopropoxide, zirconte tertiary butoxide, dipivaloyl methane lead complex A 0.5 βm thick ΡΖΤ (lead zirconate titanate) thin film 101 was formed by microwave plasma CVD using nitrogen dioxide at a substrate temperature of 350 ° C (Fig. 1 (a )). Material for multilayer wiring board with built-in capacitor A-2

 A 0.2-meter ruthenium thin film 103 was formed on the surface of rolled copper foil M-BNH-18 (trade name, manufactured by Mitsui Kinzoku Mining Co., Ltd.) having a thickness of 35 xm, which is a copper foil 102, by DC sputtering. In addition, the substrate surface was subjected to microwave plasma CVD using titanium tetraisopropoxide, zircon tetrabutyrate butoxide, dipivaloyl methane lead complex, and nitrogen dioxide at a substrate temperature of 350 ° C. 0.5? 11? Two (lead zirconate titanate) thin films 101 were formed (Fig. 1 (b)). Material for multilayer wiring board with built-in capacitor A-3

The surface of rolled copper foil M-BNH-18 (trade name, manufactured by Mitsui Mining & Smelting Co., Ltd.) with a thickness of 35 m, which is 102, is 0.2 im by DC sputtering. A thin film 103 was formed. Furthermore, a ferroelectric thin film forming material PZT (Kanto Chemical Co., Ltd., trade name) was applied to the surface, and prebaked at a temperature of 15 CTC for a heating time of 30 minutes. The application and pre-bake were repeated five more times, and then heat treatment was performed at 350 ° C for 1 hour to form two thin films 101 with a thickness of 0.5111 (Fig. 1 (b) ). Example A-1

The surface of copper foil 102 of multilayer wiring board material with built-in capacitor A-2 was roughened with an organic acid-based microetching agent CZ-8100B (trade name, manufactured by MEC Corporation) as a pretreatment for multilayer bonding. (Figure 2 (a)). 0.2mm thick double-sided copper foil-clad glass epoxy laminated board MCL—E—679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) The surface of the double-sided substrate 104 was roughened with an organic acid-based micro-etching agent CZ-8100B (trade name, manufactured by Mec Co., Ltd.) as a pretreatment for multi-layer adhesion. Through im glass epoxy prepredder G EA-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.), 18 m thick copper foil GTS-18 (trade name, Furukawa Saichi Kithu Oil Co., Ltd.) On the other side, the above-mentioned material for a multilayer wiring board with a built-in capacitor was placed via a 100 m thick glass epoxy pre-preder GE A-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.). , Pressure 1.5MPa, heating and pressurizing time 60 minutes under press conditions The layers were integrated (Figure 2 (b)). Here, reference numeral 105 denotes plated copper, and reference numeral 107 denotes an insulating resin base material (pre-preda cured product). Furthermore, a 0.05 m chromium thin film 1.08 was formed on the surface of the PZT thin film by DC sputtering. Furthermore, a 20-meter metal layer 109 was formed on the surface by electrolytic copper plating (Fig. 2 (c)). A desired etching resist is formed on the surface of the substrate, an unnecessary copper metal layer is removed by etching using an aqueous ferric chloride solution, and a chromium metal layer is removed by etching using an aqueous ferricyanide force solution. And the first capacitor A pole pattern was formed (Fig. 2 (d)). Next, a resist with the desired pattern was formed, and the PZT thin film and the ruthenium thin film were etched away by RIE using CF ₄ gas (Fig. 2 (e)). Next, a desired etching resist is formed on the surface of the substrate, and unnecessary copper foil is removed by etching using an aqueous solution of ferric chloride to form a window hole having a diameter of 0.1 mm at a desired position. Using a ML505 GT carbon dioxide laser manufactured by Mitsubishi Electric Corporation at the hole locations, laser drilling 1-10 was performed under the conditions of an output power of 26 mJ, a pulse width of 100 s, and four shots (Fig. 2 (f )). After ultrasonic cleaning and removal of the resin residue carbonized with an alkali permanganate solution, a catalyst was applied, adhesion was promoted, and then electroless copper plating was performed to form a 0.5 im copper thin film. A desired plating resist 111 was formed on the surface of the substrate, copper electroplating was performed, and a metal layer for electrically connecting the inner circuit conductor and the conductor layer on the substrate surface was formed.

(Fig. 2 (g)). After stripping the plating resist, the copper thin film of 0.5 m on the substrate surface is removed by etching, and then, a desired etching resist is further formed, and an unnecessary copper metal layer is removed by etching with a ferric chloride solution. Thus, a circuit pattern including a second capacitor electrode was formed to produce a circuit board (FIG. 2 (h)).

The circuit surface of this circuit board was subjected to a roughening treatment with an organic acid-based microetching agent CZ-8100B (trade name, manufactured by MEC Corporation) as a pretreatment for multilayering adhesion. (1) 3 m thick copper foil MT35S3 (trade name, manufactured by Mitsui Kinzoku Mining Co., Ltd.) with 35 m carrier copper foil, (2) 100 / m thick glass epoxy prepreg with a filler, GEA-679F (Hitachi (3) Circuit board, (4) Insulating resin substrate 112, 100 m thick filler-filled glass epoxy prepreg GEA-679F, (5) 35 m carrier copper foil 3 ^ m thick copper foil MT35 S3 (Mitsui Metal Mining Co., Ltd., trade name) was layered in this order, and the temperature was 170, the pressure was 1.5MPa, and the heating and pressing time was 60 minutes. . After peeling off the carrier copper foil and cutting unnecessary substrate edges, a desired etching resist is formed on the surface of this substrate, and the unnecessary copper foil is removed by etching using a ferric chloride aqueous solution to obtain a desired portion. A window hole of φ θ. Laser holes were drilled in the window holes provided on the surface of this board using Mitsubishi Electric Corporation's ML505 GT type carbon dioxide laser under the conditions of an output power of 26 mJ, a pulse width of 100 2 s, and four shots. Was done. After ultrasonic cleaning and removal of resin residue carbonized with an alkali permanganate solution, a cleaning catalyst is applied, adhesion is promoted, and then electroless copper plating is performed.Approximately 20 electroless copper plating is applied to the inner wall of the laser hole and the copper foil surface. A layer was formed. An etching resist was formed on necessary parts such as pads and circuit patterns on the surface of this substrate, and unnecessary copper was removed by etching to form an outer layer circuit.

 A solder resist PSR-4000 AUS5 (Taiyo Ink Manufacturing Co., Ltd., trade name) was applied to the surface of the substrate 30 by a roll coater, dried, exposed and developed to form a solder resist 113 at a desired position. After that, 3 m of electroless nickel plating and 0.1 m of electroless gold plating were formed on the exposed surface of the outer circuit pattern to obtain a multilayer wiring board with built-in capacitors (Fig. 2 (i)). Example A-2

 A multilayer wiring board with a built-in capacitor was obtained by the same process as in Example A_1 except that the material A-2 for a multilayer wiring board with a built-in capacitor was changed to the material A-3 for a multilayer wiring board with a built-in capacitor. Example A-3

The surface of copper foil 102 of multilayer wiring board material with built-in capacitor A-3 was roughened with an organic acid-based micro-etching agent CZ-8100B (trade name, manufactured by MEC Corporation) as a pretreatment for multilayer bonding. (Figure 3 (a)). Using 0.2 mm thick double-sided copper foil-clad glass epoxy laminate MCL-E-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) as a base material, connecting holes and circuit patterns are The prepared double-sided substrate 104 was roughened with an organic acid-based micro-etching agent CZ-8100B (trade name, manufactured by Mec Co., Ltd.) as a pretreatment for multi-layer bonding, and then one surface was insulated. 100-meter-thick glass substrate 107 Insulates 18m thick copper foil GTS-18 (Furukawa Circuit Oil Co., Ltd.) through POXY Prepreda GEA-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) and the other side The above-mentioned material for a multilayer wiring board with a built-in capacitor is distributed via a resin epoxy material GEA-679F (trade name) manufactured by Hitachi Chemical Co., Ltd. The layers were integrated under a press condition of 1.5 MPa in pressure and 60 minutes in heating and pressing time (Fig. 3 (b)). Here, 105 is plated copper and 106 is filling resin. Further, a 0.05 m chromium thin film 108 was formed on the surface of the PZT thin film 101 by a DC sputtering method. After applying a catalyst to the surface and promoting adhesion, electroless copper plating was performed to form a copper thin film of 0.5. A desired plating resist was formed on the surface of the substrate, and copper electroplating was performed to form a metal layer 109 serving as a first capacitor electrode having a thickness of 20 m (FIG. 3 (c)). After removing the plating resist, the copper thin film of 0.5111 and the chromium thin film of 0.05 m on the substrate surface were removed by etching to form the first capacitor electrode pattern (Fig. 3 (d)). Subsequently, a resist of a desired pattern was formed, and the PZT thin film and the ruthenium thin film were removed by etching by RIE using CF ₄ gas (FIG. 3 (e)). Next, a desired etching resist is formed on the surface of the substrate, and unnecessary copper foil is removed by etching using an aqueous ferric chloride solution to form a window hole having a diameter of 0.1 mm at a desired position. Using a ML505 GT carbon dioxide laser manufactured by Mitsubishi Electric Co., Ltd. in the hole locations, laser drilling was performed on the condition of output power 26mJ, pulse width 100s, and 4 shots (Fig. 3 (ί)). . After ultrasonic cleaning and removal of resin residue carbonized with an alkali permanganate solution, a catalyst was applied, adhesion was promoted, and electroless copper plating was performed to form a copper thin film of 0. A desired plating resist 111 was formed on the surface of the substrate, and electroplating was performed, thereby forming a metal layer for electrically connecting the inner circuit conductor and the conductor layer on the substrate surface (FIG. 3 (g). )). After stripping the plating resist, the copper thin film of 0.5 on the substrate surface is etched away, and then a desired etching resist is formed, and an unnecessary copper metal layer is etched away with a ferric chloride solution. , A circuit board including the second capacitor electrode was formed to produce a circuit board (Fig. 3 (h)). Subsequent processing of the multilayer wiring board yielded a multilayer wiring board with a built-in capacitor through the same steps as in Example A-1 (FIG. 3 (i)). Here, 112 is an insulating resin base material, and 113 is a solder resist. Example A-4

The copper foil surface 102 of the multilayer wiring board material A-3 with a built-in capacitor was roughened with an organic acid-based micro-etching agent CZ-8100B (trade name, manufactured by Mec Co., Ltd.) as a pretreatment for multi-layer bonding. (Figure 4 (a)). Using 0.2 mm thick double-sided copper foil-clad glass epoxy laminate MCL-E-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) as a base material, connecting holes and circuit patterns are The prepared double-sided substrate 104 was subjected to a roughening treatment using an organic acid-based micro-etching agent CZ-8100B (trade name, manufactured by MEC Corporation) as a pretreatment for multi-layer bonding, and then one surface was insulated. As a resin base material 107, 18 m thick copper foil GTS—18 (Furukawa Saichi Kit Oil Co., Ltd.) via 100 / m thick glass epoxy prepredder GEA-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) On the other side, and a 100 m-thick glass epoxy prepreg GEA-679F (trade name, manufactured by Hitachi Chemical Co., Ltd., trade name) as an insulating resin substrate 107 on the other side. Arrange materials for board, temperature 170 ° C, pressure 1. Lamination and integration were performed under press conditions of 5 MPa and a heating and pressing time of 60 minutes (Fig. 4 (b)). Here, 105 is plated copper, and 106 is a filling resin. Furthermore, nano paste (Rima Chemical Co., Ltd.), a conductive paste that is metallized by a chemical reaction, is screen-printed at a desired location on the surface of the PZT thin film with a thickness of 40 m. Then, the substrate was baked at a temperature of 200 ° C for a heating time of 1 hour, and the conductive paste was metallized to form a first capacitor electrode pattern (Fig. 4 (c)). Subsequently, a resist having a desired pattern was formed, and the PZT thin film and the ruthenium thin film were removed by etching by RIE using CF ₄ gas. (Fig. 4 (d)). Next, a desired etching resist is formed on the surface of the substrate, and unnecessary copper foil is etched and removed using an aqueous ferric chloride solution to form a φ0.1 mm window hole at a desired position. Using a ML505 GT carbon dioxide laser manufactured by Mitsubishi Electric Corporation at the hole locations, laser drilling 110 was performed under the conditions of an output power of 26 mJ, a pulse width of 100 s, and four shots (Fig. 4 ( e)). After ultrasonic cleaning and removal of the resin residue carbonized with the alkali permanganate solution, a catalyst was applied, and after promoting adhesion, electroless copper plating was performed to form a copper thin film of 0.5 / zm. The desired plating resist 111 was formed on the surface of the substrate, and copper electroplating was performed to form a metal layer for electrically connecting the inner layer circuit conductor and the conductor layer on the substrate surface (FIG. 4 (f) )). After removing the resist, the copper thin film of 0.5 / zm on the substrate surface is removed by etching, and then a desired etching resist is formed, and the unnecessary copper metal layer is etched with a ferric chloride solution. After removal, a circuit pattern including a second capacitor electrode was formed to produce a circuit board (Fig. 4 (g)). Subsequent processing of the multilayer wiring board was performed in the same process as in Example A-1, and a multilayer wiring board with a built-in capacitor was obtained (FIG. 4 (h)).

Here, 1 12 is an insulating resin base material, and 1 13 is a solder resist.

 [0001]

Example A-5

The method of removing the PZT thin film and the ruthenium thin film using the material A-3 for the multilayer wiring board with a built-in capacitor is not the RIE method. Instead, the PZT thin film is 20% aluminum bifluoride (NH ₄ F-HF) ) A multilayer wiring board with a built-in capacitor was obtained by the same process as in Example A-1 except that the aqueous solution and ruthenium thin film were etched using a ruthenium etching solution REC-01 (Kanto Chemical Co., Ltd., trade name). (Fig. 2 (i)). Example A—6

Material for multilayer wiring board with built-in capacitor A—3 copper foil 102 surface, before multilayer bonding Roughening treatment was performed using an organic acid-based microetching agent CZ-8100B (trade name, manufactured by MEC Corporation) (Fig. 5 (a)). Using 0.2 mm thick double-sided copper foil-clad glass epoxy laminate MCL-E-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) The prepared double-sided substrate 104 was subjected to a roughening treatment using an organic acid-based micro-etching agent CZ-8100B (trade name, manufactured by MEC Corporation) as a pretreatment for multi-layer bonding. As a resin substrate 107, a copper foil GTS—18 (Furukawa Saichi Kit Oil Co., Ltd., product) with a thickness of 18 via glass epoxy prepreg GEA-679F (product name, manufactured by Hitachi Chemical Co., Ltd.) For the above-mentioned multilayer wiring board with built-in capacitor via a 100 m thick glass epoxy pre-predeer GEA-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) as an insulating resin substrate 107 on the other side. Distribute materials, temperature 170 ° C, pressure 1.5 The laminate was integrated under the pressing conditions of MPa and heating and pressing time of 60 minutes (Fig. 5 (b)). Here, 105 is plated copper, and 106 is a filling resin. Subsequently, a resist having a desired pattern is formed, and the PZT thin film is removed by etching using a 20% aqueous solution of ammonium bifluoride (NH ₄ F · HF). A ruthenium etching solution REC-01 (Kanto Chemical Co., Ltd. The PZT thin film was patterned by removing the ruthenium thin film by etching (Fig. 5 (c)). Next, a desired etching resist is formed on the surface of the substrate, and unnecessary copper foil is removed by etching using an aqueous solution of ferric chloride to form a window hole having a diameter of 0.1 mm at a desired position. Using a ML 505 GT carbon dioxide laser manufactured by Mitsubishi Electric Corporation at the window hole, laser drilling 110 was performed under the conditions of an output power of 26 mJ, a pulse width of 100 s, and four shots (Fig. 5 (d) )). After ultrasonic cleaning and removal of the resin residue carbonized with an alkali permanganate solution, a 0.05 m chromium thin film 108 was formed by DC sputtering. In addition, 20 metal layers 109 were formed on the surface by copper electroplating (Fig. 5 (e)). At this time, a copper metal layer was formed on the surface of the thin-film dielectric layer and inside the laser hole. A desired etching register is provided on the surface of the substrate. A first capacitor electrode and a second capacitor are formed by etching an unnecessary copper metal layer using an aqueous ferric chloride solution and etching away a chromium metal layer using a potassium ferricyanide aqueous solution. Circuit boards were fabricated by forming electrodes and other wiring patterns (Fig. 5 (f)). Subsequent processing of the multilayer wiring board was performed in the same process as in Example A-1, and a multilayer wiring board with a built-in capacitor was obtained (FIG. 5 (g)). Here, 112 is an insulating resin base material, and 113 is a solder resist. Example A-7

The copper foil surface 102 of the multilayer wiring board material A-3 with a built-in capacitor was roughened with an organic acid-based micro-etching agent CZ-8100B (trade name, manufactured by Mec Co., Ltd.) as a pretreatment for multi-layer bonding. (Fig. 6 (a)). Using 0.2 mm thick double-sided copper foil-clad glass epoxy laminate MCL-E-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) as a base material, connecting holes and circuit patterns are The prepared double-sided substrate 104 was subjected to a roughening treatment using an organic acid-based micro-etching agent CZ-8100B (trade name, manufactured by MEC Corporation) as a pretreatment for multi-layer bonding, and then one surface was insulated. As a resin base material 107, a 18 m thick copper foil GTS-18 (Furukawa Circuit Oil Co., Ltd., trade name) via a 100 m thick glass epoxy prepreg GEA-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) ) And on the other side as insulating resin substrate 107, through a 100-mm-thick glass epoxy pre-preda GEA-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) and the above-mentioned multilayer wiring board with a built-in capacitor. For materials, temperature 170, pressure 1.5 The laminate was integrated under the press conditions of MPa and heating and pressing time of 60 minutes (Fig. 6 (b)). Here, 105 is plated copper, and 106 is a filling resin. This prepreg is prepared by applying a 25 m thick polyethylene terephthalate (PET) film on both sides by hot pressing at a temperature of 100 ° C, a pressure of 1.5 MPa, and a heating and pressing time of 10 minutes. After drilling the desired location, screen printing In this method, copper paste NF 2000 (Tatsuyu System Electronics Co., Ltd., trade name) 116 was used, and the PET film on the surface was peeled off. A 0.05-m thick chromium thin film 108 was formed on the PZT thin film surface of this substrate by DC sputtering. Furthermore, a 20-meter metal layer 109 was formed on the surface by electrolytic copper plating (Fig. 6 (c)). A desired etching resist is formed on the surface of the substrate, an unnecessary copper metal layer is removed using an aqueous ferric chloride solution, and a chromium metal layer is removed using an aqueous potassium ferricyanide solution. Thus, a first capacitor electrode pattern was formed (FIG. 6 (d)). Subsequently, a resist with a desired pattern was formed, and the PZT thin film and the ruthenium thin film were etched away by RIE using CF ₄ gas (Fig. 6 (e)). Next, a desired etching resist is formed on the surface of the substrate, an unnecessary copper metal layer is removed by etching with a ferric chloride solution, and a circuit pattern including a second capacitor electrode is formed. A circuit board was fabricated (Fig. 6 (ί)). Subsequent application of the multilayer wiring board yielded a multilayer wiring board with a built-in capacitor in the same process as in Example II-1 (FIG. 6 (g)). Here, 1 12 is an insulating resin base material, and 1 13 is a solder resist. Example A-8

The copper foil surface 102 of the multilayer wiring board material A-3 with a built-in capacitor was roughened with an organic acid-based micro-etching agent CZ-8100B (trade name, manufactured by Mec Co., Ltd.) as a pretreatment for multi-layer bonding. (Figure 7 (a)). Using 0.2 mm thick double-sided copper foil-clad glass epoxy laminate MCL-E-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) as a base material, connecting holes and circuit patterns are The prepared double-sided substrate 104 was roughened with an organic acid-based micro-etching agent CZ-8100B (trade name, manufactured by MEC Corporation) as a pretreatment for multi-layer bonding. Through glass epoxy prepreg GEA-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) with a thickness of 100 m as an exquisite resin base material 107 Then, a copper foil GTS-18 with a thickness of 18 (Furukawa Sakitoff Oil Co., Ltd., trade name) and a 100 m-thick glass epoxy pre-predeer GEA-679F as an insulating resin substrate 107 on the other surface (Made by Hitachi Chemical Co., Ltd.), the above-mentioned material for a multilayer wiring board with a built-in capacitor was arranged, and laminated and integrated under pressing conditions of a temperature of 200, a pressure of 1.5 MPa, and a heating and pressing time of 60 minutes ( Figure 7 (b). In addition, 105 is copper plating and 106 is filling resin. This prepreder is a 25 m thick polyethylene terephthalate (PET) film attached on both sides by a hot press with a temperature of 100 ° C, a pressure of 1.5 MPa, and a heating and pressing time of 10 minutes. Is filled with a conductive paste that is metallized by a chemical reaction, 117, a nanopaste (VJ Ma Kasei Co., Ltd., trade name), and then PET on the surface. The one from which the film was peeled was used. The subsequent processing of the capacitor and the processing of the multilayer wiring board were performed in the same steps as in Example A-1, and a multilayer wiring board with a built-in capacitor was obtained (Fig. 7 (c)). Reference numeral 112 denotes an insulating resin substrate, and reference numeral 113 denotes a solder resist. Comparative Example A-1

A 100 m thick glass epoxy prepreg GE A—679 F (Hitachi Chemical Co., Ltd.) based on a 0.2 mm thick double-sided copper foil clad glass epoxy laminate MCL—E—679 F (trade name, manufactured by Hitachi Chemical Co., Ltd.) Using a trade name (manufactured by Kogyo Co., Ltd.), a 0.2 m ruthenium thin film was formed by DC sputtering on the surface of a four-layer substrate in which conductive holes and circuit patterns were formed at desired locations. 8 (a)). Here, 102 is a copper foil, 105 is a plated copper, 106 is a filling resin, and 107 is a non-greasy base material. A resist having a desired pattern is formed, the ruthenium thin film 103 is removed by etching by RIE, and then the copper metal layer on the inner substrate surface is removed by etching using an aqueous ferric chloride solution, and the second capacitor electrode is removed. A circuit pattern was formed (Fig. 8 (b)). In addition, a ferroelectric substance The thin film forming material PZT (Kanto Chemical Co., Ltd., trade name) was applied and pre-baked at a temperature of 150 ° C for a heating time of 30 minutes. The application and pre-bake were repeated five more times. Thereafter, a heat treatment was performed at a temperature of 250 ° C for 1 hour to form a PZT thin film 101 having a thickness of 5 m (Fig. 8 (c)). Further, a 0.05 m chromium thin film was formed on the surface of the PZT thin film by DC sputtering. Furthermore, a metal layer 109 of 20 m was formed on the surface by electroplating copper (Fig. 8 (d)). A desired etching resist is formed on the surface of the substrate, an unnecessary copper metal layer is etched and removed using a ferric chloride aqueous solution, and a chromium metal layer is etched and removed using a potassium ferricyanide aqueous solution. A circuit board was fabricated by forming the pattern of the capacitor electrode in Fig. 1 (Fig. 8 (e)). Subsequent processing of the multilayer wiring board yielded a multilayer wiring board with a built-in capacitor through the same steps as in Example A_1 (FIG. 8 (f)). Here, 112 is an insulating resin base material, and 113 is a solder resist. The test method is as follows.

 (Dielectric thickness)

 The dielectric film thickness was measured by cutting the capacitor with the electrodes formed using a Focused Ion Bearn system (FIB: FB-2000A, manufactured by Hitachi, Ltd., trade name). The measurement was performed using a microscope, and the five-point average of the distance between the electrodes sandwiching the membrane was taken.

(Relative permittivity)

 The relative permittivity was obtained by measuring at a frequency of 1 MHz according to IPC-650 2.5.5.2 in a temperature controlled environment of 25 ° C.

(Capacitor capacity)

The capacitance of the capacitor is measured by the impedance analyzer 4291 B (Agilent Noology Co., Ltd., trade name) connected to a high frequency signal measurement probe MI CROPROBE ACP 50 (GSG250, Cascade, trade name) via a 50Ω coaxial cable SUCOFLEX104 / 100 (SUHNER, trade name). A measurement system was used. The electrode size of the capacitor was 1 mm and the capacity of 1 GHz was measured. The number of measurement samples was 5. table 1

実施例 A_ 1〜A— 8は、 いずれも、 金属箔の表面に比誘電率が 10〜20 00でかつ膜厚が 0. 05〜2^mの誘電体薄膜が設けられたことを特徴とす るコンデンサ内蔵多層配線板用材料を用いて作製したコンデンサ内蔵基板であ る。 作製したコンデンサ容量のばらつきは全て ± 10%未満であり、 均一で良 好なコンデンサを作製することができた。

Examples A_1 to A-8 are all characterized in that a dielectric thin film having a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 ^ m is provided on the surface of the metal foil. This is a substrate with built-in capacitors manufactured using the material for multilayer wiring boards with built-in capacitors. Variations in the capacitance of the manufactured capacitors were all less than ± 10%, and uniform and good capacitors could be manufactured.

Further, Comparative Example A-1 is a capacitor built-in substrate in which a dielectric thin film is formed on the surface of a substrate on which a metal layer is patterned, so that the film thickness varies greatly. As a result, the variation of the capacitor capacitance was as large as 54% at the maximum.

 According to the above-described embodiment, according to the present invention, a multilayer wiring having a capacitor having a dielectric constant of 20 to 2000, a film thickness of 0.1 to lm, and a small capacitance variation is provided. Board can be provided.

(Example B)

Inner substrate B— 1

 Drill a desired hole (diameter 200 xm) in a double-sided copper foil-clad glass epoxy laminate MCL—E-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) with a copper foil thickness of 3 zm and a thickness of 0.2 mm. went. After removing the carbonized resin residue from the substrate using ultrasonic cleaning and alkali permanganate solution, applying a catalyst and promoting adhesion, electroless copper plating was performed, and the inner wall of the drill hole and the copper foil surface were removed. Then, an electroless copper plating layer 204 of about 15 / m was formed. The surface of the obtained substrate was subjected to a roughening treatment by a blackening treatment containing sodium hypochlorite as a main component and a reduction treatment containing dimethylaminoporan as a main component. Then, paste-type thermosetting insulating material HRP-700 BA (manufactured by Taiyo Ink Mfg. Co., Ltd., trade name) is filled into the drilled holes of this board by screen printing as filling resin 203, and heat treatment is performed at 170 ° C for 60 minutes. And cured. This substrate was polished with a puff brush to remove excess insulating material. After applying a catalyst to this substrate and promoting adhesion, electroless copper plating is performed, about 15 electroless copper plating layers are formed on the substrate surface, and via holes are provided inside the substrate to connect conductive layers, and A substrate having a smooth metal layer on the surface was produced. The surface roughness of the metal layer on the substrate surface determined from an image observed with a scanning electron microscope was 0.3 nm. FIG. 9 shows a cross-sectional view of the manufactured inner layer substrate. Here, 202 indicates an insulating resin base material, and 201 indicates a copper foil. Inner substrate B-2

200 / m-thick glass epoxy prepredder GEA—679 F (Hitachi Chemical A 25 im thick polyethylene terephthalate (PET) film is applied on both sides of a hot press under the conditions of a temperature of 100 ° C, a pressure of 1.5 MPa, and a heating and pressing time of 10 minutes. I attached. After performing a desired drilling (diameter 200 m) on the pre-preda, a copper paste NF 20000 (trade name, manufactured by Tatta System Electronics Co., Ltd.) 205 was filled by screen printing. Peel off the PET film on the surface and sandwich it between both sides with 18 m thick copper foil GTS-18 (trade name, manufactured by Furukawa Circuit Oil Co., Ltd.), temperature 170 ° C, pressure 1.5MPa, heating and pressing time 60 The substrate was laminated and integrated under the same press conditions to produce a substrate having a via hole inside the substrate for connecting the conductor layers and having a smooth metal layer on the surface. The surface roughness of the metal layer on the substrate surface determined from images observed with a scanning electron microscope was 0.2 ^ m. FIG. 10 shows a cross-sectional view of the manufactured inner layer substrate. Inner layer substrate B-3

200 m thick glass epoxy pre-predator GEA-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) 25 m thick polyethylene terephthalate (PET) film on both sides at a temperature of 100 ° C and a pressure of 1.5 It was pasted by a hot press under the conditions of MPa, heating and pressurizing time of 10 minutes. After making the desired drilling (diameter 200 ^ m) in this pre-preda, nano paste (manufactured by Harima Chemicals Co., Ltd.) which is a conductive paste that is metallized by chemical reaction by screen printing 206) was filled. Peel off the PET film on the surface and sandwich it between both sides with 18 m thick copper foil GTS-18 (Furukawa Circuit Oil Co., Ltd., trade name), temperature 170, pressure 1.5MPa, pressurization time 60 minutes Then, a substrate having via holes for connecting conductive layers inside the substrate and having a smooth metal layer on the surface was manufactured. The surface roughness of the metal layer on the substrate surface determined from the image observed with a scanning electron microscope was 0. A cross-sectional view of the fabricated inner layer substrate is shown in FIG. Example B-1

A 0.2 m ruthenium thin film 207 was formed on the surface of the inner substrate B-1 by DC sputtering (FIG. 12 (a)). In addition, a microwave plasma CVI using titanium tetraisopropoxide, zircon tetratertiary butoxide, dipivaloyl methane lead complex, and nitrogen dioxide on the substrate surface. of? Two (lead zirconate titanate) thin films 208 were formed (Fig. 12 (b)). Further, a 0.05 m chromium thin film 209 was formed on the PZT thin film surface by a DC sputtering method. Furthermore, a two-layered metal layer 210 was formed on the surface by copper electroplating (Fig. 12 (c)). A desired etching resist is formed on the surface of the substrate, an unnecessary copper metal layer 210 is removed by etching using an aqueous ferric chloride solution, and a chromium metal layer 209 is removed by etching using a potassium ferricyanide aqueous solution. Thus, a pattern of the first capacitor electrode 217 was formed (FIG. 12D). Subsequently, a resist having a desired pattern was formed, and the PZT thin film 208 and the ruthenium thin film 207 were etched away by RIE using CF ₄ gas (FIG. 12 (e)). Next, a desired etching resist is further formed, an unnecessary copper metal layer is removed by etching with a ferric chloride solution, and a circuit pattern including the second capacitor electrode 218 is formed to form a multilayer wiring with a built-in capacitor. An inner layer plate 219 used for the plate was produced (FIG. 12 (f)).

The circuit surface of the inner layer plate was subjected to a roughening treatment by a blackening treatment mainly containing sodium hypochlorite and a reduction treatment mainly containing dimethylaminoporan. (1) 35-thick copper foil with 35 carrier copper foil MT35 S3 (trade name, manufactured by Mitsui Kinzoku Mining Co., Ltd.), (2) Insulating resin base material 2 1 1 100 m thick glass-filled glass epoxy Pre-Preda GE A—679 F (trade name, manufactured by Hitachi Chemical Co., Ltd.), (3) Inner plate 219, (4) Insulating resin substrate 2 1 1 100 m thick glass epoxy containing filler Pre-Preda GEA—679 F, (5) 35 m Copper foil with carrier Copper foil of thickness 3 MT 35 S 3 (Mitsui Metal Mining Co., Ltd., trade name) layered in this order, temperature 170 ° C, pressure 1.5MPa, heating and pressurizing time 60min. Laminated and integrated. After peeling off the carrier copper foil and cutting the unnecessary edge of the substrate, a desired etching resist is formed on the surface of this substrate, the unnecessary copper foil is removed by etching, and a window hole having a diameter of 0.15 mm is formed at a desired position. Formed. Laser holes were drilled in the window holes provided on the substrate surface using a ML 505 GT type carbon dioxide laser manufactured by Mitsubishi Electric Corporation under the conditions of an output power of 26 mJ, a pulse width of 100 Ms, and four shots. . After ultrasonic cleaning and removal of resin residue carbonized with an alkali permanganate solution, cleaning, application of a catalyst, and adhesion promotion, electroless copper plating is performed, and approximately 20 m of electroless copper plating is applied to the inner wall of the laser hole and the copper foil surface. An adhering layer was formed. An outer layer circuit 213 was formed by forming an etching resist on a required portion such as a pad and a circuit pattern on the surface of the substrate, and removing unnecessary copper by etching.

 Apply a solder resist PSR-4000 AUS 5 (trade name, manufactured by Taiyo Ink Mfg. Co., Ltd.) on the surface of the substrate for 30 m by mouth and mouth, and then dry and expose. * Image and solder resist at desired locations 212 Was formed. After that, electroless nickel plating 3 and electroless gold plating of 0.1 m were formed on the surface layer of the exposed portion of the outer circuit pattern to obtain a multilayer wiring board 220 with a built-in capacitor (FIG. 4 (g)). Example B-2

 A multilayer wiring board with a built-in capacitor was obtained in the same manner as in Example B-1, except that the inner substrate B-1 was changed to the inner substrate B-2. Example B-3

A multilayer wiring board with a built-in capacitor was obtained in the same process as in Example B-1, except that the inner substrate B-1 was changed to the inner substrate B-3. Example B-4 A 0.2 m ruthenium thin film 207 was formed on the surface of the inner substrate B-1 by DC sputtering (FIG. 12 (a)). Further, a ferroelectric thin film forming material PZT (trade name, manufactured by Kanto Chemical Co., Ltd.) was applied to the surface of the substrate, and prebaked at a temperature of 150 ° C for a heating time of 30 minutes. The application and pre-bake were repeated five more times, followed by heat treatment at a temperature of 250 ° C for a heating time of 1 hour to form a 0.5 m thick PZT thin film 208 (Fig. 12 (b) ). Subsequent processing of the capacitor and processing of the multilayer wiring board were performed in the same steps as in Example B-1, and a multilayer wiring board with a built-in capacitor was obtained (FIG. 12 (g)). Example B-5

The method of removing the PZT thin film 208 and the ruthenium thin film 207 by etching is not the RIE method, but a 20% by weight aqueous solution of ammonium bifluoride (NH ₄ F-HF) for the PZT thin film and the ruthenium etching solution REC—for the ruthenium thin film. A multilayer wiring board with a built-in capacitor was obtained by the same process as in Example B-4 except that etching was performed using 01 (manufactured by Kanto Chemical Co., Ltd., trade name) (Fig. 12 (g)). Example B-6

 A 0.2 m ruthenium thin film 207 was formed on the surface of the inner substrate B-1 by DC sputtering (FIG. 13 (a)). Further, a ferroelectric thin film forming material PZT (trade name, manufactured by Kanto Chemical Co., Ltd.) was applied to the surface of the substrate, and prebaked at a temperature of 150 ° C. for a heating time of 30 minutes. The application and pre-bake were repeated five more times, and then heat treatment was performed at a temperature of 250 ° C for 1 hour to form a 0.5-m thick PZT thin film 208 (Fig. 13 (b) ). Further, a 0.05 / m chromium thin film 209 was formed on the surface of the PZT thin film by DC sputtering. After cleaning the surface, applying a catalyst and promoting adhesion, electroless copper plating was performed to form a 0.5 m copper thin film.

A desired plating resist 215 is formed on the surface of this substrate, and electroplating is performed. Then, a metal layer 214 serving as a first capacitor electrode having a thickness of 20 / m was formed (FIG. 13 (c)). After removing the plating resist 215, the 0.5 m copper thin film and the 0.05 m chromium thin film on the substrate surface were removed by etching to form the pattern of the first capacitor electrode 217 (Fig. 13 (d)). . Subsequently, a resist having a desired pattern is formed, and the PZT thin film 208 is removed by etching using a 20% by weight aqueous solution of ammonium bifluoride (NF'HF), and a ruthenium etching solution REC-01 (Kanto Chemical Co., Ltd.) Ruthenium thin film 207 was removed by etching (Fig. 13 (e)). Next, a desired etching resist is further formed, an unnecessary copper metal layer is removed by etching with a ferric chloride solution, and a circuit pattern including the second capacitor electrode 218 is formed to form the inner plate 219. It was fabricated (Fig. 13 (f)). Subsequent processing of the multilayer wiring board was performed in the same process as in Example B-1 to obtain a multilayer wiring board 220 with a built-in capacitor (FIG. 13 (g)). Example B-7

A 0.2 m ruthenium thin film 207 was formed on the surface of the inner substrate B-1 by DC sputtering (FIG. 14 (a)). Further, a ferroelectric thin film forming material PZT (trade name, manufactured by Kanto Chemical Co., Ltd.) was applied to the substrate surface, and prebaked at a temperature of 150 ° C for a heating time of 30 minutes. The application and pre-bake were repeated five more times, followed by a heat treatment at a temperature of 250 ° C. for a heating time of 1 hour to form a 5 m-thick PZT thin film 208 (FIG. 14 (b)). Furthermore, nano-paste 216, a conductive paste that is metallized by a chemical reaction at a desired position on the surface of the PZT thin film by screen chemical printing (trade name, manufactured by Hachiriima Kasei Co., Ltd.) with a thickness of 40 m, Then, baking was performed at a temperature of 200 ^nC for a heating time of 1 hour, and the conductive paste was metallized to form a pattern of the first capacitor electrode 217 (FIG. 14 (c)). Subsequently, a resist having a desired pattern is formed, and the PZT thin film is etched and removed using a 20% by weight aqueous solution of ammonium bifluoride (NH ₄ F'HF), and a ruthenium etching solution REC-01 (Kanto Chemical Co., Ltd.) Made by company, The ruthenium thin film was removed by etching (product name) (Fig. 14 (d)). Next, a desired etching resist is further formed, an unnecessary copper metal layer is removed by etching with a ferric chloride solution, and a circuit pattern including the second capacitor electrode 218 is formed to form the inner layer plate 219. It was fabricated (Fig. 14 (e)). Subsequent processing of the multilayer wiring board was performed in the same process as in Example B-1 to obtain a multilayer wiring board 220 with a built-in capacitor (FIG. 14 (Π). Example Β-8)

A 0.2 m ruthenium thin film 207 was formed on the surface of the inner layer substrate 1 by DC sputtering (FIG. 15 (a)). Further, a ferroelectric thin film forming material PZT (trade name, manufactured by Kanto Chemical Co., Ltd.) was applied to the substrate surface, and prebaked at a temperature of 150 ° C for a heating time of 30 minutes. The coating and prebaking were repeated five more times, and then a heat treatment was performed at 250 at a heating time of 1 hour to form a 0.5 m thick PZT thin film 208 (Fig. 15 (b)). . Subsequently, a desired resist pattern is formed, and the PZT thin film 208 is removed by etching using a 20% by weight aqueous solution of ammonium bifluoride (NF / HF). The PZT thin film was patterned by etching the ruthenium thin film using a company (trade name) (Fig. 15 (c)). A 0.05 zm chromium thin film 209 was formed on the PZT thin film surface by DC sputtering. Furthermore, a 20-meter metal layer 210 was formed on the surface by copper electroplating (Fig. 15 (d)). A desired etching resist is formed on the surface of this substrate, an unnecessary copper metal layer is removed by etching using an aqueous ferric chloride solution, and a chromium metal layer is removed by etching using an aqueous potassium ferricyanide solution. The first capacitor electrode 217, the second capacitor electrode 218, and other wiring patterns were formed to produce an inner layer plate 219 (FIG. 15 (e)). Subsequent processing of the multilayer wiring board was performed in the same process as in Example B-1, to obtain a multilayer wiring board 220 with a built-in capacitor (FIG. 15 (f)). Comparative Example B-1

 A 0.2 m ruthenium thin film 207 was formed on the surface of the inner substrate B-1 by DC sputtering (FIG. 16 (a)). A resist having a desired pattern is formed, the ruthenium thin film 207 is etched and removed by RIE, and then the copper metal layer on the inner substrate surface is etched and removed using an aqueous ferric chloride solution, and the second capacitor electrode 218 is included. A circuit pattern was formed (Fig. 16 (b)). Furthermore, a ferroelectric thin film forming material PZT (trade name, manufactured by Kanto Chemical Co., Ltd.) was applied to the substrate surface, and prebaked at a temperature of 150 ° C for a heating time of 30 minutes. The application and pre-bake were repeated five more times, and then a heat treatment was performed at a temperature of 250 ° C for a heating time of 1 hour to form a PZT thin film 208 having a thickness of 0.5 m (Fig. 16 (c)). Further, a 0.05 zm chromium thin film 209 was formed on the surface of the PZT thin film by DC sputtering. Furthermore, a 20 urn metal layer 210 was formed on the surface by copper electroplating (Fig. 16 (d)). A desired etching resist is formed on the surface of the substrate, an unnecessary copper metal layer is etched and removed using an aqueous ferric chloride solution, and a chromium metal layer is etched and removed using an aqueous potassium ferricyanide solution. An inner layer plate 219 was formed by forming a pattern of the first capacitor electrode 217 (FIG. 16 (e)). Subsequent processing of the multilayer wiring board yielded a multilayer wiring board 220 with a built-in capacitor by the same steps as in Example B-1 (FIG. 16 (f)). With respect to the multilayer wiring board with a built-in capacitor obtained as described above, tests were performed on the dielectric film thickness, non-dielectric constant, and capacitor capacity. The test method is the same as described above.

Table 2 summarizes the results of these measurements. Table 2

実施例8— 1〜8 _ 8は、 いずれも、 基板内部に導体層間を接続するバイァ ホールを有し， かつ表面に平滑な金属層を有する基板の表面に比誘電率が 1 0 〜2 0 0 0でかつ膜厚が 0 . 0 5〜 2 mの誘電体薄膜を形成することにより 作製したコンデンサ内蔵基板である。 作製したコンデンサ容量のばらつきは全 て ± 1 0 %未満であり、 均一で良好なコンデンサを作製することができた。 また、 比較例 B— 1は、 誘電体薄膜を金属層がパターニングされた基板の表 面に形成されたコンデンサ内蔵基板であるために、 膜厚のばらつきが大きく、 結果としてコンデンサ容量のばらつきも最大 5 4 %と大きかった。

In all of Examples 8-1 to 8-8, the dielectric constant was 10 to 20 on the surface of the substrate having via holes for connecting conductive layers inside the substrate and having a smooth metal layer on the surface. This is a capacitor built-in substrate manufactured by forming a dielectric thin film having a thickness of 0.00 and a thickness of 0.05 to 2 m. Variations in the capacitance of the manufactured capacitors were all less than ± 10%, and uniform and good capacitors could be manufactured. In Comparative Example B-1, since the dielectric thin film was a substrate with a built-in capacitor formed on the surface of the substrate on which the metal layer was patterned, the thickness variation was large, and as a result, the variation in the capacitor capacitance was also maximum. It was as large as 54%.

 According to the above embodiment, it is possible to provide a multilayer wiring board with a built-in capacitor having a built-in capacitor having a uniform film thickness and a small variation in capacitance.

(Experimental example C)

Material for multilayer wiring board with built-in capacitor C-1 Rolled copper foil M—BNH—18 (manufactured by Mitsui Mining & Smelting Co., Ltd., trade name) with a thickness of 35 ^ m. Furthermore, a ferroelectric thin film forming material PZT (Kanto Kagaku Co., Ltd., trade name) was applied to the surface, and pre-baking was performed at a temperature of 150 ° C for a heating time of 30 minutes. The application and pre-bake are repeated five more times, and then heat treatment is performed at 350 ° C for 1 hour to obtain a thickness of 0.5 1! 1. Two thin films 101 were formed. Thus, a material C-11 for a multilayer wiring board with a built-in capacitor in which a PZT thin film 101 (dielectric thin film) was provided on one side of a copper foil 2 (metal foil) 102 via a ruthenium thin film 103 (FIG. 1). The relative dielectric constant of the PZT thin film thus obtained was 100. Material for multilayer wiring board with built-in capacitor C-1

 A 0.2 m ruthenium thin film 103 was formed on the surface of a rolled copper foil M-BNH-18 (trade name, manufactured by Mitsui Mining & Smelting Co., Ltd.) 102 having a thickness of 35 by DC sputtering. In addition, the surface is subjected to microwave plasma CVD using titanium tetraisopropoxide, zircon tetratert-butoxide, dipivaloyl methane lead complex, and nitrogen dioxide at a substrate temperature of 350 ° C. 0.5 of 111? Two (lead zirconate titanate) thin films 101 were formed to obtain a material C-12 for a multilayer wiring board with a built-in capacitor. The relative permittivity of the PZT thin film thus obtained was 70. Thin film etchant 1

Echirenjiamin tetraacetate 'disodium salt (EDTA · 2Na), hydrogen peroxide (H ₂ 〇 _2), were mixed with water, EDTA' to 2Na 0. lmo l / l, and H ₂ 〇 ₂ 30 wt% and component pH4 An aqueous solution was prepared. Thin film etchant 2 Iminoni acetate _{(I DA), H 2 0} 2, a mixture of water, to produce a pH 2. 0 of the aqueous solution to I DAO. Lmo l / l, H 2 0 2 3 Owt% of component. Thin film etchant 3

Echirenjiamin tetraacetic disodium salt (EDTA-2Na), H ₂ 〇 _2, were mixed with water, EDTA '2Na O. 011110 1 Bruno 1; _«2 0 ₂ 10 1:.% Of an Ingredient PH4 2 Was prepared. Thin film etchant 4

Phosphoric acid, H ₂ 〇 _2, water were mixed to prepare an aqueous solution of phosphoric acid 3 OWT%, and H ₂ 0 ₂ 2 OWT% of component. Thin film etchant 5

Sulfuric acid, H ₂ 0 _2, water were mixed to prepare an aqueous solution of sulfuric acid 5 wt%, the H ₂ 0 ₂ 1 Owt% and component. Experimental example C-1

Material for multilayer wiring board with built-in capacitor C-11 Surface roughening treatment with organic acid microetching agent CZ—810 OB (Mec Co., Ltd.,-trade name) as a pre-layering adhesion treatment went. In FIG. 17, the copper foil is shown as 303, the ruthenium thin film is shown as 302, and the PZT thin film 301 is shown. The copper foil 303 has a surface of 18 m in thickness through a 100 im thick glass epoxy pre-preda GEA-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) that becomes an insulating resin substrate 304 (insulating material) on the surface. Copper foil 5GTS—18 (Furukawa Circuit Oil Co., Ltd., trade name) 305, laminated at a temperature of 170 ° C, pressure of 1.5MPa, and heating and pressing time of 60 minutes to obtain a board and obtain a substrate (See Fig. 17 (a)). Furthermore, a 0.05 m chromium film 306 is formed on the surface of the PZT thin film 301 by DC sputtering. did. Next, a dry film resist H-9030 (trade name, manufactured by Hitachi Chemical Co., Ltd.) is laminated on the surface of the copper foil 305 of the substrate, exposed to a desired negative pattern, developed with an aqueous sodium carbonate solution, An etching resist was formed. Next, unnecessary copper foil was removed by etching using an aqueous solution of ferric chloride to form a window hole 307 having a diameter of θ 1 mm at a desired location, and the resist was removed with an aqueous solution of sodium hydroxide (see FIG. 2 ( b)). Subsequently, laser drilling 308 was performed at the window hole 307 using an ML 505 GT carbon dioxide laser manufactured by Mitsubishi Electric Corporation under the conditions of an output power of 26 mJ, a pulse width of 100 us, and four shots ( (See Fig. 17 (c)). After that, the resin residue carbonized by ultrasonic cleaning and alkali permanganate solution was removed, a catalyst was applied, adhesion was promoted, and then electroless copper plating was performed to form a 0.5 urn copper thin film on the surface of the substrate. Further, electrolytic copper plating was performed on the surface of the substrate to form a metal layer made of plated copper 309 for electrically connecting the inner layer circuit conductor and the conductor layer on the substrate surface (see FIG. 17 (d)). Subsequently, a 30 m-thick dry film resist H-9030 (trade name, manufactured by Hitachi Chemical Co., Ltd.) is laminated on the surface of the substrate, exposed to a desired negative pattern, developed with an aqueous sodium carbonate solution, and etched. A resist was formed. Further, after the unnecessary adhered copper 309 is removed by etching using an aqueous ferric chloride solution, the resist is stripped off using an aqueous sodium hydroxide solution, and the chromium film 306 is etched and removed using an aqueous potassium ferricyanide solution. A capacitor electrode (metal layer) 310 pattern was formed (see FIG. 18 (a)). Next, a 40-im-thick dry film resist H—9040 (trade name, manufactured by Hitachi Chemical Co., Ltd.), which becomes the etching resist 311, is laminated on the first capacitor electrode 310 side of this substrate (see FIG. 18 (b)), the desired negative pattern was exposed and developed with an aqueous sodium carbonate solution to form an etching resist 311 on the first capacitor electrode 310 (see FIG. 18 (c)). . Subsequently, the PZT thin film 301 was etched away at 20 ° C using a thin film etchant (1), and the ruthenium thin film 302 was removed using a ruthenium etching solution REC-01 (Kanto Chemical Co., Ltd., trade name). Remove by etching (Fig. 18 (d) ), And the etching resist 311 was removed with an aqueous sodium hydroxide solution (see FIG. 18E). A dry film resist H-9040 (trade name, manufactured by Hitachi Chemical Co., Ltd.) was laminated on the substrate, exposed to a desired negative pattern, and developed with an aqueous solution of sodium carbonate to form an etching resist. Subsequently, after unnecessary copper foil 303, unnecessary copper foil 305 and plated copper 309 thereon are removed by etching with an aqueous ferric chloride solution, the resist is peeled off with an aqueous sodium hydroxide solution to form copper foil 303. A circuit board including the second capacitor electrode 312 was formed to produce a circuit board (see FIG. 19 (a)).

The circuit surface of this circuit board was subjected to a roughening treatment with an organic acid-based microetching agent CZ-8100B (trade name, manufactured by MEC Corporation) as a pretreatment for multilayering adhesion. (1) 3 / xm thick copper foil with 35 m carrier copper foil MT 35 S3 (trade name, manufactured by Mitsui Kinzoku Mining Co., Ltd.), (2) Glass epoxy prepreader GEA—679 F (manufactured by Hitachi Chemical Co., Ltd., trade name), (3) circuit board, (4) glass epoxy pre-preda with filler 100 m thick GEA_679F, (5) 3 m thick copper with 35 m carrier copper foil Foil MT 35 S 3 (made by Mitsui Kinzoku Mining Co., Ltd., trade name) in the order of 170 ° (pressure 1.5MPa, heating and pressurizing time 60min. A copper foil 314 was laminated on both sides of the board via an insulating resin substrate 313. The carrier copper foil was peeled off, and unnecessary board edges were cut off (see FIG. 19 (b)). Laminate Life-Ilm Resist H-9030 (trade name, manufactured by Hitachi Chemical Co., Ltd.) and expose the desired negative pattern. Developed with an aqueous solution of acid sodium to form an etching resist Next, unnecessary copper foil 314 was removed by etching using an aqueous solution of ferric chloride to form a 0.15 mm window hole at a desired location. Using a ML 505 GT type carbon dioxide laser manufactured by Mitsubishi Electric Corporation at the window holes provided on the surface of this circuit board, the output power was 26 mJ, the pulse width was 100 Ms, and the number of shots was four. (Refer to Fig. 19 (c).) After ultrasonic cleaning and removal of resin residue carbonized with an alkaline permanganate solution, a cleaning catalyst was applied, and After promoting the deposition, electroless copper plating was performed, and about 20 layers of electroless copper with copper were formed on the inner wall of the laser hole and the copper foil surface. A dry film resist H-9030 (trade name, manufactured by Hitachi Chemical Co., Ltd.) is used to form an etching resist on necessary parts such as pads and circuit patterns on the circuit board surface, and unnecessary copper is removed by etching. Then, an outer layer circuit formed of copper foil 314 and plated copper 315 was formed (see FIG. 19 (d)).

 Apply a solder resist PSR-4000 AUS 5 (manufactured by Taiyo Ink Manufacturing Co., Ltd.) on the surface of this circuit board 30 times with a roll coater, dry and expose and develop to form a solder resist 316 at desired locations did. Then, 3 βπι electroless nickel plating and 0.1 m electroless gold plating (Ni / Au plating 3 17) are formed on the surface layer of the exposed portion of the outer circuit pattern to obtain a multilayer wiring board with a built-in capacitor. (See Fig. 19 (e)). Experimental example C-1 2

 A multilayer wiring board with a built-in capacitor was obtained in the same process as in Experimental example C-11, except that the material C-11 for the multilayer wiring board with a built-in capacitor was replaced with the material C-2 for the multilayer wiring board with a built-in capacitor. Experimental example C-1 3

 A multilayer wiring board with a built-in capacitor was obtained by the same process as in Experimental Example C-1, except that the thin film etchant (1) was replaced with the thin film etchant (2). Experimental example C-1 4

A multilayer wiring board with a built-in capacitor was obtained in the same process as in Experimental Example C-11, except that the thin film etchant (1) was replaced with the thin film etchant (3) and used at 30 ° C. Experimental example C-1 5 A multilayer wiring board with a built-in capacitor was obtained in the same process as in Experimental example C-11, except that the thin film etchant (1) was replaced with the thin film etchant (4). Experimental example C-6

 A multilayer wiring board with a built-in capacitor was obtained in the same process as in Experimental Example C-11, except that the thin film etchant (1) was replaced with the thin film etchant (5). Experimental example C-1 7

The surface of the copper foil 303 of C-11, a material for multilayer wiring boards with built-in capacitors, was roughened with an organic acid-based microetching agent CZ_8100B (trade name, manufactured by MEC Corporation) as a pretreatment for multi-layer bonding. This copper foil 303 has a thickness of 18 through a 100 m thick glass epoxy pre-predeer GE A-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) that becomes an insulating resin substrate 304 (insulating material) on the surface. 5GTS-18 (Furukawa Circuit Oil Co., Ltd., trade name) was arranged, laminated and integrated under the press conditions of temperature 170, pressure 1.5MPa, heating and pressurizing time 60 minutes to obtain a substrate (Fig. 17 ( a)). Further, a chromium film 306 of 0.05 zm was formed on the surface of the PZT thin film 301 by DC sputtering. Next, a dry film resist H_9030 (trade name, manufactured by Hitachi Chemical Co., Ltd.) is laminated on the surface of the copper foil 305 of this substrate, exposed to a desired negative pattern, developed with an aqueous solution of sodium carbonate, and etched. Was formed. Next, unnecessary copper foil is removed by etching using an aqueous ferric chloride solution to form a window hole 307 having a diameter of 0.1 mm at a desired position (see FIG. 17 (b)). The resist was stripped off. Subsequently, laser holes 308 were drilled in the 7 windows using Mitsubishi Electric Corporation ML 505 GT carbon dioxide laser under the conditions of 26 mJ output power, 100 S pulse width, and 4 shots. (See Figure 17 (c)). After that, remove the resin residue carbonized by ultrasonic cleaning and alkaline permanganate solution, apply catalyst, promote adhesion, and perform electroless copper plating. Formed. Furthermore, electrolytic copper plating was performed on the substrate surface, and a metal layer made of plated copper 309 was formed to electrically connect the inner layer circuit conductor and the conductor layer on the substrate surface (see FIG. 17 (d)). . Subsequently, a dry film resist H-9030 (trade name, manufactured by Hitachi Chemical Co., Ltd.) was laminated on the surface of the substrate, exposed to a desired negative pattern, and developed with an aqueous solution of sodium carbonate to form an etching resist. . Further, after unnecessary plating copper 309 is removed by etching using an aqueous ferric chloride solution, the resist is stripped with an aqueous sodium hydroxide solution, and the chromium film 306 is etched and removed using an aqueous potassium ferricyanide solution. The pattern of the first capacitor electrode 310 was formed (see FIG. 18A). Next, an alkali-developable resist PER-20 (manufactured by Taiyo Ink Mfg. Co., Ltd., trade name) to be the etching resist 311 is applied to the first capacitor electrode 310 side of this substrate for 20 m (see FIG. 18 (b)). After pre-baking at 100 ° C for 15 minutes, the desired negative pattern is exposed, dried at 130 ° C for 30 minutes, developed with an aqueous solution of sodium carbonate, and an etching resist 311 is formed on the first capacitor electrode 310. Formed (see Fig. 18 (c)). Subsequently, the PZT thin film 301 was etched away at 20 ° C using a thin film etchant (1), and the ruthenium thin film 302 was etched away using a ruthenium etchant REC-01 (trade name, manufactured by Kanto Kagaku Co., Ltd.). Then, the etching resist 311 was peeled off with an aqueous sodium hydroxide solution (see FIG. 18 (d)). The substrate was laminated with a dry film resist H-9040 (trade name, manufactured by Hitachi Chemical Co., Ltd.), exposed to a desired negative pattern, and developed with an aqueous sodium carbonate solution to form an etching resist. Subsequently, unnecessary copper foil 303, unnecessary copper foil 305 and plated copper 309 thereon are removed by etching with an aqueous ferric chloride solution, and then the etching resist is peeled off with an aqueous sodium hydroxide solution to form copper foil 303. A circuit pattern including the second capacitor electrode 312 thus formed was formed to produce a circuit board (see FIG. 19A). Using this circuit board, multilayering was performed by the same process as in Experimental Example C-1, to obtain a multilayer wiring board with a built-in capacitor. Experimental example C-1 8

The surface of the copper foil 303 of C-11, a material for multilayer wiring boards with built-in capacitors, was roughened with an organic acid-based micro-etching agent CZ-8100B (trade name, manufactured by MEC Corporation) as a pretreatment for multilayer bonding. . The copper foil 303 has a thickness of 18 G through a glass epoxy pre-preder GE A—679 F (trade name, manufactured by Hitachi Chemical Co., Ltd.) that becomes an insulating resin substrate 304 on the surface of the copper foil 303. Furukawa Circuit Oil Co., Ltd. was distributed and laminated at a temperature of 170 ° (Pressure: 1.5MPa, heating and pressing time: 60 minutes) to obtain a substrate (Fig. 17 (a) Further, a 0.05 m chromium film 306 was formed by DC sputtering on the surface of the PZT thin film 301. Then, a dry film resist H-9030 (Hitachi Chemical Industries, Ltd.) was formed on the surface of the copper foil 305 of this substrate. (Trade name, manufactured by the company), exposed to the desired negative pattern, developed with an aqueous solution of sodium carbonate to form an etching resist, and then etched unnecessary copper foil with an aqueous solution of ferric chloride. Remove and remove φ0.1mm A hole 307 was formed, and the resist was stripped with an aqueous sodium hydroxide solution (see Fig. 17 (b)), and a ML 505 GT type carbon dioxide laser manufactured by Mitsubishi Electric Corporation was used at the window hole 307. The laser hole 308 was drilled under the conditions of an output power of 26 mJ, a pulse width of 100 is, and four shots (see Fig. 17 (c)). After applying a catalyst and promoting adhesion, electroless copper plating was performed to form a copper thin film of 0.5 on both sides of the substrate. A metal layer made of plated copper 309 was formed to electrically connect the conductor layer on the substrate surface (see Fig. 17 (d)), and then a dry film resist H-9030 (Hitachi Chemical Industries, Ltd.) (Trade name, manufactured by Co., Ltd.) Was exposed and developed with an aqueous solution of sodium carbonate to form an etching resist, and unnecessary plating copper 309 was removed by etching using an aqueous solution of ferric chloride. The resist was stripped off with an aqueous solution of sodium hydroxide, and the chromium film 306 was removed by etching using an aqueous solution of ferricyanation power to form a pattern of the first capacitor electrodes 31, 0 (see FIG. 18 (a)). ). Next, on the first capacitor electrode 310 side of the substrate, 12 m of a solvent-developable resist AZ 9245 (trade name, manufactured by Clariant Japan KK) to be an etching resist 311 is applied (see FIG. 18 (b)). After pre-baking at 110 ° C for 10 minutes, expose the desired positive pattern, dry at 120 ° C for 10 minutes, and develop with AZ400K Developer (Clariant Japan Co., Ltd., trade name). (Refer to Fig. 18 (c).) Next, the PZT thin film 301 was etched away at 20 ° C using a 20% aqueous solution of ammonium bifluoride (NH ₄ F · F). The ruthenium thin film 302 was etched away using a ruthenium etchant REC-01 (trade name, manufactured by Kanto Chemical Co., Ltd.) (see (d) in FIG. 3), and the AZ rim bar 700 (Clariant Japan Stock) Made by company, product name) Etching resist 3 11 (See Fig. 18 (e).) A dry film resist H-9040 (trade name, manufactured by Hitachi Chemical Co., Ltd.) was laminated on this substrate, exposed to a desired negative pattern, and developed with an aqueous sodium carbonate solution. Then, unnecessary copper foil 303, unnecessary copper foil 305 and plated copper 309 thereon were removed by etching with an aqueous ferric chloride solution, and then the resist was stripped with an aqueous sodium hydroxide solution. Then, a circuit pattern including the second capacitor electrode 312 formed from the copper foil 303 was formed to produce a circuit board (see FIG. 19A).

The circuit surface of this circuit board was subjected to a roughening treatment with an organic acid-based microetching agent CZ-8100B (trade name, manufactured by MEC Corporation) as a pretreatment for multilayering adhesion. (1) Thickness 3 copper foil MT 35 S3 (trade name, manufactured by Mitsui Kinzoku Mining Co., Ltd.) with 35 m carrier copper foil, (2) Glass imoxy prepredder GEA-679F with a 100 im thickness filler Manufactured by Kogyo Co., Ltd.), (3) Board, (4) 100 m thick glass epoxy pre-preda with filler, GE A-679 F, (5) 35 m copper foil with carrier copper foil, 3 m thickness MT 35 S 3 (three Ii Metal Mining Co., Ltd., product name), temperature 170 ° (:, pressure 1.5MPa, heating and pressurizing time 60min. Then, a copper foil 314 was laminated via an insulating resin base material 313. The carrier copper foil was peeled off, and unnecessary substrate edges were cut off (see FIG. 19 (b)). — Laminate 9030 (trade name, manufactured by Hitachi Chemical Co., Ltd.), expose the desired negative pattern, and develop with sodium carbonate aqueous solution to form an etching resist. Etching was removed using an aqueous solution of ferric chloride to form a 0.15 mm window hole at the desired location The ML 505 GT carbonate manufactured by Mitsubishi Electric Corporation was placed at the window hole provided on the surface of this circuit board. Using a gas laser, output power 26mJ, pulse width 100Ms, (Refer to Fig. 19 (c).) After ultrasonic cleaning and removal of resin residue carbonized with alkali permanganate solution, after applying a cleaning catalyst and promoting adhesion Electroless copper plating was performed to form an electroless copper plating layer of about 20 m on the inner wall of the laser hole and the copper foil surface Dry film resist H-9030 on necessary parts such as pads and circuit patterns on the circuit board surface (Hitachi Kasei Kogyo Co., Ltd., product name) to form an etching resist and remove unnecessary copper by etching to form an outer layer circuit formed from copper foil 314 and plated copper 315 (Fig. (See 19 (d).) Solder resist PSR—4000 AUS5 (manufactured by Taiyo Ink Manufacturing Co., Ltd., trade name) is applied to the surface of this circuit board for 30 m with a roll coater, dried, exposed and developed. Then, solder resist 316 was formed at the position shown in FIG. Electroless nickel plating and 0.1 m of electroless gold plating (NiZAu plating 17) were formed on the surface layer of the exposed portion of the outer circuit pattern to obtain a multilayer wiring board with a built-in capacitor (Fig. 19 ( e)) Experimental example C-9

Material for multilayer wiring board with built-in capacitor C-11, copper acid 303 surface, as a pretreatment for multi-layer bonding, an organic acid-based microetchant CZ-8100B (MEC Corporation) (Trade name). The copper foil 303 has an 18 m thick copper foil 5GTS through a glass epoxy pre-preder GEA-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) which becomes an insulating resin substrate 304 on the surface. 18 (Furukawa Saichifuto Oil Co., Ltd., product name), and laminated and integrated under the pressing conditions of a temperature of 170 ° C, a pressure of 1.5 MPa, and a heating and pressing time of 60 minutes to obtain a substrate (Fig. 17 (a)). Further, a 0.05 m chromium film 306 was formed on the surface of the FZT thin film 301 by DC sputtering. Next, a dry film resist H-9030 (trade name, manufactured by Hitachi Chemical Co., Ltd.) is laminated on the surface of the copper foil 305 of this substrate, exposed to a desired negative pattern, and developed with an aqueous solution of sodium carbonate. An etching resist was formed. Next, unnecessary copper foil was removed by etching using an aqueous ferric chloride solution to form a window hole 307 having a diameter of 0.1 mm at a desired position, and the resist was stripped with an aqueous sodium hydroxide solution (FIG. 17). (b)). Subsequently, a laser hole 308 was drilled at the window hole 307 using a Mitsubishi Electric ML 505 GT type carbon dioxide gas laser with an output power of 26 mJ, a pulse width of 100 s, and four shots. (See Figure 17 (c)). After that, the resin residue carbonized by ultrasonic cleaning and Argali permanganate solution was removed, and after applying a catalyst and promoting adhesion, electroless copper plating was performed to form a copper thin film of 0.5 on both sides of the substrate. Further, the surface of the substrate was plated with copper, and a metal layer made of plated copper 309 was formed to electrically connect the inner layer circuit conductor and the conductor layer on the substrate surface (see Fig. 1 (d)). . Subsequently, a dry film resist H-9030 (trade name, manufactured by Hitachi Chemical Co., Ltd.) was laminated on the surface of the substrate, exposed to a desired negative pattern, developed with an aqueous solution of sodium carbonate, and the etching resist was removed. Formed. Further, after unnecessary plating copper 309 is removed by etching using an aqueous ferric chloride solution, the resist is peeled off using an aqueous solution of sodium hydroxide, and the chromium film 306 is formed using an aqueous solution of ferricyanation power. By etching and removing, a pattern of the first capacitor electrode 310 was formed (see FIG. 18A). Next, a solvent-developable resist AZ to be an etching resist 311 is formed on the first capacitor electrode 310 side of the substrate. 9245 (Clariant Japan Co., Ltd., product name) is applied at 12 / m (see Fig. 18 (b)), prebaked at 110 ° C for 10 minutes, and then exposed to a desired positive pattern at 120 ° C. And developed with AZ400K Developer (trade name, manufactured by Clariant Japan Co., Ltd.) to form an etching resist 311 (see FIG. 18 (c)). Next, after the PZT thin film 301 and ruthenium thin film 302 are removed by etching using the RIE method using CF ₄ gas (see Fig. 1'8 (d)), AZ Remover 700 (manufactured by Clariant Japan Co., Ltd., trade name) Then, the etching resist 311 was removed (see FIG. 18 (e)). This substrate was laminated with a dry film resist H-9040 (trade name, manufactured by Hitachi Chemical Co., Ltd.), exposed to a desired negative pattern, and developed with an aqueous solution of sodium carbonate to form an etching resist. Next, the unnecessary copper foil 303, unnecessary copper foil 305 and the plated copper 309 thereon are removed by etching with an aqueous ferric chloride solution, and then the resist is peeled off with an aqueous sodium hydroxide solution to form the copper foil 303. A circuit board including the second capacitor electrode 312 thus formed was formed to produce a circuit board (see FIG. 19 (a)).

 Using this circuit board, a multilayer wiring board with a built-in capacitor was obtained by the same process as in Experimental Example C-18 (see Fig. 19 (e)).

In Examples C-1 to (: _7, no etching residue and no resist were peeled off on any of the substrates when the thin film was etched, and the patternability was good. Next, the capacitor capacitance was measured. The capacitance is measured by the impedance analyzer 4291B (manufactured by Agilent Technologies, Inc., trade name) via a 50Ω coaxial cable SUCOFLEX 104/100 (manufactured by SUHNER, trade name) MI CROP ROBE ACP The measurement system was connected to a 50 (GSG250 model, manufactured by Cascade, Inc., trade name) The electrode size of the capacitor was 1 mm, and the capacity at 1 GHz was measured. Table 3

表 3に示したように、 実験例 C— 1〜 C一 7で作製したコンデンサ内蔵多層 配線板のコンデンサ容量のばらつきは、 全て ± 10%未満であり、 均一で良好 なコンデンサを作製することができた。 これは実験例 C一 8〜C一 9と同等の ばらつきであり、 実験例 C一 1〜C— 7を用いても実験例 C一 8〜( — 9と同 等な精度のコンデンサ内蔵多層配線が得られることがわかる。 しかも、 従来の CF₄ガスを用いた R I E法 （実験例 C— 9) や 20%重フッ化アンモニゥム

As shown in Table 3, the variations in the capacitance of the multilayer wiring boards with built-in capacitors manufactured in Experimental Examples C-1 to C-17 are all less than ± 10%. did it. This is the same variation as the experimental examples C-18 to C-19. In addition, conventional RIE method using CF ₄ gas (Experimental example C-9) and 20% ammonium bifluoride ammonium

Unlike the (NH ₄ F-HF) aqueous solution (Experimental Example C-8), etc., since it is a wet etching method using an alkali-developed resist as described above, it can be easily applied to conventional printed wiring board processes. It is possible to apply it to the work, and it is excellent in workability and economy.

(Example D) Material for multilayer wiring board with built-in capacitor D— 1

 18/111 rolled copper foil ^ [_: 8] ^^ [— 18 (manufactured by Mitsui Mining & Smelting Co., Ltd., trade name) on the surface of titanium tetraisopropoxide, zircon tetratertiary butoxide, zippi Microwave plasma CVD using a valylmethane-lead complex and nitrogen dioxide, with a substrate temperature of 350 and a thickness of 0.501? Two (lead zirconate titanate) thin films were formed. In this way, a material D—1 for a multilayer wiring board with a built-in capacitor in which a PZT thin film 101 (dielectric thin film) was provided on one side of a copper foil 102 ′ (metal foil A) (FIG. 1 (a )). Material for multilayer wiring board with built-in capacitor D— 2

 A 0.2 m ruthenium thin film was formed on the surface of a 18-im thick rolled copper foil M—BNH-18 (trade name, manufactured by Mitsui Kinzoku Mining Co., Ltd.) by DC sputtering. In addition, the thickness of the substrate was reduced to 350 ° C by microwave plasma CVD on the substrate surface using titanium tetraisopropoxide, zirconte tertiary butoxide, dipivaloyl methane lead complex, and nitrogen dioxide. A 5 tm PZT (lead zirconate titanate) thin film was formed. Thus, a material D—2 for a multilayer wiring board with a built-in capacitor, in which the PZT thin film 101 (dielectric thin film) was provided on one side of the copper foil 102 (metal foil A) via the ruthenium thin film 103 ( Figure 1 (b). Material for multilayer wiring board with built-in capacitor D-3

A 0.2 m ruthenium thin film was formed on the surface of a rolled copper foil M-BNH-18 (trade name, manufactured by Mitsui Kinzoku Mining Co., Ltd.) having a thickness of 18 ^ m by DC sputtering. Further, a ferroelectric thin film forming material PZT (Kanto Chemical Co., Ltd., trade name) was applied to the surface, and prebaking was performed at a temperature of 150 ° C for a heating time of 30 minutes. The application and pre-bake were repeated five more times, followed by heat treatment at a temperature of 350 for 1 hour to form a 5 m-thick PZT thin film. in this way As a result, a material (3) for a multilayer wiring board with a built-in capacitor in which a PZT thin film 101 (dielectric thin film) was provided on one side of a copper foil 102 (metal foil A) via a ruthenium thin film 103 (FIG. 1) (b)). Example D-1

Material for multi-layer wiring board with built-in capacitor D-1 Copper foil 402 (metal foil A) on the surface, as a pretreatment for multi-layer bonding, organic acid-based micro-etching agent CZ-8100B (trade name of MEC Corporation) (Fig. 20 (a)). On the surface of the copper foil 402, which is a material for a multilayer wiring board with a built-in capacitor, a 100 m-thick glass epoxy pre-predeer GEA-679F (made by Hitachi Chemical Co., Ltd., which becomes an insulating resin base material 404 (insulation layer), 12m thick copper foil 405 (metal foil B) GTS-12 (Furukawa Circuit Oil Co., Ltd., trade name) via the product name), temperature 180 ° C, pressure 1.5MPa, heating The substrates were integrated under a press condition of 60 minutes to obtain a substrate (Fig. 20 (b)). Next, a desired etching resist is formed on both sides of the substrate, and unnecessary copper foil is removed by etching using an aqueous ferric chloride solution to form a 窓 0.15 mm window hole 405 ′ at a desired position. (Fig. 20 (c)). Then, using a ML 505 GT carbon dioxide laser manufactured by Mitsubishi Electric Corporation at the window hole 405 ', laser irradiation was performed under the conditions of an output power of 26mJ, a noise width of 100 / s, and four shots. A laser hole 406 was drilled, and resin residue carbonized by ultrasonic cleaning and alkali permanganate solution was removed (Fig. 20 (d)). Further, a 0.05 mm chromium thin film 407 was formed on the surface of the PZT thin film 401 (dielectric thin film) by DC sputtering. After that, both sides of the substrate are treated with a catalyst using a catalyst-imparting agent (Neog an th 843, manufactured by Atotech Japan Co., Ltd., trade name), and an adhesion promoter (Neog an th WA, manufactured by Atotech Japan Co., Ltd.) After performing the adhesion promotion treatment using (trade name), electroless copper plating is performed, a 0.5 m. Copper thin film is formed, and a 2 O ^ m metal layer is formed on both surfaces of the substrate by electrolytic copper plating. Was formed to form a metal layer made of plated copper 408 (FIG. 20 (e)). This group A desired etching resist is formed on the surface of the plate, unnecessary copper plating 408 is removed by etching using an aqueous ferric chloride solution, and the exposed chromium thin film 407 is removed by etching using an aqueous potassium ferricyanide solution. The pattern of the capacitor electrode 409 was formed (FIG. 20 (f);). Subsequently, a resist having a desired pattern was formed, and the PZT thin film 401 was etched and removed by RIE using CF ₄ gas to form a capacitor dielectric 401 ′ (FIG. 20 (g)). Next, a desired etching resist is formed on the surface of the substrate, and unnecessary portions of the copper foil 402, the copper foil 405, and the plated copper 408 are removed by etching using an aqueous ferric chloride solution, thereby forming a second capacitor. A circuit board including the electrode 410 was formed to produce a circuit board (Fig. 20 (h)). .

 The circuit surface of this circuit board was subjected to a roughening treatment using an organic acid-based microetching agent CZ-8100B (trade name, manufactured by MEC Corporation) as a pretreatment for multi-layer bonding. (1) 3 m thick copper foil with 35 m carrier copper foil MT35 S3 (trade name, manufactured by Mitsui Kinzoku Mining Co., Ltd.), (2) 100 m thick glass epoxy with a thickness of 100 m to become insulating resin substrate 412 Pre-Preda GEA-679 F (manufactured by Hitachi Chemical Co., Ltd., trade name), (3) Circuit board, (4) Insulating resin base material 412 glass epoxy pre-preda with filler with a thickness of 100 m GE A-679 F, (5) 35 m carrier copper foil with thickness 3 copper foil MT 35 S 3 (manufactured by Mitsui Kinzoku Mining Co., Ltd., trade name), temperature 180 ° C, pressure 1.5MPa, heating and pressurizing time The laminate was integrated under a pressing condition of 60 minutes. After peeling off the carrier copper foil and cutting unnecessary substrate edges, a desired etching resist is formed on the surface of the substrate, and the unnecessary copper foil is removed by etching using an aqueous ferric chloride solution to obtain a desired etching resist. A hole with a diameter of 0.15 mm was formed at the location.

Using a ML 505 GT type carbon dioxide gas laser manufactured by Mitsubishi Electric Corporation at the window hole provided on the surface of this board, the laser was operated under the conditions of an output power of 26 mJ, a noise width of 100 S, and four shots. Drilled. Ultrasonic cleaning and removal of carbonized resin residue with permanganate solution, application of cleaning catalyst, adhesion promotion and electroless copper plating Then, about 20 electroless copper plating layers were formed on the inner wall of the laser hole and the copper foil surface. An etching resist was formed on necessary parts such as pads and circuit patterns on the surface of this substrate, and unnecessary copper was removed by etching to form an outer layer circuit.

 Solder resist PSR-4000 AUS5 (Taiyo Ink Mfg. Co., Ltd., trade name) was applied to the surface of the substrate by a roll coater for 30 m, dried and exposed and developed to form a solder resist 411 at a desired position. Then, 3 m electroless nickel plating and 0.1 m electroless gold plating (Ni-Au plating 420) were formed on the surface layer of the exposed portion of the outer circuit pattern to obtain a multilayer wiring board with built-in capacitors ( Figure 20 (i)). Example D-2

The surface of copper foil 402 of multilayer wiring board material with built-in capacitor D-3 was roughened with an organic acid-based microetching agent CZ-8100B (trade name, manufactured by Mec Co., Ltd.) as a pretreatment for multilayer bonding. (Figure 21 (a)). A 100-zm-thick glass epoxy prepreg GEA-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) serving as an insulating resin base material 404 is provided on the surface of the copper foil 402, which is a material for a multilayer wiring board containing a capacitor. A 12 m thick copper foil 5 GTS-12 (Furukawa Circuit Oil Co., Ltd., trade name) is placed at a temperature of 180 ° (Pressure: 1.5 MPa, heating and pressurizing time: 60 minutes under press conditions) Next, a desired etching resist was formed on both sides of this substrate, and unnecessary copper foil was removed by etching using an aqueous ferric chloride solution. Then, a window hole 405 'with a diameter of 0.15mm was formed at the desired location (Fig. 21 (c)) Then, a ML505 GT carbon dioxide laser manufactured by Mitsubishi Electric Corporation was used at the window hole 405'. Laser irradiation was performed under the conditions of 26 mJ output power, 100 s pulse width, and 4 shots, and laser holes 4006 were drilled. The resin residue carbonized by ultrasonic cleaning and alkali permanganate solution was removed (Fig. 21 (d)), and a 0.05 m chromium thin film 407 was formed on the surface of the PZT thin film 401 by DC sputtering. After that, both sides of the substrate After applying catalyst and promoting adhesion, electroless copper plating is performed to form a 0.5 m copper thin film, and a 20 / m metal layer is formed on both surfaces of the substrate by electrolytic copper plating. A metal layer was formed (Fig. 21 (e)). A desired etching resist is formed on the surface of the substrate, unnecessary portions of the plated copper 408 are removed by etching using an aqueous ferric chloride solution, and the exposed chromium thin film 407 is removed by etching using an aqueous potassium ferricyanide solution. Thus, a pattern of the first capacitor electrode 409 was formed (FIG. 21 (f)). Subsequently, a resist having a desired pattern was formed, and unnecessary portions of the PZT thin film 401 and the ruthenium thin film 403 were removed by etching by RIE using CF ₄ gas to form a capacitor dielectric 401 ′ (FIG. 21 (g )). Next, a desired etching resist is formed on the surface of the substrate, and unnecessary portions of the copper foil 402, the copper foil 405, and the plated copper 408 are removed by etching using an aqueous ferric chloride solution to form a second capacitor electrode. A circuit board was fabricated by forming a circuit pattern including 410 (Fig. 21 (h)). Subsequent processing of the multilayer wiring board yielded a multilayer wiring board with a built-in capacitor by the same steps as in Example D-1 (FIG. 21 (i)). Example D-3

The surface of the copper foil 402 of the multilayer wiring board material with built-in capacitor D-2 was roughened with an organic acid-based microetching agent CZ-8100B (trade name, manufactured by MEC Corporation) as a pretreatment for multilayer bonding. (Fig. 22 (a)). On the surface of the copper foil 402, which is a material for a multilayer wiring board having a built-in capacitor, a glass epoxy pre-predeer GE A-679F (Hitachi Chemical Industry Co., Ltd. 3) Thick copper foil 5 MT 35M3 (trade name, manufactured by Mitsui Mining & Smelting Co., Ltd.) with 35 carrier copper foil, temperature 180 ° C, pressure 1.5MPa, heating and pressurizing time The substrates were laminated and integrated under the press conditions for 60 minutes to form a substrate (Figure 22 (b)). Next, after the carrier copper foil was manually peeled off, the output power was 30 mJ on the surface of the copper foil 405 on the board using Mitsubishi Electric Corporation ML 505 GT carbon dioxide laser. Laser drilling under conditions of several 6 times Then, a laser hole 406 having a diameter of 15 mm was manufactured. After that, the resin residue carbonized by ultrasonic cleaning and alkali permanganate solution was removed (Fig. 22 (c)). Further, a 0.05 m chromium thin film 407 was formed on the surface of the PZT thin film 401 by a DC sputtering method. Then, a catalyst is applied to both sides of the substrate, electroless copper plating is performed after promoting adhesion, a copper thin film of 0.5 is formed, and a 20 m metal layer is formed on both surfaces of the substrate by electrolytic copper plating. A metal layer consisting of was formed (Fig. 22 (d)). A desired etching resist is formed on the surface of this substrate, an unnecessary portion of the metal layer made of plated copper 408 is removed by etching using an aqueous solution of ferric chloride, and the chromium thin film 40 exposed using an aqueous solution of potassium ferricyanide is removed. 7 was removed by etching to form a pattern of the first capacitor electrode 409 (FIG. 22 (e)). Subsequently, a resist having a desired pattern is formed, and unnecessary portions of the PZT thin film 401 are removed by etching using a 20% aqueous solution of ammonium fluoride (NH ₄ F-HF) to pattern the PZT thin film. A dielectric 401 'was formed (FIG. 22 (f)). Subsequently, the exposed ruthenium thin film 403 was removed by etching using a ruthenium etching solution REC-01 (Kanto Chemical Co., Ltd., trade name) (FIG. 22 (g)). Next, a desired etching resist is formed on the surface of the substrate, and unnecessary portions of the copper foil 402, the copper foil 405, and the plated copper 408 are removed by etching using an aqueous ferric chloride solution to form a second capacitor. A circuit pattern including the electrode 410 was formed to produce a circuit board (FIG. 22 (h)). Subsequent processing of the multilayer wiring board yielded a multilayer wiring board with a built-in capacitor in the same process as in Example D-1 (FIG. 22 (i)). Example D-4

The surface of copper foil 402 of C-3, a material for multilayer wiring boards with built-in capacitors, is roughened with an organic acid-based micro-etching agent CZ-8100B (Mec Co., Ltd., made by Todo Co., Ltd.) as a pretreatment for multi-layer bonding. (Fig. 23 (a)). On the surface of the copper foil 402 of the material for a multilayer wiring board with a built-in capacitor, a thickness 1 serving as an insulating resin base material 404 is provided. Via a 00 m glass epoxy pre-preda GE A—679 F (trade name, manufactured by Hitachi Chemical Co., Ltd.), 3 m thick copper foil with 35 carrier copper foil 5 MT 35 S 3 (Mitsui Metal Mining Co., Ltd.) (Trade name, product name), laminated at a temperature of 180 ° C, a pressure of 1.5 MPa, and a heating and pressing time of 60 minutes to form a substrate (Fig. 23 (b)). This prepreder is a 25-zm-thick polyethylene terephthalate (PET) film attached on both sides by hot pressing at a temperature of 100 ° C, a pressure of 1.5 MPa, and a heating and pressing time of 10 minutes. After drilling a hole, fill the screen with a conductive paste 13 AE 1650 (Tatsuyu System Electronics Co., Ltd., trade name) in which copper powder is dispersed in a thermosetting resin by screen printing. The PET film was peeled off. Next, a 0.05 m chromium thin film 407 is formed on the surface of the PZT thin film 401 by DC sputtering, and then a metal layer made of 20 m plated copper 408 is formed on both sides of the substrate by electrolytic copper plating. (Fig. 23 (c)). A desired etching resist is formed on the surface of the substrate, an unnecessary portion of the metal layer made of plated copper 408 is removed by etching using an aqueous ferric chloride solution, and the exposed chromium is exposed using an aqueous solution of lithium ferricyanide. The thin film 7 was removed by etching to form a pattern of the first capacitor electrode 409 (FIG. 23D). Subsequently, a resist having a desired pattern is formed, and unnecessary portions of the PZT thin film 401 are removed by etching using a 20% aqueous solution of ammonium bifluoride (NH ₄ F-HF) to perform patterning of the PZT thin film. As a result, a capacitor dielectric 401 'was formed (FIG. 23 (e)). Subsequently, the exposed ruthenium thin film 403 was etched away using the ruthenium etchant REC-01 (Kanto Chemical Co., Ltd., trade name) (Fig. 23 (f)). Next, a desired etching resist is formed on the surface of the substrate, and unnecessary portions of the copper foil 402, the copper foil 405, and the plated copper 408 are removed by etching using a ferric chloride aqueous solution. A circuit pattern including the capacitor electrode 410 was formed to produce a circuit board (FIG. 23 (g)). Subsequent processing of the multilayer wiring board yielded a multilayer wiring board with a built-in capacitor by the same process as in Example D-1 (Fig. 23 (h)). Example D-5

 Nano paste (Harima Kasei Co., Ltd.), a conductive paste that is metalized by a chemical reaction into the conductive paste that fills the holes of the pre-predder laminated with the material for multilayer wiring boards with built-in capacitors A multilayer wiring board with a built-in capacitor was obtained in the same manner as in Example D-4, except that the replacement was performed. Example D-6

The surface of copper foil 402 of multilayer wiring board material with built-in capacitor D-3 was roughened with an organic acid-based micro-etching agent CZ-8100B (trade name, manufactured by Mec Co., Ltd.) as a pretreatment for multi-layer bonding. (Figure 24 (a)). A 100 m thick glass epoxy prepreg GE A-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.), which becomes an insulating resin base material 404, is provided on the surface of the copper foil 402 of the material for the multilayer wiring board with a built-in capacitor. 3 Carrier copper foil with thickness 5MT3 5S3 (made by Mitsui Mining & Smelting Co., Ltd., trade name), laminated under pressing conditions of temperature 180, pressure 1.5MPa, heating and pressing time 60 minutes They were integrated to form a substrate (Fig. 24 (b)). Next, a desired etching resist is formed on the surface of the copper foil 405 of the substrate from which the carrier copper foil has been peeled off, and unnecessary copper foil is removed by etching using an aqueous ferric chloride solution, and Φ A window hole 405 ′ of 0.15 mm was formed (FIG. 24 (c)). Subsequently, a laser beam was applied to the window hole 405 ′ using the ML 505 GT carbon dioxide laser manufactured by Mitsubishi Electric Corporation under the conditions of an output power of 26 mJ, a pulse width of 100 zs, and a number of shots of 4 times. At dawn, the resin residue carbonized by ultrasonic cleaning and alkali permanganate solution was removed (Fig. 24 (d)). Further, a 0.05 im chromium thin film 407 was formed on the surface of the PZT thin film 401 by DC sputtering. Thereafter, a catalyst was applied to both surfaces of the substrate, and after promoting adhesion, electroless copper plating was performed to form a copper thin film 19 of 0.5 m. The thus formed 0.55 im chromium thin film 407 and 0.5 m copper thin film 419 are A base metal layer (metal layer having a thickness of 0.1 to 5) is formed by a semi-additive method. A desired plating resist 414 is formed on both sides of the substrate, and electro-copper plating is performed. A conductive pattern made of plated copper 415 which becomes a circuit including the first capacitor electrode 409 having a thickness of 20 m and the laser hole 406. Was formed (Fig. 24 (e)). After peeling off the plating resist 414, unnecessary portions of the 0.5 zzm copper thin film 419 and unnecessary portions of the 0.05 m chromium thin film 407 on both sides of the substrate were removed by etching to form the pattern of the first capacitor electrode 409. . At this time, a circuit was also formed by patterning the 3 m-thick copper foil 405 (Fig. 24 (f)). Subsequently, a resist having a desired pattern is formed, and unnecessary portions of the PZT thin film 401 are removed by etching using a 20% aqueous solution of ammonium bifluoride (NH ₄ F′HF), and the PZT thin film 401 is patterned to form a capacitor. A dielectric 401 'was formed (FIG. 24 (g)). Subsequently, the exposed ruthenium thin film 403 was etched away using the ruthenium etchant REC-01 (Kanto Chemical Co., Ltd., trade name) (Fig.

24 (h)). Next, a desired etching resist is formed on the surface of the substrate, and unnecessary portions of the copper foil 402 are removed by etching using an aqueous ferric chloride solution to form a circuit pattern including the second capacitor electrode 410. A circuit board was fabricated (Fig. 24 (i)). Subsequent processing of the multilayer wiring board yielded a multilayer wiring board with a built-in capacitor through the same steps as in Example D-1 (FIG. 24 (j)). Example D-7

 The surface of copper foil 402 of C-13, a material for multilayer wiring boards with built-in capacitors, was roughened with an organic acid-based microetching agent CZ-8100B (trade name, manufactured by Mec Co., Ltd.) as a pretreatment for multi-layer bonding. (Figure 25 (a)). A 100 m thick glass epoxy prepreg GEA-679F (trade name, Hitachi Chemical Co., Ltd.), which becomes the insulating resin base material 404, is formed on the surface of the copper foil 402 of the material for the multilayer wiring board having the capacitor. With 35 carrier copper foil thickness 3 / zm copper foil 5MT

35M3 (Mitsui Metal Mining Co., Ltd., trade name), temperature 180, pressure 1. The substrates were laminated and integrated under press conditions of 5 MPa and a heating and pressing time of 60 minutes to form a substrate (Fig. 25 (b)). After the carrier copper foil was manually peeled off, laser drilling was performed using Mitsubishi Electric Corporation's ML505 GT type carbon dioxide laser under the conditions of an output power of 30 mJ, pulse width of 15 s, and 6 shots. Then, a laser hole 406 having a diameter of 0.15 mm was produced. After that, resin residue carbonized by ultrasonic cleaning and alkaline permanganate solution was removed (Fig. 25 (c)). Further, a 0.05 m chromium thin film 407 was formed on the surface of the PZT thin film 401 by a DC sputtering method. Furthermore, a catalyst was applied to both sides of this substrate, and after promoting adhesion, electroless copper plating was performed.

A copper thin film 419 was formed. The thus formed 0.05 m thin chromium film 407 and 0.5 m thin copper film 419 form a semi-additive base metal layer (metal layer having a thickness of l to 5 zm). A desired plating resist 414 is formed on the surface of this substrate, electrolytic copper plating is performed, and the plated copper 415 which becomes a circuit of the portion including the first capacitor electrode 409 having a thickness of 20 m and the laser hole 406 is formed. A conductive pattern was formed (Fig. 25 (d)). After removing the plating resist 414, the exposed portions of the 0.5 copper thin film 419 and 0.05 zm chromium thin film 407 exposed on the substrate surface are removed by etching to include the first capacitor electrode 409 and the laser hole 406. Partial circuit patterns were formed. At this time, a 3 m thick copper foil 405 was also patterned to form a circuit (Fig. 25 (e)). Subsequently, a resist having a desired pattern is formed, and the PZT thin film 401 is removed by etching using a 20% aqueous solution of ammonium bifluoride (NH ₄ F · HF) to perform patterning of the PZT thin film 401, thereby forming a capacitor dielectric. The body 401 'was formed (FIG. 25 (f)). Then, the exposed part of the ruthenium thin film 403 was etched away using a ruthenium etching solution REC-01 (Kanto Chemical Co., Ltd., trade name) (Fig. 25 (g)). Next, a desired etching resist is formed on the surface of the substrate, and unnecessary portions of the copper foil 402 are removed by etching using an aqueous solution of ferric chloride, and a circuit including the second capacitor electrode. A circuit board was fabricated by forming a pattern (Fig. 25 (h)). Subsequent processing of the multilayer wiring board was performed in the same process as in Example D-1. A multilayer wiring board was obtained (Fig. 25 (i)). Example D-8

Material for multilayer wiring board with a built-in capacitor D-3 Copper foil 402 Surface of the layer 2 Adhesion as a pretreatment by organic acid micro-etching agent CZ-8100B (Mec Co., Ltd., trade name) (Fig. 26 (a)). On the surface of the copper foil 402 of the multilayer wiring board material with a built-in capacitor, a 100-m-thick glass epoxy pre-preder GE A—6979F (Hitachi Chemical Industry Co., Ltd.) 18 Gm-thick copper foil 5 GTS- 18 (Furukawa Circuit Oil Co., Ltd., trade name) is placed at a temperature of 180 ° C, a pressure of 1.5 MPa, and heating. The substrate was formed by laminating and unifying under press conditions of 60 minutes (Fig. 26 (b)). ₀ This pre-predeer was prepared by applying a 25 / im thick polyethylene terephthalate (PET) film to both sides at a temperature of 10 0 ° (: Pressure 1.5MPa, heating and pressurizing time 10 minutes after applying by hot press, drilling at desired location, then thermosetting by screen printing Conductive paste in which copper powder is dispersed in resin 1 3A E 1650 (Tutter System Electronics Co., Ltd., trade name) Next, a 0.05 m-thick chromium thin film 407 was formed on the surface of the PZT thin film 401 by a DC sputtering method. After applying a catalyst to both sides of the substrate and promoting adhesion, electroless copper plating was performed to form a 0.5 m copper thin film 419. The thus formed 0.05 m chromium thin films 407 and 0 A 5 m copper thin film 4 19 forms a base metal layer (metal layer with a thickness of 1 to 5 m) by the semi-additive method, and then a desired plating resist 414 is formed on both sides of the substrate. Electroplated copper was used to form a conductor pattern to become the first capacitor electrode 409 with a thickness of 20 m (Fig. 26 (c)) After the plating resist 414 was peeled off, the surface of the substrate was exposed. The 5 m copper thin film 419 was etched away with an aqueous ferric chloride solution, and the exposed 0.05 βΐη chromium thin film 407 was removed. And Etchingu removed using cyanide Kariumu solution Thus, a pattern of the first capacitor electrode 409 was formed (FIG. 26 (d)). Subsequently, a resist of a desired pattern, 20% bifluoride Anmoniumu - perform patterning of the PZT thin film 401 and unnecessary portions of the PZT thin film 401 is etched away using (NJ ₄ F HF) aqueous solution, the capacitor dielectric The body 401 'was formed (Fig. 26 (e)). Subsequently, the exposed ruthenium thin film 403 was removed by etching using a ruthenium etchant REC-01 (Kanto Chemical Co., Ltd., trade name) (Fig. 26 (f)). Next, a desired etching resist is formed on the surface of the substrate, unnecessary portions of the copper foil 402 and the copper foil 405 are removed by etching using an aqueous ferric chloride solution, and a circuit including the second capacitor electrode 410 is formed. A circuit board was fabricated by forming a pattern (Fig. 26 (g)). Subsequent processing of the multilayer wiring board was performed in the same process as in Example D_1 to obtain a multilayer wiring board with a built-in capacitor (FIG. 26 (h)). Example D-9

 Replaced the conductive paste that fills the holes of the pre-predder laminated with the material for multilayer wiring boards with built-in capacitors with a nano paste (Hachirima Kasei Co., Ltd., trade name), a conductive paste that is metallized by a chemical reaction. Except for this, a multilayer wiring board with a built-in capacitor was obtained in the same manner as in Example D-8. Example D-10

The surface of copper foil 402 of multilayer wiring board material with built-in capacitor D-3 was roughened with an organic acid-based microetching agent CZ-8100B (trade name, manufactured by Mec Co., Ltd.) as a pretreatment for multilayer bonding. (Fig. 27 (a)). A 100-meter-thick glass epoxy prepreg GE A-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) that becomes the insulating resin base material 404 on the surface of the copper foil 402, which is a material for a multilayer wiring board with a built-in capacitor. 18 Gm-thick copper foil 5 GTS-18 (Furukawa Sakittofu Oil Co., Ltd., trade name) is placed at a temperature of 180, a pressure of 1.5 MPa, and a heating and pressing time of 60 minutes. To form a substrate (FIG. 27 (b)). This prepreder is made by applying a 25 m thick polyethylene terephthalate (PET) film on both sides by hot pressing at a temperature of 100 ° C, a pressure of 1.5 MPa, and a heating and pressing time of 10 minutes. After drilling at the desired location, the screen is filled with conductive paste AE 1650 (Tatsuyu System Electronics Co., Ltd., trade name) in which copper powder is dispersed in thermosetting resin by screen printing. The PET film on the surface was then peeled off. Next, at a desired location on the surface of the PZT thin film 401, nano-paste (Harima Chemical Co., Ltd., a trade name), which is a conductive paste that is metallized by a chemical reaction by screen printing, with a thickness of 40 m. After printing, baking was performed at a temperature of 200 ° C. for a heating time of 1 hour, and the conductive paste was metallized to form a pattern of the first capacitor electrode 416 (FIG. 27 (c)). Subsequently, a resist having a desired pattern is formed, and unnecessary portions of the PZT thin film 401 are removed by etching using a 20% aqueous solution of ammonium bifluoride (NH ₄ F * HF), and the PZT thin film is patterned to perform capacitor dielectric. After forming the body 401 ', the exposed portion of the ruthenium thin film 403 was removed by etching using a ruthenium etchant REC-01 (Kanto Chemical Co., Ltd., trade name) (Fig. 27 (d)). Next, a desired etching resist is formed on the surface of the substrate, and unnecessary portions of the copper foil 402 and the copper foil 405 are removed by etching using an aqueous solution of ferric chloride to form a circuit pattern including the second capacitor electrode 410. Then, a circuit board was fabricated (Fig. 27 (e)). Subsequent processing of the multilayer wiring board yielded a multilayer wiring board with a built-in capacitor by the same steps as in Example D-11 (FIG. 27 (f)). Example D—11

Nano paste (Harima Kasei Co., Ltd.), a conductive paste that is metalized by a chemical reaction into the conductive paste that fills the holes of the pre-predder laminated with the material for multilayer wiring boards with built-in capacitors A multilayer wiring board with a built-in capacitor was obtained by the same steps as in Example D-10 except for the change. Example D-12

The surface of copper foil 402 of multilayer wiring board material with built-in capacitor D-3 was roughened with an organic acid-based microetching agent CZ-8100B (trade name, manufactured by Mec Co., Ltd.) as a pretreatment for multilayer bonding. (Figure 28 (a)). On the surface of the copper foil 402, which is a material for a multilayer wiring board with a built-in capacitor, a 100 m thick glass epoxy prepreg GEA-679F (trade name, manufactured by Hitachi Chemical Co., Ltd.), which becomes the insulating resin base material 404, 12 Gm-thick copper foil 5GTS-12 (Furukawa Circuit Oil Co., Ltd., trade name) is placed, and laminated under the press conditions of temperature 180 ° C, pressure 1.5MPa, heating and pressurizing time 60 minutes. The substrates were integrated to form a substrate (FIG. 28 (b)). Next, a resist having a desired pattern is formed, and the PZT thin film 401 is removed by etching using a 20% aqueous solution of ammonium bifluoride (NH ₄ F · HF), and the PZT thin film is patterned to perform capacitor dielectric. After forming 401 ', the ruthenium thin film 403 was etched away using a ruthenium etchant REC-01 (Kanto Chemical Co., Ltd., trade name) (Fig. 28 (c)). A desired etching resist was formed on both sides of the substrate, and unnecessary portions of the copper foil 405 were removed by etching using an aqueous ferric chloride solution to form window holes 405 'having a diameter of 0.15 mm at desired positions. (Fig. 28 (d)). Subsequently, laser irradiation was performed at the window hole 405 'using a ML 505 GT carbon dioxide laser manufactured by Mitsubishi Electric Corporation under the conditions of an output power of 26 mJ, a pulse width of 100 s, and four shots. A hole 406 was drilled, and resin residue carbonized with ultrasonic cleaning and an alkali permanganate solution was removed (Fig. 28 (e)). Further, a 0.05 thin chromium film 407 was formed on the surface of the substrate on the side of the capacitor dielectric 401 'by DC sputtering. Then, on both surfaces of the substrate, electroless copper plating is performed after applying a catalyst and promoting adhesion to form a copper thin film of 0.5, and then a 20 m metal layer is formed thereon by electrolytic copper plating. Then, a metal layer made of plated copper 408 was formed (FIG. 28 (f)). A desired etching resist is formed on the surface of the substrate, unnecessary portions of the plated copper 408 and the copper foil 405 are removed by etching using an aqueous ferric chloride solution, and the exposed portion is exposed using an aqueous ferricyanide force aqueous solution. The removed chromium thin film 407 was removed by etching, and the exposed copper foil 402 was further removed by etching using an aqueous ferric chloride solution to form a circuit pattern including the first capacitor electrode 409 and the second capacitor electrode 410. (Figure 28 (g)). Subsequent processing of the multilayer wiring board yielded a multilayer wiring board with a built-in capacitor through the same steps as in Example D-1 (FIG. 28 (h)). Example D-13

The surface of copper foil 402 of material D-3 with built-in capacitor was roughened with an organic acid-based micro-etching agent CZ-8100B (trade name, manufactured by Mec Co., Ltd.) as a pretreatment for multi-layer bonding. (Fig. 29 (a)) _{0 A} 100 m thick glass epoxy prepreg GEA-679F (Hitachi Chemical Industry Co., Ltd.) Through the company, brand name), 35 carrier copper foil with thickness 3 copper foil 5MT

35M3 (manufactured by Mitsui Kinzoku Mining Co., Ltd., trade name) was arranged and laminated under a pressing condition of temperature 180 ° C, pressure 1.5MPa, heating and pressing time 60 minutes to obtain a substrate (Fig.

29 (b)). Next, a resist having a desired pattern is formed, and the PZT thin film 401 is etched and removed using a 20% aqueous solution of ammonium bifluoride (NH ₄ F′HF), and the PZT thin film is patterned to form a capacitor dielectric 401. After forming ', the exposed part of the ruthenium thin film 403 was etched away using the ruthenium etchant REC-01 (Kanto Chemical Co., Ltd., trade name) (Fig. 29 (c)). After the carrier copper foil was manually peeled off, the specified surface of the copper foil 405 was output using a Mitsubishi Electric Corporation ML 505 GT carbon dioxide laser with an output power of 30 mJ, a pulse width of 15 S, and six shots. Laser irradiation was performed to produce a laser hole 406 having a diameter of 0.15 mm. After that, resin residue carbonized by ultrasonic cleaning and alkaline permanganate solution was removed (Fig. 29 (d)). Furthermore, the capacitor dielectric of the substrate

On the surface on which 4.01 ′ was formed, a 0.05 m chromium thin film 407 was formed by DC sputtering. After that, catalyst is applied to both sides of the substrate, and after promoting adhesion, electroless Copper plating was performed, a copper thin film of 0.5 was formed, a metal layer of 20 m was formed thereon by electrolytic copper plating, and a metal layer of plated copper 408 was formed (FIG. 29 (e) ). A desired etching resist is formed on the surface of the substrate, unnecessary portions of the plated copper 408 and the copper foil 405 are removed by etching using an aqueous ferric chloride solution, and the exposed chromium thin film 407 is removed by etching using an aqueous potassium ferricyanide solution. Further, the exposed copper foil 402 was removed by etching using an aqueous ferric chloride solution to form a circuit pattern including the first capacitor electrode 409 and the second capacitor electrode 410 (FIG. 29 (f)). ). Subsequent application of the multilayer wiring board yielded a multilayer wiring board with a built-in capacitor by the same steps as in Example D-1 (Fig. 29 (g)). Example D-14

 The surface of copper foil 402 of multilayer wiring board material with built-in capacitor D-3 is roughened with an organic acid-based micro-etching agent CZ-8100B (trade name, manufactured by MEC Corporation) as a pretreatment for multilayer bonding. (Fig. 30 (a)). On the surface of the copper foil 402, which is a material for a multilayer wiring board with a built-in capacitor, a 100-m-thick glass epoxy pre-predeer GE A—679F (trade name, manufactured by Hitachi Chemical Co., Ltd.) that becomes the insulating resin base material 40 Via a 35 / m carrier copper foil with 3 m thick copper foil 5 MT 3553 (Mitsui Mining Co., Ltd., trade name), temperature 180 ° C, pressure 1.5M Pa, heating and pressurizing time 60 The substrates were laminated and integrated under the same pressing conditions to obtain a substrate (Fig. 30 (b);). This pre-predeer is prepared by applying a 25-thick polyethylene terephthalate (PET) film on both sides by hot pressing at a temperature of 100 ° C, a pressure of 1.5 MPa, and a heating and pressing time of 10 minutes. After drilling holes, conductive paste AE 1650 (Tutter System Electronics Co., Ltd., trade name) in which copper powder is dispersed in thermosetting resin is filled by screen printing! ^ Then, the PET film on the surface was peeled off.

Next, a desired resist pattern is formed, and 20% ammonium bifluoride (N H ₄ F · HF) aqueous solution to remove the PZT thin film 401 by etching and patterning the PZT thin film to form a capacitor dielectric 401 ′, then use a ruthenium etching solution REC-01 (Kanto Chemical Co., Ltd., trade name) The exposed portion of the ruthenium thin film 403 was removed by etching (FIG. 30 (c)). Further, a 0.05 m chromium thin film 407 is formed on the surface of the capacitor dielectric 401 ′ of the substrate by a DC sputtering method, then a catalyst is applied, adhesion is promoted, and then electroless copper plating is performed. A copper thin film was formed. Furthermore, a metal layer made of plated copper 408 of 20 m was formed on both sides of the substrate by electrolytic copper plating (Fig. 30 (d)). A desired etching resist is formed on the surface of the substrate, unnecessary portions of the plated copper 408 and the copper foil 405 are removed by etching using an aqueous ferric chloride solution, and the chromium thin film is exposed using an aqueous potassium fluoric acid solution. 7 was removed by etching, and the exposed copper foil 402 was further removed by etching using an aqueous ferric chloride solution to form a circuit pattern including the first capacitor electrode 409 and the second capacitor electrode 410 (FIG. 30). (e)). Subsequent processing of the multilayer wiring board yielded a multilayer wiring board with a built-in capacitor by the same process as in Example D-1 (Fig. 30 ()). Example D-15

 Replaced the conductive paste that fills the holes of the pre-predder laminated with the material for multilayer wiring boards with built-in capacitors with a nano paste (Hachiriima Kasei Co., Ltd., trade name), a conductive paste that is metallized by a chemical reaction. Except for this, a multilayer wiring board with a built-in capacitor was obtained by the same steps as in Example D-14. Comparative Example D-1

A 0.2 mm-thick double-sided circuit board (Fig. 31 (a)) having conductor holes for connecting circuit patterns on both sides (the inside of the hole was filled with resin 418) was prepared. On one surface of this substrate, a 0.2 m ruthenium thin film 403 was formed by DC sputtering. Form resist of desired pattern, and by RIE method, The ruthenium thin film 403 other than on the circuit was removed by etching to form a circuit pattern including the second capacitor electrode 421 (FIG. 31 (b)). Furthermore, a ferroelectric thin film forming material PZT (Kanto Chemical Co., Ltd., trade name) was applied to the substrate surface, and prebaked at a temperature of 150 ° C for a heating time of 30 minutes. The application and pre-bake were repeated five more times, and then a heat treatment was performed at a temperature of 250 ° C for a heating time of 1 hour to form a 0.5 m thick PZT thin film 401 (Fig. 31 (c) ). Further, a 0.05 m chromium thin film 407 was formed on the surface of the PZT thin film 401 by DC sputtering. Further, a metal layer made of plated copper 408 having a thickness of 20 rn was formed on the surface by electrolytic copper plating (FIG. 31 (d)). A desired etching resist is formed on the surface of the substrate, unnecessary portions of the plated copper 408 are removed by etching using an aqueous ferric chloride solution, and the exposed chromium thin film 407 is removed by etching using an aqueous potassium ferricinated solution. Then, a circuit board was fabricated by forming a pattern of the first capacitor electrode 422 (FIG. 31 (e)). Subsequent processing of the multilayer wiring board yielded a multilayer wiring board with a built-in capacitor by the same steps as in Example D-1 (FIG. 31 (f);). With respect to the multilayer wiring board with a built-in capacitor obtained in Examples D-1 to D_15 and Comparative Example D-1, the thickness of the dielectric, the relative dielectric constant, and the capacitance of the capacitor were measured. Each measuring method is the same as described above. Table 4 below shows the measurement results.

Table 4

実施例 D— 1〜D— 1 5は、 いずれも、 金属箔の表面に比誘電率が 1 0〜2 0 0 0でかつ膜厚が 0 . 0 5〜2 _i mの誘電体薄膜が設けられたことを特徴と するコンデンサ内蔵多層配線板用材料を用いて作製したコンデンサ内蔵基板で ある。 作製したコンデンサ容量のばらつきは全て ± 1 0 %未満であり、 均一で 良好なコンデンサを作製することができた。

In each of Examples D-1 to D-15, a dielectric thin film having a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2_im was provided on the surface of the metal foil. This is a substrate with a built-in capacitor manufactured using a material for a multilayer wiring board with a built-in capacitor. Variations in the capacitance of the manufactured capacitors were all less than ± 10%, and uniform and good capacitors could be manufactured.

In the comparative example, a dielectric thin film was formed on the surface of the substrate on which the metal layer was patterned. Because of the built-in capacitor built-in substrate, the variation in film thickness was large, and as a result, the variation in capacitor capacitance was as large as 54% at the maximum. Those skilled in the art will appreciate that what has been described above is the preferred embodiment of the invention and that many changes and modifications can be made without departing from the spirit and scope of the invention.

Claims

The scope of the claims 1. For a multilayer wiring board with a built-in capacitor, a dielectric thin film having a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 / xm is provided on the surface of a metal foil. material. 2. The dielectric thin film is made of barium titanate, strontium titanate, calcium titanate, magnesium titanate, lead titanate, bismuth titanate, titanium dioxide, barium zirconate, calcium zirconate, lead zirconate, barium strontium titanate , Lead zirconate titanate, lead magnesium niobate, lead monotitanate, or a solid solution containing any two or more of these, or a film made of a laminate containing any two or more of these The material for a multilayer wiring board with a built-in capacitor according to claim 1, wherein:  3. The metal foil is made of copper, and is selected from the group consisting of platinum, gold, silver, palladium, ruthenium, and iridium as a metal to be a copper oxide protective film on the surface on which the dielectric thin film is formed. The material for a multilayer wiring board with a built-in capacitor according to claim 1 or 2, wherein at least one kind of metal film is provided.  4. The metal foil is made of copper, and at least one metal film selected from the group consisting of chromium, molybdenum, titanium, and nickel is provided as a metal that forms a stable self-oxidizing film on its surface. 3. The material for a multilayer wiring board with a built-in capacitor according to claim 1 or 2, wherein:  5. The material for a multilayer wiring board with a built-in capacitor according to any one of claims 1 to 4, wherein the metal foil has a surface roughness of 0.01 to 0.5 m.  6. Multilayer with a built-in capacitor, characterized by forming a dielectric thin film having a relative permittivity of 10 to 2000 and a film thickness of 0.05 to 2111 on the surface of a metal foil by a vacuum evaporation method. Manufacturing method of wiring board material. 7. A capacitor characterized by forming a dielectric thin film having a relative dielectric constant of 10 to 2000 and a thickness of 0.05 to 2 m on the surface of a metal foil by ion plating. A method for manufacturing a material for a multilayer wiring board with a built-in capacitor.  8. A dielectric thin film with a relative dielectric constant of 10 to 2000 and a thickness of 0.05 to 2 zm is formed on the surface of the metal foil by CVD (Chemical Vapor or Deposition). A method for manufacturing materials for multilayer wiring boards with built-in capacitors.  9. A method for manufacturing a material for a multilayer wiring board with a built-in capacitor, comprising forming a dielectric thin film having a relative dielectric constant of 10 to 2000 and a thickness of 0.05 to 2 m on a surface of a metal foil by a sputtering method. .  10. A method for manufacturing a material for a multilayer wiring board with a built-in capacitor, comprising forming a dielectric thin film having a relative dielectric constant of 10 to 2000 and a thickness of 0.05 to 2 m on a surface of a metal foil by a sol-gel method. .  1 1. A roll-shaped metal foil is used as the metal foil, and the dielectric thin film is formed while continuously moving the metal foil in a heating furnace controlled at a constant temperature. 11. The method for producing a multilayer wiring board material with a built-in capacitor according to any one of 6 to 10.  12. The dielectric thin film is made of barium titanate, strontium titanate, calcium titanate, magnesium titanate, lead titanate, bismuth titanate, titanium dioxide, barium zirconate, calcium zirconate, lead zirconate, titanium Barium strontium oxide, lead zirconate titanate, magnesium niobate, lead monotitanate, or a solid solution containing at least two of these, or a laminate containing at least two of these The method for producing a material for a multilayer wiring board with a built-in capacitor according to any one of claims 6 to 11, wherein the material is a film made of: 13. The metal foil is made of copper, and is selected from the group consisting of platinum, gold, silver, palladium, ruthenium, and iridium as a metal that serves as a copper oxidation protection film on the surface on which the dielectric thin film is formed. 13. The method according to claim 6, wherein at least one metal film is provided. 14. The metal foil is made of copper, and at least one metal film selected from the group consisting of chromium, molybdenum, titanium, and nickel is provided as a metal that forms a stable self-oxidizing film on its surface. The method for producing a material for a multilayer wiring board with a built-in capacitor according to any one of claims 6 to 12, wherein:  15. The method for producing a material for a multilayer wiring board with a built-in capacitor according to any one of claims 6 to 14, wherein the metal foil has a surface roughness of 0.01 to 0.5 zm. .  16. A capacitor using a multilayer wiring board material with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 m is provided on the surface of a metal foil. A method for manufacturing a built-in multilayer wiring board, comprising:  1) a step of laminating on a substrate having a conductor circuit on a surface of a metal foil of a material for a multilayer wiring board with a built-in capacitor via a pre-predator;  2) forming a 10 to 50 im metal layer on the surface of the dielectric thin film; 3) etching away leaving any portion of the metal layer to form the desired first capacitor electrode;  4) etching away leaving any portion of the dielectric thin film including at least the first capacitor electrode to form a desired capacitor dielectric; and 5) A step of forming a conductor pattern including a desired second capacitor electrode by etching and removing at least an arbitrary portion including the capacitor dielectric of the metal foil that has appeared by removing the dielectric thin film. Characteristic method of manufacturing multilayer wiring board with built-in capacitor.  17. The method according to claim 16, wherein the metal layer formed on the surface of the dielectric thin film includes at least one or more metal layers selected from the group consisting of chromium, molybdenum, titanium, and nickel. Manufacturing method of multilayer wiring board with built-in capacitor. 18. A capacitor using a multilayer wiring board material with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 m is provided on the surface of a metal foil. A method for manufacturing a multilayer wiring board with a built-in sensor, comprising: 1) a step of laminating on a substrate having a conductor circuit on a surface of a metal foil of a material for a multilayer wiring board with a built-in capacitor via a pre-predader;  2) forming a 0.1 to 5 m metal layer on the surface of the dielectric thin film; 3) forming a metal-plated resist, leaving any portion including the first capacitor electrode;  4) forming a 10 to 50 / m first capacitor electrode by metal plating;  5) removing the metal-plated resist;  6) a step of etching and removing a 0.1 to 5 m metal layer formed on the surface of the dielectric thin film;  7) forming a desired capacitor dielectric by etching away the dielectric thin film leaving any portion including at least the first capacitor electrode;  8) A step of forming a conductor pattern including a desired second capacitor electrode by etching and removing at least an arbitrary portion including the capacitor dielectric of the metal layer that appears after removing the dielectric thin film. Characteristic manufacturing method of multilayer wiring board with built-in capacitor.  19. The method according to claim 18, wherein the metal layer formed on the surface of the dielectric thin film includes at least one metal layer selected from the group consisting of chromium, molybdenum, titanium, and nickel. Manufacturing method of multilayer wiring board with built-in capacitor. 20. The multilayer wiring with a built-in capacitor according to claim 18 or 19, wherein the metal plating includes at least one metal selected from the group consisting of copper, silver, tin, nickel and zinc. Board manufacturing method.  2 1. A capacitor using a multilayer wiring board material with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 100 to 2000 and a film thickness of 0.05 to 2 m is provided on the surface of a metal foil. A method for manufacturing a built-in multilayer wiring board, comprising: .1) a step of laminating on a substrate having a conductor circuit on a surface of a metal foil of a material for a multilayer wiring board with a built-in capacitor via a pre-preder; 2) Form a 10 to 50 m metal layer using a conductive paste that is metallized by a chemical reaction on any part of the surface of the dielectric thin film to form the desired first capacitor electrode Performing a step;  3) forming a desired capacitor dielectric by etching away the dielectric thin film, leaving at least an arbitrary portion including at least the first capacitor electrode;  4) a step of forming a conductor pattern including a desired second capacitor electrode by etching and removing at least an arbitrary portion of the metal foil that appears after removing the dielectric thin film, including at least the capacitor dielectric. Manufacturing method for multilayer wiring boards with built-in capacitors. 22. The metal particles of the conductive paste which are metallized by a chemical reaction include at least one metal selected from the group consisting of gold, platinum, silver, copper, palladium, and ruthenium, and the average thereof. 22. The method for manufacturing a multilayer wiring board with a built-in capacitor according to claim 21, wherein the particle size is 0.1 to 10 nm. 23. A capacitor using a multilayer wiring board material with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 100 to 2000 and a film thickness of 0.05 to 2 m is provided on the surface of a metal foil. A method for manufacturing a built-in multilayer wiring board, comprising:  1) a step of laminating on a substrate having a conductive circuit via a pre-preder on a metal foil surface of a material for a multilayer wiring board with a built-in capacitor;  2) etching away leaving any portion of the dielectric thin film to form a desired capacitor dielectric;  3) forming a 10 to 50 m metal layer on the surface of the substrate on which the capacitor dielectric has been formed;  4) A step of forming a desired first capacitor electrode, second capacitor electrode, and an arbitrary conductor pattern electrically insulated from the capacitor electrode by etching and removing the metal layer while leaving an arbitrary portion thereof. A method for producing a multilayer wiring board with a built-in capacitor. 2 4. The relative permittivity is 10 to 2000 and the film thickness is 0.05 to 2 on the surface of the metal foil. a through hole made of an insulating material is provided at an arbitrary position in a pre-predeer laminated through a metal foil surface of a material for a multilayer wiring board with a built-in capacitor provided with a dielectric thin film of m and a substrate having a conductive circuit; and The method for producing a multilayer wiring board with a built-in capacitor according to any one of claims 16 to 23, wherein the through-hole is filled with a conductive paste containing a thermosetting resin and a metal filler.  25. A metal foil of a material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 100 to 200 and a film thickness of 0.05 to 2 m is provided on the surface of the metal foil. In a pre-predeer that is laminated via a surface and a substrate having a conductive circuit, a through hole of an insulating material is provided at an arbitrary position, and the through hole is filled with a conductive paste that is metallized by a chemical reaction. The method for producing a multilayer wiring board with a built-in capacitor according to any one of claims 16 to 23, characterized in that:  26. A capacitor using a multilayer wiring board material with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 100 to 200 and a film thickness of 0.05 to 2 m is provided on the surface of a metal foil A method for manufacturing a built-in multilayer wiring board, comprising:  1) a step of laminating on a surface of a metal foil of a material for a multilayer wiring board with a built-in capacitor to a substrate having a conductor circuit via a pre-predader;  2) forming 10 to 50 metal layers on the surface of the dielectric thin film; 3) etching away leaving any portion of the metal layer to form the desired first capacitor electrode;  4) etching away leaving at least any portion of the dielectric thin film including at least the first capacitor electrode to form a desired capacitor dielectric;  5) removing any part of the metal foil that has appeared by removing the dielectric thin film to expose the cured insulating layer of the pre-preda;  6) removing the insulating layer exposed by the laser irradiation to form a hole, thereby exposing the inner conductor circuit;  .7) forming a 0.1-5 m metal layer on the substrate surface; 8) a step of forming a plating resist except for an arbitrary portion including a hole; 9) forming a 10-50 urn metal layer on the surface of the substrate other than where the plating resist is formed, and electrically connecting the circuit patterns between the layers;  10) etching and removing the 0.1 to 5 m metal layer formed on the substrate surface;  11) A built-in capacitor characterized by having a step of forming a conductor pattern including a desired second capacitor electrode by etching and removing at least an arbitrary portion including a capacitor dielectric and a hole converted into a conductor. Manufacturing method of multilayer wiring board.  27. The built-in capacitor according to claim 26, wherein the metal layer formed on the surface of the dielectric thin film includes at least one or more metal layers selected from the group consisting of chromium, molybdenum, titanium, and Nigel. A method for manufacturing a multilayer wiring board. 28. Manufacture of multilayer circuit boards with built-in capacitors using materials for multilayer circuit boards with built-in capacitors in which a dielectric thin film with a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 m is provided on the surface of metal foil The method,  1) laminating on the surface of a metal foil of a material for a multilayer wiring board with a built-in capacitor to a substrate having a conductor circuit via a pre-preda;  2) forming 0.1 to 5 metal layers on the surface of the dielectric thin film; 3) forming a metal plating resist, leaving any portion including the first capacitor electrode;  4) forming a first capacitor electrode of 10 to 50 m by metal plating;  5) removing the metal-plated resist;  6) Etching and removing the 0.1 to 5 m metal layer formed on the surface of the dielectric thin film;  7) etching away leaving at least any portion of the dielectric thin film including at least the first capacitor electrode to form a desired capacitor dielectric; 8) Remove any part of the metal foil that appeared by removing the dielectric thin film by etching. Exposing the insulating layer of the cured pre-preda;  9) removing the insulating layer exposed by the laser irradiation to form a hole and exposing the inner conductor circuit;  10) a step of forming a metal layer of 0.1 to 5 m on the surface of the substrate; 1 1) a step of forming a plating resist except for an arbitrary portion including a hole;  12) forming a metal layer of 10 to 50 Zm on the surface of the substrate other than where the plating resist is formed, and electrically connecting the circuit patterns between the layers;  13) etching away the metal layer of 0.1 to 5 / m formed on the substrate surface;  14) A built-in capacitor, which comprises a step of forming a conductor pattern including a desired second capacitor electrode by etching and removing at least an arbitrary portion including a capacitor dielectric and a hole converted into a conductor. Manufacturing method of multilayer wiring board.  29. The capacitor according to claim 28, wherein the metal layer formed on the surface of the dielectric thin film includes at least one metal layer selected from the group consisting of chromium, molybdenum, titanium, and nickel. Manufacturing method of built-in multilayer wiring board.  30. The multilayer wiring board with a built-in capacitor according to claim 28 or 29, wherein the metal plating includes at least one metal selected from the group consisting of copper, silver, tin, nickel, and zinc. Method. .  31. Manufacture of multilayer wiring boards with built-in capacitors using materials for multilayer wiring boards with built-in capacitors in which a dielectric thin film with a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 m is provided on the surface of metal foil The method is:  1) laminating on the surface of a metal foil of a material for a multilayer wiring board with a built-in capacitor to a substrate having a conductor circuit via a pre-preda; 2) Form a 10 to 50 m metal layer on any part of the surface of the dielectric thin film using a conductive paste that is metallized by a chemical reaction, Forming a capacitor electrode;  3) forming a desired capacitor dielectric by etching away the dielectric thin film, leaving at least an arbitrary portion including at least the first capacitor electrode;  4) removing any portion of the metal foil that has appeared by removing the dielectric thin film by etching to expose the cured insulating layer of the pre-preda;  5) removing the insulating layer exposed by the laser irradiation to form a hole, thereby exposing the inner conductor circuit;  6) forming 0.1-5 metal layers on the substrate surface; 7) a step of forming a plating resist except for an arbitrary portion including a hole; and 8) forming a metal layer of 10 to 50 on the substrate surface other than the portion where the plating resist is formed to form a circuit pattern between the layers. Electrically connecting;  9) etching away the 0.1-5 x m metal layer formed on the substrate surface;  10) A capacitor comprising a step of forming a conductor pattern including a desired second capacitor electrode by etching and removing at least an arbitrary portion including a capacitor dielectric and a hole converted into a conductor. Manufacturing method of built-in multilayer wiring board.  32. The metal particles of the conductive paste metallized by a chemical reaction include at least one metal selected from the group consisting of gold, platinum, silver, copper, palladium, and ruthenium, and 32. The method for producing a multilayer wiring board with a built-in capacitor according to claim 31, wherein the average particle size is 0.1 to 10 nm.  33. A capacitor using a multilayer wiring board material with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 100 to 200 and a film thickness of 0.05 to 2 m is provided on the surface of a metal foil. A method for manufacturing a built-in multilayer wiring board, comprising:  1) a step of laminating on a surface of a metal foil of a material for a multilayer wiring board with a built-in capacitor to a substrate having a conductor circuit via a pre-predader; 2) Remove any part of the dielectric thin film by etching and remove Forming a sensor dielectric;  3) removing any portion of the metal layer that has appeared by removing the dielectric thin film by etching and exposing the cured insulating layer of the pre-preda;  4) forming a hole by removing the insulating layer exposed by the laser irradiation, thereby exposing the inner conductor circuit;  5) forming 10 to 50 metal layers on the surface of the substrate on which the capacitor dielectric is formed and the surface in the hole;  6) A multilayer wiring with a built-in capacitor, comprising a step of forming a conductor pattern including a desired second capacitor electrode by etching and removing at least an arbitrary portion including a capacitor dielectric and a hole converted into a conductor. The method of manufacturing the board.  34. Via a pre-preparer on the metal foil surface of a multilayer wiring board material with a built-in capacitor in which a dielectric thin film with a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 m is provided on the surface of the metal foil A substrate having a conductor circuit to be laminated, characterized in that the substrate has two or more conductor layers, and the circuit pattern of the adjacent conductor layer is connected at arbitrary locations by holes made into conductors. A method for producing a multilayer wiring board with a built-in capacitor according to any one of claims 16 to 33. 35. The method according to claim 16, wherein the method for etching and removing the dielectric thin film is any one of an ion beam etching method, a RIE (Reactive Ion Etching) method, and a solution etching method. The method for producing a multilayer wiring board with a built-in capacitor according to any one of the above.  36. The method for manufacturing a multilayer wiring board with a built-in capacitor according to any one of claims 16 to 35, wherein the second capacitor electrode is a ground layer or a power supply layer of the multilayer wiring board. 37. The method for manufacturing a multilayer wiring board with a built-in capacitor according to any one of claims 16 to 36, wherein the insulating material of the substrate is made of resin and glass woven fabric or glass nonwoven fabric. 38. The method according to any one of claims 16 to 37, wherein the resin used as the insulating material of the substrate is a thermosetting resin, and the glass transition point temperature thereof is 170 ° C or more. The method for producing a multilayer wiring board with a built-in capacitor according to any one of the above. 39. The substrate has a via hole for connecting the conductive layers inside the substrate, and has a smooth metal layer on the surface. The surface of the substrate has a relative dielectric constant of 10 to 2000 and a film thickness of 0.000. A substrate for a multilayer wiring board with a built-in capacitor, wherein a dielectric thin film of 0.5 to 2 m is formed.  40. The substrate for a multilayer wiring board with a built-in capacitor according to claim 39, wherein the via holes are electrically connected by metal plating.  41. The substrate for a multilayer wiring board with a built-in capacitor according to claim 39, wherein the via holes are electrically connected by a conductive paste composed of a metal filler and a resin.  42. The multilayer wiring board with a built-in capacitor according to claim 39 or claim 41, wherein the via holes are electrically connected by a conductive paste which is metallized by a chemical reaction. substrate.  4 3. The dielectric thin film is made of barium titanate, strontium titanate, calcium titanate, magnesium titanate, lead titanate, bismuth titanate, titanium dioxide, barium zirconate, calcium zirconate, lead zirconate. 40. A film comprising any one of them, two or more solid solutions containing any of these, or a film composed of two or more laminates containing any of these. A substrate for a multilayer wiring board with a built-in capacitor according to the above item. 44. The method for forming the dielectric thin film according to any one of the vacuum deposition method, the ion plating method, the CVD (Chemical Vapor Deposition) method, the sputtering method, and the sol-gel method. The substrate for a multilayer wiring board with a built-in capacitor according to any one of claims 39 to 43. 45. It is characterized that the substrate temperature at the time of forming the dielectric thin film is 25 to 350 ° C. The substrate for a multilayer wiring board with a built-in capacitor according to any one of claims 39 to 44.  46. The substrate for a multilayer wiring board with a built-in capacitor according to any one of claims 39 to 45, wherein the insulating material of the substrate comprises a resin and a glass woven fabric or a glass nonwoven fabric.  47. The resin according to claim 39, wherein the resin used as the insulating material of the substrate is a thermosetting resin, and its glass transition temperature is 170 ° C. or higher. 7. The substrate for a multilayer wiring board with a built-in capacitor according to any one of 6. 48. The metal layer is made of copper, and at least one metal film selected from the group consisting of platinum, gold, silver, palladium, ruthenium, and iridium is formed on the surface of the metal as a copper oxide protective film. The substrate for a multilayer wiring board with a built-in capacitor according to any one of claims 39 to 47, wherein the substrate is provided.  49. The metal layer is made of copper, and at least one metal film selected from the group consisting of chromium, molybdenum, titanium, and nickel is provided as a metal that forms a stable self-oxidizing film on its surface. The substrate for a multilayer wiring board with a built-in capacitor according to any one of claims 39 to 47.  50. The substrate for a multilayer wiring board with a built-in capacitor according to any one of claims 39 to 49, wherein the metal layer has a surface roughness of 0.01 to 0.5 m.  51. A method for manufacturing a multilayer wiring board with a built-in capacitor using the substrate for a multilayer wiring board with a built-in capacitor according to any one of claims 39 to 50 as an inner layer board,  1) forming a 10 to 50 m metal layer on the surface of the dielectric thin film;  2) forming a desired first capacitor electrode by etching away leaving any part of the metal layer; 3) any dielectric layer including at least a first capacitor electrode; Etching away leaving portions to form the desired capacitor dielectric; 4) a step of forming a conductor pattern including a desired second capacitor electrode by etching and removing at least an arbitrary portion of the metal layer, which has appeared by removing the dielectric thin film, including the capacitor dielectric. Manufacturing method of multilayer wiring board with built-in capacitor.  52. The method according to claim 51, wherein the metal layer formed on the surface of the dielectric thin film includes at least one or more metal layers selected from the group consisting of chromium, molybdenum, titanium, and nickel. A method for producing the multilayer wiring board with a built-in capacitor according to the above. 53. A method for producing a multilayer wiring board with a built-in capacitor using the substrate for a multilayer wiring board with a built-in capacitor according to any one of claims 39 to 50 as an inner layer board,  1) forming a 0.1 to 5 m metal layer on the surface of the dielectric thin film;  2) forming a metal plating resist, leaving any portion including the first capacitor electrode;  3) forming a first capacitor electrode of 10 to 50; m by metal plating;  4) removing the metal-plated resist;  5) a step of etching away the metal layer of 0.1-5 m formed on the surface of the dielectric thin film;  6) forming a desired capacitor dielectric by etching away the dielectric thin film, leaving any portion including at least the first capacitor electrode;  7) A step of forming a conductor pattern including a desired second capacitor electrode by etching and removing at least an arbitrary portion of the metal layer that has appeared by removing the dielectric thin film, including at least the capacitor dielectric. Manufacturing method of multilayer wiring board with built-in capacitor. 5 4. The metal layer formed on the surface of the dielectric thin film is made of chromium, molybdenum, titanium, The method for producing a multilayer wiring board with a built-in capacitor according to claim 53, comprising at least one or more metal layers selected from the group consisting of nickel. 55. The capacitor according to claim 53, wherein the metal plating includes at least one metal selected from the group consisting of copper, silver, tin, nickel, and zinc. Manufacturing method of built-in multilayer wiring board.  56. A method for producing a multilayer wiring board with a built-in capacitor, wherein the substrate for a multilayer wiring board with a built-in capacitor according to any one of claims 39 to 50 is used as an inner layer board.  1) A metal layer of 10 to 50 m is formed on an arbitrary portion of the surface of the dielectric thin film by using a conductive paste which is metallized by a chemical reaction to form a desired first capacitor electrode. Forming,  2) a step of forming a desired capacitor dielectric by etching away the dielectric thin film while leaving an arbitrary portion including at least the first capacitor electrode;  3) A step of forming a conductor pattern including a desired second capacitor electrode by removing the dielectric thin film by etching while leaving at least an arbitrary portion including the capacitor dielectric of the exposed metal layer. Manufacturing method of multilayer wiring board with built-in capacitor.  57. The metal particles of the conductive paste that are metallized by a chemical reaction contain at least one metal selected from the group consisting of gold, platinum, silver, copper, palladium and ruthenium, and their average The method for producing a multilayer wiring board with a built-in capacitor according to claim 56, wherein the particle size is 0.1 to 10 nm.  58. A method for manufacturing a multilayer wiring board with a built-in capacitor using the substrate for a multilayer wiring board with a built-in capacitor according to any one of claims 39 to 50 as an inner layer board,  1) forming a desired capacitor dielectric by etching away leaving any part of the dielectric thin film; 2) 10 to 50; Um metal layer on the substrate surface on which the capacitor dielectric is formed Forming a;  3) having a step of forming a desired first capacitor electrode, second capacitor electrode, and any conductor pattern electrically insulated from the capacitor electrode by etching and removing any part of the metal layer, A method for producing a multilayer wiring board with a built-in capacitor.  59. The method according to any of claims 51 to 58, wherein the method of etching and removing the dielectric thin film is any one of an ion beam etching method, an RIE (Reactive Ion Etching) method, and a solution etching method. 13. The method for producing a multilayer wiring board with a built-in capacitor according to any one of the above. 60. The method for manufacturing a multilayer wiring board with a built-in capacitor according to any one of claims 51 to 59, wherein the second capacitor electrode is a ground layer or a power supply layer of the multilayer wiring board.  61. A multilayer wiring board having a plurality of insulating layers, a plurality of conductive layers, and conductive via holes electrically connecting the conductive layers, and a dielectric constant of at least one insulating layer of 20 to 50. 2000, a dielectric thin film having a thickness of 0.1 to 1 m, and a multilayer wiring board with a built-in capacitor having electrodes facing the insulating layer,  1) The pattern of the conductor layer that forms the first capacitor electrode all forms the capacitor electrode,  2) The projection surface of the dielectric thin film includes the projection surface of the first capacitor electrode.3) The conductor layer forming the second capacitor electrode is electrically insulated from the second capacitor electrode. A multilayer wiring board with a built-in capacitor, characterized by having at least one pattern.  62. A multilayer wiring board having a plurality of insulating layers, a plurality of conductive layers, and conductive via holes electrically connecting the conductive layers, and a dielectric constant of at least one insulating layer of 20 to 50. 2000, and a dielectric thin film with a thickness of 0.1 to 1 m, a multilayer wiring board with a built-in capacitor having electrodes facing the insulating layer, 1) The dielectric thin film that forms the dielectric of the capacitor Has one capacitor electrode,  2) A multilayer wiring board with a built-in capacitor, characterized in that the conductor layer forming the first capacitor electrode is electrically connected to the second capacitor electrode at all ends of the dielectric thin film. 63. The multilayer wiring board with a built-in capacitor according to claim 61 or 62, wherein the second capacitor electrode is a ground layer or a power supply layer of the multilayer wiring board.  6 4. The dielectric thin film is any of barium titanate, strontium titanate, potassium titanate, magnesium titanate, lead titanate, bismuth titanate, titanium dioxide, barium zirconate, calcium zirconate, and lead zirconate Or a film comprising two or more solid solutions containing any of these, or a laminate comprising two or more kinds of solid solutions containing any of these. 2. The multilayer wiring board with a built-in capacitor according to the item 1. 65. The multilayer wiring board with a built-in capacitor according to any one of claims 61 to 64, wherein the insulating material of the substrate is made of a resin and a glass woven fabric or a glass nonwoven fabric.  66. The resin used for the insulating material of the substrate is a thermosetting resin, and has a glass transition point temperature of 170 ° C or more. A multilayer wiring board with a built-in capacitor according to any one of the above. 6 7. The second capacitor electrode is made of copper, and has on its surface at least one kind selected from the group consisting of platinum, gold, silver, palladium, ruthenium, iridium, chromium, molybdenum, titanium, and nickel. The multilayer wiring board with a built-in capacitor according to any one of claims 61 to 66, characterized by including the metal layer of (1). 68. The multilayer wiring board with a built-in capacitor according to any one of claims 61 to 67, wherein the surface roughness of the second capacitor electrode is from 0.01 to 0.0. 6 9. The first capacitor electrode is copper, silver, tin, nickel, zinc, chromium, molybdenum 69. The multilayer wiring board with a built-in capacitor according to claim 61, comprising at least one or more metal layers selected from the group consisting of den, titanium and nickel.  70. The first capacitor electrode is made of a conductive paste metallized by a chemical reaction, and the metal is at least one selected from the group consisting of platinum, gold, silver, copper, tin, palladium, and ruthenium. 69. The multilayer wiring board with a built-in capacitor according to claim 61, comprising the above metal. 71. A semiconductor device comprising a semiconductor chip mounted on the multilayer wiring board with a built-in capacitor according to any one of claims 61 to 70. 72. A material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film with a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 m is provided on one side of the metal foil A method for manufacturing a multilayer wiring board with a built-in capacitor using a substrate provided on at least one side of an insulating material as described above,  1) forming a metal layer to be a capacitor electrode at a predetermined position on the dielectric thin film on the substrate surface;  2) forming an etching resist on at least the metal layer on the substrate surface;  3) etching the dielectric thin film by an etchant containing a chelating agent and hydrogen peroxide;  4) A method of manufacturing a multilayer wiring board with a built-in capacitor, comprising: a step of removing an etching resist after wet etching. 73. The chelating agent concentration of Etchant is 0.001 to 0.5 mol / l, the concentration of hydrogen peroxide is 1 to 50 wt%, and the pH of Etchant is in the range of 2 to 7. 73. The method for producing a multilayer wiring board with a built-in capacitor according to claim 72, wherein: 7.4. The chelating agents are ethylenediaminetetraacetic acid (EDTA), hydroxyethyl imino diacetic acid (HI DA), imino diacetic acid (I DA;), dihydroxyethyl dali. The method for producing a multilayer wiring board with a built-in capacitor according to claim 72 or 73, wherein the method is at least one selected from the group consisting of syn (DHEG) and an alkali salt thereof.  75. A material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 100 to 200 and a film thickness of 0.05 to 2 m is provided on one side of Is a method of manufacturing a multilayer wiring board with a built-in capacitor using a substrate provided on at least one side of an insulating material so as to be in contact with an insulating material,  1) forming a metal layer to be a capacitor electrode at a predetermined position on the dielectric thin film on the substrate surface;  2) forming an etching resist on at least the metal layer on the substrate surface;  3) jet etching the dielectric thin film with an etchant containing at least one acid selected from the group consisting of sulfuric acid, hydrochloric acid, phosphoric acid, nitric acid and acetic acid and hydrogen peroxide;  4) A method for producing a multilayer wiring board with a built-in capacitor, comprising: (a) removing an etching resist after the etching. 76. The multilayer capacitor built-in according to claim 75, wherein the acid concentration of the etchant is 1 to 3 O wt% and the hydrogen peroxide concentration is 1 to 5 O wt%. Manufacturing method of wiring board. 77. The method for manufacturing a multilayer wiring board with a built-in capacitor according to any one of claims 72 to 76, wherein a photosensitive dry film is used as an etching resist. 7 8. The thickness of the photosensitive dry film is 1 to 3 times the thickness of the metal layer that will be the capacitor electrode protected from wet etching by the etching resist formed by the photosensitive dry film. The method for producing a multilayer wiring board with a built-in capacitor according to claim 77. 79. The capacitor according to any one of claims 72 to 78, wherein the wet etching of the dielectric thin film is performed with an etchant at a liquid temperature of 20 to 45 ° C. A method of manufacturing a multilayer wiring board.  80. The dielectric thin film is any of barium titanate, strontium titanate, calcium titanate, magnesium titanate, lead titanate, bismuth titanate, titanium dioxide, barium zirconate, calcium zirconate and lead zirconate. Or a solid solution containing any two or more of these, or a film comprising a laminate containing any two or more of these. Manufacturing method of built-in multilayer wiring board. 8 1. A capacitor using a multilayer wiring board material with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 100 to 2000 and a film thickness of 0.05 to 2 m is provided on one side of metal foil A. A method of manufacturing a multilayer wiring board with a built-in capacitor,  1) laminating a metal foil B on the surface of the metal foil A of the material for the multilayer wiring board with a built-in capacitor via an insulating material to form a substrate;  2) etching and removing an arbitrary portion of the metal foil B to expose an insulating layer formed from the insulating material;  3) a step of removing the exposed insulating layer by laser irradiation to form a hole and exposing the metal foil A;  4) forming a metal layer on both sides of the substrate surface including the inside of the hole; 5) forming a first capacitor electrode pattern of any shape by etching from a metal layer on a dielectric thin film of a material for a multilayer wiring board with a built-in capacitor;  6) a step of etching a capacitor dielectric of any shape including the first capacitor electrode pattern from the exposed dielectric thin film,  7) A multilayer wiring with a built-in capacitor, comprising a step of etching a second capacitor electrode of an arbitrary shape including a capacitor dielectric pattern from a metal foil A that has appeared by removing a dielectric thin film. Plate manufacturing method. 82.The method of manufacturing a multilayer wiring board with a built-in capacitor according to claim 81, wherein in the etching step of 5) or 7), a circuit having an arbitrary shape is formed on the surface of the substrate on which the metal foil B is laminated. Forming a multilayer wiring board with a built-in capacitor. 8 3. A capacitor using a multilayer wiring board material with a built-in capacitor, in which a dielectric thin film having a relative dielectric constant of 100 to 200 and a film thickness of 0.05 to 2 xm is provided on one side of metal foil A. A method of manufacturing a multilayer wiring board with a built-in capacitor,  1) laminating a metal foil B on the surface of the metal foil A of the material for the multilayer wiring board with a built-in capacitor via an insulating material to form a substrate;  2) a step of exposing the metal foil A by irradiating an arbitrary portion of the metal foil B with a laser, thereby simultaneously removing the metal foil B and the insulating layer formed from the insulating material to form a hole, and exposing the metal foil A;  3) forming a metal layer on both sides of the substrate surface including the inside of the hole; and 4) forming a first capacitor electrode pattern of any shape from the metal layer on the dielectric thin film of the material for the multilayer wiring board with a built-in capacitor. Forming by etching,  5) a step of etching a capacitor dielectric of an arbitrary shape including the first capacitor electrode pattern from the exposed dielectric thin film,  6) A multilayer wiring with a built-in capacitor, characterized by having a step of etching a second capacitor electrode of an arbitrary shape including a capacitor dielectric pattern from the metal foil A that has appeared after removing the dielectric thin film. Plate manufacturing method. 8 4.The method for manufacturing a multilayer wiring board with a built-in capacitor according to claim 83, wherein in the etching step of 4) or 6), a circuit of an arbitrary shape is formed on the surface of the substrate on which the metal foil B is laminated. A method for producing a multilayer wiring board with a built-in capacitor. 8 5. Use a material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 Hm is provided on one side of the metal foil A. A method for manufacturing a multilayer wiring board with a built-in capacitor,  1) Insulation in which through-holes are provided at arbitrary locations on the surface of metal foil A, which is a material for a multilayer wiring board with a built-in capacitor, and the through-holes are filled with a conductive paste containing a thermosetting resin and a metal filler. A process of laminating a metal foil B via a material to form a substrate, 2) forming a metal layer on at least the dielectric thin film side of the substrate surface; 3) forming a first capacitor electrode pattern of any shape by etching from a metal layer on a dielectric thin film of a material for a multilayer wiring board with a built-in capacitor;  4) forming a capacitor dielectric of any shape including the first capacitor electrode pattern from the exposed dielectric thin film by etching,  5) A multi-layer wiring board with a built-in capacitor, characterized by comprising a step of etching a second capacitor electrode of an arbitrary shape including a capacitor dielectric pattern on the metal foil A that has appeared by removing the dielectric thin film. Manufacturing method. 86. A capacitor using a material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 100 to 200 and a film thickness of 0.05 to 2 is provided on one side of the metal foil A. A method of manufacturing a built-in multilayer wiring board,  1) An insulating material in which a through hole is provided at an arbitrary position on the surface of the metal foil A of the material for a multilayer wiring board with a built-in capacitor, and the through hole is filled with a conductive paste which is metallized by a chemical reaction. Laminating a metal foil B through a substrate to form a substrate,  2) forming a metal layer on at least the dielectric thin film side of the substrate surface; 3) forming a first capacitor electrode pattern of any shape by etching from a metal layer on a dielectric thin film of a material for a multilayer wiring board with a built-in capacitor;  4) forming a capacitor dielectric of any shape including the first capacitor electrode pattern from the exposed dielectric thin film by etching,  5) A multi-layer wiring with a built-in capacitor, comprising a step of etching a second capacitor electrode of an arbitrary shape including a capacitor dielectric pattern from a metal foil A that has appeared by removing a dielectric thin film. Plate manufacturing method. 87. The method for manufacturing a multilayer wiring board with a built-in capacitor according to claim 85 or 86, wherein in the etching step of 3) or 5), a circuit having an arbitrary shape is formed on the surface of the substrate on which the metal foil B is laminated. Forming a multilayer wiring board with a built-in capacitor. 8 8. Chromium, molybdenum, titanium and titanium are placed between the dielectric thin film and the metal layer. 88. The method for producing a multilayer wiring board with a built-in capacitor according to any one of claims 81 to 87, comprising a step of forming at least one other metal layer selected from the group consisting of nickel and nickel.  8 9. A capacitor using a material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 100 to 200 and a film thickness of 0.05 to 2 m is provided on one side of the metal foil A. A method of manufacturing a multilayer wiring board with a built-in capacitor,  1) laminating a metal foil B on the surface of the metal foil A of the material for the multilayer wiring board with a built-in capacitor via an insulating material to form a substrate;  2) etching and removing an arbitrary portion of the metal foil B to expose an insulating layer formed from the insulating material;  3) removing the insulating layer exposed by the laser irradiation, forming a hole, and exposing the metal foil A;  4) forming 0.1 to 5 metal layers on both sides of the substrate including the inside of the hole;  5) forming a metal-plated resist on the substrate surface, leaving a portion serving as the first capacitor electrode and an arbitrary portion including a hole;  6) forming a conductive pattern on the portion including the first capacitor electrode and the portion including the hole by metal plating;  7) removing the metal-coated resist;  8) etching away the metal layer of 0.1 to 5 ^ m exposed on the substrate surface;  9) a step of etching a capacitor dielectric of an arbitrary shape including the first capacitor electrode pattern from the exposed dielectric thin film,  (10) a step of forming a second capacitor electrode of any shape including a capacitor dielectric pattern from the metal foil A that has appeared by removing the dielectric thin film, by etching; 1 1) There is a step of forming a circuit by etching the exposed metal foil B. A method for producing a multilayer wiring board with a built-in capacitor. 90. A material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 10 to 200 and a film thickness of 0.05 to 2. A method for manufacturing a multilayer wiring board with a built-in capacitor to be used,  1) laminating a metal foil B on the surface of the metal foil A of the material for the multilayer wiring board with a built-in capacitor via an insulating material to form a substrate;  2) a step of exposing the metal foil A by irradiating an arbitrary portion of the metal foil B with a laser to simultaneously remove the metal foil B and the insulating layer formed from the insulating material to form a hole,  3) forming 0.1 to 5 metal layers on both sides of the substrate including the inside of the hole;  4) a step of forming a metal-plated resist on the substrate surface, leaving a portion serving as a first capacitor electrode and an arbitrary portion including a hole;  5) forming a conductor pattern on the portion including the first capacitor electrode and the portion including the hole by metal plating;  6) removing the metal-plated resist;  7) etching away 0.1 to 5 metal layers exposed on the substrate surface;  8) forming a capacitor dielectric of an arbitrary shape including the first capacitor electrode pattern from the exposed dielectric thin film by etching;  9) forming a second capacitor electrode of any shape including a capacitor dielectric pattern from the metal foil A that has appeared after removing the dielectric thin film;  10) A method of manufacturing a multilayer wiring board with a built-in capacitor, comprising a step of forming a circuit by etching the exposed metal foil B. 9 1. A capacitor using a material for a multilayer wiring board with a built-in capacitor, in which a dielectric thin film having a relative dielectric constant of 100 to 2000 and a film thickness of 0.05 to 2 pi is provided on one side of the metal foil A. A method of manufacturing a multilayer wiring board with a built-in capacitor, 1) On the surface of the metal foil A of the multilayer wiring board with a built-in capacitor, a pre-preparer that has a through hole at any location and is filled with a conductive paste containing a thermosetting resin and a metal filler is used. A process of laminating a metal foil B through a substrate to form a substrate,  2) forming a 0.1 to 5 im metal layer on at least the surface of the substrate on the side of the dielectric thin film;  3) forming a metal-plated resist on the substrate surface except for an arbitrary portion including a portion serving as a first capacitor electrode;  4) a step of forming a conductor pattern on a portion including a portion to be the first capacitor electrode by metal plating;  5) removing the metal-plated resist;  6) etching away the 0.1-5 m metal layer exposed on the substrate surface;  7) a step of etching a capacitor dielectric having an arbitrary shape including the first capacitor electrode pattern from the exposed dielectric thin film,  8) From the metal foil A that appeared after removing the dielectric thin film, form a second capacitor electrode of any shape including the capacitor dielectric pattern by etching, and form a circuit by etching the exposed metal foil B. A method for producing a multilayer wiring board with a built-in capacitor, comprising the steps of: 92. A multilayer wiring board with a built-in capacitor using a material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film with a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 2 m is provided on one side of metal foil A A manufacturing method,  1) On the surface of the metal foil A of the multilayer wiring board with a built-in capacitor, a pre-preparer is provided in which through holes are provided at arbitrary locations and the through holes are filled with a conductive paste that is metallized by a chemical reaction. And laminating the metal foil B through the 2) A metal layer of 0.1 to 5 _im on at least the dielectric thin J3 surface of the substrate Forming a;  3) forming a metal-plated resist on the substrate surface, leaving an arbitrary portion including a portion to be the first capacitor electrode;  4) a step of forming a conductor pattern on a portion including a portion to be the first capacitor electrode by metal plating;  5) removing the metal-plated resist;  6) etching away the 0.1-5 m metal layer exposed on the substrate surface;  7) a step of etching a capacitor dielectric having an arbitrary shape including the first capacitor electrode pattern from the exposed dielectric thin film,  8) From the metal foil A that appeared after removing the dielectric thin film, form a second capacitor electrode of any shape including the capacitor dielectric pattern by etching, and form a circuit by etching the exposed metal foil B. A method for producing a multilayer wiring board with a built-in capacitor, comprising the steps of: 9 3. Whether the 0.1 to 5 m metal layer formed on at least the surface of the dielectric thin film is (1) at least one metal layer selected from the group consisting of chromium, molybdenum, titanium and nickel; (2) at least one metal layer selected from the group consisting of copper, silver, tin, nickel and zinc; or (3) selected from the group consisting of chromium, molybdenum, titanium and nickel. The method according to any one of claims 89 to 92, comprising at least one metal layer and at least one metal layer selected from the group consisting of copper, silver, tin, nickel and zinc. Manufacturing method for multilayer wiring boards with built-in capacitors. 9. The conductive pattern formed by metal plating includes at least one metal selected from the group consisting of copper, silver, tin, nickel and zinc. 3. The method for manufacturing a multilayer wiring board with a built-in capacitor according to any one of 3. 9.5. A metal foil A with a dielectric thin film with a dielectric constant of 100 to 2000 and a J3 thickness of 0.05 to 2 m on one side A method for manufacturing a multilayer wiring board with a built-in capacitor,  1) An insulating material in which a through hole is provided at an arbitrary position on the surface of the metal foil A of the multilayer wiring board material with a built-in capacitor and the through hole is filled with a conductive paste containing a thermosetting resin and a metal filler. Laminating metal foil B via  2) a step of forming a desired first capacitor electrode by forming a metal layer on a desired portion of the surface of the dielectric thin film using a conductive paste which is metallized by a chemical reaction;  3) forming a desired capacitor dielectric by etching away the dielectric thin film leaving any portion including at least the first capacitor electrode;  4) From the metal foil A that appears after removing the dielectric thin film, form a second capacitor electrode of any shape including the capacitor dielectric pattern by etching, and form a circuit by etching the exposed metal foil B. A method for producing a multilayer wiring board with a built-in capacitor, comprising the steps of: 9 6. A capacitor using a material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 100 to 200 and a film thickness of 0.05 to 2 m is provided on one side of the metal foil A. A method of manufacturing a multilayer wiring board with a built-in capacitor,  1) An insulating material in which a through hole is provided at an arbitrary position on the surface of the metal foil A of the material for a multilayer wiring board with a built-in capacitor, and the through hole is filled with a conductive paste that is metallized by a chemical reaction. Laminating a metal foil B through a substrate to form a substrate,  2) forming a metal layer on a desired portion of the surface of the dielectric thin film using a conductive paste that is metallized by a chemical reaction to form a desired first capacitor electrode;  3) forming a desired capacitor dielectric by etching away the dielectric thin film leaving any portion including at least the first capacitor electrode; 4) From the metal foil A that appeared after removing the dielectric thin film, A method for manufacturing a multilayer wiring board with a built-in capacitor, comprising: forming a second capacitor electrode having an arbitrary shape including a capacitor dielectric pattern; and forming a circuit by etching the exposed metal foil B.  9 7. Use a material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 25 m is provided on the surface of the metal foil A. A method of manufacturing a multilayer wiring board with a built-in capacitor,  1) a step of laminating a metal foil B on a surface of a metal foil A of a material for a multilayer wiring board with a built-in capacitor through an insulating material to form a substrate;  2) forming a desired capacitor dielectric by etching away leaving any part of the dielectric thin film;  3) etching and removing an arbitrary portion of the metal foil B to expose an insulating layer formed from the insulating material;  4) removing the insulating layer exposed by the laser irradiation, forming a hole, and exposing the metal foil A;  5 5) a step of forming metal layers on both sides of the substrate surface including the inside of the hole;  6) A multi-layer wiring board with a built-in capacitor, comprising a step of forming desired first capacitor electrodes and second capacitor electrodes by etching and removing any portions of the metal layer and the metal foil A. Manufacturing method.  9 8. Use a material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 10 to 2000 and a film thickness of 0.05 to 20 m is provided on the surface of the metal foil A. A method for manufacturing a multilayer wiring board with a built-in capacitor,  1) laminating a metal foil B on the surface of the metal foil A of the material for the multilayer wiring board with a built-in capacitor via an insulating material to form a substrate;  2) forming a desired capacitor dielectric by etching away leaving any part of the dielectric thin film; .3) By irradiating a laser beam to an arbitrary portion of the metal foil B, the metal foil B and the insulating layer formed from the above insulating material are simultaneously removed to form a hole, and the metal foil A is formed. Exposing,  4) forming a metal layer on both sides of the substrate surface including the inside of the hole; 5) A multi-layer wiring board with a built-in capacitor, comprising a step of forming desired first and second capacitor electrodes by etching and removing any portions of the metal layer and metal foil A. Manufacturing method.  9 9. A capacitor using a material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 100 to 2000 and a film thickness of 0.05 to 2 m is provided on one side of the metal foil A. A method of manufacturing a multilayer wiring board with a built-in capacitor,  1) Insulation in which through-holes are provided at arbitrary locations on the surface of metal foil A, which is a material for a multilayer wiring board with a built-in capacitor, and the through-holes are filled with a conductive paste containing a thermosetting resin and a metal filler. A process of laminating a metal foil B via a material to form a substrate,  2) etching away leaving any portion of the dielectric thin film to form a desired capacitor dielectric;  3) forming a metal layer on at least the surface of the substrate having the capacitor dielectric;  4) a step of forming desired first capacitor electrodes and second capacitor electrodes by etching and removing any portions of the metal layer and the metal foil A, thereby forming a multilayer wiring board with a built-in capacitor. Manufacturing method.  100. A material for a multilayer wiring board with a built-in capacitor in which a dielectric thin film having a relative dielectric constant of 100 to 200 and a film thickness of 0.05 to 2 m is provided on one side of the metal foil A is used. A method for manufacturing a multilayer wiring board with a built-in capacitor, comprising:  1) Insulating material in which through holes are provided at arbitrary locations on the surface of metal foil A, which is a material for a multilayer wiring board with a built-in capacitor, and the through holes are filled with a conductive paste that is metallized by a chemical reaction Laminating a metal foil B via a substrate to form a substrate. 2) Remove any part of the dielectric thin film by etching and remove Forming a denser dielectric;  3) forming a metal layer on at least the surface of the substrate having the capacitor dielectric;  4) A multilayer wiring board with a built-in capacitor, comprising a step of forming desired first capacitor electrodes and second capacitor electrodes by etching and removing any portions of the metal layer and the metal foil A. Manufacturing method. ' 101. The conductive paste metallized by a chemical reaction contains at least one or more metal particles selected from the group consisting of gold, platinum, silver, copper, palladium and ruthenium, and The method for producing a multilayer wiring board with a built-in capacitor according to claim 86, 92, 95, 96 or 100, wherein the average particle size is 0.1 to 10 nm.  102. The method according to any one of claims 81 to 101, wherein the method of etching and removing the dielectric thin film is any one of an ion beam etching method, an RIE (Reactive Ion Etching) method, and a solution etching method. 3. The method for manufacturing a multilayer wiring board with a built-in capacitor according to the above.  103. The method for manufacturing a multilayer wiring board with a built-in capacitor according to any one of claims 81 to 102, wherein the second capacitor electrode is a ground layer or a power supply layer of the multilayer wiring board.  104. The multilayer wiring board with a built-in capacitor according to any one of claims 81 to 103, wherein the insulating material used for forming the insulating layer of the substrate is a pre-predator made of resin and glass woven fabric or glass non-woven fabric. Production method.  105. The insulating material used to form the insulating layer of the substrate is a pre-preda containing a thermosetting resin as a resin, and the thermosetting resin has a glass transition temperature of 1%. The method for producing a multilayer wiring board with a built-in capacitor according to any one of claims 81 to 104, wherein the temperature is 70 ° C or higher. 1.0.6. Dielectric thin film is made of barium titanate, strontium titanate, calcium titanate, magnesium titanate, lead titanate, bismuth titanate, dioxide Titanium, barium zirconate, calcium zirconate, lead zirconate, barium strontium titanate, lead zirconate titanate and lead magnesium niobate-lead titanate, or a solid solution containing at least two of them The material according to any one of claims 81 to 105, wherein a material for a multilayer wiring board with a built-in capacitor, which is a film formed of a body or a laminate including any two or more of these, is used. Manufacturing method of multilayer wiring board with built-in capacitor.  107. The metal foil A is made of copper, and as a metal that forms a copper oxidation protection film on the surface on which the dielectric thin film is formed, a metal consisting of platinum, gold, silver, palladium, ruthenium, and iridium. The method for manufacturing a multilayer wiring board with a built-in capacitor according to any one of claims 81 to 106, wherein a material for a multilayer wiring board with a built-in capacitor provided with at least one selected metal film is used. .  108. A metal selected from the group consisting of chromium, molybdenum, titanium and nickel as a metal whose metal foil A is made of copper and forms a stable autoxidation film on the surface on which the dielectric thin film is formed. The method for producing a multilayer wiring board with a built-in capacitor according to any one of claims 81 to 106, wherein the material for a multilayer wiring board with a built-in capacitor provided with the metal film is used.  109. A material for a multilayer wiring board with a built-in capacitor, wherein the surface roughness of the surface of the metal foil A on which the dielectric thin film is formed is 0.01 to 0.5. 100. The method for producing a multilayer wiring board with a built-in capacitor according to any one of the above items.