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WO2004084294A1 - Method of manufacturing a semiconductor device, semiconductor device obtained by means of said method, and device for carrying outsuch a method - Google Patents

Method of manufacturing a semiconductor device, semiconductor device obtained by means of said method, and device for carrying outsuch a method Download PDF

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Publication number
WO2004084294A1
WO2004084294A1 PCT/IB2004/050257 IB2004050257W WO2004084294A1 WO 2004084294 A1 WO2004084294 A1 WO 2004084294A1 IB 2004050257 W IB2004050257 W IB 2004050257W WO 2004084294 A1 WO2004084294 A1 WO 2004084294A1
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WO
WIPO (PCT)
Prior art keywords
foil
conductor pattern
pattern layer
semiconductor element
bonding tool
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/IB2004/050257
Other languages
French (fr)
Inventor
Johannus W. Weekamp
Gerardus Van Herwijnen
Jacobus P. J. Van Os
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of WO2004084294A1 publication Critical patent/WO2004084294A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4828—Etching
    • H01L21/4832—Etching a temporary substrate after encapsulation process to form leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/753—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/75301—Bonding head
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7565—Means for transporting the components to be connected
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75743—Suction holding means
    • H01L2224/75745—Suction holding means in the upper part of the bonding apparatus, e.g. in the bonding head
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01011—Sodium [Na]
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
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    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
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    • H01L2924/01029—Copper [Cu]
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    • H01L2924/01033—Arsenic [As]
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    • H01L2924/01058—Cerium [Ce]
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    • H01L2924/01079—Gold [Au]
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Definitions

  • the invention relates to a method of manufacturing a semiconductor device, wherein a semiconductor element is provided on one side with a number of connection regions which are electroconductively attached, by means of a metal connection, to a conductor pattern layer provided on a foil, wherein the foil provided with the conductor pattern layer is brought into contact with the semiconductor element in such a manner that a part of the conductor pattern layer is situated opposite a connection region, and wherein ultrasonic energy is transferred to said part of the conductor pattern layer by means of a bonding tool which is brought into contact with the foil, as a result of which said part of the conductor pattern layer is attached to the connection region, and wherein two or more parts of the conductor pattern layer are simultaneously connected to two or more connection regions by means of a single bonding tool.
  • the invention also relates to a semiconductor device thus obtained and to a device for carrying out such a method.
  • Such a method is very suitable for the low-cost manufacture of devices comprising a (semi-)discrete silicon module as the semiconductor element.
  • a (semi-)discrete silicon module as the semiconductor element.
  • Such a method is disclosed in German patent specification DE 199 22 559, which was published on 31 August 2000.
  • a description is given of the way in which a semiconductor element is attached by its connection region to a conductor pattern layer present on a foil by means of a bonding tool to which ultrasonic energy is supplied.
  • the foil is made of a synthetic resin and is situated on the side of the semiconductor element, said foil having an opening at the location of the connection region of the semiconductor element, enabling the conductor pattern layer to be brought into contact with the connection region of the semiconductor element.
  • the bonding tool is provided with a bonding surface having a number of projecting parts.
  • a drawback of the known method resides in that its flexibility is limited. As a matter of fact, if the locations where the connections are made between the conductor pattern layer and the semiconductor element vary, which is normally the case if another semiconductor element is taken into production, another, suitably adapted bonding tool must be used. In addition, the bonding tool is comparatively expensive due to its slightly more complex geometry.
  • a method of the type mentioned in the opening paragraph is characterized in accordance with the invention in that for the foil use is made of a metal foil, a side of the bonding tool facing the foil is embodied so as to be flat, and after the semiconductor element and the conductor pattern layer have been attached to each other, the metal foil is at least partially removed from the conductor pattern layer.
  • the invention is first of all based on the insight that the use of a metal foil enables a flat bonding tool to simultaneously make various connections between a semiconductor element and the conductor pattern.
  • a metal unlike a synthetic resin such as the foil in the known method, enables an efficient transfer of ultrasonic energy without the risk of causing damage to the semiconductor element.
  • the invention is further based on the surprising insight that the drawback of a foil which, like the conductor pattern layer, is electroconductive and hence leads to short circuits, can be readily obviated if the foil can be removed from the conductor pattern layer.
  • the complete foil may be removed, but alternatively part of the foil is removed and the non-removed part is used for definition of contacts, and the like.
  • the foil should be situated only on a side facing away from the semiconductor element and, for example, be removably attached to the conductor pattern layer, for example by means of an adhesive layer.
  • the step of removing the foil from the conductor pattern layer may be very simple and without an adverse effect on the quality of the conductor pattern layer, as will become apparent hereafter.
  • the method is hardly made more complex by this additional step because a step of forming an opening in the foil so that the conductor pattern layer can be brought into contact with a connection region of the semiconductor element can be dispensed with.
  • Said flat bonding tool is suitable for any orientation of the connection regions on the semiconductor element and, in addition to this, it can be readily manufactured. Furthermore, it is still possible, provided the contact surface of the bonding tool is large enough, to form a large number of connections at the same time.
  • the metal used for the metal foil is selectively etchable with respect to the conductor pattern layer, and, after the connections have been made, the foil is removed again by means of selective etching.
  • This method is very simple, as is the manufacture of such a foil that is provided with one or more conductor patterns.
  • a particularly suitable material for such a foil is aluminum, in which case the conductor pattern is made of copper.
  • phosphoric acid can be used as the etchant for selectively etching the foil.
  • Such a, flexible, foil may additionally be very thin. What proved to be suitable is, for example, a 30 ⁇ m thick aluminum foil which is provided with a copper conductor pattern (layer) having a thickness of 10 ⁇ m.
  • the conductor pattern layer is formed as a conductor pattern on the foil before the semiconductor element is attached thereon.
  • the starting point of the method in accordance with the invention thus is a foil on which one or more conductor patterns have already been formed.
  • the conductor pattern layer may alternatively comprise a continuous layer of a conductive material. If so, the desired conductor pattern can be readily formed therein after the foil has been removed from the conductor pattern layer by means of etching or otherwise.
  • To form said conductor pattern in the conductor pattern layer use may be made of photolithography and etching. Preferably this takes place after the encapsulation has been provided, so that the semiconductor element is protected during said process. It will be obvious that, in this patent application, a semiconductor pattern layer is to be taken to mean a - substantially - uniform continuous conductive layer as well as an already-formed conductor pattern.
  • the bonding tool is maintained in a substantially fixed position, the side of the foil facing away from the conductor pattern is brought into contact with the bonding tool, and on the side of the semiconductor element provided with the connection regions the semiconductor element is aligned with respect to the conductor pattern layer by means of a movable holder and is held against or pressed onto said conductor pattern layer.
  • the holder may be, for example, a movable arm of a robot that picks up the semiconductor elements and takes them to the bonding position.
  • the "hand" of the arm used to grip the element may advantageously be, for example, a vacuum pincette.
  • the, preferably strip-shaped, foil is provided with a large number of conductor patterns, and after the connection has been made between one of the conductor patterns and the connection regions of the semiconductor element, the foil is displaced, in which process the semiconductor element is released by the holder and, together with the foil, transported from the position of the bonding tool, a subsequent (part of the) conductor pattern layer being brought to the position of the bonding tool, and a subsequent semiconductor element being picked up by the movable holder and being attached to the next (part of the) conductor pattern layer.
  • the foil is preferably supported, on either side of the bonding tool, by a supporting tool, and during attaching the semiconductor element to the conductor pattern layer, the foil on either side of the holder is held against or pressed onto the supporting members by means of a movable stamp.
  • This too contributes to an efficient transfer of the ultrasonic energy and to a low risk of damage to the semiconductor elements.
  • One of the stamps will of course exert pressure on the foil via a semiconductor element that has already been placed. This is not objectionable.
  • the semiconductor element after attaching a semiconductor element to the conductor pattern layer and before removing the foil, the semiconductor element is provided with an isolating encapsulation.
  • the foil can be used as a wall, as it were, of a mold that may be used, for example, for providing a synthetic resin encapsulation of an epoxy material by means of injection molding.
  • the invention also comprises a semiconductor device obtained by means of a method in accordance with the invention.
  • the invention further comprises a device for carrying out a method in accordance with the invention, which device comprises a bonding tool by means of which ultrasonic energy can be delivered, via a foil provided with a conductor pattern layer, for attaching the connection regions of a semiconductor element to the conductor pattern layer, and by means of which two or more parts of the conductor pattern layer can be simultaneously connected to two or more connection regions, characterized in that a side of the bonding tool facing the foil is embodied so as to be flat.
  • the bonding tool is in a substantially fixed position
  • the device comprises means for providing the foil, by the side facing away from the conductor pattern layer, on the bonding tool, and a movable holder by means of which the semiconductor element is aligned, on the side provided with the connection regions, with respect to the conductor pattern layer and held against or pressed onto said conductor pattern layer.
  • Such means may comprise, for example, a system of driven bobbins from which the foil is wound off and onto which the foil is rewound.
  • the device is also suited for handling a foil having a (large) number of conductor patterns, and the foil can be moved away from the position of the bonding tool after the connection between one of the conductor patterns and the connection regions of the semiconductor element has been made.
  • the holder is preferably provided with means for picking up semiconductor elements.
  • a supporting tool for the foil is situated on either side of the bonding tool, and on either side of the movable holder there is a movable stamp by means of which the foil, which may or may not be provided with a semiconductor element, is held against or pressed onto the supporting members.
  • the stamps may be synchronous or not and are provided, in any case, with a drive operating in accordance with a suitable rhythm. Also the pressure exerted by the stamps may be adjustable.
  • the supporting members are preferably in a fixed position and, like the stamps, may be embodied so as to be in one piece or two separate pieces.
  • the movable holder is preferably embodied so as to be a vacuum pincette. The simplest and most reliable way of operating the device is achieved if the bonding tool is situated below the foil to be placed and the holder is situated above said foil.
  • Figs. 1 through 4 are diagrammatic cross-sectional views at right angles to the thickness direction, of a semiconductor device in successive stages of the manufacture by means of an embodiment of a method in accordance with the invention.
  • Figs. 5 through 11 are diagrammatic perspective views of a device in accordance with the invention for applying the method in accordance with the invention in successive stages of the implementation of the method.
  • Figs. 1 through 4 are diagrammatic cross-sectional views at right angles to the thickness direction, of a semiconductor device in successive stages of the manufacture by means of an embodiment of a method in accordance with the invention.
  • the finished semiconductor device 10 (see Fig. 4) comprises a semiconductor body 1 provided with connection regions 2, which in this case take the form of so -termed bumps 2, in this case of gold, which are provided on electroconductive regions of the body 1.
  • the semiconductor body 1 is surrounded by a synthetic resin encapsulation 11 of an epoxy material.
  • the lower side of the device 10 accommodates a conductor pattern 4 which is connected to the bumps 2 and which renders the device 10 suitable for surface mounting.
  • the dimensions of the semiconductor body 1 are, in this example, 400 ⁇ m x 500 ⁇ m and the thickness is 300 ⁇ m.
  • the semiconductor body 1 is attached by its bumps 2 onto a conductor pattern 4 by means of ultrasonic bonding.
  • the conductor pattern 4 having a thickness in this case of 10 ⁇ m, which is covered with 2 ⁇ m nickel and 1 ⁇ m gold, is formed on a (flexible) foil 3, in this case a 30 ⁇ m thick aluminum foil.
  • the body 1 is brought to the foil 3 by means of a holder 6 and held against/pressed onto said foil.
  • the foil 3 is supported by a sonotrode 5 by means of which ultrasonic energy is released via the metal foil 3 and the copper pattern 4 provided thereon, resulting in the formation of a metal connection between the bumps 2 and the pattern 4.
  • a number of bumps 2 are simultaneously connected to the pattern 4.
  • the sonotrode 5 is flat and its surface is sufficiently large, and by virtue of the fact that the ultrasonic energy is transferred exclusively via metals. This energy transfer can thus take place in a sufficiently efficient manner and without causing damage to the body 1.
  • the pressure of the holder 6, in this case a vacuum pincette, on the semiconductor body 1 is approximately 500 grams.
  • the sonotrode 5 is operated at a frequency of 40 kHz and an amplitude of 5 ⁇ m.
  • the processing time is 50 msec.
  • Fig. 1 also diagrammatically shows other semiconductor bodies 1', 1" which, respectively, are already attached to a conductor pattern 4 or will, in a next phase of the process, be attached to a subsequent conductor pattern 4. Therefore, the foil 3 is strip-shaped and comprises a large number of juxtaposed conductor patterns 4.
  • the foil 3 provided with the semiconductor bodies 1, 1', 1" is introduced into a mold Ml, M2, and the semiconductor bodies 1, 1', 1" are encapsulated by a synthetic resin encapsulation by introducing an epoxy material 11 into the mold by injection molding.
  • a metal foil which is attached to the - upper side of - the semiconductor bodies 1 and will be part of the devices 10 to be formed.
  • the devices 10 to be formed are removed from the mold Ml, M2.
  • the aluminum foil is removed by means of etching.
  • This process is carried out selectively with respect to the copper conductor pattern layer 4 and, in this case, use is made of a sodium hydroxide (NaOH) solution in water as the etchant.
  • Individual devices 10, as shown in Fig. 4 are then obtained by a separation process, such as sawing, in two mutually perpendicular directions one of which lies in the plane of the drawing and the other is indicated by means of R in the drawing. In this case, the separation technique used is sawing. After that, the device 10 is ready for final assembly.
  • Figs. 5 through 11 are diagrammatic, perspective views of a device in accordance with the invention for applying the method in accordance with the invention in successive stages of the implementation of the method.
  • the device 100 (see Fig. 5) comprises, in addition to a sonotrode 5 which is in a fixed position, two supporting bodies 7 which are in a fixed position on either side of the sonotrode and on which the foil 3 provided with conductor patterns 4 rests.
  • the device 100 is shown in a stage where a body 1' is already attached to the foil and a next body 1 with bumps 2 is transferred by a holder, not shown in Fig. 4, to the foil 3 above the sonotrode 5.
  • a stamp 8 is shown which, like the body 1, is moved towards the foil 3.
  • the foil 3 is moved to the right, for example by means of two bobbins, which are not shown in the drawing.
  • the first bobbin thus contains the "empty" foil 3 which is subsequently unwound from said bobbin.
  • the foil 3 provided with semiconductor bodies 1 is wound on the second bobbin. Subsequently the device is again in a stage like that shown in Fig. 5, and the attaching cycle can be repeated.
  • the wound-up foil 3 provided with semiconductor bodies 1 can then be subjected to further treatments, as indicated hereinabove in the discussion of Figs. 2 through 4.
  • the bobbins may be provided with a translation mechanism in a direction parallel to the axis of the bobbins.
  • the invention is not limited to a method as described in the exemplary embodiment, and within the scope of the invention many variations and modifications are possible to those skilled in the art. For example, it is possible to manufacture devices having a different geometry and/or different dimensions. It is also possible to use different materials for, in particular, the plates. It is further noted that small adaptations enable also an improved heat dissipation to be obtained. It is expressly noted that, in addition to sawing, also cutting or breaking can be used as the mechanical separation technique for shaping the individual semiconductor device. Unlike sawing, where a saw cut-width of material is lost, in the other two techniques in principle hardly any material loss occurs. The loss of material in the case of sawing is comparatively substantial if very small devices are manufactured as is intended in the present invention.
  • a thin foil may also be applied to the rear side of a number of semiconductor elements. This foil may serve as the other wall of a mold during the provision of the encapsulation.
  • the invention can also be used, and is particularly suited, for the manufacture of more integrated semiconductor products.
  • devices can be formed within a single encapsulation which comprise, as it were, a system.
  • a system for controlling a voltage may have, and will have, larger dimensions, of course, particularly in the lateral directions as compared to the semiconductor elements in the examples discussed hereinabove.

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  • Microelectronics & Electronic Packaging (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

The invention relates to a method of manufacturing a semiconductor device (10), wherein a semiconductor element (1, l', 1') is attached at its connection regions (2) to a conductor pattern layer (4) on a foil (3) by means of an ultrasonic bonding tool (5), and wherein two or more parts of the conductor pattern layer (4) are simultaneously attached to two or more connection regions by means of a single bonding tool (5). According to the invention, for the foil (3) use is made of a metal foil, a side of the bonding tool (5) directed towards the foil (3) is formed so as to be flat, and after attachment of the element (1) to the conductor pattern layer (4) the foil (3) is removed again. Such a method is quick, simple and damage to the element (1) is very unlikely. Preferably, for the metal of the metal foil (3) use is made of a metal which may be selectively etched with respect to the material of the conductor pattern layer (4), and the foil (3) is removed by selective etching. The invention further comprises a semiconductor device (10) thus obtained and an apparatus (100) for applying a method according to the invention.

Description

Method of manufacturing a semiconductor device, semiconductor device obtained by means of said method, and device for carrying out such a method
The invention relates to a method of manufacturing a semiconductor device, wherein a semiconductor element is provided on one side with a number of connection regions which are electroconductively attached, by means of a metal connection, to a conductor pattern layer provided on a foil, wherein the foil provided with the conductor pattern layer is brought into contact with the semiconductor element in such a manner that a part of the conductor pattern layer is situated opposite a connection region, and wherein ultrasonic energy is transferred to said part of the conductor pattern layer by means of a bonding tool which is brought into contact with the foil, as a result of which said part of the conductor pattern layer is attached to the connection region, and wherein two or more parts of the conductor pattern layer are simultaneously connected to two or more connection regions by means of a single bonding tool. The invention also relates to a semiconductor device thus obtained and to a device for carrying out such a method.
Such a method is very suitable for the low-cost manufacture of devices comprising a (semi-)discrete silicon module as the semiconductor element. Such a method is disclosed in German patent specification DE 199 22 559, which was published on 31 August 2000. In said document a description is given of the way in which a semiconductor element is attached by its connection region to a conductor pattern layer present on a foil by means of a bonding tool to which ultrasonic energy is supplied. The foil is made of a synthetic resin and is situated on the side of the semiconductor element, said foil having an opening at the location of the connection region of the semiconductor element, enabling the conductor pattern layer to be brought into contact with the connection region of the semiconductor element. To enable a relatively large number of connections to be made simultaneously between a semiconductor element and various (parts of) conductor patterns, the bonding tool is provided with a bonding surface having a number of projecting parts. A drawback of the known method resides in that its flexibility is limited. As a matter of fact, if the locations where the connections are made between the conductor pattern layer and the semiconductor element vary, which is normally the case if another semiconductor element is taken into production, another, suitably adapted bonding tool must be used. In addition, the bonding tool is comparatively expensive due to its slightly more complex geometry.
Therefore it is an object of the invention to provide a method wherein said drawback is absent or at least reduced; which method can be readily applied also if it is used to manufacture different products, and which employs a simple bonding tool.
To achieve this, a method of the type mentioned in the opening paragraph is characterized in accordance with the invention in that for the foil use is made of a metal foil, a side of the bonding tool facing the foil is embodied so as to be flat, and after the semiconductor element and the conductor pattern layer have been attached to each other, the metal foil is at least partially removed from the conductor pattern layer.
The invention is first of all based on the insight that the use of a metal foil enables a flat bonding tool to simultaneously make various connections between a semiconductor element and the conductor pattern. After all, a metal, unlike a synthetic resin such as the foil in the known method, enables an efficient transfer of ultrasonic energy without the risk of causing damage to the semiconductor element. The invention is further based on the surprising insight that the drawback of a foil which, like the conductor pattern layer, is electroconductive and hence leads to short circuits, can be readily obviated if the foil can be removed from the conductor pattern layer. The complete foil may be removed, but alternatively part of the foil is removed and the non-removed part is used for definition of contacts, and the like. For this purpose of foil removal, the foil should be situated only on a side facing away from the semiconductor element and, for example, be removably attached to the conductor pattern layer, for example by means of an adhesive layer. The step of removing the foil from the conductor pattern layer may be very simple and without an adverse effect on the quality of the conductor pattern layer, as will become apparent hereafter. In addition, the method is hardly made more complex by this additional step because a step of forming an opening in the foil so that the conductor pattern layer can be brought into contact with a connection region of the semiconductor element can be dispensed with.
It will further be apparent from the above that now in particular use can advantageously be made of a flat bonding tool. Said flat bonding tool is suitable for any orientation of the connection regions on the semiconductor element and, in addition to this, it can be readily manufactured. Furthermore, it is still possible, provided the contact surface of the bonding tool is large enough, to form a large number of connections at the same time.
In a preferred embodiment of a method in accordance with the invention, the metal used for the metal foil is selectively etchable with respect to the conductor pattern layer, and, after the connections have been made, the foil is removed again by means of selective etching. This method is very simple, as is the manufacture of such a foil that is provided with one or more conductor patterns. A particularly suitable material for such a foil is aluminum, in which case the conductor pattern is made of copper. In this case, for example phosphoric acid can be used as the etchant for selectively etching the foil. Such a, flexible, foil may additionally be very thin. What proved to be suitable is, for example, a 30 μm thick aluminum foil which is provided with a copper conductor pattern (layer) having a thickness of 10 μm.
In a favorable modification, the conductor pattern layer is formed as a conductor pattern on the foil before the semiconductor element is attached thereon. The starting point of the method in accordance with the invention thus is a foil on which one or more conductor patterns have already been formed. This is the most favorable variant in terms of ease of manufacture. If necessary, the conductor pattern layer may alternatively comprise a continuous layer of a conductive material. If so, the desired conductor pattern can be readily formed therein after the foil has been removed from the conductor pattern layer by means of etching or otherwise. To form said conductor pattern in the conductor pattern layer use may be made of photolithography and etching. Preferably this takes place after the encapsulation has been provided, so that the semiconductor element is protected during said process. It will be obvious that, in this patent application, a semiconductor pattern layer is to be taken to mean a - substantially - uniform continuous conductive layer as well as an already-formed conductor pattern.
Preferably, the bonding tool is maintained in a substantially fixed position, the side of the foil facing away from the conductor pattern is brought into contact with the bonding tool, and on the side of the semiconductor element provided with the connection regions the semiconductor element is aligned with respect to the conductor pattern layer by means of a movable holder and is held against or pressed onto said conductor pattern layer. This offers various advantages, such as the fact that the risk of damage to the semiconductor element during bonding is further reduced. In addition, it enables the bonding tools used to be comparatively simple. The holder may be, for example, a movable arm of a robot that picks up the semiconductor elements and takes them to the bonding position. The "hand" of the arm used to grip the element may advantageously be, for example, a vacuum pincette.
In an important embodiment the, preferably strip-shaped, foil is provided with a large number of conductor patterns, and after the connection has been made between one of the conductor patterns and the connection regions of the semiconductor element, the foil is displaced, in which process the semiconductor element is released by the holder and, together with the foil, transported from the position of the bonding tool, a subsequent (part of the) conductor pattern layer being brought to the position of the bonding tool, and a subsequent semiconductor element being picked up by the movable holder and being attached to the next (part of the) conductor pattern layer. This enables high-speed manufacturing, resulting in an attractive intermediate product in the form of a foil provided with a large number of semiconductor elements that can either be readily and rapidly subjected to further processing or stored.
In particular as regards the previous embodiment, the foil is preferably supported, on either side of the bonding tool, by a supporting tool, and during attaching the semiconductor element to the conductor pattern layer, the foil on either side of the holder is held against or pressed onto the supporting members by means of a movable stamp. This too contributes to an efficient transfer of the ultrasonic energy and to a low risk of damage to the semiconductor elements. One of the stamps will of course exert pressure on the foil via a semiconductor element that has already been placed. This is not objectionable.
In a further favorable modification, after attaching a semiconductor element to the conductor pattern layer and before removing the foil, the semiconductor element is provided with an isolating encapsulation. The foil can be used as a wall, as it were, of a mold that may be used, for example, for providing a synthetic resin encapsulation of an epoxy material by means of injection molding.
The invention also comprises a semiconductor device obtained by means of a method in accordance with the invention.
The invention further comprises a device for carrying out a method in accordance with the invention, which device comprises a bonding tool by means of which ultrasonic energy can be delivered, via a foil provided with a conductor pattern layer, for attaching the connection regions of a semiconductor element to the conductor pattern layer, and by means of which two or more parts of the conductor pattern layer can be simultaneously connected to two or more connection regions, characterized in that a side of the bonding tool facing the foil is embodied so as to be flat. Preferably, the bonding tool is in a substantially fixed position, and the device comprises means for providing the foil, by the side facing away from the conductor pattern layer, on the bonding tool, and a movable holder by means of which the semiconductor element is aligned, on the side provided with the connection regions, with respect to the conductor pattern layer and held against or pressed onto said conductor pattern layer. Such means may comprise, for example, a system of driven bobbins from which the foil is wound off and onto which the foil is rewound. By virtue thereof, the device is also suited for handling a foil having a (large) number of conductor patterns, and the foil can be moved away from the position of the bonding tool after the connection between one of the conductor patterns and the connection regions of the semiconductor element has been made. The holder is preferably provided with means for picking up semiconductor elements.
In an important embodiment of a device in accordance with the invention, a supporting tool for the foil is situated on either side of the bonding tool, and on either side of the movable holder there is a movable stamp by means of which the foil, which may or may not be provided with a semiconductor element, is held against or pressed onto the supporting members. The stamps may be synchronous or not and are provided, in any case, with a drive operating in accordance with a suitable rhythm. Also the pressure exerted by the stamps may be adjustable. The supporting members are preferably in a fixed position and, like the stamps, may be embodied so as to be in one piece or two separate pieces. The movable holder is preferably embodied so as to be a vacuum pincette. The simplest and most reliable way of operating the device is achieved if the bonding tool is situated below the foil to be placed and the holder is situated above said foil.
These and other aspects of the invention are apparent from and will be elucidated with reference to the embodiment(s) described hereinafter.
In the drawings:
Figs. 1 through 4 are diagrammatic cross-sectional views at right angles to the thickness direction, of a semiconductor device in successive stages of the manufacture by means of an embodiment of a method in accordance with the invention, and
Figs. 5 through 11 are diagrammatic perspective views of a device in accordance with the invention for applying the method in accordance with the invention in successive stages of the implementation of the method.
The Figures are not drawn to scale and some dimensions, such as the dimensions in the thickness direction, are exaggerated for clarity. Corresponding areas or parts bear the same reference numerals whenever possible.
Figs. 1 through 4 are diagrammatic cross-sectional views at right angles to the thickness direction, of a semiconductor device in successive stages of the manufacture by means of an embodiment of a method in accordance with the invention. The finished semiconductor device 10 (see Fig. 4) comprises a semiconductor body 1 provided with connection regions 2, which in this case take the form of so -termed bumps 2, in this case of gold, which are provided on electroconductive regions of the body 1. The semiconductor body 1 is surrounded by a synthetic resin encapsulation 11 of an epoxy material. The lower side of the device 10 accommodates a conductor pattern 4 which is connected to the bumps 2 and which renders the device 10 suitable for surface mounting. The dimensions of the semiconductor body 1 are, in this example, 400 μm x 500 μm and the thickness is 300 μm. In an important stage of a method in accordance with the invention for the manufacture of the device 10, (see Fig. 1) the semiconductor body 1 is attached by its bumps 2 onto a conductor pattern 4 by means of ultrasonic bonding. The conductor pattern 4, having a thickness in this case of 10 μm, which is covered with 2 μm nickel and 1 μm gold, is formed on a (flexible) foil 3, in this case a 30 μm thick aluminum foil. The body 1 is brought to the foil 3 by means of a holder 6 and held against/pressed onto said foil. The foil 3 is supported by a sonotrode 5 by means of which ultrasonic energy is released via the metal foil 3 and the copper pattern 4 provided thereon, resulting in the formation of a metal connection between the bumps 2 and the pattern 4. In this process, a number of bumps 2 are simultaneously connected to the pattern 4. This is possible by virtue of the fact that the sonotrode 5 is flat and its surface is sufficiently large, and by virtue of the fact that the ultrasonic energy is transferred exclusively via metals. This energy transfer can thus take place in a sufficiently efficient manner and without causing damage to the body 1. In this example, the pressure of the holder 6, in this case a vacuum pincette, on the semiconductor body 1 is approximately 500 grams. The sonotrode 5 is operated at a frequency of 40 kHz and an amplitude of 5 μm. The processing time is 50 msec. Fig. 1 also diagrammatically shows other semiconductor bodies 1', 1" which, respectively, are already attached to a conductor pattern 4 or will, in a next phase of the process, be attached to a subsequent conductor pattern 4. Therefore, the foil 3 is strip-shaped and comprises a large number of juxtaposed conductor patterns 4.
In a next stage of the manufacture (see Fig. 2), the foil 3 provided with the semiconductor bodies 1, 1', 1" is introduced into a mold Ml, M2, and the semiconductor bodies 1, 1', 1" are encapsulated by a synthetic resin encapsulation by introducing an epoxy material 11 into the mold by injection molding. In a variant, for the part Ml of the mold use is made of a metal foil which is attached to the - upper side of - the semiconductor bodies 1 and will be part of the devices 10 to be formed. After the provision of the encapsulation 11, the devices 10 to be formed are removed from the mold Ml, M2. Next (see Fig. 3), the aluminum foil is removed by means of etching. This process is carried out selectively with respect to the copper conductor pattern layer 4 and, in this case, use is made of a sodium hydroxide (NaOH) solution in water as the etchant. Individual devices 10, as shown in Fig. 4, are then obtained by a separation process, such as sawing, in two mutually perpendicular directions one of which lies in the plane of the drawing and the other is indicated by means of R in the drawing. In this case, the separation technique used is sawing. After that, the device 10 is ready for final assembly.
Figs. 5 through 11 are diagrammatic, perspective views of a device in accordance with the invention for applying the method in accordance with the invention in successive stages of the implementation of the method. The device 100 (see Fig. 5) comprises, in addition to a sonotrode 5 which is in a fixed position, two supporting bodies 7 which are in a fixed position on either side of the sonotrode and on which the foil 3 provided with conductor patterns 4 rests. In this case, the device 100 is shown in a stage where a body 1' is already attached to the foil and a next body 1 with bumps 2 is transferred by a holder, not shown in Fig. 4, to the foil 3 above the sonotrode 5. To the left of the body 1, a stamp 8 is shown which, like the body 1, is moved towards the foil 3. In a subsequent stage (see Fig. 6), this descent is shown and the holder 6 becomes visible as well as a second stamp 9 which, to the right of the body 1, will press the part of the foil 3 that is already provided with the body 1' onto the supporting member 7 to the right of the sonotrode 5. This stage is visible in Fig. 7. Next (see Fig. 8), the sonotrode 5 is slightly raised and by means of ultrasonic vibration thereof the connection between the body 1 and the conductor pattern 4 is made. Subsequently (see Fig. 9) the sonotrode 5 moves slightly downward and the stamps 8, 9 and the (empty) holder 6 move away from the foil 3. The holder 6 (see Fig. 10) is no longer visible and picks up a new semiconductor element 1, for example, from a stretched synthetic resin membrane on which a matrix of individual bodies 1 is present, corresponding to a substrate that is sawn through in two mutually perpendicular directions. This picking up process is not shown in the drawing.
During picking up a next semiconductor body 1 by the holder 6 (see Fig. 11), the foil 3 is moved to the right, for example by means of two bobbins, which are not shown in the drawing. The first bobbin thus contains the "empty" foil 3 which is subsequently unwound from said bobbin. The foil 3 provided with semiconductor bodies 1 is wound on the second bobbin. Subsequently the device is again in a stage like that shown in Fig. 5, and the attaching cycle can be repeated. The wound-up foil 3 provided with semiconductor bodies 1 can then be subjected to further treatments, as indicated hereinabove in the discussion of Figs. 2 through 4. To provide the foil with bodies 1 in two mutually perpendicular directions, the bobbins may be provided with a translation mechanism in a direction parallel to the axis of the bobbins.
The invention is not limited to a method as described in the exemplary embodiment, and within the scope of the invention many variations and modifications are possible to those skilled in the art. For example, it is possible to manufacture devices having a different geometry and/or different dimensions. It is also possible to use different materials for, in particular, the plates. It is further noted that small adaptations enable also an improved heat dissipation to be obtained. It is expressly noted that, in addition to sawing, also cutting or breaking can be used as the mechanical separation technique for shaping the individual semiconductor device. Unlike sawing, where a saw cut-width of material is lost, in the other two techniques in principle hardly any material loss occurs. The loss of material in the case of sawing is comparatively substantial if very small devices are manufactured as is intended in the present invention.
It is further noted that a thin foil may also be applied to the rear side of a number of semiconductor elements. This foil may serve as the other wall of a mold during the provision of the encapsulation.
It is finally noted that although the examples given herein only refer to a discrete semiconductor element, the invention can also be used, and is particularly suited, for the manufacture of more integrated semiconductor products. For example, by jointly mounting a number of, discrete or semi-discrete, semiconductor components such as diodes or transistors or even an IC (= integrated circuit) and/or other passive electronic components such as so-termed jumpers on a conductor pattern, devices can be formed within a single encapsulation which comprise, as it were, a system. For example a system for controlling a voltage. These devices may have, and will have, larger dimensions, of course, particularly in the lateral directions as compared to the semiconductor elements in the examples discussed hereinabove.

Claims

CLAIMS:
1. A method of manufacturing a semiconductor device (10), wherein a semiconductor element (1, 1', 1") is provided on one side with a number of connection regions (2) which are electroconductively attached, by means of a metal connection, to a conductor pattern layer (4) provided on a foil (3), wherein the foil (3) provided with the conductor pattern layer (4) is brought into contact with the semiconductor element (1) in such a manner that a part of the conductor pattern layer (4) is situated opposite a connection region (2), and wherein ultrasonic energy is transferred to said part of the conductor pattern layer (4) by means of a bonding tool (5) which is brought into contact with the foil (3), as a result of which said part of the conductor pattern layer (4) is attached to the connection region (2), and wherein two or more parts of the conductor pattern layer (4) are simultaneously connected to two or more connection regions (2) by means of a single bonding tool (5), characterized in that for the foil (3) use is made of a metal foil, a side of the bonding tool (5) facing the foil (3) is embodied so as to be flat, and after the semiconductor element (1) and the conductor pattern layer (4) have been attached to each other, the metal foil (3) is at least partially removed from the conductor pattern layer (4).
2. A method as claimed in claim 1, characterized in that the metal used for the metal foil (3) is selectively etchable with respect to the conductor pattern layer (4), and the foil (3) is removed by means of selective etching.
3. A method as claimed in claim 1 or 2, characterized in that the conductor pattern layer (4) is formed as a conductor pattern (4) on the foil before the semiconductor element (1) is attached thereon.
. A method as claimed in claim 1, 2 or 3, characterized in that the bonding tool
(5) is maintained in a substantially fixed position, the side of the foil (3) facing away from the conductor pattern (4) is brought into contact with the bonding tool (5), and on the side of the semiconductor element (1) provided with the connection regions (2) the semiconductor element is aligned with respect to the conductor pattern layer (4) by means of a movable holder and is pressed onto said conductor pattern layer.
5. A method as claimed in claim 4, characterized in that the foil (3) is provided with a large number of conductor pattern layers (4), and after the connection has been made between one of the conductor pattern layers (4) and the connection regions (2) of the semiconductor element (1), the foil (3) is displaced, in which process the semiconductor element (1) is released by the holder (6) and, together with the foil (3), transported from the position of the bonding tool (5), a subsequent conductor pattern layer (4) being brought to the position of the bonding tool (5), and a subsequent semiconductor element (1") being picked up by the movable holder (6) and being attached to the next conductor pattern layer (4).
6. A method as claimed in claim 5, characterized in that the foil (3) is supported, on either side of the bonding tool (5), by a supporting tool (7), and during attaching the semiconductor element (1) to the conductor pattern layer (4), the foil (3) on either side of the holder (6) is held against or pressed onto the supporting members (7) by means of a movable stamp (8, 9).
7. A method as claimed in any one of the preceding claims, characterized in that after attaching a semiconductor element (1) to the conductor pattern layer (4) and before removing the foil (3), the semiconductor element (1) is provided with an isolating encapsulation (11).
8. A semiconductor device (10) obtained by means of a method as claimed in any one of the preceding claims.
9. A device (100) for carrying out a method as claimed in any one of claims 1 through 7, comprising a bonding tool (5) by means of which ultrasonic energy can be delivered via a foil (3) provided with a conductor pattern layer (4), for attaching the connection regions (2) of a semiconductor element (1) to the conductor pattern layer (4), and by means of which two or more parts of the conductor pattern layer (4) can be simultaneously connected to two or more connection regions (2), characterized in that a side of the bonding tool (5) facing the foil (3) is embodied so as to be flat.
10. A device (100) as claimed in claim 9, characterized in that the bonding tool (5) is in a substantially fixed position, the device (100) comprises means for providing the foil (3), by the side facing away from the conductor pattern layer (4), on the bonding tool (5), and a movable holder (6) by means of which the semiconductor element is aligned, on the side provided with the connection regions (2), with respect to the conductor pattern layer (4) and pressed onto said conductor pattern layer.
11. A device (100) as claimed in claim 9 or 10, characterized in that the device is suitable for handling a foil (3) having a large number of conductor patterns (4), and the device comprises means for displacing the foil (3) from the position of the bonding tool (5) after the connection between one of the conductor patterns (4) and the connection regions (2) of the semiconductor element (1) has been made, and the holder (6) is provided with means that can be used to pick up, hold and release semiconductor elements (1, 1', 1").
12. A device (100) as claimed in claim 11, characterized in that a supporting tool
(7) for the foil (3) is situated on either side of the bonding tool (5), and on either side of the movable holder (6) there is a movable stamp (8, 9) by means of which the foil is held against or pressed onto the supporting members (7).
13. A device (100) as claimed in claim 10, 11 or 12, characterized in that the movable holder (6) comprises a vacuum pincette.
14. A device (100) as claimed in claim 9, 10, 11, 12 or 13, characterized in that the bonding tool (5) is situated below the foil (3) to be placed and the holder (6) is situated above said foil.
PCT/IB2004/050257 2003-03-18 2004-03-15 Method of manufacturing a semiconductor device, semiconductor device obtained by means of said method, and device for carrying outsuch a method Ceased WO2004084294A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP03100682.8 2003-03-18
EP03100682 2003-03-18

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1102292A (en) * 1965-02-12 1968-02-07 Associated Semiconductor Mft Improvements in and relating to methods of manufacturing semi-conductor devices
US4438181A (en) * 1981-01-13 1984-03-20 Jon M. Schroeder Electronic component bonding tape
EP0264648A1 (en) * 1986-09-25 1988-04-27 Kabushiki Kaisha Toshiba Method of producing a film carrier
EP0344970A2 (en) * 1988-06-01 1989-12-06 Hewlett-Packard Company Process for bonding integrated circuit components
JPH05136205A (en) * 1991-11-14 1993-06-01 Hitachi Ltd Gearing bonding method and apparatus
DE19948555A1 (en) * 1999-12-03 2001-05-03 Andreas Plettner Semiconductor chip manufacturing method has contact elements for connecting chip to external electrical components provided before separation of chip from semiconductor wafer

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1102292A (en) * 1965-02-12 1968-02-07 Associated Semiconductor Mft Improvements in and relating to methods of manufacturing semi-conductor devices
US4438181A (en) * 1981-01-13 1984-03-20 Jon M. Schroeder Electronic component bonding tape
EP0264648A1 (en) * 1986-09-25 1988-04-27 Kabushiki Kaisha Toshiba Method of producing a film carrier
EP0344970A2 (en) * 1988-06-01 1989-12-06 Hewlett-Packard Company Process for bonding integrated circuit components
JPH05136205A (en) * 1991-11-14 1993-06-01 Hitachi Ltd Gearing bonding method and apparatus
DE19948555A1 (en) * 1999-12-03 2001-05-03 Andreas Plettner Semiconductor chip manufacturing method has contact elements for connecting chip to external electrical components provided before separation of chip from semiconductor wafer

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 017, no. 514 (E - 1433) 16 September 1993 (1993-09-16) *

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