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WO2003088316A3 - Electropolishing and electroplating methods - Google Patents

Electropolishing and electroplating methods Download PDF

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Publication number
WO2003088316A3
WO2003088316A3 PCT/US2003/011417 US0311417W WO03088316A3 WO 2003088316 A3 WO2003088316 A3 WO 2003088316A3 US 0311417 W US0311417 W US 0311417W WO 03088316 A3 WO03088316 A3 WO 03088316A3
Authority
WO
WIPO (PCT)
Prior art keywords
electroplating
current density
density range
recessed regions
metal layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2003/011417
Other languages
French (fr)
Other versions
WO2003088316A2 (en
Inventor
Hui Wang
Jian Wang
Peihaur Yih
Huiquan Wu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ACM Research Inc
Original Assignee
ACM Research Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ACM Research Inc filed Critical ACM Research Inc
Priority to JP2003585151A priority Critical patent/JP2005522587A/en
Priority to CN038081660A priority patent/CN1685086B/en
Priority to CA002479873A priority patent/CA2479873A1/en
Priority to EP03746750A priority patent/EP1495161A4/en
Priority to US10/510,656 priority patent/US20060049056A1/en
Priority to KR10-2004-7016217A priority patent/KR20040097337A/en
Priority to AU2003226367A priority patent/AU2003226367A1/en
Publication of WO2003088316A2 publication Critical patent/WO2003088316A2/en
Publication of WO2003088316A3 publication Critical patent/WO2003088316A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00Electroplating: Baths therefor
    • C25D3/02Electroplating: Baths therefor from solutions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00Electroplating: Baths therefor
    • C25D3/02Electroplating: Baths therefor from solutions
    • C25D3/38Electroplating: Baths therefor from solutions of copper
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/18Electroplating using modulated, pulsed or reversing current
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/60Electroplating characterised by the structure or texture of the layers
    • C25D5/605Surface topography of the layers, e.g. rough, dendritic or nodular layers
    • C25D5/611Smooth layers
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/60Electroplating characterised by the structure or texture of the layers
    • C25D5/615Microstructure of the layers, e.g. mixed structure
    • C25D5/617Crystalline layers
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00Electroplating characterised by the article coated
    • C25D7/12Semiconductors
    • C25D7/123Semiconductors first coated with a seed layer or a conductive layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H01L21/2885Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/7684Smoothing; Planarisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Metallurgy (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Organic Chemistry (AREA)
  • Materials Engineering (AREA)
  • Electrochemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

In one aspect of the present invention, an exemplary method is provided for electroplating a conductive film on a wafer. The method includes electroplating a metal film on a semiconductor structure having recessed regions and non-recessed region within a first current density range before the metal layer is planar above recessed regions of a first density, and electroplating within a second current density range after the metal layer is planar above the recessed regions. The second current density range is greater than the first current density range. In one example, the method further includes electroplating in the second current density range until the metal layer is planar above recessed regions of a second density, the second density being greater than the first density, and electroplating within a third current density range thereafter.
PCT/US2003/011417 2002-04-12 2003-04-11 Electropolishing and electroplating methods Ceased WO2003088316A2 (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP2003585151A JP2005522587A (en) 2002-04-12 2003-04-11 Electropolishing and electroplating methods
CN038081660A CN1685086B (en) 2002-04-12 2003-04-11 Electropolishing and Plating Methods
CA002479873A CA2479873A1 (en) 2002-04-12 2003-04-11 Electropolishing and electroplating methods
EP03746750A EP1495161A4 (en) 2002-04-12 2003-04-11 Electropolishing and electroplating methods
US10/510,656 US20060049056A1 (en) 2002-04-12 2003-04-11 Electropolishing and electroplating methods
KR10-2004-7016217A KR20040097337A (en) 2002-04-12 2003-04-11 Electropolishing and electroplating methods
AU2003226367A AU2003226367A1 (en) 2002-04-12 2003-04-11 Electropolishing and electroplating methods

Applications Claiming Priority (8)

Application Number Priority Date Filing Date Title
US37226302P 2002-04-12 2002-04-12
US60/372,263 2002-04-12
US38213302P 2002-05-21 2002-05-21
US60/382,133 2002-05-21
US38782602P 2002-06-08 2002-06-08
US60/387,826 2002-06-08
US39831602P 2002-07-24 2002-07-24
US60/398,316 2002-07-24

Publications (2)

Publication Number Publication Date
WO2003088316A2 WO2003088316A2 (en) 2003-10-23
WO2003088316A3 true WO2003088316A3 (en) 2003-12-31

Family

ID=29255582

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2003/011417 Ceased WO2003088316A2 (en) 2002-04-12 2003-04-11 Electropolishing and electroplating methods

Country Status (9)

Country Link
US (1) US20060049056A1 (en)
EP (1) EP1495161A4 (en)
JP (2) JP2005522587A (en)
KR (1) KR20040097337A (en)
CN (1) CN1685086B (en)
AU (1) AU2003226367A1 (en)
CA (1) CA2479873A1 (en)
TW (1) TWI267134B (en)
WO (1) WO2003088316A2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7128825B2 (en) 2001-03-14 2006-10-31 Applied Materials, Inc. Method and composition for polishing a substrate
US7229535B2 (en) 2001-12-21 2007-06-12 Applied Materials, Inc. Hydrogen bubble reduction on the cathode using double-cell designs
US7232514B2 (en) 2001-03-14 2007-06-19 Applied Materials, Inc. Method and composition for polishing a substrate
US7323416B2 (en) 2001-03-14 2008-01-29 Applied Materials, Inc. Method and composition for polishing a substrate

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI288443B (en) 2002-05-17 2007-10-11 Semiconductor Energy Lab SiN film, semiconductor device, and the manufacturing method thereof
JP4540981B2 (en) * 2003-12-25 2010-09-08 株式会社荏原製作所 Plating method
JP4155218B2 (en) * 2004-03-30 2008-09-24 株式会社島津製作所 Autosampler
US20050275944A1 (en) * 2004-06-11 2005-12-15 Wang Jian J Optical films and methods of making the same
DE102004021926A1 (en) 2004-05-04 2005-12-01 Mtu Aero Engines Gmbh A method of making a coating and anode for use in such a method
US7309653B2 (en) * 2005-02-24 2007-12-18 International Business Machines Corporation Method of forming damascene filament wires and the structure so formed
US7541213B2 (en) * 2006-07-21 2009-06-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
KR100826784B1 (en) * 2006-08-03 2008-04-30 동부일렉트로닉스 주식회사 Metal wiring formation method of semiconductor device
US7837841B2 (en) 2007-03-15 2010-11-23 Taiwan Semiconductor Manufacturing Co., Ltd. Apparatuses for electrochemical deposition, conductive layer, and fabrication methods thereof
US8784636B2 (en) * 2007-12-04 2014-07-22 Ebara Corporation Plating apparatus and plating method
DE102008044988A1 (en) * 2008-08-29 2010-04-22 Advanced Micro Devices, Inc., Sunnyvale Use of a capping layer in metallization systems of semiconductor devices as CMP and etch stop layer
WO2010022969A1 (en) * 2008-08-29 2010-03-04 Advanced Micro Devices, Inc. Using a cap layer in metallization systems of semiconductor devices as a cmp and etch stop layer
DE102009036221A1 (en) * 2009-08-05 2011-02-17 Extrude Hone Gmbh Method for the electrochemical machining of a workpiece
CN102412233A (en) * 2011-05-23 2012-04-11 上海华力微电子有限公司 Testing structure capable of effectively testing shallow trench isolation filling capability
US9416459B2 (en) * 2011-06-06 2016-08-16 United Microelectronics Corp. Electrical chemical plating process
CN103077923B (en) * 2013-01-14 2015-06-17 武汉新芯集成电路制造有限公司 Copper electroplating method capable of avoiding holes
US20140277392A1 (en) * 2013-03-14 2014-09-18 Abbott Cardiovascular Systems, Inc. Electropolishing of alloys containing platinum and other precious metals
TWI488198B (en) * 2013-08-02 2015-06-11 Cyntec Co Ltd Method of manufacturing multi-layer coil
US9618664B2 (en) 2015-04-15 2017-04-11 Finisar Corporation Partially etched phase-transforming optical element
CN106567130A (en) * 2015-10-10 2017-04-19 盛美半导体设备(上海)有限公司 Method for improving roughness of wafers
US10539723B2 (en) 2016-10-19 2020-01-21 Finisar Corporation Phase-transforming optical reflector formed by partial etching or by partial etching with reflow
US9875958B1 (en) 2016-11-09 2018-01-23 International Business Machines Corporation Trace/via hybrid structure and method of manufacture
KR101755203B1 (en) * 2016-11-11 2017-07-10 일진머티리얼즈 주식회사 Electrolytic Copper Foil for secondary battery and manufacturing method thereof
AT519430A1 (en) 2016-12-09 2018-06-15 Hirtenberger Eng Surfaces Gmbh ELECTROCHEMICAL PULSE POLISHING
US10109410B2 (en) 2017-01-17 2018-10-23 Palo Alto Research Center Incorporated Out of plane structures and methods for making out of plane structures
KR102275458B1 (en) 2018-11-30 2021-07-13 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 Electrochemical plating system and method of using
CN109385651A (en) * 2018-12-05 2019-02-26 上海华力集成电路制造有限公司 The method of the groove of copper filling
CA3133711C (en) 2019-04-09 2024-10-15 3DM Biomedical Pty Ltd Electropolishing method
US10950519B2 (en) 2019-05-31 2021-03-16 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit package and method
EP3754052B1 (en) 2019-06-21 2025-06-11 Infineon Technologies AG Roughening of a metallization layer on a semiconductor wafer
JP7353121B2 (en) 2019-10-08 2023-09-29 キヤノン株式会社 Semiconductor devices and equipment
JP7594974B2 (en) * 2021-05-20 2024-12-05 Tdk株式会社 Semiconductor device and manufacturing method thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6162344A (en) * 1998-07-22 2000-12-19 Novellus Systems, Inc. Method of electroplating semiconductor wafer using variable currents and mass transfer to obtain uniform plated layer
US6261963B1 (en) * 2000-07-07 2001-07-17 Advanced Micro Devices, Inc. Reverse electroplating of barrier metal layer to improve electromigration performance in copper interconnect devices
US20020000271A1 (en) * 1998-02-04 2002-01-03 Semitool, Inc. Method and apparatus for low-temperature annealing of metallization microstructures in the production of a microelectronic device
US20030038038A1 (en) * 2001-07-20 2003-02-27 Basol Bulent M. Multi step electrodeposition process for reducing defects and minimizing film thickness

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7244677B2 (en) * 1998-02-04 2007-07-17 Semitool. Inc. Method for filling recessed micro-structures with metallization in the production of a microelectronic device
DE69912160T2 (en) * 1998-06-04 2004-07-08 Dsm Ip Assets B.V. HIGH-STRENGTH POLYETHYLENE FIBERS AND METHOD FOR THE PRODUCTION THEREOF
US6395152B1 (en) * 1998-07-09 2002-05-28 Acm Research, Inc. Methods and apparatus for electropolishing metal interconnections on semiconductor devices
US6793796B2 (en) * 1998-10-26 2004-09-21 Novellus Systems, Inc. Electroplating process for avoiding defects in metal features of integrated circuit devices
US6946065B1 (en) * 1998-10-26 2005-09-20 Novellus Systems, Inc. Process for electroplating metal into microscopic recessed features
US6610190B2 (en) * 2000-11-03 2003-08-26 Nutool, Inc. Method and apparatus for electrodeposition of uniform film with minimal edge exclusion on substrate
ATE268398T1 (en) * 1999-08-11 2004-06-15 Toyo Boseki PROTECTIVE GLOVE CONTAINING HIGH-STRENGTH POLYETHYLENE FIBERS
US6491806B1 (en) * 2000-04-27 2002-12-10 Intel Corporation Electroplating bath composition
US6858121B2 (en) * 2000-08-10 2005-02-22 Nutool, Inc. Method and apparatus for filling low aspect ratio cavities with conductive material at high rate
US6899950B2 (en) * 2000-12-11 2005-05-31 Toyo Boseki Kabushiki Kaisha High strength polyethylene fiber
US6432821B1 (en) * 2000-12-18 2002-08-13 Intel Corporation Method of copper electroplating
US6638863B2 (en) * 2001-04-24 2003-10-28 Acm Research, Inc. Electropolishing metal layers on wafers having trenches or vias with dummy structures
JP4389142B2 (en) * 2001-08-08 2009-12-24 東洋紡績株式会社 Method for producing high-strength polyethylene fiber

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020000271A1 (en) * 1998-02-04 2002-01-03 Semitool, Inc. Method and apparatus for low-temperature annealing of metallization microstructures in the production of a microelectronic device
US6162344A (en) * 1998-07-22 2000-12-19 Novellus Systems, Inc. Method of electroplating semiconductor wafer using variable currents and mass transfer to obtain uniform plated layer
US6261963B1 (en) * 2000-07-07 2001-07-17 Advanced Micro Devices, Inc. Reverse electroplating of barrier metal layer to improve electromigration performance in copper interconnect devices
US20030038038A1 (en) * 2001-07-20 2003-02-27 Basol Bulent M. Multi step electrodeposition process for reducing defects and minimizing film thickness

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP1495161A4 *

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7128825B2 (en) 2001-03-14 2006-10-31 Applied Materials, Inc. Method and composition for polishing a substrate
US7232514B2 (en) 2001-03-14 2007-06-19 Applied Materials, Inc. Method and composition for polishing a substrate
US7323416B2 (en) 2001-03-14 2008-01-29 Applied Materials, Inc. Method and composition for polishing a substrate
US7229535B2 (en) 2001-12-21 2007-06-12 Applied Materials, Inc. Hydrogen bubble reduction on the cathode using double-cell designs
US7384534B2 (en) 2001-12-21 2008-06-10 Applied Materials, Inc. Electrolyte with good planarization capability, high removal rate and smooth surface finish for electrochemically controlled copper CMP

Also Published As

Publication number Publication date
CN1685086A (en) 2005-10-19
EP1495161A2 (en) 2005-01-12
JP2006200043A (en) 2006-08-03
JP2005522587A (en) 2005-07-28
AU2003226367A8 (en) 2003-10-27
AU2003226367A1 (en) 2003-10-27
KR20040097337A (en) 2004-11-17
WO2003088316A2 (en) 2003-10-23
US20060049056A1 (en) 2006-03-09
EP1495161A4 (en) 2006-06-28
TW200402781A (en) 2004-02-16
CN1685086B (en) 2010-10-13
CA2479873A1 (en) 2003-10-23
TWI267134B (en) 2006-11-21

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