WO2003049280A1

WO2003049280A1 - A low noise electronic circuit

Info

Publication number: WO2003049280A1
Application number: PCT/IB2002/005024
Authority: WO
Inventors: Anne J. Annema; Dominicus M. W. Leenaerts; Petrus W. H. De Vreede
Original assignee: Koninklijke Philips Electronics NV
Current assignee: Koninklijke Philips NV
Priority date: 2001-12-07
Filing date: 2002-11-26
Publication date: 2003-06-12
Anticipated expiration: 2004-06-07
Also published as: AU2002347529A1

Abstract

An electronic circuit, which can be used as a Low Noise Amplifier (LNA), comprises two complementary Field Effect Transistors (M1, M2; M5, M6), each having a gate, a source and a drain. The gates are connected together as a common input terminal, and the drains are connected together as a common output terminal. The electronic circuit further has a feedback circuit, e.g. in the form of two anti-parallel Field Effect Transistors (M3, M4; M7, M8), connected between the common input terminal and the common output terminal. This feedback circuit has an impedance at radio frequencies which is high-ohmic compared to impedance levels of the two transistors. This ensures a high gain at radio frequencies, and at the same time it can be implemented with only a few components. It also ensures high linearity and a very low current in the feedback circuit, and thus little or no noise is added to the circuit.

Description

A low noise electronic circuit

The invention relates to an electronic circuit comprising two complementary Field Effect Transistors, each having at least a gate terminal, a source terminal and a drain terminal, wherein the gate terminals of the two transistors are connected together as a common input terminal, and the drain terminals of the two transistors are connected together as a common output terminal. The invention also relates to the use of such an electronic circuit as a Low Noise Amplifier.

An electronic circuit of this type may e.g. be used as a Low Noise Amplifier (LNA), which is one of the main and key building blocks in any front-end telecommunications system, and which is also often found in radio systems. The purpose of such amplifiers is to amplify an input signal, which will normally be a radio frequency signal, while only a minimum of noise and distortion is added to the signal. Further, in order to relax the specifications for other components in a front-end device, it is important to have a linear LNA consuming as little power as possible. Thus LNAs are important components in e.g. radios, TV sets and telecommunications products. Many prior art LNAs are based on the use of MOSFETs (Metal Oxide

Semiconductor Field Effect Transistors), and typically an input MOSFET is cascoded with a similar transistor in order to obtain sufficient gain and a good signal-to-noise ratio. An example of such an amplifier is disclosed in US 6 150 882, in which two pairs of cascoded MOSFETs are coupled as a differential amplifier in order to improve the gain, which is typically required. Alternatively, the gain may be improved by adding a further gain stage. However, in both cases the circuit tends to become rather complicated which results in a reduced signal-to-noise ratio and a higher power consumption. The complicated circuit with several components also means a higher cost. Further, the single cascoded pair of MOSFETs as well as two pairs coupled differentially require a relatively high supply voltage due to the stacking of the MOSFETs.

US 6 150 882 also shows a circuit comprising two complementary MOSFETs having their gate terminals connected together and their drain terminals connected together. The source terminals of the two MOSFETs are connected to the supply voltage and ground, respectively. This circuit, however, is only used as an inverter internally in the amplifier circuit. It is not suited as an amplifier circuit in itself, because the DC operating point cannot be controlled.

Therefore, it is an object of the invention to provide a circuit of the above- mentioned type which is as simple as possible, i.e. uses only a minimum of components, resulting in low cost and low power consumption, and which also provides a low noise figure and a high linearity. Further, it should not require a high supply voltage.

According to the invention the object is achieved in that the electronic circuit further has a feedback circuit connected between the common input terminal and the common output terminal, said feedback circuit having an impedance at radio frequencies which is high-ohmic compared to impedance levels of the two transistors. The feedback circuit having a high-ohmic impedance ensures a DC operating point without influencing the RF performance due to the high impedance level of this feedback circuit, and at the same time it can be implemented with only one or a few components. The high impedance of the feedback circuit also ensures a very low current in the feedback circuit, and thus little or no noise is added to the circuit. Further, the circuit does not require a high supply voltage, because only two transistors are stacked.

In one embodiment, which is stated in claim 2, the feedback circuit comprises a high-ohmic resistor, which has the advantage that the feedback circuit can be implemented with a single component. In another embodiment, which is stated in claim 3, the feedback circuit comprises two transistors connected in anti-parallel to each other. In e.g. integrated circuits semiconductor components are often more expedient to use than e.g. a resistor. Further, this embodiment provides a better stabilization of the DC bias voltage. As stated in claim 4, the two transistors of the feedback circuit maybe Field Effect Transistors, which has the advantage that the entire circuit can be implemented with Field Effect Transistors. In this case the Field Effect Transistors of the feedback circuit may be P-channel MOSFETs, as stated in claim 5, or they may be N-channel MOSFETs, as stated in claim 6.

As mentioned, the invention also relates to the use of an electronic circuit of the type described above as a Low Noise Amplifier. Due to the advantages mentioned above, especially the low amount of noise added by the feedback circuit, the circuit is well suited for this application.

The invention will now be described more fully below with reference to the drawings, in which Figure 1 shows an example of a circuit according to the invention,

Figure 2 shows a circuit similar to that of Figure 1, but with MOSFETs of P- and N-type exchanged,

Figure 3 shows the circuit of Figure 1 modified to use MOSFETs of P-type in the feedback circuit,

Figure 4 shows the circuit of Figure 1 modified to use bipolar transitors in the feedback circuit, and

Figure 5 shows a circuit according to the invention in which a resistor is used as a feedback circuit.

Figure 1 shows an example of how a circuit according to the invention can be implemented in a preferred embodiment. The two MOSFET transistors Ml and M2 are the amplifying elements. The MOSFET transistor Ml of N-type has its gate terminal connected to an input terminal RF-in, while its drain terminal is connected to an output terminal RF-out. The source terminal of Ml is connected to a ground terminal GND. Similarly, the MOSFET transistor M2 of P-type has its gate and drain terminals connected to the input terminal RF-in and the output terminal RF-out, respectively. The source terminal of M2 is connected to a supply voltage terminal Vdd.

A radio frequency input signal applied to the input terminal RF-in will thus be amplified by the two MOSFET transistors Ml and M2 and the amplified signal is presented on the output terminal RF-out. Due to the use of two complementary MOSFET transistors the coupling provides a high voltage gain.

Two other MOSFET transistors M3 and M4 of N-type constitute a bias circuit for the DC operating point by forming a feedback loop which sets the DC biasing voltages at the points RF-in and RF-out. The feedback loop is slow by using small low frequent transistors for it. Due to this feedback loop the DC bias voltage on the two points will be the same.

If the DC voltage at point RF-out increases, M3 starts conducting, which decreases the DC voltage at point RF-out. If the DC voltage at point RF-out decreases, M4 starts conducting which increases the DC voltage at point RF-out. This is ensured by the anti- parallel connection of M3 and M4. Because of this opposite behaviour, the DC voltage at point RF-in and RF-out will stabilize at such a value that the DC currents flowing through Ml and M2 are the same. When the feedback loop has stabilized, no DC current flows through M3 and M4. The voltage at points RF-in and RF-out depends on the size of Ml and M2. If the width of the PMOS M2 is roughly a factor 2.5 to 3 greater than the width of the NMOS Ml, then the DC voltage at the points RF-in and RF-out will be roughly half the supply voltage Vdd. Because no DC currents flow through M3 and M4 when the feedback loop has stabilized, they do not add noise to the circuit. This makes the circuit suitable in low noise amplifier applications. As mentioned above, the circuit has a high voltage gain because both transistors Ml and M2 contribute to the amplification of the RF signal. Further, it has a low power consumption because M3 and M4 do not consume any current. The low number of components used in the circuit, actually only four MOSFETs, also results in a low production cost for the circuit.

In the ideal situation mentioned above, where the widths of Ml and M2 are selected so that the DC voltage at RF-out is half the supply voltage Vdd, the available voltage space is optimally used, which means that the voltage swing of the output signal has more headroom, resulting in a high linearity for the amplifier circuit.

As mentioned, the circuit is very suitable in low noise amplifier applications. However, it can be used in other applications as well. For example, it is usable in any application where an amplifier is needed. It can also be used as a bias circuit to generate a certain bias voltage that lies between Vdd and ground. This bias voltage can be set by changing the size of Ml and M2.

In Figure 1 the source terminal of N-type MOSFET Ml is connected to ground, while the source terminal of P-type MOSFET M2 is connected to the supply voltage. However, as shown in Figure 2, the P and N-type MOSFETs may also be exchanged. Here, the P-type MOSFET M5 is connected to ground while the N-type MOSFET M6 is connected to the (negative) supply voltage. The function of the circuit of Figure 2 is the same as that of Figure 1.

As shown in Figure 3, the two N-type MOSFETs M3 and M4 may also be changed to P-type MOSFETs M7 and M8. Again, one of the MOSFETs will conduct when the DC voltage at RF-out increases, while the other will conduct when the DC voltage at RF- out decreases. As a further alternative, which is shown in Figure 4, M3 and M4 may also be substituted by two bipolar transistors Qland Q2. Transistor Ql will conduct when the DC voltage at RF-out increases, while transistor Q2 will conduct when the DC voltage at RF-out decreases. An alternative embodiment of the invention is illustrated in Figure 5. In this embodiment a high ohmic resistor is placed between the points RF-in and RF-out. This resistor will have the same function as M3 and M4, i.e. it will ensure that the DC voltages at RF-in and RF-out will stabilize to the same level. The general principle is making a (slow) feedback loop set the DC bias voltage at points RF-in and RF-out. The value of the resistor must be much higher than the impedance level of the circuit at radio frequencies, which is easily met.

Although a preferred embodiment of the present invention has been described and shown, the invention is not restricted to it, but may also be embodied in other ways within the scope of the subject-matter defined in the following claims.

Claims

CLAIMS:

1. An electronic circuit comprising two complementary Field Effect Transistors (Ml, M2; M5, M6), each having at least a gate terminal, a source terminal and a drain terminal, wherein the gate terminals of the two transistors are connected together as a common input terminal, and the drain terminals of the two transistors are connected together as a common output terminal, characterized in that the electronic circuit further has a feedback circuit (M3, M4; M7, M8; Ql, Q2; Rl) connected between the common input terminal and the common output terminal, said feedback circuit having an impedance at radio frequencies which is high-ohmic compared to impedance levels of the two transistors.

2. An electronic circuit according to claim 1, characterized in that the feedback circuit comprises a high-ohmic resistor (Rl).

3. An electronic circuit according to claim 1, characterized in that the feedback circuit comprises two transistors (M3, M4; M7, M8; Ql, Q2) connected in anti-parallel to each other.

4. An electronic circuit according to claim 3, characterized in that the two transistors of the feedback circuit are Field Effect Transistors (M3, M4; M7, M8).

5. An electronic circuit according to claim 4, characterized in that the Field Effect Transistors of the feedback circuit are P-channel MOSFETs (M7, M8).

6. An electronic circuit according to claim 4, characterized in that the Field Effect Transistors of the feedback circuit are N-channel MOSFETs (M3, M4).

7. Use of an electronic circuit according to any one of claims 1 to 6 as a Low Noise Amplifier.