WO2002033469A2

WO2002033469A2 - Fabrication process for polysilicon deflectable membrane

Info

Publication number: WO2002033469A2
Application number: PCT/US2001/032513
Authority: WO
Inventors: Dale C. Flanders
Original assignee: Axsun Technologies LLC
Current assignee: Axsun Technologies LLC
Priority date: 2000-10-19
Filing date: 2001-10-17
Publication date: 2002-04-25
Anticipated expiration: 2003-04-19
Also published as: WO2002033469A3; AU2002225591A1

Abstract

A process for fabricating an optical membrane from polycrystalline silicon comprises first forming a sacrificial layer (110) on a handle wafer (100). Concavities (127) are etched into the sacrificial layer (110). Polycrystalline silicon membrane layer (125) is then formed on the sacrificial layer (110). The polycrystalline membrane layer (125) is subsequently polished to achieve the predetermined membrane thickness and surface smoothness, annealed, and then patterned. Finally, the sacrificial layer (110) is removed to release the membrane (125). The concavities (127) in the sacrificial layer (110) yield convexities in the polysilicon layer (125) to prevent stiction adhesion to the handle wafer (100). During processing, a mask used to pattern the membrane layer functions to protect a highly reflecting (HR) coating for the membrane.

Description

BACKGROUND OF THE INVENTION

Micro-electromechanical system (MEMS) membranes are used in a number of different optical applications. For example, they can be coated to be reflective to highly reflective and then paired with a stationary mirror to form a tunable Fabry-Perot (FP) cavity/filter. It can also be used to define the end of a laser cavity. By deflecting the membrane, the spectral location of the cavity modes can be controlled.

The MEMS membrane is typically produced by etching features into a layer of material to form the pattern of the membrane. An underlying sacrificial layer is subsequently etched away to produce a suspended structure in a release process. Often the structural layer is silicon and the sacrificial layer is silicon dioxide. The silicon dioxide can be preferentially etched in hydrofluoric acid. The membranes can be constructed from various other material systems. In some cases, alternating layers of high and low index material are used to create a membrane.

Typically, membrane deflection is achieved by applying a voltage between the membrane and a fixed electrode. Electrostatic attraction deflects the membrane in the direction of the fixed electrode as a function of the applied voltage. This effect changes the reflector separation in the FP filter or cavity length in the case of a laser. Movement can also be provided by thermal or other actuation mechanism.

The high reflectivity coatings (R>98%), reflective low loss coatings and/or coatings in which the reflectivity varies as a function of wavelength (e.g., dichroism) require dielectric optical coatings. The optics industry has developed techniques to produce these high performance coatings and has identified a family of materials with well-characterized optical and mechanical properties. These coatings typically include alternating layers of high and low index materials. Candidate materials include silicon dioxide, titanium dioxide and tantalum pentoxide. These coatings are usually quite thick, greater than 3 micrometers (um). SUMMARY OF THE INVENTION

The present invention concerns a process for fabricating an optical membrane.

Specifically, the membrane is manufactured from polycrystalline silicon, which can be formed, such as deposited, on the handle or support wafer.

In general, according to one aspect, the invention features a process for fabricating an optical membrane. The process comprises first forming a sacrificial layer on a handle wafer. Polycrystalline silicon membrane layer is then formed, i.e., deposited, on the sacrificial layer.

Typically, the polycrystalline membrane layer is subsequently polished to achieve the predetermined, desired membrane thickness and surface smoothness. The membrane layer is then patterned to form the membrane. Finally, the sacrificial layer is removed to release the membrane.

In one application, the membrane is coated for high reflectivity. In one implementation, this high reflectivity is achieved through a quarterwave stack, such as 16 or more layers of alternating high and low index dielectric materials, such as silicon dioxide and tantalum pentoxide. The thus-formed membrane is used at one end of a laser cavity so that the cavity length can be modulated to change the cavity mode structure. In another implementation, the membrane is installed opposite to another, typically stationary, reflector to form a tunable Fabry-Perot (FP) filter.

In the preferred fabrication process, the polycrystalline material is deposited in a low-pressure chemical vapor deposition process. The polysilicon crystalline layer is then annealed. Also, since the resulting membrane will be typically deflected using electrostatic deflection techniques, the polycrystalline layer is also preferably doped to provide for conductivity, but, especially in high finesse FP filter applications, the doping must not overly increase optical absorption.

One chronic problem associated with micro electromechanical system (MEMS) membranes is stiction. Specifically, if deflected sufficiently to contact an adjoining surface, the membranes can adhere to that surface because of atomic-level forces. According to the preferred embodiment, depressions or concavities are etched in the sacrificial layer prior to the formation of the polycrystalline silicon membrane layer. As a result, convexities are formed in the polycrystalline silicon membrane layer. These prevent adhesion of the membrane to the handle wafer in the event of contact by lowering stiction forces.

In general, according to another aspect, the invention also features a low stiction optical membrane. This membrane comprises a handle wafer, a polycrystalline silicon membrane layer, and convexities formed in the polycrystallme silicon membrane to prevent stiction adhesion of the membrane to the handle wafer.

The above and other features of the invention including various novel details of construction and combinations of parts, and other advantages, will now be more particularly described with reference to the accompanying drawings and pointed out in the claims. It will be understood that the particular method and device embodying the invention are shown by way of illustration and not as a limitation of the invention. The principles and features of this invention may be employed in various and numerous embodiments without departing from the scope of the invention.

BRIEF DESCRIPTION OF THE DRAWINGS

In the accompanying drawings, reference characters refer to the same parts throughout the different views. The drawings are not necessarily to scale; emphasis has instead been placed upon illustrating the principles of the invention. Of the drawings :

Figs. 1A through II are schematic cross-sectional and top views illustrating fabrication of one embodiment of the membrane of the present invention;

Fig. 2 is a schematic cross-sectional view of an implementation of the polysilicon membrane; and

Figs. 3 A and 3B are schematic cross-sectional views illustrating the fabrication of another embodiment of the inventive membrane. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Figs. 1 A through II illustrate a process for fabricating a tunable, low stiction polysilicon membrane that utilizes principles of the present invention.

Referring to Fig. 1A, the process begins with a support or handle wafer 100, which in one embodiment is a standard n-type doped silicon wafer. The handle wafer 100 is 75mm to 150mm in diameter and is 400 to 500 microns thick in one implementation.

The wafer 100 is oxidized to form a sacrificial oxide layer 110. This oxide layer 110 has a depth of typically 2 to 4 microns. The photoresist layer 115 is then deposited over the oxide layer 110 and patterned to expose regions of the oxide layer 110 around a future location of the optical port. The exposed regions of the oxide sacrificial layer 110 are then etched in a buffered oxide etch to form a ring of concavities 120 in the sacrificial layer 110 surrounding the location of the optical port.

As shown in Fig. IB, the photoresist layer 115 is removed and a polycrystalline silicon membrane layer 125 is deposited over the sacrificial layer 110. The polysilicon layer is deposited to a thickness of typically greater than 6 to 10 microns, in a low-pressure chemical vapor deposition process. Typically a dopant, such as n-type, is added to improve conductivity while controlling the crystallinity and density of the polysilicon. The polysilicon fills into the concavities 120 in the sacrificial oxide layer 110, resulting in convexities 127 in the polysilicon layer 125.

After deposition, the polysilicon layer is annealed and polished back to the 6 to 10 microns membrane thickness.

As shown in Fig. 1C, an optical port 101 is patterned and etched into handle wafer 100 preferably using a combination of isotropic and anisotropic etching. The sacrificial oxide layer 110 is used as an etch stop. Alternatively, the optical port etch step can be omitted, as silicon is partially transparent at infrared wavelengths, in which case an anti- reflective (AR) coating is applied to the outer surface of handle wafer 100 to minimize reflection from the air-silicon interface.

Fig. ID is a top plan view of the polysilicon membrane layer 110 showing the relationship of the optical port 101 and the convexities 127 that ring the region of the port. Fig. IE shows the deposition and patterning of a highly reflective (HR) coating 140. Specifically, the HR coating 140 is deposited and etched back using a patterned photoresist layer 145. The HR coating is preferably a multi-layer coating of 4 more layers, preferably 8 or more, with a 16 dielectric mirror being used in the current embodiment. The preferred method of etching the dielectric coatings 140 is to use a dry etch process, such as reactive ion etching and reactive ion milling. Films with a thickness of 3 to 4 um have been etched with a photoresist mask provided adequate backside cooling is employed. The etch chemistry is based on CHF3/CF4/Ar. Ion beam milling is an alternative, but the etch times for this process are much longer.

The etch of the HR coating 140 leaves the reflector in the region of the optical port

101.

Fig. IF shows the formation of the tether structure in the polysilicon membrane layer 125. Specifically, a photoresist layer 150 is deposited and patterned with the tether pattern. It also functions to protect the HR coating 140 during the silicon etch. Voids 152 and 154 are formed in the polysilicon layer to form the membrane with its tether structure.

Protection of the dielectric coatings during release is required since materials such as silicon dioxide, titanium dioxide and tantalum pentoxide are etched by hydrofluoric acid. As shown, photoresist layer 150 is used both as a mask for the patterning step and for protection during the release step.

A metal mask, such as nickel, is substituted for the photoresist in the preceding steps in one embodiment. To achieve good side- wall coverage, as required for a protection mask, a sputtering system is preferred for this deposition step. For the release step, a metal mask could allow the use of concentrated hydrofluoric acid, shortening the etch times considerably. If a metal mask is used, then it must be stripped after release. For example, a wet etch step for removing the metal mask could be inserted immediately after release.

Fig. 1G is a top view showing one membrane-tether configuration. The patterned polysilicon membrane 125' comprises a center body portion 156 that is aligned over the optical port 101 and tethers 158 formed by the removal of polysilicon from voids or regions 152, 154. Fig. 1H shows the subsequent step in which the sacrificial layer 110 is partially removed in an isotropic oxide etch to "release" the membrane and tether structure from the sacrificial oxide layer 110 and handle wafer 100. In one embodiment, concentrated HF etch, followed by methanol, followed by a drying step using supercritical carbon dioxide is used.

For this release step, the metal mask could allow the use of concentrated hydrofluoric acid, shortening the etch times considerably. If a metal mask is used, then it must be stripped after release. For example, a wet etch step for removing the metal mask could be inserted immediately after release.

Another protection scheme is to deposit a mask layer that functions as a protection mask as well as be incorporated into the overall optical function of the coating, eliminating the need to remove the mask layer after release. For example, two candidate materials are amorphous silicon or silicon nitride. In this process, the dielectric film is deposited conformally over the surface; but the coating design is adjusted in anticipation of an additional layer. The features are etched using the dry etch process as before. An additional conformal layer is deposited over the entire surface of the wafer. Sputtering or a plasma enhanced chemical vapor deposition (PECND) systems provide the best conformal coverage. However, an e-beam evaporator with a planetary system is an alternative. The optical design of the coating is tailored so that its performance was not sensitive to the thickness of this last layer, eliminating the need for precise control of the deposition rate. This final mask layer is patterned using a dry or wet etch process if it were desirable to reduce the area over which it extended. For example, it may be necessary to reduce the area to that immediately surrounding the dielectric coating so that it does not influence the mechanical properties of the MEMS structure.

As shown in Fig. II, an anti-reflection (AR) coating 105 is deposited through the optical port 101 onto the exterior surface of the membrane. Both optical coatings 105, 140 are designed for the wavelength bands of interest.

The convexities 127 of the polysilicon membrane layer 125' project from the membrane in the direction of the handle wafer. Thus, if an over- voltage is established between the handle wafer 100 and the membrane 125' and the membrane contacts the handle wafer, the contact will be at the peaks of the convexities 127.

The convexities 127 prevent stiction induced attachment of the membrane 125' to the handle wafer, if an over- voltage condition, for example, should occur. The most 5 common definition for stiction is the strong interfacial adhesion present between contacting crystalline microstructure surfaces. The term has also evolved to include sticking problems such as contamination, friction driven adhesion, and humidity driven capillary forces on an oxide surface. Generally, stiction is the unintentional adhesion of MEMS surfaces. Generally stiction forces increase with contact area. The convexities 127 reduce the o effective contact area to reduce the risk of membrane- wafer attachment.

Fig. 2 shows one application of the polysilicon membrane 125'. Specifically, it is paired with a reflector 16 to form a FP cavity 18. Specifically, the filter 10 includes three main functional components, including the handle wafer 100, a moving membrane reflector 125', and a concave, e.g., spherical, cavity reflector 16 with an intervening spacer layer 5 140. These functional layers are held together and operated as a tunable FP filter by modulating voltage 22 between the handle wafer and the membrane.

According to another embodiment, the membrane 125' is placed at the end of a laser cavity to modulate the cavity length.

Generally, the packing density of the membrane layer is controlled during o deposition to minimize the stress in the polycrystalline layer 125 to create a flat membrane when released. In other embodiments, either a tensile or compressive forces are promoted in the polycrystalline layer 125 so after subsequent release, the membrane forms a concave or convex surface to thereby yield a concave reflector of a laser cavity resonator or Fabry- Perot filter.

5 Figs. 3 A and 3B illustrate an alternative process for fabricating a curved or lensing surface on the membrane layer.

As shown in Fig. 3 A, in addition to patterning photoresist layer 115 to expose the oxide layer 110 to form the concavities, the photoresist 115 is also patterned to form an optical surface over the optical port region. Curved resist surfaces are formed by grayscale or reflow processes, for example. This surface is concave or convex in different embodiments. Alternatively, binary or diffractive optical patterns are used.

As illustrated in Fig. 3B, the timed etch of the oxide layer 110, followed by the polysilicon deposition yields convexities 127, as previously described, and additionally the optical element 210. This element is located in the polysilicon layer 115, over the optical port 101. In the case of diffractive or refractive optics, which rely on transmission, the optical element is coated with an AR coating such as coating 105 describe previously. In the case of reflective optics, a metal or thin film coating is deposited onto element 210 through the port 101 after membrane release.

While this invention has been particularly shown and described with references to preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details maybe made therein without departing from the scope of the invention encompassed by the appended claims. For example, in the particular process flow shown, the optical port is patterned into the backside of the wafer prior to the deposition of the dielectric film on the front side. Executing this step prior to depositing the optical coatings is not necessary. For example, the dielectric could be applied to a plain SOI wafer and patterned prior to etching the optical port. The protection methods would be essentially unchanged. For other devices, the point at which the dielectric film is patterned could be adjusted to optimize the overall process flow.

Claims

CLAIMSWhat is claimed is:

1. A process for fabricating an optical membrane, the process comprising: forming a sacrificial layer on a handle wafer; forming a polycrystalline silicon membrane layer on the sacrificial layer; polishing the polycrystalline silicon membrane layer to achieve a predetermined depth and surface smoothness; patterning the polycrystalline silicon membrane layer to form the membrane; and removing at least part of the sacrificial layer to release the membrane.

2. A process as claimed in claim 1, further comprising coating the membrane for high reflectivity.

3. A process as claimed in claim 1, further comprising installing the membrane at one end of a laser cavity.

4. A process as claimed in claim 1, further comprising installing the membrane opposite a^' stationary reflector to form a tunable Fabry-Perot filter.

5. A process as claimed in claim 1, further comprising attaching a mirror to the handle wafer to define a Fabry-Perot cavity between the membrane and the mirror.

6. A process as claimed in claim 1, further comprising annealing the polycrystalline silicon layer prior to the polishing step.

7. A process as claimed in claim 1 , wherein the step of forming the polycrystalline silicon layer utilizing a low pressure chemical vapor deposition process.

8. A process as claimed in claim 1, further comprising doping the polycrystalline silicon layer to increase conductivity.

9. A process as claimed in claim 1, further comprising etching depressions in the sacrificial layer prior to the step of forming polycrystalline silicon membrane layer.

10. A process as claimed in claim 9, further comprising depositing the polycrystalline silicon layer into the depressions.

11. A process as claimed in claim 1, wherein the polycrystalline silicon membrane is first polished, then patterned, thereafter the sacrificial layer is removed.

12. An optical membrane system, comprising: a handle wafer; a polycrystalline silicon membrane adjacent to the handle wafer; a sacrificial layer spacing the membrane from the handle wafer.

13. An optical membrane system as claimed in claim 12, further comprising a reflector opposite the membrane.

14. An optical membrane system as claimed in claim 13, wherein the reflector is concave.

15. An optical membrane system as claimed in claim 12, wherein the membrane is coated to have a reflectivity greater than 96%.

5 16. An optical membrane system as claimed in claim 12, wherein the membrane is coated to have a reflectivity greater than 99%.

17. An optical membrane system as claimed in claim 12, wherein a handle wafer side of the membrane is antireflection coated.

18. An optical membrane system as claimed in claim 12, further comprising an o electric drive that establishes a voltage between the handle wafer and the membrane.

19. A low stiction optical membrane, comprising: a handle wafer; a membrane supported adjacent to the handle wafer; and 5 convexities formed on the membrane to prevent adhesion of the membrane to the handle wafer.

20. An optical membrane system as claimed in claim 12, wherein the membrane is constructed from polycrystalline silicon.

21. A process for fabricating an optical membrane having an optical element, the process comprising: etching a profile of the optical element into a sacrificial layer; depositing a membrane layer on the sacrificial layer and over the optical element profile; and removing at least part of the sacrificial layer to release the membrane and expose the optical element.

22. A process as claimed in claim 21, further comprising coating the optical element with a reflective coating.

23. A process as claimed in claim 21, further comprising doping the polycrystalline silicon layer to increase conductivity.