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WO2002032199A1 - Carte de circuits et procede pour produire une telle carte de circuits et un materiau composite en couche pour produire une telle carte de circuits - Google Patents

Carte de circuits et procede pour produire une telle carte de circuits et un materiau composite en couche pour produire une telle carte de circuits Download PDF

Info

Publication number
WO2002032199A1
WO2002032199A1 PCT/CH2001/000472 CH0100472W WO0232199A1 WO 2002032199 A1 WO2002032199 A1 WO 2002032199A1 CH 0100472 W CH0100472 W CH 0100472W WO 0232199 A1 WO0232199 A1 WO 0232199A1
Authority
WO
WIPO (PCT)
Prior art keywords
circuit board
printed circuit
thin glass
layer
board according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CH2001/000472
Other languages
German (de)
English (en)
Inventor
Peter Straub
Peter Weber
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
PPC Electronic AG
Original Assignee
PPC Electronic AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by PPC Electronic AG filed Critical PPC Electronic AG
Priority to DE50103348T priority Critical patent/DE50103348D1/de
Priority to JP2002535453A priority patent/JP2004511111A/ja
Priority to AU2001279530A priority patent/AU2001279530A1/en
Priority to AT01957666T priority patent/ATE274289T1/de
Priority to US10/398,961 priority patent/US7226653B2/en
Priority to EP01957666A priority patent/EP1325673B1/fr
Publication of WO2002032199A1 publication Critical patent/WO2002032199A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24926—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including ceramic, glass, porcelain or quartz layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/26—Web or sheet containing structurally defined element or component, the element or component having a specified physical dimension
    • Y10T428/263—Coating layer not in excess of 5 mils thick or equivalent
    • Y10T428/264—Up to 3 mils
    • Y10T428/265—1 mil or less

Definitions

  • the present invention relates to the field of electronic circuit technology. It relates to a printed circuit board according to the preamble of claim 1 and a method for producing such a printed circuit board and a layered composite material for such a printed circuit board.
  • a circuit board used in the highest frequency range should have an insulating layer between the conductor layers with the lowest possible (relative) dielectric constant ⁇ r and a small dielectric loss factor tan ⁇ in order to keep losses that increase with frequency low.
  • circuit board material is characterized by a high degree of homogeneity in the dielectric and a high degree of uniformity in the external dimensions (small thickness fluctuations, etc.), because otherwise undesirable differences in runtime may occur in neighboring areas of the circuit board result in the signal propagation, which impair the functionality of the circuit constructed with it.
  • Another proposal relates to the use of a "glass paper” made of glass fibers as a dielectric for printed circuit boards (JP-A-9208252). Although such a fiber material is less likely to break than the glass ceramic, the irregular fibrous structure of the material results in a local inhomogeneity in the dielectric properties, which at high line densities and high frequencies to the above. Runtime problems.
  • substrate materials for printed circuit boards consist of fluoropolymers filled with additives (ceramic particles, glass fibers) (see, for example, US-A-5, 149,590).
  • additives ceramic particles, glass fibers
  • Such materials for example, from the US company Rogers Corp. are commercially available under the designations RT / duroid 5870-5880 and RO3000, show relatively good and homogeneous dielectric properties and are therefore well suited for high-frequency applications.
  • RT / duroid 5870-5880 and RO3000 show relatively good and homogeneous dielectric properties and are therefore well suited for high-frequency applications.
  • due to the complicated manufacture such a material is comparatively expensive and also has an unfavorable coefficient of thermal expansion which is significantly higher than that of silicon.
  • the essence of the invention is to provide a thin glass layer as a dielectric in the printed circuit board below the at least one conductor layer comprising conductor tracks, as is known above all from the technology of liquid crystal displays (LCDs).
  • a thin glass layer has good mechanical stability even with a small thickness, has very advantageous dielectric and thermal properties and is distinguished by a high optical quality, which is particularly evident in a high homogeneity of the material and a high flatness with low flatness and Deviations in thickness manifested.
  • a preferred embodiment of the invention is characterized in that a conductor layer is arranged on both sides of the thin glass layer and is connected flat to the thin glass layer.
  • One conductor layer or both conductor layers can be structured, i.e. comprise individual conductor tracks.
  • Such a thin glass layer provided on both sides with a conductor layer has the advantage over the one-sided coating that a clearly defined volume results for an electronic circuit realized therewith, which volume is predominantly filled with the thin glass dielectric and accordingly has favorable properties.
  • the thin glass layer is preferably drawn from the melt and consists of a modified borosilicate glass, the thin glass layer having a thickness in the range from a few ⁇ m to a few mm, preferably in the range between 30 ⁇ m and 1.1 mm, at 1 MHz a relative dielectric constant ⁇ r between see 6 and 7, preferably of about 6.2, and a dielectric loss factor tan ⁇ of about 9x10 "4 , and for temperatures between 20 and 300 ° C a thermal expansion coefficient ⁇ 20 - 3 oo between 4x10 " 6 K ⁇ 1 and 8x10 "6 K “ 1 , preferably of about 4.5x10 "6 K “ 1 .
  • the conductor layers advantageously each consist of a metal foil, preferably a Cu metal foil, have a thickness of between 5 and 50 ⁇ m, preferably of 18 or 35 ⁇ m, and are bonded to the thin glass layers by means of a connecting layer, the connecting layers essentially consisting of a resin consist.
  • a resin-coated Cu foils Resin Coated Foil or RCF
  • HDI circuits i.e. the printed circuit boards with high integration densities.
  • a silane is preferably additionally provided as an adhesion promoter in the connection layers.
  • the circuit board consists of a single thin glass layer glued on both sides with metal foils. If the thin glass layer is thin, this results in a thin, flexible printed circuit board with very good electrical and thermal properties.
  • the printed circuit board may comprise a plurality of thin glass layers glued to metal foils one above the other in a stack, thus forming a multilayer printed circuit board in which plated-through holes can also be provided in the usual way.
  • the printed circuit board comprises at least one further insulating plate made of another insulating material.
  • the combination of conductor layer (s) and thin glass layer can thus advantageously be integrated into a conventional type of printed circuit board. Further embodiments result from the dependent claims.
  • FIG. 1 shows a sectional illustration of the structure of an unstructured printed circuit board according to a first preferred exemplary embodiment of the invention
  • FIG. 2 shows the printed circuit board from FIG. 1 after the (two-sided) structuring of the conductor layers and with a semiconductor chip applied directly by way of example by means of the DCA method;
  • FIG. 3 shows a sectional illustration of the structure of a (structured) printed circuit board according to a second preferred exemplary embodiment of the invention
  • FIG. 4 shows a sectional representation of the structure of a (structured) multilayer printed circuit board according to a third preferred exemplary embodiment of the invention
  • FIG. 5 shows in two sub-steps (a) and (b) a method for producing a layered composite material for a printed circuit board according to FIG. 1 according to a preferred exemplary embodiment of the invention.
  • Fig. 6 in six steps (a) to (f) a process for producing a
  • the structure of an unstructured circuit board according to a first preferred embodiment of the invention is shown in a sectional view.
  • the printed circuit board 10 consists of a single thin glass layer 13, on the two sides of which a conductor layer 11 or 15 is arranged.
  • the conductor layers 11, 15 are formed by Cu metal foils which are adhesively bonded to the thin glass layer 13 by means of an adhesive connecting layer 12 or 14.
  • Thin glass layers such as are provided within the scope of the invention and are used to achieve the advantages according to the invention, are known from the prior art (see, for example, EP-A1-0 972 632 or DE-A1-198 10 325). They have thicknesses between approximately 30 ⁇ m and 2 mm, are drawn from the melt, and are characterized by good mechanical and optical quality as well as excellent thermal and electrical properties. Such thin glass layers are commercially produced on a large scale for electro-optical displays (e.g. LCDs) and are therefore comparatively cheap in price.
  • electro-optical displays e.g. LCDs
  • Suitable thin glass layers or thin glasses are manufactured and offered, for example, by Schott Glas, Mainz (DE) under the type designations AF 45 and D 263 T.
  • the AF 45 thin glass is a modified borosilicate glass with a high proportion of BaO and AI 2 O 3 . It is usually in sizes up to 440 mm x 360 mm and is characterized by the following properties:
  • Transformation temperature T g 662 ° C thermal expansion coefficient ⁇ 2 o-3oo: 4.5x10 "6 K " 1 rel.
  • the thin glass D 263 T is a borosilicate glass made from very pure raw materials. It is also available in sizes up to 440 mm x 360 mm and is characterized by the following properties:
  • Transformation temperature T g 557 ° C thermal expansion coefficient ⁇ 2 o-3oo: 7.2x10 "6 K " 1 rel.
  • Both thin glass layers or thin glasses are particularly well suited for use in a printed circuit board according to the invention.
  • a suitable layered composite material for the (unstructured) printed circuit board 10 according to FIG. 1 is preferably carried out in the manner shown in FIG. 5: a thin glass layer 13 is assumed, the surfaces of which are first freed of adhering moisture (water) and then - for example, by a glow discharge or the like - be pretreated in order to achieve good and permanent adhesion during subsequent gluing.
  • resin-coated metal foils Resin Coated Foils RCFs
  • connection layer 12 or 14 is applied (FIG. 5a).
  • the connecting layers 12, 14 contain a resin which is expediently partially cured or pre-reacted.
  • Resin-coated Cu metal foils of this type are known from the technology of highly integrated (HDI) circuits.
  • Resin-coated films which are particularly suitable in the context of the invention are offered, for example, by Isola AG (DE) under the names ISOFOIL 160 and RCC.
  • the (ISOFOIL 160) foils for example, have a copper foil thickness of 18 ⁇ m or 35 ⁇ m and are provided with a 75 ⁇ m thick resin layer that is pre-reacted (so-called B-stage coating).
  • the resin-coated films 28, 29 are packed with the pretreated central thin glass layer 13 into a stack using an additional silane layer for promoting adhesion (see, for example, US Pat. No. 5,149,590).
  • the stack is then glued under the action of heat and pressure (Fig. 5b).
  • the result is a layered composite material or an (unstructured) printed circuit board 10 according to FIG. 1.
  • the conductor layers 11, 15 can then be structured using known methods from the production of printed circuit boards, in order to add specific conductor tracks (or conductor surfaces) 16, 17 as required generate (Fig. 2).
  • SMD components or the like can be soldered or conductively glued onto the structured printed circuit board 10 according to FIG. 2.
  • multilayer printed circuit boards 30 can also be realized in an analogous manner. which comprise a plurality of thin glass layers 13, 13 'and 13 "in a stack one above the other with conductor layers 34 and 35 lying between them and outer conductor layers 31, 38 (FIG. 4).
  • a corresponding connecting layer 32, 33, 36, 37 is provided, which glues the conductor layer to the respective thin glass layer.
  • the inner conductor layers 34, 35 are expediently embedded in an associated connection layer 33 or 36 be available, which are made in a conventional manner and conductor tracks in different Connect conductor layers together.
  • FIG. 3 shows a printed circuit board 20 in which a central thin glass layer 13 with conductor layers 23, 24 and conductor tracks 27, 27 'glued on both sides between two insulating plates 21, 26 of a conventional type (for example based on epoxy resin or polytetrafluoroethylene). arranged and glued to these insulating plates.
  • connection layers 22, 25, in which the conductor layers 23, 24 are embedded, are used for bonding.
  • FIGS. 6 (a) - (f) The production of such a “hybrid” printed circuit board 20 with conventional insulating plates and thin glass layers is shown in different steps in FIGS. 6 (a) - (f): the starting point is one of the insulating plates, namely the insulating plate 21, on which a first conductor layer is applied in a conventional manner 23 is glued on by means of a first connecting layer 39 and then structured (FIG. 6a). The first connection layer 39 is then filled to cover the first conductor layer to form the final connection layer 22 (FIG. 6b). The structure 21, 22, 23 thus prepared is then treated on one side with a correspondingly pretreated one Thin glass layer 13 glued (Fig. 6c).
  • a further structure 24, 25, 26 can then be glued to the free side of the thin glass layer 13 (FIGS. 6e, f), which comprises the other insulating plate 26 provided with a second conductor layer 24.
  • the second conductor layer 24 is glued to the insulating plate 26 by means of a second connection layer 40, then structured (FIG. 6d), and the second connection layer 40 is then filled to form the final connection layer 25 (FIG. 6e).
  • resin-coated Cu metal foils for producing the conductor layers 23 and 24.
  • circuit boards can be made very thin without loss of mechanical stability
  • the thin glass layers can be processed and processed well in the context of the production of printed circuit boards; in particular, known methods of circuit board production can be used without any problems • Multilayer printed circuit boards can be easily produced, which can be made even more compact due to the thin thickness of the thin glass layers
  • the layered composite material produced by the method according to the invention is particularly suitable as a starting material for the printed circuit board. However, it is also conceivable to use this material in other applications.
  • connection contact semiconductor chip
  • 26 insulating plate e.g. epoxy

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Laminated Bodies (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Insulating Bodies (AREA)

Abstract

L'invention concerne une carte de circuits (10) pour un circuit électronique, notamment pour des extra hautes fréquences dans la plage des GHz, qui comprend au moins une couche conductrice (11, 15) placée sur une couche isolante et qui est interconnectée en nappe avec la couche isolante. L'invention se caractérise en ce qu'on obtient de meilleures propriétés mécaniques, thermiques et électriques, du fait que la couche isolante est une couche de verre mince.
PCT/CH2001/000472 2000-10-13 2001-08-02 Carte de circuits et procede pour produire une telle carte de circuits et un materiau composite en couche pour produire une telle carte de circuits Ceased WO2002032199A1 (fr)

Priority Applications (6)

Application Number Priority Date Filing Date Title
DE50103348T DE50103348D1 (de) 2000-10-13 2001-08-02 Leiterplatte sowie verfahren zum herstellen einer solchen leiterplatte und eines schichtverbundmaterials für eine solche leiterplatte
JP2002535453A JP2004511111A (ja) 2000-10-13 2001-08-02 プリント回路基板，そのようなプリント回路基板の製造方法，及びそのようなプリント回路基板用の層状複合材料
AU2001279530A AU2001279530A1 (en) 2000-10-13 2001-08-02 Printed circuit board and method for producing a printed circuit board of this type and for producing a laminar composite material for such a printed circuit board
AT01957666T ATE274289T1 (de) 2000-10-13 2001-08-02 Leiterplatte sowie verfahren zum herstellen einer solchen leiterplatte und eines schichtverbundmaterials für eine solche leiterplatte
US10/398,961 US7226653B2 (en) 2000-10-13 2001-08-02 Printed circuit board and method for producing a printed circuit board
EP01957666A EP1325673B1 (fr) 2000-10-13 2001-08-02 Carte de circuits et procede pour produire une telle carte de circuits et un materiau composite en couche pour produire une telle carte de circuits

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CH2020/00 2000-10-13
CH20202000 2000-10-13

Publications (1)

Publication Number Publication Date
WO2002032199A1 true WO2002032199A1 (fr) 2002-04-18

Family

ID=4567159

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CH2001/000472 Ceased WO2002032199A1 (fr) 2000-10-13 2001-08-02 Carte de circuits et procede pour produire une telle carte de circuits et un materiau composite en couche pour produire une telle carte de circuits

Country Status (7)

Country Link
US (1) US7226653B2 (fr)
EP (1) EP1325673B1 (fr)
JP (1) JP2004511111A (fr)
AT (1) ATE274289T1 (fr)
AU (1) AU2001279530A1 (fr)
DE (1) DE50103348D1 (fr)
WO (1) WO2002032199A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004057687A3 (fr) * 2002-12-20 2004-12-16 Ksg Leiterplatten Gmbh Systeme electroluminescent

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JP4829028B2 (ja) * 2006-07-31 2011-11-30 富士通株式会社 回路基板及び回路基板の製造方法
US8861214B1 (en) * 2006-11-22 2014-10-14 Marvell International Ltd. High resistivity substrate for integrated passive device (IPD) applications
US9782949B2 (en) 2008-05-30 2017-10-10 Corning Incorporated Glass laminated articles and layered articles
US20120280368A1 (en) * 2011-05-06 2012-11-08 Sean Matthew Garner Laminated structure for semiconductor devices
JP6269506B2 (ja) * 2012-12-18 2018-01-31 日立化成株式会社 積層体、積層板、プリント配線板、積層体の製造方法、及び積層板の製造方法
DE102013215060A1 (de) 2013-07-31 2015-02-05 Irlbacher Blickpunkt Glas Gmbh Kapazitive Sensorvorrichtung mit elektrisch leitfähig beschichteter Sensorplatte aus Dünnglas
FR3012071B1 (fr) * 2013-10-23 2021-01-01 Saint Gobain Verre feuillete mince
KR101650938B1 (ko) * 2014-09-25 2016-08-24 코닝정밀소재 주식회사 집적회로 패키지용 기판
EP3723122B1 (fr) * 2019-04-10 2023-02-15 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Support de composant comprenant une structure à double couche
TWI744896B (zh) * 2020-05-12 2021-11-01 台灣愛司帝科技股份有限公司 導電玻璃基板以及導電玻璃基板的製造系統與製作方法

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JPH09270573A (ja) * 1996-03-29 1997-10-14 Cmk Corp プリント配線板及びその製造方法
EP0884934A2 (fr) * 1997-06-10 1998-12-16 Canon Kabushiki Kaisha Substrat et son procédé de fabrication
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JPS61110546A (ja) * 1984-11-06 1986-05-28 昭和電工株式会社 フレキシブルプリント基板
US4715117A (en) * 1985-04-03 1987-12-29 Ibiden Kabushiki Kaisha Ceramic wiring board and its production
JPH03136294A (ja) * 1989-10-20 1991-06-11 Matsushita Electric Ind Co Ltd ガラス配線基板
JPH09208252A (ja) * 1996-01-30 1997-08-12 Nitto Boseki Co Ltd 低誘電率ガラスペーパー及びそれを用いたプリント配線基板
JPH09270573A (ja) * 1996-03-29 1997-10-14 Cmk Corp プリント配線板及びその製造方法
EP0884934A2 (fr) * 1997-06-10 1998-12-16 Canon Kabushiki Kaisha Substrat et son procédé de fabrication
EP0972632A1 (fr) * 1998-07-15 2000-01-19 Agfa-Gevaert N.V. Carte de données comprenant un milieu pour l'enregistrement par laser et une couche mince en verre

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004057687A3 (fr) * 2002-12-20 2004-12-16 Ksg Leiterplatten Gmbh Systeme electroluminescent

Also Published As

Publication number Publication date
US7226653B2 (en) 2007-06-05
AU2001279530A1 (en) 2002-04-22
JP2004511111A (ja) 2004-04-08
US20040028883A1 (en) 2004-02-12
EP1325673B1 (fr) 2004-08-18
DE50103348D1 (de) 2004-09-23
EP1325673A1 (fr) 2003-07-09
ATE274289T1 (de) 2004-09-15

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