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WO2002009119A1 - Inner voltage level control circuit, semiconductor storage, and method for controlling them - Google Patents

Inner voltage level control circuit, semiconductor storage, and method for controlling them Download PDF

Info

Publication number
WO2002009119A1
WO2002009119A1 PCT/JP2001/006374 JP0106374W WO0209119A1 WO 2002009119 A1 WO2002009119 A1 WO 2002009119A1 JP 0106374 W JP0106374 W JP 0106374W WO 0209119 A1 WO0209119 A1 WO 0209119A1
Authority
WO
WIPO (PCT)
Prior art keywords
level
signal
voltage
latch
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2001/006374
Other languages
English (en)
French (fr)
Inventor
Hiroyuki Takahashi
Atsushi Nakagawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to KR10-2003-7001129A priority Critical patent/KR100518399B1/ko
Priority to EP01951994A priority patent/EP1335384A4/en
Priority to US10/343,042 priority patent/US7002854B2/en
Publication of WO2002009119A1 publication Critical patent/WO2002009119A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40615—Internal triggering or timing of refresh, e.g. hidden refresh, self refresh, pseudo-SRAMs
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4085—Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C2211/406—Refreshing of dynamic cells
    • G11C2211/4068—Voltage or leakage in refresh operations

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Dram (AREA)
  • Logic Circuits (AREA)
  • Static Random-Access Memory (AREA)
  • Read Only Memory (AREA)
PCT/JP2001/006374 2000-07-25 2001-07-24 Inner voltage level control circuit, semiconductor storage, and method for controlling them Ceased WO2002009119A1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR10-2003-7001129A KR100518399B1 (ko) 2000-07-25 2001-07-24 내부 전압 레벨 제어 회로 및 반도체 기억 장치 및 그들의제어 방법
EP01951994A EP1335384A4 (en) 2000-07-25 2001-07-24 INTERNAL VOLTAGE LEVEL CONTROL CIRCUIT, SEMICONDUCTOR MEMORY AND METHOD OF CONTROLLING SAID CIRCUIT AND MEMORY THEREOF
US10/343,042 US7002854B2 (en) 2000-07-25 2001-07-24 Internal voltage level control circuit and semiconductor memory device as well as method of controlling the same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000-224452 2000-07-25
JP2000224452 2000-07-25

Publications (1)

Publication Number Publication Date
WO2002009119A1 true WO2002009119A1 (en) 2002-01-31

Family

ID=18718415

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2001/006374 Ceased WO2002009119A1 (en) 2000-07-25 2001-07-24 Inner voltage level control circuit, semiconductor storage, and method for controlling them

Country Status (5)

Country Link
US (3) US7002854B2 (ja)
EP (1) EP1335384A4 (ja)
KR (1) KR100518399B1 (ja)
CN (1) CN1232986C (ja)
WO (1) WO2002009119A1 (ja)

Cited By (2)

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GB2405203A (en) * 2003-08-22 2005-02-23 Dennis Sunga Fernandez Biosensor and simulation system
US9740817B1 (en) 2002-10-18 2017-08-22 Dennis Sunga Fernandez Apparatus for biological sensing and alerting of pharmaco-genomic mutation

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KR100558477B1 (ko) * 2003-04-28 2006-03-07 삼성전자주식회사 반도체 장치의 내부 전압 발생회로
US7142043B2 (en) * 2004-08-02 2006-11-28 Taiwan Semiconductor Manufacturing Co., Ltd. On chip word line voltage with PVT tracking for memory embedded in logic process
JP2006073055A (ja) * 2004-08-31 2006-03-16 Toshiba Corp 半導体記憶装置
JP4468229B2 (ja) * 2005-04-14 2010-05-26 シャープ株式会社 コンパレータ回路および赤外線リモコン受信機
US7248531B2 (en) * 2005-08-03 2007-07-24 Mosaid Technologies Incorporated Voltage down converter for high speed memory
US20070292407A1 (en) * 2005-12-12 2007-12-20 The Board Of Trustees Operating Michigan State University Methods of treatment for meconium aspiration syndrome
KR100771870B1 (ko) * 2006-05-19 2007-11-01 삼성전자주식회사 반도체 메모리장치의 승압전압 검출회로 및 이를 제어하는방법
KR100718046B1 (ko) * 2006-06-08 2007-05-14 주식회사 하이닉스반도체 반도체 메모리 장치
KR100798797B1 (ko) * 2006-06-30 2008-01-29 주식회사 하이닉스반도체 내부전압 발생장치를 구비하는 반도체메모리소자 및 그의구동방법
CN100580608C (zh) * 2006-08-30 2010-01-13 晶豪科技股份有限公司 低功率参考电压电路
KR100885491B1 (ko) * 2007-03-31 2009-02-24 주식회사 하이닉스반도체 고전위전압 공급장치를 포함하는 반도체메모리소자
KR101377155B1 (ko) * 2007-07-19 2014-03-26 삼성전자주식회사 내부 전원전압 발생장치 및 그것의 제어 방법, 그리고그것을 포함하는 반도체 메모리 장치 및 시스템
KR100897304B1 (ko) * 2008-04-11 2009-05-14 주식회사 하이닉스반도체 반도체 메모리 장치의 전압 레벨 비교 회로 및 이를 이용한전압 조정 회로
JP5142861B2 (ja) * 2008-07-09 2013-02-13 パナソニック株式会社 内部電圧発生回路
JP2011216136A (ja) * 2010-03-31 2011-10-27 Fujitsu Semiconductor Ltd 半導体集積回路装置
KR101799482B1 (ko) * 2010-12-29 2017-11-20 삼성전자주식회사 기입 어시스트 회로를 포함하는 정적 메모리 장치
US9463088B2 (en) * 2011-04-05 2016-10-11 Kowa Company, Ltd. Intraocular lens design method and intraocular lens
US8830769B2 (en) * 2012-05-31 2014-09-09 Nanya Technology Corporation Memory device and signal driving device thereof
CN102708918B (zh) * 2012-06-26 2015-02-18 苏州兆芯半导体科技有限公司 Sram的读出电路
CN102768852B (zh) * 2012-08-01 2015-03-18 北京大学 灵敏放大器
CN202994881U (zh) * 2012-10-18 2013-06-12 中兴通讯股份有限公司 一种相对误差电压检测电路
CN103021447B (zh) * 2012-12-21 2016-06-08 上海华虹宏力半导体制造有限公司 字线偏置电路及存储器
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CN103427636B (zh) * 2013-08-27 2016-04-27 电子科技大学 用于开关电源的瞬态响应增强控制电路
JP2016171208A (ja) * 2015-03-12 2016-09-23 株式会社フジクラ 光ファイバ、ファイバアンプ、及びファイバレーザ
KR102685617B1 (ko) * 2016-10-31 2024-07-17 에스케이하이닉스 주식회사 레퍼런스 선택 회로
CN106656179A (zh) * 2016-12-29 2017-05-10 中国科学院微电子研究所 一种电压限幅电路
US11373702B2 (en) * 2018-10-31 2022-06-28 Taiwan Semiconductor Manufacturing Company, Ltd. Boost schemes for write assist
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CN112349320B (zh) * 2019-08-06 2024-08-23 长鑫存储技术有限公司 字线驱动电路及存储单元
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US9740817B1 (en) 2002-10-18 2017-08-22 Dennis Sunga Fernandez Apparatus for biological sensing and alerting of pharmaco-genomic mutation
GB2405203A (en) * 2003-08-22 2005-02-23 Dennis Sunga Fernandez Biosensor and simulation system
GB2405203B (en) * 2003-08-22 2008-01-16 Dennis Sunga Fernandez Biosensor with electronically configurable switching array
US8346482B2 (en) 2003-08-22 2013-01-01 Fernandez Dennis S Integrated biosensor and simulation system for diagnosis and therapy
US8370070B2 (en) 2003-08-22 2013-02-05 Fernandez Dennis S Integrated biosensor and simulation system for diagnosis and therapy
US8370078B2 (en) 2003-08-22 2013-02-05 Fernandez Dennis S Integrated biosensor and simulation system for diagnosis and therapy
US9719147B1 (en) 2003-08-22 2017-08-01 Dennis Sunga Fernandez Integrated biosensor and simulation systems for diagnosis and therapy
US10878936B2 (en) 2003-08-22 2020-12-29 Dennis Sunga Fernandez Integrated biosensor and simulation system for diagnosis and therapy

Also Published As

Publication number Publication date
CN1466764A (zh) 2004-01-07
US20040015640A1 (en) 2004-01-22
US20070127299A1 (en) 2007-06-07
EP1335384A4 (en) 2007-04-04
US7002854B2 (en) 2006-02-21
US20060044889A1 (en) 2006-03-02
KR20030037266A (ko) 2003-05-12
KR100518399B1 (ko) 2005-09-29
CN1232986C (zh) 2005-12-21
US7227792B2 (en) 2007-06-05
US7397710B2 (en) 2008-07-08
EP1335384A1 (en) 2003-08-13

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