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WO2001015225A1 - A combined heat sink/electromagnetic shield - Google Patents

A combined heat sink/electromagnetic shield Download PDF

Info

Publication number
WO2001015225A1
WO2001015225A1 PCT/SE2000/001544 SE0001544W WO0115225A1 WO 2001015225 A1 WO2001015225 A1 WO 2001015225A1 SE 0001544 W SE0001544 W SE 0001544W WO 0115225 A1 WO0115225 A1 WO 0115225A1
Authority
WO
WIPO (PCT)
Prior art keywords
component
substrate
heat sink
electromagnetic shield
fixed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/SE2000/001544
Other languages
French (fr)
Inventor
Are Björneklett
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefonaktiebolaget LM Ericsson AB
Original Assignee
Telefonaktiebolaget LM Ericsson AB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget LM Ericsson AB filed Critical Telefonaktiebolaget LM Ericsson AB
Priority to AU64866/00A priority Critical patent/AU6486600A/en
Publication of WO2001015225A1 publication Critical patent/WO2001015225A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Definitions

  • the invention relates generally to flip chip semiconductor components and more specifically to a combined heat sink/electromagnetic shield for such components.
  • flip chip technology One such assembly technology, which enables both size and cost reduction is flip chip technology.
  • the semiconductor component or chip is mounted upside down, and the electrical connections from the component are established by so-called flip chip solder bumps.
  • the upside down mounting of the component imposes a problem related to heat dissipation and cooling of the component.
  • the normal or traditional method of cooling components is to mount them onto a material with high thermal conductivity, which effectively transports the heat away from the component.
  • the solder bumps have a very limited ability to conduct the heat away from the chip due to the limited area they constitute relative to the total component area.
  • the object of the invention is to improve the cooling as well as the shielding of semiconductor components assembled by flip chip technology.
  • FIG. 1 shows an embodiment of a combined heat sink/electrical shield according to the invention.
  • Fig. 1 shows an embodiment of a combined heat sink/electromagnetic shield 1 for a flip chip semiconductor component 2 mounted upside down by means of solder bumps 3 on a circuit board or substrate 4.
  • the solder bumps 3 have a very limited ability to conduct heat away from the component 2 due to the fact that the contact area of the bumps 3 are much smaller than the area of the component 2.
  • the combined heat sink/electromagnetic shield 1 comprises a strip of a metal, preferably Cu, having high thermal and electrical conductivity, and extending outside the component 2.
  • the thickness of the metal strip 1 can be about 0.2 mm.
  • the metal strip 1 is fixed both to the whole backside of the component 2 and to the substrate 4 around the component 2.
  • the metal strip 1 can be fixed to the component 2 and the substrate 4 by means of solder or electrically conductive adhesive or a combination thereof. Typically, the metal strip 1 is fixed to the backside of the component 2 by means of electrically conductive adhesive 5 and to the substrate 4 by means of solder 6.
  • solder 6 will be applied in the same operation as for other components to be mounted on the substrate 4, while the electrically conductive adhesive 5 will typically be printed onto the metal strip 1 prior to the assembly of the strip 1 onto the component 2. Typically, the adhesive 5 will be printed onto the strip 1 as part of the fabrication of the strip 1.
  • solder 6 extends all around the component 2.
  • the metal strip 1 in Fig. 1 functions not just as a heat sink but also as an electromagnetic shield to effectively shield high frequency components mounted on the flip chip semiconductor component 2 or on the substrate 4, such as a component 7 mounted under the metal strip 1.

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Materials Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

To conduct heat from a flip chip semiconductor component (2) mounted on a substrate (4) and at the same time electromagnetically shield the component (2), a metal strip (1) extends outside the component and is fixed to the backside of the flip chip component (2) and to the substrate (4) around the component (2).

Description

A COMBINED HEAT SINK/ELECTROMAGNETIC SHIELD
TECHNICAL FIELD
The invention relates generally to flip chip semiconductor components and more specifically to a combined heat sink/electromagnetic shield for such components.
BACKGROUND OF THE INVENTION
A major trend in microelectronics today is size reduction of semiconductor components and assemblies of such components. This development is enabled by various technologies related to the fabrication of the semiconductor components and the assembly of them into electronic systems.
One such assembly technology, which enables both size and cost reduction is flip chip technology. In accordance with that technology, the semiconductor component or chip is mounted upside down, and the electrical connections from the component are established by so-called flip chip solder bumps. The upside down mounting of the component imposes a problem related to heat dissipation and cooling of the component. The normal or traditional method of cooling components is to mount them onto a material with high thermal conductivity, which effectively transports the heat away from the component. In flip chip technology, the solder bumps have a very limited ability to conduct the heat away from the chip due to the limited area they constitute relative to the total component area.
Another important problem in microelectronic systems today is electromagnetic shielding of components operating at high frequency. Such components are common today as they are unavoidable in mobile phones and other radio communication equipment. Strong regulations have been issued by, in particular, the European Union on the electromagnetic compatibility of electronic equipment and these regulations generate a need for effective electrical shielding of high frequency compo- nents. SUMMARY OF THE INVENTION
The object of the invention is to improve the cooling as well as the shielding of semiconductor components assembled by flip chip technology.
This is attained in accordance with the invention, mainly by means of a strip of a metal having high thermal and electrical conductivity fixed to the whole backside of the component, extending outside the component, and fixed to the substrate around the component to conduct heat from the component to the substrate and enclose at least the component to electrically shield the component and any other component mounted thereunder.
Thus, by means of a single structural part in the form of a metal strip, both cooling and electrical shielding of a flip chip component on a substrate is accomplished.
BRIEF DESCRIPTION OF THE DRAWING
The invention will be described more in detail below with reference to the appended drawings on which Fig. 1 shows an embodiment of a combined heat sink/electrical shield according to the invention.
DESCRIPTION OF THE INVENTION
Fig. 1 shows an embodiment of a combined heat sink/electromagnetic shield 1 for a flip chip semiconductor component 2 mounted upside down by means of solder bumps 3 on a circuit board or substrate 4.
As mentioned in the introductory portion, the solder bumps 3 have a very limited ability to conduct heat away from the component 2 due to the fact that the contact area of the bumps 3 are much smaller than the area of the component 2. In accordance with the invention, to conduct heat from the component 2 and at the same time electromagnetically shield the component 2, the combined heat sink/electromagnetic shield 1 comprises a strip of a metal, preferably Cu, having high thermal and electrical conductivity, and extending outside the component 2.
The thickness of the metal strip 1 can be about 0.2 mm.
In accordance with the invention, the metal strip 1 is fixed both to the whole backside of the component 2 and to the substrate 4 around the component 2.
The metal strip 1 can be fixed to the component 2 and the substrate 4 by means of solder or electrically conductive adhesive or a combination thereof. Typically, the metal strip 1 is fixed to the backside of the component 2 by means of electrically conductive adhesive 5 and to the substrate 4 by means of solder 6.
The solder 6 will be applied in the same operation as for other components to be mounted on the substrate 4, while the electrically conductive adhesive 5 will typically be printed onto the metal strip 1 prior to the assembly of the strip 1 onto the component 2. Typically, the adhesive 5 will be printed onto the strip 1 as part of the fabrication of the strip 1.
Thus, in the embodiment in Fig. 1 , the solder 6 extends all around the component 2.
This means that the metal strip 1 in Fig. 1 functions not just as a heat sink but also as an electromagnetic shield to effectively shield high frequency components mounted on the flip chip semiconductor component 2 or on the substrate 4, such as a component 7 mounted under the metal strip 1.

Claims

1. A combined heat sink/electromagnetic shield for a flip chip semiconductor com- ponent (2) mounted on a substrate (4), characterized in that it comprises a strip (1) of a metal having high thermal and electrical conductivity fixed to the whole backside of the component (2), extending outside the component (2), and fixed to the substrate (4) around the component (2) to conduct heat from the component (2) to the substrate (4) and enclose at least the component (2) to electrically shield the component (2) and any other component (7) mounted thereunder.
2. The heat sink/electromagnetic shield as claimed in claim 1, characterized in that the strip (1) is fixed to the component (2) and/or the substrate (4) by means of an electrically conductive adhesive (5).
3. The heat sink electromagnetic shield as claimed in claim 1 , characterized in that the strip (1) is fixed to the component (2) and/or the substrate (4) by means of solder (6).
PCT/SE2000/001544 1999-08-25 2000-08-04 A combined heat sink/electromagnetic shield Ceased WO2001015225A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU64866/00A AU6486600A (en) 1999-08-25 2000-08-04 A combined heat sink/electromagnetic shield

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE9902998A SE9902998L (en) 1999-08-25 1999-08-25 Cooler
SE9902998-5 1999-08-25

Publications (1)

Publication Number Publication Date
WO2001015225A1 true WO2001015225A1 (en) 2001-03-01

Family

ID=20416743

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/SE2000/001544 Ceased WO2001015225A1 (en) 1999-08-25 2000-08-04 A combined heat sink/electromagnetic shield

Country Status (4)

Country Link
AU (1) AU6486600A (en)
SE (1) SE9902998L (en)
TW (1) TW432649B (en)
WO (1) WO2001015225A1 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10129388A1 (en) * 2001-06-20 2003-01-09 Infineon Technologies Ag Electronic component and method for its production
US6713878B2 (en) * 2001-05-30 2004-03-30 Stmicroelectronics Electronic element with a shielding
US6836022B2 (en) 2003-02-13 2004-12-28 Medtronic, Inc. High voltage flip-chip component package and method for forming the same
US8664756B2 (en) 2012-07-24 2014-03-04 Medtronic, Inc. Reconstituted wafer package with high voltage discrete active dice and integrated field plate for high temperature leakage current stability

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02288255A (en) * 1989-04-28 1990-11-28 Hitachi Ltd semiconductor equipment
US5175613A (en) * 1991-01-18 1992-12-29 Digital Equipment Corporation Package for EMI, ESD, thermal, and mechanical shock protection of circuit chips
US5371404A (en) * 1993-02-04 1994-12-06 Motorola, Inc. Thermally conductive integrated circuit package with radio frequency shielding
EP0812015A1 (en) * 1996-06-04 1997-12-10 MAGNETI MARELLI S.p.A. A heat dissipator for integrated circuits

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02288255A (en) * 1989-04-28 1990-11-28 Hitachi Ltd semiconductor equipment
US5175613A (en) * 1991-01-18 1992-12-29 Digital Equipment Corporation Package for EMI, ESD, thermal, and mechanical shock protection of circuit chips
US5371404A (en) * 1993-02-04 1994-12-06 Motorola, Inc. Thermally conductive integrated circuit package with radio frequency shielding
EP0812015A1 (en) * 1996-06-04 1997-12-10 MAGNETI MARELLI S.p.A. A heat dissipator for integrated circuits

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 015, no. 062 14 February 1991 (1991-02-14) *

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6713878B2 (en) * 2001-05-30 2004-03-30 Stmicroelectronics Electronic element with a shielding
DE10129388A1 (en) * 2001-06-20 2003-01-09 Infineon Technologies Ag Electronic component and method for its production
US7064429B2 (en) 2001-06-20 2006-06-20 Infineon Technologies Ag Electronic package having integrated cooling element with clearance for engaging package
DE10129388B4 (en) * 2001-06-20 2008-01-10 Infineon Technologies Ag Method for producing an electronic component
US6836022B2 (en) 2003-02-13 2004-12-28 Medtronic, Inc. High voltage flip-chip component package and method for forming the same
US8664756B2 (en) 2012-07-24 2014-03-04 Medtronic, Inc. Reconstituted wafer package with high voltage discrete active dice and integrated field plate for high temperature leakage current stability

Also Published As

Publication number Publication date
TW432649B (en) 2001-05-01
AU6486600A (en) 2001-03-19
SE9902998L (en) 2001-02-26
SE9902998D0 (en) 1999-08-25

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