WO2001065595A3 - A method of forming an opening or cavity in a substrate for receiving an electronic component - Google Patents
A method of forming an opening or cavity in a substrate for receiving an electronic component Download PDFInfo
- Publication number
- WO2001065595A3 WO2001065595A3 PCT/IB2001/000555 IB0100555W WO0165595A3 WO 2001065595 A3 WO2001065595 A3 WO 2001065595A3 IB 0100555 W IB0100555 W IB 0100555W WO 0165595 A3 WO0165595 A3 WO 0165595A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- opening
- cavity
- substrate
- receiving
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
- H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4803—Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
- H01L21/481—Insulating layers on insulating parts, with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/0154—Polyimide
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0388—Other aspects of conductors
- H05K2201/0397—Tab
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09063—Holes or slots in insulating substrate not used for electrical connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/0207—Partly drilling through substrate until a controlled depth, e.g. with end-point detection
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/025—Abrading, e.g. grinding or sand blasting
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Optics & Photonics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Laser Beam Processing (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Wire Bonding (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Priority Applications (8)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/204,154 US6956182B2 (en) | 2000-05-26 | 2001-02-02 | Method of forming an opening or cavity in a substrate for receiving an electronic component |
| JP2001564387A JP2003526205A (en) | 2000-02-28 | 2001-02-26 | Method of making an opening or cavity in a substrate for receiving an electronic component |
| AU2001242703A AU2001242703A1 (en) | 2000-02-28 | 2001-02-26 | A method of forming an opening or cavity in a substrate for receiving an electronic component |
| EP01915623A EP1340414A2 (en) | 2000-02-28 | 2001-02-26 | A method of forming an opening or cavity in a substrate for receiving an electronic component |
| US11/070,561 US20050155957A1 (en) | 2001-02-26 | 2005-03-02 | Method of forming an opening or cavity in a substrate for receiving an electronic component |
| US11/070,558 US7288739B2 (en) | 2001-02-26 | 2005-03-02 | Method of forming an opening or cavity in a substrate for receiving an electronic component |
| US11/070,560 US20050146025A1 (en) | 2001-02-26 | 2005-03-02 | Method of forming an opening or cavity in a substrate for receiving an electronic component |
| US11/070,559 US20050145609A1 (en) | 2001-02-26 | 2005-03-02 | Method of forming an opening or cavity in a substrate for receiving an electronic component |
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US51425700A | 2000-02-28 | 2000-02-28 | |
| US09/514,257 | 2000-02-28 | ||
| GB0012754.8 | 2000-05-26 | ||
| GBGB0012754.8A GB0012754D0 (en) | 2000-02-28 | 2000-05-26 | Apparatus for forming interconnects on a substrate and related method |
Related Child Applications (5)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US10204154 A-371-Of-International | 2001-02-02 | ||
| US11/070,559 Continuation US20050145609A1 (en) | 2001-02-26 | 2005-03-02 | Method of forming an opening or cavity in a substrate for receiving an electronic component |
| US11/070,558 Continuation US7288739B2 (en) | 2001-02-26 | 2005-03-02 | Method of forming an opening or cavity in a substrate for receiving an electronic component |
| US11/070,561 Continuation US20050155957A1 (en) | 2001-02-26 | 2005-03-02 | Method of forming an opening or cavity in a substrate for receiving an electronic component |
| US11/070,560 Continuation US20050146025A1 (en) | 2001-02-26 | 2005-03-02 | Method of forming an opening or cavity in a substrate for receiving an electronic component |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| WO2001065595A2 WO2001065595A2 (en) | 2001-09-07 |
| WO2001065595A3 true WO2001065595A3 (en) | 2002-01-03 |
Family
ID=26244351
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/IB2001/000555 Ceased WO2001065595A2 (en) | 2000-02-28 | 2001-02-26 | A method of forming an opening or cavity in a substrate for receiving an electronic component |
Country Status (5)
| Country | Link |
|---|---|
| EP (1) | EP1340414A2 (en) |
| JP (1) | JP2003526205A (en) |
| CN (2) | CN1668167A (en) |
| AU (1) | AU2001242703A1 (en) |
| WO (1) | WO2001065595A2 (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10213879C1 (en) * | 2002-03-27 | 2003-07-10 | Infineon Technologies Ag | Electronic component has semiconductor chips fitted into respective recesses in surface of electronic circuit board |
| DE10213881C1 (en) * | 2002-03-27 | 2003-10-02 | Infineon Technologies Ag | Memory module has two semiconductor chips stacked on top of one another with underlying chip received in recess in surface of electronic circuit board |
| WO2010006067A2 (en) | 2008-07-09 | 2010-01-14 | Fei Company | Method and apparatus for laser machining |
| CN102110866B (en) * | 2009-12-24 | 2013-08-28 | 深南电路有限公司 | Manufacturing process of waveguide slot |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3608410A1 (en) * | 1986-03-13 | 1987-09-17 | Siemens Ag | PRODUCTION OF FINE STRUCTURES FOR SEMICONDUCTOR CONTACT |
| DE4326424A1 (en) * | 1993-08-06 | 1995-02-09 | Ant Nachrichtentech | Process for the production of TAB film supports |
| GB2286787A (en) * | 1994-02-26 | 1995-08-30 | Oxford Lasers Ltd | Selective machining by dual wavelength laser |
| EP0706309A1 (en) * | 1994-10-06 | 1996-04-10 | International Computers Limited | Printed circuit manufacture |
| JPH1098081A (en) * | 1996-09-24 | 1998-04-14 | Hitachi Cable Ltd | Tape carrier for mounting semiconductor chip and method of manufacturing the same |
| US5837154A (en) * | 1996-04-23 | 1998-11-17 | Hitachi Cable, Ltd. | Method of manufacturing double-sided circuit tape carrier |
| DE19824225A1 (en) * | 1997-07-28 | 1999-02-04 | Matsushita Electric Works Ltd | Method of manufacturing a printed circuit board |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0793485B2 (en) * | 1988-05-16 | 1995-10-09 | カシオ計算機株式会社 | How to connect IC unit |
| JP3506002B2 (en) * | 1997-07-28 | 2004-03-15 | 松下電工株式会社 | Manufacturing method of printed wiring board |
-
2001
- 2001-02-26 JP JP2001564387A patent/JP2003526205A/en active Pending
- 2001-02-26 AU AU2001242703A patent/AU2001242703A1/en not_active Abandoned
- 2001-02-26 EP EP01915623A patent/EP1340414A2/en not_active Withdrawn
- 2001-02-26 WO PCT/IB2001/000555 patent/WO2001065595A2/en not_active Ceased
- 2001-02-26 CN CN200510055975.5A patent/CN1668167A/en active Pending
- 2001-02-26 CN CNB018057071A patent/CN100366132C/en not_active Expired - Fee Related
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3608410A1 (en) * | 1986-03-13 | 1987-09-17 | Siemens Ag | PRODUCTION OF FINE STRUCTURES FOR SEMICONDUCTOR CONTACT |
| DE4326424A1 (en) * | 1993-08-06 | 1995-02-09 | Ant Nachrichtentech | Process for the production of TAB film supports |
| GB2286787A (en) * | 1994-02-26 | 1995-08-30 | Oxford Lasers Ltd | Selective machining by dual wavelength laser |
| EP0706309A1 (en) * | 1994-10-06 | 1996-04-10 | International Computers Limited | Printed circuit manufacture |
| US5837154A (en) * | 1996-04-23 | 1998-11-17 | Hitachi Cable, Ltd. | Method of manufacturing double-sided circuit tape carrier |
| JPH1098081A (en) * | 1996-09-24 | 1998-04-14 | Hitachi Cable Ltd | Tape carrier for mounting semiconductor chip and method of manufacturing the same |
| DE19824225A1 (en) * | 1997-07-28 | 1999-02-04 | Matsushita Electric Works Ltd | Method of manufacturing a printed circuit board |
Non-Patent Citations (1)
| Title |
|---|
| PATENT ABSTRACTS OF JAPAN vol. 1998, no. 09 31 July 1998 (1998-07-31) * |
Also Published As
| Publication number | Publication date |
|---|---|
| AU2001242703A1 (en) | 2001-09-12 |
| CN1668167A (en) | 2005-09-14 |
| CN100366132C (en) | 2008-01-30 |
| JP2003526205A (en) | 2003-09-02 |
| EP1340414A2 (en) | 2003-09-03 |
| CN1406452A (en) | 2003-03-26 |
| WO2001065595A2 (en) | 2001-09-07 |
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