WO2000036491A3 - Programming system and thread synchronization mechanisms for the development of selectively sequential and multithreaded computer programs - Google Patents
Programming system and thread synchronization mechanisms for the development of selectively sequential and multithreaded computer programs Download PDFInfo
- Publication number
- WO2000036491A3 WO2000036491A3 PCT/US1999/030274 US9930274W WO0036491A3 WO 2000036491 A3 WO2000036491 A3 WO 2000036491A3 US 9930274 W US9930274 W US 9930274W WO 0036491 A3 WO0036491 A3 WO 0036491A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- multithreaded
- programming system
- development
- computer programs
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Devices For Executing Special Programs (AREA)
- Debugging And Monitoring (AREA)
Abstract
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| AU25907/00A AU2590700A (en) | 1998-12-17 | 1999-12-15 | Programming system and thread synchronization mechanisms for the development of selectively sequential and multithreaded computer programs |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11281798P | 1998-12-17 | 1998-12-17 | |
| US60/112,817 | 1998-12-17 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| WO2000036491A2 WO2000036491A2 (en) | 2000-06-22 |
| WO2000036491A3 true WO2000036491A3 (en) | 2000-11-09 |
| WO2000036491A9 WO2000036491A9 (en) | 2001-09-13 |
Family
ID=22345987
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US1999/030274 Ceased WO2000036491A2 (en) | 1998-12-17 | 1999-12-15 | Programming system and thread synchronization mechanisms for the development of selectively sequential and multithreaded computer programs |
Country Status (2)
| Country | Link |
|---|---|
| AU (1) | AU2590700A (en) |
| WO (1) | WO2000036491A2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7831974B2 (en) | 2002-11-12 | 2010-11-09 | Intel Corporation | Method and apparatus for serialized mutual exclusion |
| US7430737B2 (en) * | 2003-12-04 | 2008-09-30 | Sun Microsystems, Inc. | Processor and method for supporting compiler directed multithreading management |
| US7971005B2 (en) * | 2006-10-05 | 2011-06-28 | Waratek Pty Ltd. | Advanced contention detection |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5179702A (en) * | 1989-12-29 | 1993-01-12 | Supercomputer Systems Limited Partnership | System and method for controlling a highly parallel multiprocessor using an anarchy based scheduler for parallel execution thread scheduling |
| US5197130A (en) * | 1989-12-29 | 1993-03-23 | Supercomputer Systems Limited Partnership | Cluster architecture for a highly parallel scalar/vector multiprocessor system |
| US5551034A (en) * | 1993-01-08 | 1996-08-27 | Cegelec | System for synchronizing replicated tasks |
| US5768594A (en) * | 1995-07-14 | 1998-06-16 | Lucent Technologies Inc. | Methods and means for scheduling parallel processors |
-
1999
- 1999-12-15 WO PCT/US1999/030274 patent/WO2000036491A2/en not_active Ceased
- 1999-12-15 AU AU25907/00A patent/AU2590700A/en not_active Abandoned
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5179702A (en) * | 1989-12-29 | 1993-01-12 | Supercomputer Systems Limited Partnership | System and method for controlling a highly parallel multiprocessor using an anarchy based scheduler for parallel execution thread scheduling |
| US5197130A (en) * | 1989-12-29 | 1993-03-23 | Supercomputer Systems Limited Partnership | Cluster architecture for a highly parallel scalar/vector multiprocessor system |
| US5551034A (en) * | 1993-01-08 | 1996-08-27 | Cegelec | System for synchronizing replicated tasks |
| US5768594A (en) * | 1995-07-14 | 1998-06-16 | Lucent Technologies Inc. | Methods and means for scheduling parallel processors |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2000036491A9 (en) | 2001-09-13 |
| WO2000036491A2 (en) | 2000-06-22 |
| AU2590700A (en) | 2000-07-03 |
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