WO2000078108A1 - Materiel de montage, circuit de montage et carte imprimee utilisant ce materiel - Google Patents
Materiel de montage, circuit de montage et carte imprimee utilisant ce materiel Download PDFInfo
- Publication number
- WO2000078108A1 WO2000078108A1 PCT/JP2000/003937 JP0003937W WO0078108A1 WO 2000078108 A1 WO2000078108 A1 WO 2000078108A1 JP 0003937 W JP0003937 W JP 0003937W WO 0078108 A1 WO0078108 A1 WO 0078108A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- mounting material
- solder
- nickel
- mounting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
- H05K3/202—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using self-supporting metal foil pattern
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3473—Plating of solder
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0355—Metal foils
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0361—Etched tri-metal structure, i.e. metal layers or metal patterns on both sides of a different central metal layer which is later at least partly etched
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0361—Stripping a part of an upper metal layer to expose a lower metal layer, e.g. by etching or using a laser
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0384—Etch stop layer, i.e. a buried barrier layer for preventing etching of layers under the etch stop layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/281—Applying non-metallic protective coatings by means of a preformed insulating foil
Definitions
- the present invention relates to a mounting material for manufacturing a mounting circuit, such as a semiconductor package, on which solder bumps are arranged with high density and high accuracy, a mounting circuit formed using the same, and a printed wiring formed with the mounting material. Regarding the board.
- solder layer is formed on a part of a wiring layer on a printed wiring board, and this solder layer has been used to mount electronic components such as a semiconductor package.
- electronic components such as a semiconductor package.
- electronic devices have become smaller and denser in recent years, there has been a demand for narrower pitch solder layers on printed wiring boards and higher positioning accuracy.
- solder coating method (2) solder printing method (3) soldering method, but for (1) and (2) the solder layer size
- solder layer size there were problems such as large variations in (3) and a large amount of time required for (3).
- Means for solving the problem of the above method is disclosed in Japanese Patent Application Laid-Open No. 7-66545, and FIGS. 8 and 9 show the manufacturing steps. Prepare the solder foil-clad laminate as shown in Fig. X? Then, the solder foil is etched to form a pattern. Then, as shown in FIG. 9, it is melt-transferred onto the printed wiring board.
- the above-described method for forming a solder layer still has the following problems to be solved.
- a step of transferring the solder pattern once formed is required, and there has been a problem that the number of manufacturing steps is increased.
- the present invention is intended to solve the above-described problems, and has a composition-size uniformity on a circuit, a good positional accuracy, a mounting circuit on which solder bumps are formed, a printed wiring board, and the like.
- An object of the present invention is to provide a mounting material for forming a semiconductor device. Disclosure of the invention
- the mounting material of the present invention is characterized in that a solder layer, a nickel layer, and a copper layer are sequentially laminated.
- the mounting material according to the present invention is characterized in that a copper layer having a nickel layer and a solder layer are sequentially laminated on one surface with a two-layered nickel layer as an intermediate layer.
- the mounting material of the present invention is characterized in that a resin film is laminated on the copper layer side of the mounting material.
- the solder layer of the mounting material is selectively etched while leaving the copper layer to form a solder bump, and the remaining copper layer is subjected to pattern etching to form a circuit.
- the printed wiring board of the present invention is characterized in that a mounting material is selectively etched to form a circuit with solder bumps on a resin film.
- solder foil in a vacuum chamber, after processing pre-activate the bonding surface of the nickel plating foil or Stevenage gel plated copper-clad resin film, and the solder foil ⁇ the two Ggeru plated Laminate copper foil or copper clad resin film with Nigel
- FIG. 1 is a schematic explanatory diagram of a mounting material according to an embodiment of the present invention.
- FIG. 2 is a process explanatory view of a method for manufacturing a mounting circuit according to an embodiment of the present invention.
- FIG. 3 is a process explanatory view of a method for manufacturing a mounting circuit according to an embodiment of the present invention.
- FIG. 4 is a process explanatory view of a method for manufacturing a mounting circuit according to one embodiment of the present invention.
- FIG. 5 is an explanatory process diagram of a method of manufacturing a mounting circuit according to an embodiment of the present invention.
- FIG. 6 is a schematic explanatory diagram of a printed wiring board according to one embodiment of the present invention.
- FIG. 7 is an explanatory diagram of a manufacturing method of mounting material according to the 0 light of the embodiment.
- FIG. 8 is an explanatory diagram of a conventional method for manufacturing a printed wiring board.
- FIG. 9 is an explanatory diagram of a conventional method for manufacturing a printed wiring board.
- nickel plating nickel plating
- copper foil copper layer 12 (preferably 100 to 100 m thick) forming the circuit. 1) (preferably 0.5 to 3 m) to produce a nickel-plated copper foil 13 (see FIG. 1).
- the nickel-plated copper foil 13 is wound around a rewind reel 23 in a clad plate manufacturing apparatus as shown in FIG.
- the solder foil 10 forming the solder bump is wound around the rewind reel 25.
- the nickel-plated copper foil 13 and the solder foil 10 are simultaneously rewound from the rewind reels 23, 25, and a part of them is wound around the electrode rolls 27, 28 protruding into the etching chamber 26, and etched.
- a sputter etching process is performed to activate it.
- the activation processing as the applicant has disclosed in JP-1 one 2 2 4 1 8 4 JP above, extremely low pressure of 1 1 X 1 0 ' ⁇ 1 X 1 0- 2 P a
- (2) Nickel-plated copper foil 13 with a bonding surface and solder foil 10 are each grounded to one electrode A, and between electrodes A and B are insulated and supported. Applying an alternating current of 1 MHz to cause a glow discharge, and 3 and the area of the electrode exposed in the plasma generated by the glow discharge is 1/3 or less of the area of the electrode B, and 4 This is performed by performing an etching process.
- a clad material for forming a printed wiring board can be manufactured by using a nickel-plated copper-clad resin film 20 (see FIG. 6) instead of the nickel-plated copper foil. .
- a clad plate having a multilayer structure can be manufactured by one press welding.
- a mounting circuit is manufactured through the following steps described with reference to FIGS.
- solder foil 10 and nickel plating 11 were performed. Then, the copper foil 12 is removed leaving the solder bumps 16.
- a commercially available solder etchant on copper for example, Enstrip TL-142 Conc, manufactured by Meltecs Inc.
- a photoresist film 17 is formed on the circuit-forming copper foil, subjected to iT, and then exposed and developed to form a circuit-forming pattern.
- the copper foil 12 is etched using ferric chloride or sulfuric acid + hydrogen peroxide.
- a circuit 18 is formed.
- the mounting circuit 19 can be manufactured.
- the resin film 20 can be obtained as shown in FIG.
- a printed wiring board 200 having a circuit on which solder bumps 16 are formed can be manufactured.
- the printed wiring board 200 can also be formed by forming the mounting circuit 19 shown in FIG. 5 and then laminating the resin film 20.
- the solder layer, nickel layer, and copper layer are pressed at a low reduction rate of 0.1 to 3%, the flatness of the joint interface can be maintained by suppressing the stress at the joint interface, and the workability is recovered. No heat treatment is required for this purpose, and no intermetallics are formed at the interface, so that a mounting circuit having excellent selective etching properties can be manufactured using this mounting material.
- the mounting material described above is selectively used. Since the circuit with the bump is formed on the resin film by the touching, it can be used as it is as a printed wiring board.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Description
Claims
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| AU52494/00A AU5249400A (en) | 1999-06-16 | 2000-06-16 | Mounting material, mounting circuit using it and printed wiring board using it |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16932699 | 1999-06-16 | ||
| JP11/169326 | 1999-06-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2000078108A1 true WO2000078108A1 (fr) | 2000-12-21 |
Family
ID=15884484
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/JP2000/003937 Ceased WO2000078108A1 (fr) | 1999-06-16 | 2000-06-16 | Materiel de montage, circuit de montage et carte imprimee utilisant ce materiel |
Country Status (3)
| Country | Link |
|---|---|
| AU (1) | AU5249400A (ja) |
| TW (1) | TW495438B (ja) |
| WO (1) | WO2000078108A1 (ja) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1255295A4 (en) * | 2000-01-12 | 2005-03-02 | Toyo Kohan Co Ltd | SEMICONDUCTOR DEVICE, LAMINATE METAL PLATE FOR MANUFACTURING SEMICONDUCTOR CIRCUIT, AND CIRCUIT MANUFACTURING METHOD |
| CN113324202A (zh) * | 2021-06-07 | 2021-08-31 | 厦门天马微电子有限公司 | 灯条、包括灯条的背光模组及显示装置 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01224184A (ja) * | 1988-03-02 | 1989-09-07 | Toyo Kohan Co Ltd | クラッド金属板の製造法及びその装置 |
| JPH05167225A (ja) * | 1991-12-12 | 1993-07-02 | Nitto Denko Corp | 電極形成用転写シ―トと電子部品の外部電極形成方法 |
-
2000
- 2000-06-14 TW TW089111622A patent/TW495438B/zh not_active IP Right Cessation
- 2000-06-16 AU AU52494/00A patent/AU5249400A/en not_active Abandoned
- 2000-06-16 WO PCT/JP2000/003937 patent/WO2000078108A1/ja not_active Ceased
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01224184A (ja) * | 1988-03-02 | 1989-09-07 | Toyo Kohan Co Ltd | クラッド金属板の製造法及びその装置 |
| JPH05167225A (ja) * | 1991-12-12 | 1993-07-02 | Nitto Denko Corp | 電極形成用転写シ―トと電子部品の外部電極形成方法 |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1255295A4 (en) * | 2000-01-12 | 2005-03-02 | Toyo Kohan Co Ltd | SEMICONDUCTOR DEVICE, LAMINATE METAL PLATE FOR MANUFACTURING SEMICONDUCTOR CIRCUIT, AND CIRCUIT MANUFACTURING METHOD |
| CN113324202A (zh) * | 2021-06-07 | 2021-08-31 | 厦门天马微电子有限公司 | 灯条、包括灯条的背光模组及显示装置 |
| CN113324202B (zh) * | 2021-06-07 | 2022-05-17 | 厦门天马微电子有限公司 | 灯条、包括灯条的背光模组及显示装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| AU5249400A (en) | 2001-01-02 |
| TW495438B (en) | 2002-07-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100615382B1 (ko) | 프린트회로기판용 클래드판, 이를 사용한 다층프린트회로기판 및 그의 제조방법 | |
| KR102482171B1 (ko) | 시드층을 포함하는 전사필름 제조방법, 시드층의 선택적 에칭을 이용한 회로기판 제조방법 및 에칭액 조성물 | |
| CN1141739C (zh) | 引线架用复层板、利用了该复层板的引线架、及其制造方法 | |
| JPH0141272B2 (ja) | ||
| JP2006156547A (ja) | 配線回路基板およびその製造方法 | |
| CN1190836C (zh) | 复层板、半导体装置用内插器以及它们的制造方法 | |
| CN108124386A (zh) | 线路板及其生产方法、图形转移方法 | |
| JPWO2000077850A1 (ja) | 半導体装置用インターポーザ形成用クラッド板、半導体装置用インターポーザ及びそれらの製造方法 | |
| JP4409137B2 (ja) | プリント配線板の製造方法 | |
| JP4195162B2 (ja) | 多層プリント配線板及びその製造方法 | |
| TWI243008B (en) | Multi-layer printed circuit board and its manufacturing method | |
| WO2000078108A1 (fr) | Materiel de montage, circuit de montage et carte imprimee utilisant ce materiel | |
| TWI708542B (zh) | 背膠銅箔增層製程 | |
| JP5105625B2 (ja) | 半導体パッケージユニットの製造方法 | |
| JP4190955B2 (ja) | 選択エッチング加工用導電板積層材の製造方法 | |
| JP2000114705A (ja) | 金属・プラスチックハイブリッドマスクの製造方法 | |
| JP2005093502A (ja) | 半導体装置用テープキャリア | |
| JPH02303086A (ja) | プリント配線板の製造方法及びそれに用いるスパッタデポジション装置及び銅張積層板 | |
| JP2003236679A (ja) | 抵抗層積層材の製造方法および抵抗層積層材を用いた部品の製造方法 | |
| JP2004179485A (ja) | プリント配線板の製造方法及びプリント配線板 | |
| JPWO2000005934A1 (ja) | プリント基板用クラッド板、それを用いた多層プリント配線基板及びその製造方法 | |
| JP2003309361A (ja) | 多層回路配線板およびその製造方法 | |
| JP2003243202A (ja) | 抵抗層積層材および抵抗層積層材を用いた部品 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| AK | Designated states |
Kind code of ref document: A1 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY CA CH CN CR CU CZ DE DK DM DZ EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ PL PT RO RU SD SE SG SI SK SL TJ TM TR TT TZ UA UG US UZ VN YU ZA ZW |
|
| AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE BF BJ CF CG CI CM GA GN GW ML MR NE SN TD TG |
|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
| DFPE | Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101) | ||
| ENP | Entry into the national phase |
Ref country code: JP Ref document number: 2001 502629 Kind code of ref document: A Format of ref document f/p: F |
|
| REG | Reference to national code |
Ref country code: DE Ref legal event code: 8642 |
|
| 122 | Ep: pct application non-entry in european phase |