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WO1999035689A1 - Module de conversion pour boitier de semiconducteur - Google Patents

Module de conversion pour boitier de semiconducteur Download PDF

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Publication number
WO1999035689A1
WO1999035689A1 PCT/JP1999/000005 JP9900005W WO9935689A1 WO 1999035689 A1 WO1999035689 A1 WO 1999035689A1 JP 9900005 W JP9900005 W JP 9900005W WO 9935689 A1 WO9935689 A1 WO 9935689A1
Authority
WO
WIPO (PCT)
Prior art keywords
terminal
board
pins
pin
semiconductor package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP1999/000005
Other languages
English (en)
Japanese (ja)
Inventor
Kunio Nagaya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to AU16932/99A priority Critical patent/AU1693299A/en
Publication of WO1999035689A1 publication Critical patent/WO1999035689A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/32—Holders for supporting the complete device in operation, i.e. detachable fixtures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/144—Stacked arrangements of planar printed circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04—Assemblies of printed circuits
    • H05K2201/049—PCB for one component, e.g. for mounting onto mother PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10333—Individual female type metallic connector elements
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10704—Pin grid array [PGA]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3447—Lead-in-hole components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/36—Assembling printed circuits with other printed circuits
    • H05K3/368—Assembling printed circuits with other printed circuits parallel to each other

Definitions

  • the present invention relates to a semiconductor package conversion module used, for example, when upgrading a semiconductor package having a CPU (central S position) function mounted on a motherboard.
  • a semiconductor package having a function as a CPU is mounted on a mother board of the personal computer via a socket.
  • a PGA pin grid array
  • a conversion module having a socket S3 ⁇ 4 on which a semiconductor package is mounted and a conversion S «having a circuit for inputting I / O pins as main components has been proposed.
  • a plurality of snow holes are provided on the transformer, and external connection pins are inserted into the openings on the lower surface. These external pins are ⁇ 1 ⁇ for the socket on the motherboard.
  • Socket II has multiple IZO pins. These I / O pins are provided at locations corresponding to the multiple plated through holes in the back of the socket. Each pin is inserted into each of the plated through holes and soldered, so that electrical conduction between the socket side and the conversion side is achieved.
  • these IZO pins are socket-like pins having through holes on the upper end surface of which the I / O pins of the package are fitted.
  • a common technique for soldering lead wires involves a series of complicated operations (cutting a covered lead wire to a predetermined length, peeling off the coating of the soldered part, pre-soldering, positioning and positioning). Soldering) is required, resulting in poor properties. In particular, as the semiconductor package becomes finer and the number of pins increases, it is expected that the positioning operation itself will become difficult, and that it will also lead to a decrease in connectivity.
  • the present invention has been made to solve the above-described problems, and an object of the present invention is to provide a relatively simple semiconductor package conversion module used for, for example, upgrading a package mounted on a motherboard. It is an object of the present invention to provide a semiconductor and package conversion module having a structure that allows connection of I / O pins easily and without increasing cost, and that has excellent connectivity.
  • the first connection board is formed with a replacement connection circuit and has an external connection conductor pin on the lower surface side, and a semiconductor package is mounted on the upper surface side, and corresponds to the external connection conductor pin.
  • a second 3 ⁇ 4K having an I ZO terminal which protrudes downward at the position, and a flB disposed between the first and the second S3 ⁇ 4, and a connection circuit and identification of the I ⁇ terminal
  • a conductor having a conductor pattern connected to the I ⁇ terminal of the ir, and the conductor pin for connecting the tirts ⁇ section and the ia specific I / o terminal are electrically connected via the replacement connection circuit.
  • Semiconductor package conversion module It is.
  • a second invention is the double-sided board according to the first invention, having a through hole fitted with the first board, wherein the external connection conductor pin is located at an opening on the lower surface side of the through hole.
  • the IB-specific I / O terminal is a semiconductor package conversion module located at the opening on the upper surface side of the through hole via the insulating base material of the daughter board.
  • the position of the daughter board on the first board is regulated in a vertical direction by the specific IZO terminal, and the position of the child substrate is controlled by the specific IZO terminal.
  • This is a semiconductor package conversion module that is restricted in the horizontal direction by the side of the Izo terminal, which has a relatively large protruding length.
  • the thickness of the child board is 0.8 mm or less, and the fffE conduction is turned from the outer edge of the child board to a specific I.
  • This is a ⁇ package conversion module having a primary side pad formed by Sim and a secondary side pad formed at an outer edge of a ⁇ -element board which is a 515 connection circuit side.
  • the first substrate-side replacement connection circuit and the specific IZO3 ⁇ 4fr which require the replacement connection are provided via a lead turn provided in a child disposed between the first and second elements.
  • connection to a specific I / O terminal is performed. Since the child S3 ⁇ 4 has pre-formed turns, it does not require any troublesome work such as cutting to a predetermined length or stripping the insulation coating, unlike ⁇ using lead wires. Becomes
  • a specific one of the signals on the semiconductor package side flows through the specific IZO terminal and is converted by a signal modulator or the like that has been changed. Supplied to one board.
  • the first S ⁇ ⁇ ⁇ g it is sufficient for the first S ⁇ ⁇ ⁇ g to have a simple structure such as ⁇ ⁇ ⁇ on both sides, and it is not necessary to rely on an expensive and cumbersome multilayer board or a build-up layer for connection. . Therefore, ⁇ cost reduction is surely avoided.
  • the element can be a single-sided S «having a ⁇ turn formed by the subtractive method on one side of the element, it can be relatively easily manufactured. However, this does not lead to higher costs.
  • the tip of the specific IZO terminal requiring connection in which a child is arranged between the conversion and the socket board, can be positioned while being placed on the pad of the rfB conductive turn. Therefore, a specific I / O terminal and a pad can be easily and reliably connected.
  • conduction is established with the corresponding through hole that is inserted into the corresponding through hole and the same through hole.
  • the I5 specific IZO pin is not inserted into the corresponding through-hole opening, and is in a non-conducting state because it intersects with the through-hole. .
  • the same substrate is held by the IZO terminal so as not to be displaced, so that the positioning itself becomes extremely easy. From the above, according to the present invention, the connection can be simply performed, and the connection ft reliability is excellent.
  • the pad at the insertable portion is positioned with respect to the specific I / O terminal at this time, the two can be easily and reliably connected.
  • the primary pad is formed at a position axax from the outer end of the child ⁇ K, there is a danger that molten solder will flow out at the time of contact with the IZO terminal and short-circuit with the first upper conductor pattern. Less is. Since the thickness of the sub-board is 0.8 mm or less and the secondary pad is formed at the outer edge of the sub-board, the electric conduction to the conductive and Connection is easy.
  • FIG. 1 is a schematic diagram for explaining a use state of a conversion module according to an embodiment of the present invention.
  • FIG. 2 is a plan view of a child used in the same embodiment
  • FIG. 3 is a plan view showing a state where the child of the same embodiment is arranged
  • FIG. 4 is a partially enlarged cross-sectional view of the conversion module of the same embodiment.
  • FIG. 5 and FIG. 5 are plan views showing a sub-substrate before being divided according to the same embodiment, and FIG.
  • FIGS. 1 to 5 the semiconductor ⁇ Kkeji conversion module 1 of the PGA type having a function as embodying CPU of one embodiment form ⁇ .
  • the conversion module 1 of this embodiment converts the PGA 2 into a signal.
  • This is a device for mounting on the motherboard MB after performing the above.
  • the conversion module 1 has a plurality of boards, that is, a conversion board 3 and a socket board 4 as its main components.
  • the first transformation S3 ⁇ 4 3 is a rectangular, rigid, double-sided S ⁇ .
  • the variation m3 ⁇ 43 ⁇ 43 includes a plated through hole group in which a plurality of plated through holes 5 are arranged in a substantially square shape. As shown in FIG. 3, each plated through-hole 5 is arranged in a staggered pattern with a fixed pitch. As shown in FIG. 4, the base end of the external connection pin 6 is inserted into the opening on the lower surface side of each of the attached through holes 5. This pin 6 may be joined by soldering.
  • One die pad 7 and a plurality of pads 8 surrounding the die pad 7 are formed in a substantially square region surrounded by the plated holes.
  • a signal conversion QFP (quad flat package) 9 as a signal element is surface-mounted on the die pad 7.
  • Each lead of Q FP 9 is joined to each pad 8 using solder S 1 that is a conductive material.
  • solder S 1 that is a conductive material.
  • One of the return pads 8 is assigned as a replacement pad 8a as a connection circuit.
  • a pad 10 for electrical connection is formed in the region.
  • DIP dual in-line package
  • the electronic component ⁇ ⁇ pad 12 is also formed on the lower surface side of the conversion 3, and the tip 13 is formed on the surface.
  • These electronic components 11 and 13 are also joined to the pads 10 and 12 using solder S 1.
  • a conductor pattern (not shown) is formed on the upper surface and the lower surface of the modification 3. The conductor pattern described above electrically connects the lands 5 a and 5 b of the plated through hole 5, the Q FP 9, and the electronic components 11 and 13 to each other.
  • the minor hole has a smaller diameter (several ⁇ ⁇ ⁇ ) than a normal plated snow-hole for pin conduction and front-to-back conduction.
  • the pad 8 (8b in FIG. 1) corresponding to the side on which the ffirie conversion signal is output is electrically connected to the upper end of the mini-via hole penetrating the upper and lower surfaces of the conversion board 3.
  • the absolute shape of the sockets 2-4 as the second substrate is square and frame-shaped, and the size of the outer shape is not limited to the load. Approximately equal to the size of PGA 2. «3 ⁇ 4 ⁇ 2 1 ⁇ A central hole 22 is provided. The reason for providing the central hole 22 is to secure a space for accommodating the QFP 9, facilitate soldering, and efficiently dissipate the heat generated by the QFP 9. Therefore, the central hole 22 is preferably formed slightly larger than the QFP9 at a position corresponding to the QFP9.
  • Each socket-like pin 24 has a through hole 25 extending in the axial direction.
  • the I / O pins 26 on the PGA2 side can be inserted into and removed from the through holes 25. That is, the socket board 4 has a structure on the front side (upper side) on which the PGA 2 can be attached and detached.
  • a specific IZO pin requiring connection is represented by 24 A to distinguish it from other I / O pins 24 that do not require replacement connection.
  • the plated through-holes corresponding to the specific IZO pins 24 A are represented by 5 A to distinguish them from other plated through-holes 5.
  • the land 5 Ab at the opening on the lower surface side of the plated snow hole 5 A and the lower end of the above-mentioned mini via hole are electrically connected by a conductor pattern (not shown). Therefore, the output side of QFP9 and the land 5 Ab are electrically connected, and this is schematically indicated by the arrow A1 in FIG.
  • the small-diameter portion of the specific I / O pin 24A is formed to be somewhat shorter than the small-diameter portions of the other 10 pins 24. Therefore, even if another I / O pin 24 that does not need to be inserted is inserted into the opening on the top side of the plated through hole 5, the corresponding one pin It is not inserted into the opening on the upper surface side of the through hole 5A.
  • the specific IZO pin 24A is separated from the land 5Aa of the upper opening of the snug hole 5A. That is, there is a gap between the modulation S plate 3 and the specific IZO pin 24A, into which a child substrate 36 described later can be inserted.
  • ⁇ 5 specific I pin 24 ⁇ can be obtained, for example, by cutting a small-diameter portion of the other I 0 pin 24 that does not require replacement connection by a predetermined length.
  • two types of IZO pins 24, 24 mm with different lengths may be prepared in advance and used. It is also possible to bend the / h # part of the I / O pin 24 and use it as a specific I / O pin 24A.
  • a socket 30 is fixed to the motherboard MB in advance so that it cannot be removed by soldering, and the conversion module 1 is mounted on the upper surface side of the socket 30. Used in. At this time, the external connection pin 6 is inserted into the insertion hole of the socket-shaped pin 31 of the socket 30. Note that, for the sake of convenience when replacing parts, soldering is not performed on the connection site.
  • the conversion module 1 of the present embodiment includes a sub board 36 in addition to the conversion 3 and the socket 4.
  • a sub board 36 in addition to the conversion 3 and the socket 4.
  • the sub-substrate 36 of the present embodiment is provided with a conductor 38 on one side of an insulating base material 37.
  • the conductor pattern 38 is preferably formed by a conventionally known subtractive method.
  • the absolute 37 used here is rectangular and rigid, and has a thickness of 0.8 ran.
  • the width W1 of the pin 37 is set to be slightly smaller than the pitch of the I / O pins 24 (for example, 2.54 mm, 1.27 plane). Therefore, a part of ⁇ & ⁇ 3 ⁇ 43 ⁇ 4 ⁇ 37 (that is, the insertable element P 1) can be inserted between the I / O pins 24 of a number that does not require insertion.
  • the conductor pattern 38 is formed so as to extend along the longitudinal direction of the insulating material 37.
  • a primary pad 39 is formed at one end of the conductor pattern 38, and a secondary pad 40 is formed at the other end.
  • the primary side pad 39 has a circular shape and is located substantially at the center of the insertable portion P 1 in the insulation 37.
  • the secondary pad 40 has a rectangular shape and is located at the absolute TO. From the viewpoint of improving the fififiability of the soldered portion, it is preferable that these pads 39 and 40 are formed as large as possible. However, the primary pad 39 has its diameter
  • FIG. 5 shows an example of the multi-piece board B 1 used at that time.
  • the child 36 provided with the conductor pattern 38 is used in a state where it is placed between the terminals 3 and 4. At this time, the pattern formation surface of the child # 36 is directed toward the socket # 4. If the pattern formation surface of the child S36 faces the conversion S3 ⁇ 43 side, if there is not enough space, the conductors 38, etc. may come into contact with the lands 5a, 5Aa and short-circuit. is there. The child 36 disposed between the two 3 and 4 is brought into contact with the outer peripheral surface of the IZO pin 24 so that it cannot be displaced in its own plane.
  • the daughter board 36 be in contact with (or be capable of contacting) a plurality of IZO pins 24.
  • the sub-board 36 comes into contact with the five IZO pins 24. More specifically, one of the five I / O pins 24 abuts on the insertion side short side of the child 36. Further, two of the remaining four IZO pins 24 are in contact with one of the long sides of the sub board 36, and the other two are in contact with the other side of: 3 ⁇ 42 . Therefore, this child 36 is positioned from three directions.
  • the primary side pad 39 is located just below the specific I / O pin 24 A, and is provided with the V “hole 5 A” just above the pin.
  • the tip of the I / O pin 24 A is in a state of being 9g on the primary pad 39.
  • the secondary pad 40 is on the conversion ⁇ ⁇ tK3.
  • Input ⁇ Take the position corresponding to the pad 8a, and use the solder S1 to join the tip of the specific I / O pin 24A and the primary pad 39 to form the secondary pad 4a. Transposition pad 8a with 0 is joined.
  • the variation 3 can be obtained by forming a known pattern such as a subtractive method using, as a starting material, a stretched laminate obtained by sticking a copper foil to a surface of a glass epoxy insulated material W, for example. be able to.
  • through-holes 5, 5A, mini-via holes, dipads 7, pads 8, 8a, 8b, etc. are formed on the insulating base material.
  • the socket can be obtained by piercing the pin-through holes 23 in the frame-shaped iifeig 21 and then inserting the socket-shaped I / O pins 24 into them.
  • the child 36 is manufactured by a subtractive method using, for example, a copper-clad laminate obtained by attaching a copper foil to one surface of glass epoxy ⁇ . »In order to divide the pieces, the board for multiple pieces B 1 is divided along the broken lines in FIG.
  • the external connection pin 6 is press-fitted into the opening on the lower surface side of each of the through holes 5 and 5 A on the conversion board 3.
  • a cream solder is printed on the land 5a of the through hole 5 located on the upper surface side of the conversion board 3 by screen printing.
  • each socket-like IZO pin 24 is passed through the opening on the upper surface of the through hole 5 to which the conversion board 3 is attached, and the QFP 9 is placed on the die pad 7. Is fixed.
  • the temperature in the furnace is raised to around fi3 ⁇ 4 where the cream solder melts, and the solder S1 is discharged.
  • the socket-shaped IZO pin 24 is joined to the attached hole 5, and the leads of the QFP 9 are joined to the pads 8, 8a, 8b.
  • the insertable SBfePl of the child S # 36 is inserted between the IZO pins 24.
  • the child 36 can be inserted, for example, through the central hole 22 of the socket 4 (see Hi arrow A2 in FIG. 1).
  • the child 3 ⁇ 4K 36 positioned as indicated by the insertion between the I / O pins 24 is individually soldered using the solder S1.
  • the electronic components 11 and 13 are soldered individually to the corresponding pads 10 and 12 at the same time.
  • the PG # 2 is mounted on the conversion module 1, and the PG # 2 is mounted on the socket 30 of the motherboard MB.
  • the signal conversion is mainly performed by the QFP 9, and the original function of the PGA 2 can be sufficiently exerted.
  • connection pads 8a and the specific I / O pins 24A required for connection are provided via the conductor pattern 38 of the child board 36 disposed between the two boards 3 and 4. Are electrically connected. As a result, a swap connection is made for the specific I / O pin 24A.
  • the specific I / O pin 24 A is not directly conducted to the external conversion pin 6 through the corresponding plated through hole 5 A, but is converted into a signal through the QFP 9 or the like. After that, it is indirectly connected to the external connection pin 6. Since the conductor pattern 38 is formed on the terminal 36 in advance, unlike a case where a lead wire is used, troublesome operations such as cutting to a predetermined length or peeling off the coating are not required.
  • the rigid child 36 is fixed, unlike the lead wire, so that the rigid child 36 abuts on the IZO pin 24 and is kept in position. For this reason, the positioning itself becomes very easy. From the above, this form According to this, replacement can be performed relatively easily, and workability can be improved in the manufacture thereof.
  • the conversion sickle 3 only needs to have a simple structure of a double-sided board, and it is not necessary to rely on a multilayer board or a build-up layer for connection. . Therefore, it is possible to reliably avoid high costs when performing the entry.
  • the child 36 is a single-sided plate having the pattern 38 formed by the subtractive method on one side of the mf 37, it is a decoration and can be relatively easily adjusted. . Therefore, even if this is used, it does not lead to particularly high cost. Furthermore, the sub board 36 used in the present embodiment is much smaller than the conversion board 3 and the socket board 4. Moreover, a large number of powerful children ⁇ 36 can be obtained from a single plate material by a large number of pieces. The above also contributes to prevention of cost increase. It should be noted that child like this ⁇ form
  • the specific I / O pin 24 A which requires connection is formed shorter than other IZO pins 24 which do not require connection. Therefore, when the child board 36 is arranged between the two boards 3 and 4, the tip of the specific I pin 24 is positioned while placed on the primary pad 39 of the conductor pattern 38. . Therefore, both 24 A and 39 can be easily and reliably connected. ,
  • the child is not limited to the child S3 ⁇ 436 having only one ° -turn 38, and may have a plurality of children. Further, the present invention is not limited to the rectangular child S ⁇ b> 36, and may have other shapes.
  • another example of the child 41 shown in FIG. 6 has a substantially U-shape, and two conductor patterns 38 are provided on one side thereof. A primary pad 39 and a secondary pad 40 are formed at both ends of each conductor pattern 38.
  • Child 3 ⁇ 43 ⁇ 4 36 is not limited to rigid ones, but may be thin and flexible. By doing so, the step with the upper surface of the converter # 3 is reduced, so that the solder S1 is surely easily applied and soldering to the secondary pad 40 becomes easier. This leads to a further improvement in reliability.
  • a solder ball or the like may be provided at the lower surface side opening of the through hole 5, 5A on which a solder ball or the like is attached.
  • the I / O terminals of the socket # 4 are not limited to the socket-shaped IZO pins 24, 24 #. Further, the IB I / O terminal is not limited to a pin-shaped terminal, and may be applied to, for example, a bump-like terminal.
  • a semiconductor package conversion module used when upgrading a semiconductor package mounted on a motherboard is relatively simple and involves high cost. It has a structure that allows the connection of the i Zo terminal without the need, and makes it possible to provide a module made of a compound having excellent flexibility.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

La présente invention concerne un module de conversion pour socle de semiconducteur présentant une structure simplifiée et peu coûteuse composée de plusieurs cartes de circuits imprimés présentant une haute fiabilité de connexion et convenant au remplacement des entrées-sorties, par exemple pour la mise à niveau d'un boîtier de semiconducteur sur la carte-mère. La structure de module comprend une première carte de circuits imprimés munie de circuits de connexion de remplacement et de broches conductrices pour connexions externes sur sa face inférieure, une deuxième carte supportant un boîtier de semiconducteur sur sa face supérieure et présentant des entrées-sorties projetées vers le bas correspondant aux broches conductrices pour connexions externes, et une carte-fille intercalée entre la première et la deuxième carte de circuits imprimés, présentant des tracés conducteurs reliés au circuit de connexion de remplacement et à certaines entrées-sorties particulières, les broches conductrices pour connexions externes étant électriquement reliées aux entrées-sorties particulières via le circuit de connexion de remplacement.
PCT/JP1999/000005 1998-01-06 1999-01-05 Module de conversion pour boitier de semiconducteur Ceased WO1999035689A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU16932/99A AU1693299A (en) 1998-01-06 1999-01-05 Semiconductor package converter module

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP105998A JP3404275B2 (ja) 1998-01-06 1998-01-06 複数基板からなるモジュール及びその製造方法
JP10/1059 1998-01-06

Publications (1)

Publication Number Publication Date
WO1999035689A1 true WO1999035689A1 (fr) 1999-07-15

Family

ID=11490980

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP1999/000005 Ceased WO1999035689A1 (fr) 1998-01-06 1999-01-05 Module de conversion pour boitier de semiconducteur

Country Status (3)

Country Link
JP (1) JP3404275B2 (fr)
AU (1) AU1693299A (fr)
WO (1) WO1999035689A1 (fr)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04144258A (ja) * 1990-10-05 1992-05-18 Nec Corp サブ基板実装式ｌｓｉソケット
JPH08227970A (ja) * 1995-02-21 1996-09-03 Nec Kyushu Ltd 半導体回路モジュール
JPH10261758A (ja) * 1997-03-21 1998-09-29 Ibiden Co Ltd 変換モジュール

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04144258A (ja) * 1990-10-05 1992-05-18 Nec Corp サブ基板実装式ｌｓｉソケット
JPH08227970A (ja) * 1995-02-21 1996-09-03 Nec Kyushu Ltd 半導体回路モジュール
JPH10261758A (ja) * 1997-03-21 1998-09-29 Ibiden Co Ltd 変換モジュール

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JP3404275B2 (ja) 2003-05-06
AU1693299A (en) 1999-07-26
JPH11195748A (ja) 1999-07-21

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