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WO1999052200A1 - Technique et circuit permettant d'utiliser un transistor comme redresseur - Google Patents

Technique et circuit permettant d'utiliser un transistor comme redresseur Download PDF

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Publication number
WO1999052200A1
WO1999052200A1 PCT/US1999/008051 US9908051W WO9952200A1 WO 1999052200 A1 WO1999052200 A1 WO 1999052200A1 US 9908051 W US9908051 W US 9908051W WO 9952200 A1 WO9952200 A1 WO 9952200A1
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WIPO (PCT)
Prior art keywords
voltage
transistor
recited
circuit
diode
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Ceased
Application number
PCT/US1999/008051
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English (en)
Inventor
Hsian-Pei Yee
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SEMI-TECH DESIGN Inc
Semi Tech Design Inc
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SEMI-TECH DESIGN Inc
Semi Tech Design Inc
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Publication of WO1999052200A1 publication Critical patent/WO1999052200A1/fr
Anticipated expiration legal-status Critical
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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
    • H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
    • H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
    • H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • H02M3/33592—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/10—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1588—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load comprising at least one synchronous rectifier element
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present invention generally relates to electrical rectifying circuits and, in particular, to rectifying circuit that uses a transistor as a rectifier.
  • SRMOS synchronous rectifier MOS
  • SRMOS synchronous rectifier MOS
  • the advantage with using an SRMOS transistor in the place of a diode is the higher efficiency obtainable with an SRMOS — namely the avoidance of the voltage drop across a conventional diode.
  • This advantage becomes increasing important as greater demand and operation time is demanded from a limited power source such as batteries.
  • a converter circuit it becomes even more crucial that there is minimal voltage drop in converting one voltage level to another voltage level. Otherwise, a great deal of power would be lost in the conversion process itself.
  • a prior art converter circuit with a SRMOS is illustrated.
  • This circuit is comprised of a first transistor 10 having gate, drain and source terminals, and the transistor is connected at one terminal to a voltage source having a particular voltage level and is connected at another terminal in series to a coil 12, and to a capacitor 16.
  • a second transistor 18, being operated as a synchronous rectifier (SRMOS) is connected at one terminal to a node between the first transistor 10 and the coil 12 and is connected at another terminal to the common ground terminal.
  • a pulse width modulation (PWM) control circuit 20 having a probe at the output terminal 22, detects the output voltage level. The PWM control circuit operates transistors 10 and 18 in response to the detected voltage level
  • Transistors 10 and 18 are controlled by a common signal and transistor 18 is connected via an inverter 14. When transistor 10 is turned on, transistor 18 is turned off. In some cases, an optional external diode is placed across transistor 10.
  • Fig. lb illustrating the gate voltage for transistor 10 (which is being operated as the main switch for generating the desired output voltage level)
  • Fig. lc illustrating the gate voltage in operating the SRMOS (transistor 18)
  • Fig. Id illustrating the current in the inductor 12
  • the SRMOS is turned on whenever the main converter switch (transistor 10) is turned off (as indicated at 24)
  • the SRMOS (transistor 18) is turned off whenever the main converter switch (transistor 10) is turned on. While this is a simple arrangement, when the SRMOS is turned on, there is a large amount of reverse conduction (current flow indicated at 28) that reduces overall converter efficiency.
  • a SRMOS converter circuit using the current sense control method is illustrated.
  • This circuit is comprised of a first transistor 30 having gate, drain and source terminals, where the transistor is connected at one terminal to a voltage source having a particular voltage level and is connected at another terminal in series to a coil 32, a shunt 34 (for current sensing), and a capacitor 36.
  • a second transistor 38 being operated like a synchronous rectifier, is connected at one terminal to a node between the first transistor 30 and the coil 32 and is connected at the other terminal to the common ground terminal.
  • a pulse width modulation (PWM) control circuit 40 having two probes for current sensing across the shunt 34 and a probe at the output terminal 42, detects the current level and the output voltage level.
  • the PWM control circuit operates transistors 30 and 38 in response to the detected voltage and current levels and causes the generation of the desired voltage level at the output terminal 42.
  • Fig. 2b illustrating the timing of the gate voltage for transistor 30 and Fig. 2c illustrating timing of the gate voltage in operating the SRMOS (transistor 38) and Fig. 2d illustrating current flow of the inductor, in the discontinuous mode when there is reverse conduction and the inductor current starts to flow in the negative direction through the SRMOS (transistor 38), current flow is sensed through the use of the shunt 34.
  • the control circuit 40 sensing reverse conduction turns off the SRMOS
  • the shunt resistance is typically very small, it is difficult to precisely detect the timing of the zero crossing of the current. Thus, the SRMOS is turned off either before the zero crossing or after the zero crossing, rendering this an imprecise method. Because this is an imprecise method, there still may be a large amount of negative current flow (as indicated in Fig. 3d, 48). Additionally, the shunt is a resistor which consumes power as well (lossy). While the typical shunt resistor is 33m ⁇ and the power consumption can be reduced by using a shunt with even smaller resistance, with a smaller shunt, there will be more reverse conduction before the negative current can be detected. Overall, this circuit is not a reliable nor efficient converter circuit.
  • a SRMOS converter circuit using Vds sensing control method is illustrated.
  • This circuit is comprised of a first transistor 50 having gate, drain and source terminals, where the transistor is connected at one terminal to a voltage source having a particular voltage level and is connected at another terminal in series to a coil 52, and the coil is connected to a capacitor 56.
  • a second transistor 58 being operated like a synchronous rectifier, is connected at one terminal to a node between the first transistor 50 and the coil 52 and is connected at the other terminal to the common ground terminal.
  • a pulse width modulation (PWM) control circuit 60 having a probe 54 for voltage sensing at a node between transistor 50 and coil 52 and a probe at the output terminal 62, detects the Vds level and the output voltage level.
  • the PWM control circuit operates transistors 50 and 58 in response to the detected voltage levels and causes the generation of the desired voltage level at the output terminal 62.
  • Fig. 3b illustrates the timing of the gate voltage for transistor 50 of Fig. 3a
  • Fig. 3c illustrates timing of the gate voltage in operating the SRMOS (transistor 58) in view of the Fig. 3b
  • Fig. 3d illustrates current flow of this circuit.
  • the SRMOS drain voltage (Vds) becomes positive which is sense by the control circuit 60 and the control circuit turns the SRMOS off.
  • Vds SRMOS drain voltage
  • circuits and methods are provided for operating a transistor as a rectifier based upon the detected Vds of the transistor.
  • the SRMOS body diode conducts and the Vds of the SRMOS becomes that of a forward body diode voltage, which may, depending on the type of the device, be approximately -0.6V. If this voltage level is sensed, it may indicate that the SRMOS is turned off too early.
  • Vds is non-existent (which is similar to a diode). In this case, the SRMOS may be turned off too late.
  • the SRMOS can be operated in such a manner so that it is turned off at an optimal point m time.
  • the falling edge of the Vgs voltage and the rising edge of the Vds voltage can be sensed to determine the duration between the two edges.
  • An advantage of the present invention is that it provides circuits and methods for operating a transistor as a rectifier.
  • Fig. la illustrates a prior art SRMOS converter circuit using a simple switch method
  • Fig. lb illustrates the gate voltage for operating the main switch transistor of Fig. la;
  • Fig. lc illustrates the gate voltage in operating the SRMOS of Fig. la;
  • Fig. Id illustrates the current of the Fig. la circuit
  • Fig. 2a shows a prior art SRMOS converter circuit using the current sense control method
  • Fig. 2b illustrates the timing of the gate voltage in operating the main switch transistor of Fig. 2a
  • Fig. 2c illustrates the timing of the gate voltage in operating the SRMOS of Fig. 2a
  • Fig. 2d illustrates the current flow of the Fig. 2a circuit
  • Fig. 3a illustrates a SRMOS converter circuit using Vds sensing control method
  • Fig. 3b illustrates the timing of the gate voltage in operating the main switch transistor of Fig. 3a;
  • Fig. 3c illustrates the timing of the gate voltage in operating the SRMOS of Fig. 3a
  • Fig. 3d illustrates the current flow of the Fig. 3a circuit
  • Fig. 4a illustrates the Vds of the SRMOS of the preferred method of the present invention
  • Fig. 4b illustrates the Vgs for operating the SRMOS of the preferred method in view of Fig. 4a
  • Fig. 4c illustrates the reference voltage, Vref, for the preferred method of the present invention
  • Fig. 5a illustrates Vramp and Vref of the preferred method showing the upward adjustment of Vref
  • Fig. 5b illustrates Vgs of the SRMOS in relation with the intersection of Vramp and Vref of Fig. 5a of the preferred method
  • Fig. 6a shows the intersection of Vds and Vref for turning off of the SRMOS on the upward slope of the Vds
  • Fig. 6b illustrates that when Vref and Vds are at the same level Vgs is applied to turn off the SRMOS
  • Fig. 7a shows that the duration of the SRMOS on-time is reduced as the load is reduced
  • Fig. 7b shows that an increase in the duration of diode conduction indicates an increased load and the on-time of the SRMOS Vgs is increased to handled the increased load;
  • Fig. 8a illustrates one circuit embodiment for a buck DC/DC converter of the present invention
  • Figs. 8b, 8c, and 8d illustrate the relationship between Vgs of the main switch transistor, Vgs of the SRMOS transistor, and current flow of the circuit showing no reverse conduction;
  • Fig. 9 illustrates an embodiment for the control circuit to control the SRMOS
  • Figs. 10a and 10b illustrate the adjustment of Vref when there is a rapid change in load
  • Figs. 11-13 illustrate applications of the present invention in converter circuits
  • Figs. 14a-14c illstrate the time diagrams in detecting the Vds and Vgs voltages
  • Figs. 15a- 15b illustrate the duration between the Vgs and Vds voltages and the adjustment of Vref to affect such duration
  • Figs. 16a- 16b illustrate yet another duration between the Vgs and Vds voltages and the adjustment of Vref to affect such duration.
  • an adaptive predicted SRMOS control method and an adaptive Vds sensing SRMOS control method are disclosed. By using either of these methods, reverse conduction is significantly reduced or even eliminated.
  • a reference voltage is provided and adjusted so that the SRMOS is turned off optimally when there is very short body diode conduction and no reverse conduction.
  • a MOSFET transistor operated as a rectifier is referred to as a SRMOS.
  • SRMOS A MOSFET transistor operated as a rectifier
  • Vds voltage difference across the two terminals
  • Vds voltage would be the difference between the two voltage potentials.
  • Vds voltage would be the forward body diode voltage of the transistor or that of an external diode if an external diode is connected across the two terminals.
  • the SRMOS body diode in sensing the Vds voltage of the SRMOS, during positive conduction (current going from source to drain), the SRMOS body diode will conduct and the Vds of the SRMOS becomes that of a forward body diode voltage of the transistor or of that of a connected external diode, which may, depending on the type of the device, be approximately -0.6V. If this voltage level is sensed, it may indicate that the SRMOS is turned off too early. During reverse conduction (current going from drain to source), Vds is near-zero. In this case, the SRMOS may be turned off too late. Thus, by examining Vds, the SRMOS can be operated in such a manner so that it is turned off at an optimal point in time.
  • a reference voltage for determining the timing in turning off the SRMOS is provided to accurately gauge the turn-off time for the SRMOS.
  • the reference voltage can be provided by using a capacitor voltage where the capacitor voltage is increased to delay the SRMOS turn-off time when a Vds forward body diode voltage is detected and the capacitor voltage is decreased to turn off the SRMOS earlier in time when no Vds forward body diode voltage is detected or the duration of a detected forward body diode voltage is shorter than a predefined time period.
  • Fig. 4a illustrates Vds of the SRMOS
  • Fig. 4b illustrates the Vgs in operating the SRMOS
  • Fig. 4c illustrates reference voltage, Vref.
  • the SRMOS is turned off too early in time (by applying Vgs as indicated at 72) such that a diode conduction (as indicated at 70) occurs (Vds approximately equals to the forward body diode voltage).
  • Vgs as indicated at 72
  • the reference voltage is adjusted upwards (as indicated at 74)
  • the SRMOS is turned off at a later point in time (as indicated at 78), resulting in minimal diode conduction 76.
  • the reference voltage is compared against a periodic ramp voltage (Vramp).
  • Vramp exceeds Vref, a signal is generated to turn off the SRMOS.
  • the ramp voltage can be generated in one of several ways. It can be generated as a function of the PWM signal, the Vds signal of the SRMOS, or in other manners.
  • a time-based, predicted SRMOS turn off signal can be generated where this signal is based upon the previous SRMOS timing. If the converter duty cycle quickly changes, a few cycle is required to adjust Vref in relation with Vramp for turning off the SRMOS.
  • Fig. 5a illustrates Vramp and Vref showing the upward adjustment of Vref.
  • Fig. 5b illustrates the Vgs of the SRMOS in relation with the intersection of Vramp and Vref of Fig. 5a.
  • Vref As Vref is upwardly adjusted on Vramp, Vgs is prolonged and the SRMOS on-time is increased (82), and as Vref is downwardly adjusted on Vramp, Vgs is shortened and the SRMOS on-time is decreased (80).
  • Vds sensing SRMOS control method referring to Fig. 6a illustrating Vds and Vref, the reference voltage is compared with Vds and the SRMOS is turned off when Vref, on the upward slope of the Vds (as indicated at 84), meets Vref (as indicated at 86). Referring to Fig.
  • Vgs is applied to turn off the SRMOS (as indicated at 88). In this method, no ramp voltage is necessary.
  • the reference voltage is provided so that the circuit does not need to precisely determine the zero-crossing point. Additionally, any component offset voltage resulting from the manufacturing process or operating conditions can be accounted for by adjusting the reference voltage.
  • the on-time of the SRMOS can be used to determine the load condition of the converter.
  • other power saving techniques can be applied to further optimize converter output. In detecting the load condition, at full load the SRMOS will remain on until the main converter switch is turned on. As the load decreases, the SRMOS turns off before the main converter switch is turned on. Therefore, the on-time of SRMOS indicates the load condition.
  • other power saving methods can be used. For example, in light load condition, the amount of on-time of the main converter switch (and/or the SRMOS) can be reduced, the SRMOS function can be replaced with the body diode or external diode, and the converter operating frequency can be reduced.
  • the duration of the SRMOS on-time is reduced as indicated at 90 and 92 as the load is reduced.
  • an increase in the duration of diode conduction indicates an increased load and the on-time of the SRMOS Vgs can be increased to handled the increased load.
  • Fig. 8a illustrates one circuit embodiment for a buck DC/DC converter of the present invention where the methods for operating the SRMOS (transistor 108) are novel and can be embedded in the PWM control circuit. The methods described herein can be used in buck, boost, and other types of converters.
  • Figs. 8b, 8c, and 8d illustrate the relationship between Vgs of transistor 100, Vgs of transistor 108, and current flow of the circuit which shows no reverse conduction.
  • Fig. 9 illustrates one embodiment of the PWM control circuit for the present invention.
  • a comparator 120 compares the detected Vds and ground to determine the existence of Vds at the level of a forward diode voltage potential. If Vds equals the forward body diode voltage for a duration longer than a first predefined time period (122), the reference voltage described above (Vref) is increased (124). If Vds equals the forward body diode voltage for a duration less than a second predefined time period (126), the reference voltage is decreased (128). Vref 130 is then compared to another signal at comparator 132.
  • the other signal depending on the embodiment, can be from one of two possible methods.
  • Vramp In the adaptive, predicted SRMOS control method as described above, there is a ramp voltage Vramp and Vramp is used as an input to the comparator 132. In the adaptive Vds sensing SRMOS control method described above, Vds is used as an input to the comparator 132. In either case, if Vref equals to the provided signal (either Vramp or Vds), a signal is provided to the Off-Driver 138 for the SRMOS to turn off the SRMOS. In a situation where there is a rapid change in converter load, the prediction circuit may not be able to adjust to this rapid change, and reverse conduction may result. In order to provide for this situation, in yet another aspect of the present invention and referring to Figs.
  • Figs. 11-13 illustrates application of the present invention in alternative circuit configurations.
  • Fig. 11 illustrating a forward converter having a primary coil 160 operated by a transistor 162, a secondary coil 164 connected in series with a coil 166 and a diode 168, a SRMOS transistor 170 controlled by a SRMOS Control circuit 172 and connected in parallel with the secondary coil 164 and a capacitor 174, the SRMOS transistor is placed in the catch position of the converter circuit and it is controlled in such a manner so that it is on for the optimal maximum duration while avoiding reverse conduction.
  • Fig. 11 illustrating a forward converter having a primary coil 160 operated by a transistor 162, a secondary coil 164 connected in series with a coil 166 and a diode 168, a SRMOS transistor 170 controlled by a SRMOS Control circuit 172 and connected in parallel with the secondary coil 164 and a capacitor 174
  • FIG. 12 illustrates another forward converter configuration having a primary coil 180 operated by a transistor 182 and a secondary coil 184 connected in series with a coil 186 and a SRMOS transistor 188 that is operated by a SRMOS Control circuit 190, and connected in parallel with a diode 192 and a capacitor 194, where the SRMOS transistor is placed in the forward position.
  • the forward converter avoids reverse conduction and can be used in parallel converter applications.
  • Fig. 13 illustrating a converter having a primary coil 200 operated
  • the present invention enables the use of a SRMOS in a flyback converter where traditionally SRMOS are not easily implemented.
  • the present invention can be used in a variety of applications including periodic switching applications, and it is not limited to converters or the embodiments described herein.
  • the methods described herein can be used in conjunction with prior art methods.
  • the current across the drain and source terminals of the SRMOS transistor can be sensed for reverse current flow, and the prediction methods and circuits (e.g. ramp voltage and reference voltage) of the present invention can be adapted to adjust the operation of the SRMOS so that the transistor is operated in such a manner so there is no reverse current flow in subsequent cycles.
  • the reference voltage can be adjusted on one hand by detecting for reverse current flow when there is reverse current flow and for Vds at a diode voltage when there is no reverse current flow but the transistor is turned off too early.
  • Figs. 14a-14c illustrate the relevant voltage levels Vds, Vgs, and Vref respectively. Referring to Figs. 14a- 14c, instead of sensing for the -0.6V, the rising edge of Vds (220) and the falling edge of Vgs (222) are sensed and compared. If the time duration between these two points (as indicated at 224) is greater than a predetermined amount, Vref is increased (as indicated at 229).
  • Vgs is turned off later in time (227) and the duration (226) is shortened. On the other hand, if this duration (as indicated at 224) is less than a predetermined amount, Vref is decreased. Thus, in the next cycle, Vgs is turned off earlier in time.
  • One method in the generation and adjusting of the width of the Vgs signal is described above (see Figs. 5a and 5b).
  • Vref is always step increased (as indicated at 240).
  • the Vref is step discharged (as indicated at 242).
  • this duration is increased (as indicated at 244).
  • the amount of Vref step discharge is the same as the Vref step charge (as indicated at 250).

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Rectifiers (AREA)
  • Dc-Dc Converters (AREA)

Abstract

La présente invention concerne des circuits et des techniques qui permettent d'utiliser un transistor (170) comme un redresseur sur la base de la baisse de tension détectée au niveau dudit transistor. Lors de la détection d'une baisse de tension au niveau d'un transistor à redresseur synchrone (SRMOS) (170) pendant le temps de conduction positive, la diode du corps SRMOS (168) conduit et la baisse de tension au niveau du transistor SRMOS est celle d'une tension directe de la diode. Cette tension peut se situer, selon le type de dispositif, autour de -0,6V. La détection d'une tension de ce niveau peut signifier que le transistor SRMOS est coupé prématurément. Pendant la conduction inverse, la baisse de tension est non-existante (comme dans le cas d'une diode), auquel ce cas, il se peut que la coupure du transistor SRMOS intervienne trop tard. Ainsi, l'observation de la baisse de tension permet d'optimiser le point de coupure d'un transistor SRMOS.
PCT/US1999/008051 1998-04-08 1999-04-08 Technique et circuit permettant d'utiliser un transistor comme redresseur Ceased WO1999052200A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US8110998P 1998-04-08 1998-04-08
US60/081,109 1998-04-08

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001073930A1 (fr) * 2000-03-24 2001-10-04 Telefonaktiebolaget Lm Ericsson (Publ) Procede et dispositif de commande d'un redresseur synchrone dans un convertisseur cc/cc
JP2001312654A (ja) * 2000-05-02 2001-11-09 Dentsu Inc インターネット上の広告・情報提供システム
WO2007017057A3 (fr) * 2005-07-18 2007-07-19 Austriamicrosystems Ag Circuit et procede pour convertir une tension alternative en tension redressee
JP2014027806A (ja) * 2012-07-27 2014-02-06 Toshiba Corp 同期整流型電源回路とその調整方法
WO2016000754A1 (fr) * 2014-07-01 2016-01-07 Huawei Technologies Co.,Ltd Unité et procédé de commande de redressement synchrone
SE2250581A1 (en) * 2022-05-16 2023-11-17 Northvolt Ab Bi-directional dc/dc converter, cycler and micro grid

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US5430640A (en) * 1992-04-30 1995-07-04 Samsung Electro-Mechanics Co., Ltd. Power supply
US5528480A (en) * 1994-04-28 1996-06-18 Elonex Technologies, Inc. Highly efficient rectifying and converting circuit for computer power supplies
US5523940A (en) * 1994-05-20 1996-06-04 Micro Linear Corporation Feedback control circuit for a synchronous rectifier having zero quiescent current
US5742491A (en) * 1995-08-09 1998-04-21 Lucent Technologies Inc. Power converter adaptively driven

Cited By (12)

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