WO1996039746A1 - Circuit and method for providing programmable hysteresis levels - Google Patents

Abstract

A circuit (10) and method for providing programmable hysteresis levels is disclosed. The circuit includes comparators (C1-C4) for producing output signals (V01-V04) when an input signal (V(PTAT) crosses respective set points and a hysteresis circuit (38) for establishing a hysteresis in the output signals. When a comparator's output signal is 'on', the input signal is shifted by a hysteresis differential. The output signal is terminated when the shifted input signal returns to the set point. The hysteresis circuit includes a programmable hysteresis input (40) for adjusting the hysteresis differential to different preset and intermediate hysteresis levels.

Description

CIRCUIT AND METHOD FOR PROVIDING PROGRAMMABLE HYSTERESIS LEVELS

BACKGROUND OF THE INVENTION Field of the Invention

The present invention generally relates to integrated circuits (ICs) that have a hysteresis capability, and more specifically to a circuit for programming an ICs hyster¬ esis level by adjusting a programmable hysteresis signal.

Description of the Related Art

It would be desirable to provide an IC such as a tem- perature controller, an A/D converter, a comparator or a controller with the capability of having externally pro¬ grammable hysteresis levels. These types of ICs typically compare an input signal to a set point to generate an out¬ put signal . Hysteresis prevents the output signal from jittering when the input signal is hovering near the set point, and also holds the output signal for a longer period of time. The output signal may be used, for example, in a temperature controller to trigger a cooling fan, produce a warning signal or shut down a system. In this type of ap- plication it is clearly advantageous to have a signal that does not turn on and off rapidly. However, the amount of hysteresis required for different temperature sensing ap¬ plications, for example, may vary substantially, with a typical range being 0.5-10°C. The TMP-01 programmable temperature controller by Ana¬ log Devices, Inc., the assignee of the present invention, described in U.S. Patent No. 5,225,811, "Temperature Limit Circuit With Dual Hysteresis", provides over- and under- temperature signals that incorporate an adjustable level of hysteresis. In the TMP-01 both the high and low tempera- ture set points and the hysteresis levels are set by a com¬ mon impedance circuit. The impedance circuit is a voltage divider that is connected between an external reference voltage pin provided by the TMP-01 and ground. The set points are determined by the ratios of the resistors in the voltage divider, and the hysteresis current is set by the divider's total resistance.

By using a common circuit to establish both the set points and the hysteresis, the T P-01 can be offered in an 8-pin package. However, in this configuration the values of the resistors in the voltage divider are a function of both the desired set points and the desired hysteresis lev¬ el. Users have had trouble computing the resistor values to obtain both the correct set points and hysteresis. Fur¬ thermore, adjusting the set points affects the hysteresis and vice versa.

Another problem occurs when the reference voltage pin is used to bias another circuit. If the circuit loads the reference voltage pin, the hysteresis current will be af¬ fected. The loading effects can be reduced by using a high impedance buffer between the external pin and the circuit, but this adds components which occupy valuable board space. A programmable hysteresis circuit that provides a num¬ ber of predetermined hysteresis levels and easily comput¬ able intermediate levels that are not dependent on the set points or affected by loading the ICs reference voltage is needed.

SUMMARY OF THE INVENTION

The present invention seeks to provide a circuit and method having independent set point and hysteresis cir- cuits, with the hysteresis circuit producing a hysteresis that can be adjusted between preset and intermediate levels through a programmable hysteresis input.

This is accomplished with comparators that produce output signals when an input signal crosses respective set points and a hysteresis circuit that establishes a hyster¬ esis in the output signals. When a comparator's output signal is "on", the input signal is shifted by a hysteresis differential. The output signal is terminated when the shifted input signal returns to the set point. The hyster¬ esis circuit includes a programmable hysteresis input for adjusting the hysteresis differential to different preset and intermediate hysteresis levels.

For a better understanding of the invention, and to show how the same may be carried into effect, reference will now be made, by way of example, to the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of a programmable tem¬ perature controller IC and its external set point biasing circuitry;

FIG. 2 is a hysteresis diagram for four over tempera¬ ture outputs of the temperature controller of FIG. 1; and FIG. 3 is a schematic diagram of a hysteresis circuit for producing a hysteresis current and controlling the ap¬ plication of a hysteresis differential to a temperature signal.

DETAILED DESCRIPTION OF THE INVENTION

The programmable hysteresis circuit of the present invention can be used with a wide range of ICs, including sensors, controllers, analog-to-digital converters and com¬ parators, to adjust the amount of hysteresis in the IC. In this way a standard chip can be used for a variety of ap- plications, such as temperature sensing, that require dif¬ ferent amounts of hysteresis. The invention will be de¬ scribed in conjunction with a programmable temperature con¬ troller, but it is generally applicable to many other ICs and electrical circuits. The temperature controller is provided with a hysteresis circuit for establishing a hys¬ teresis, and an input pin for receiving a signal to adjust the magnitude of the hysteresis. The hysteresis is pro¬ grammable between a number of preset and intermediate lev- els.

As shown in FIG. 1, a programmable temperature con¬ troller IC 10 produces a voltage proportional to absolute temperature, and compares it to four set point voltages. When the temperature voltage exceeds a set point, the con- troller produces an "on" binary output voltage. For exam¬ ple, the controller may be used to monitor and control a power supply's temperature. When the first (lowest) set point is exceeded, the associated binary output voltage trips a fan that is used to cool the power supply. When the second set point is surpassed, the fan's speed is in¬ creased and a compressor is turned on to provide additional cooling. If the temperature rises higher than the third set point a warning signal is produced, and if the fourth and highest set point is traversed the power supply is shut down.

Hysteresis is built into the system to prevent the outputs from jittering on and off when the temperature voltage hovers close to one of the set points. Once the temperature voltage exceeds a set point it must fall back at least a hysteresis differential below the set point to switch the output "off". It would be very inefficient to turn the fan, compressor or entire system on and off every few seconds.

The temperature controller IC 10 includes a bandgap reference and temperature sensor 12 that is typically re- ferred to as a "Brokaw" cell, and is disclosed in U.S. Pat¬ ent No. 5,225,811, "Temperature Limit Circuit With Dual Hysteresis." Separate sensing and reference voltage cir¬ cuits could be used. The Brokaw cell outputs a reference voltage V_ref/ suitably 2.5 volts, and a voltage proportional to absolute temperature V_PTAT. V_PTAT is amplified by amplifier 14, typically having a gain of 2.5, to give the controller a sensitivity of approximately 5mV/°C. Since the output of amplifier 14 is also proportional to absolute temperature, it is also designated V_PTAT. The 16-pin IC package 15 in¬ cludes a V_s supply voltage pin 16 and a GND pin 17 for bias¬ ing the ICs internal circuitry. The supply voltage, suit¬ ably 5 volts, and ground are provided externally. For clarity the ICs internal supply voltage and ground connec- tions are not shown. The IC includes a V_ref pin 18 and a V_PTAT pin 20 that are connected to the reference voltage V_ref and amplified temperature voltage V_PTAT, respectively. To conserve power a shutdown feature is included for the tem¬ perature sensor. A shutdown pin 22 is connected internally to the temperature sensor and receives an externally ap¬ plied signal.

The set point voltages are established externally so that they can be adjusted to the needs of the particular application. A voltage divider 24 consisting of five ser- ies resistors Rl through R5 is connected between the V_ref pin and ground. The four set point voltages are tapped off of the voltage divider between each successive pair of resis¬ tors, and are connected to input pins INI (26) through IN4 (32) , respectively. The ratio of the resistance between each tap and ground to the total resistance of the divider determines the value of the set point voltage for that tap. The voltage divider is preferably added by the user to es¬ tablish the desired set points. Alternatively, programma¬ ble digital-to-analog converters (DACs) could be used to establish the set point voltages from digital inputs or the voltage divider could be internal to the IC.

The IC includes four comparators C1-C4 for comparing V_PTAT to the respective set point voltages. The comparators' inverting inputs 34a-34d are connected to the input pins IN1-IN4, respectively. The amplified V_PTAT is connected through resistors R6-R9 to the comparators' non-inverting inputs 36a-36d, respectively.

A hysteresis circuit 38 produces hysteresis currents ^I _HCI/ Ϊ_HC2/ Ϊ_HΏ ^and I_Hc that can be applied through switches S1-S4 to the comparators' non-inverting inputs, respective¬ ly, to shift the input signal, V_PTAT. A hysteresis pin H_pin 40 is connected to the hysteresis circuit 38 and can be used to sink or source current to adjust the magnitude of the hysteresis currents. The preferred external connec- tions for the hysteresis pin are shown in FIG. 3.

Because the input impedances to the comparators are very large, when the switches are open the voltages at the non-inverting comparator inputs substantially equal V_PTAT. When the switches are closed, the hysteresis I_HCI ^-I _{H 2} cur- rents flow through the respective resistors R6-R9, thus in¬ creasing the voltages at the non-inverting comparator in¬ puts by a hysteresis differential. The switches are inde¬ pendently controlled by the voltage levels at the output terminals T1-T4 of the respective comparators. If V_PTAT rises above a particular set point voltage, the corresponding comparator's output goes high and closes its associated switch, allowing the associated hysteresis cur¬ rent to flow. V_PTAT must then fall below the set point by at least the hysteresis differential before the comparator will switch low. In terms of the previous example, if the lowest set point is 373°K and the hysteresis differential is 4°K, the first comparator will transition high at 373°K, turning on the fan, and will remain high until the tempera¬ ture falls below 369°K. The same principle can be applied to sensing temperatures below set points by reversing the direction of the hysteresis current, switching the polari¬ ties of the comparators' inputs and closing the switch when the comparator output is low. When V_PTAT falls below the set point, the comparator output turns "on" and stays "on" un- til V_PTAT exceeds the set point by the hysteresis differen¬ tial.

The circuit produces a corresponding output signal when any of the comparators turns "on" . The output signals are preferably low voltages because it is typically more efficient to drive external circuitry from a low voltage. To invert the signals at the comparator output terminals T1-T4, the terminals are connected to the bases of npn transistors Q1-Q4, respectively. The transistors' collec¬ tors are connected to output pins OUT1-OUT4 (42, 44, 46 and 48) , respectively, and their emitters are grounded. There¬ fore, if V_PTAT exceeds a set point the corresponding output pin will assume a low voltage level.

FIG. 2 is a plot of the voltage levels V₀₁-V₀₄ at the respective output pins OUT1-OUT4 versus V_PTAT. The voltages at the output pins remain high until V_PTAT surpasses their corresponding set points SP1-SP4. When this happens the output voltage switches low, and stays low until V_PTAT falls to at least a hysteresis differential 50 below the set point. The magnitudes of the hysteresis differentials are proportional to the respective hysteresis currents I_HC1, I_Hc₂# I_HC3 and I_HC4 , and can be adjusted by sinking or sourcing current through the H_pin 40.

As shown in FIG. 3 the hysteresis circuit 38 produces a hysteresis current I_H that is mirrored to each comparator circuit. For purposes of explanation only the first com¬ parator circuit Cl is shown, but similar circuitry is pro¬ vided for the other comparators C2-C4. In the preferred embodiment a current source IS is connected to the emitter of an npn transistor Q5. The current source establishes the reference hysteresis current I_H, for example 15 μA, flowing through the transistor's collector. Q5's emitter is also connected through a resistor RIO to the hysteresis pin H_pin. Connecting the H_pin to different voltages increases or reduces the amount of emitter current, and hence changes the hysteresis current I_H. The transistor's base is biased so that the voltage at the emitter is insensitive to fluc¬ tuations in temperature, and lies between ground and V_ref. For example, a suitable base voltage would be V_b + V_be volts, where V_be is the base-emitter voltage drop and V_b = 2.011 volts, so that the emitter voltage is also 2.011 volts.

The hysteresis current I_H flowing through Q5's col¬ lector is reflected through a current mirror 51 to the com¬ parator Cl to supply the comparator's hysteresis current I_HC1. The current mirror comprises a pair of pnp transistors Q6 and Q7a having a common base connection, and emitter degeneration resistors Rll and R12a connected between their respective emitters and the supply voltage V_s. The collec¬ tor of Q6 is connected to the collector of Q5 to supply the hysteresis current I_H, and the collector of Q7a mirrors the hysteresis current to comparator Cl. The emitter and base of a transistor Q8 are connected to Q6's base and collec¬ tor, respectively. The emitter degeneration resistors and transistor Q8 reduce the error between collector currents on either side of the current mirror that would otherwise result from mismatches between Q6 and Q7a. Alternatively, the current mirror could be a Wilson, cascode or base cur¬ rent mirror.

The hysteresis current I_HC1 supplied by Q7a will be equal to the current I_H in Q6 if the transistors have equal emitter areas and the degeneration resistors have equal values. In general the current applied to the comparator can be a multiple or fraction of I_H. For example, if the emitter area of Q6 is n times greater than the emitter area of Q7a and the value of the degeneration resistor R12a is n times the value of Rll, I_HC1 = I_H/ (n) . This property al- lows the hysteresis currents and hence the hysteresis dif¬ ferentials to be different for each set point. However, the magnitudes of the hysteresis differentials relative to each other are fixed for a given IC design, and cannot be altered via the hysteresis pin. Typically the hysteresis differentials for the different set points are all the same.

The switch SI (shown in FIG. 1) is preferably imple¬ mented as a switch Sla and a diode Dl. The switch Sla may be implemented by one or more transistors, which could be bipolar, MOSFETs, or JFETs. Similarly, the diode Dl may be replaced by one or more transistors, or anything which im¬ plements the diodes functionality as a cutoff valve. When the V_PTAT voltage is lower than the voltage at INI, Cl's out- put is low. This closes switch Sla and shunts the hyster¬ esis current I_HC1 to ground. Conversely, when the V_PTAT volt¬ age is higher than the voltage at INI, Cl's output switches high. This opens switch Sla, thus allowing the hysteresis current I_HC1 to forward bias and conduct current through diode Dl. As the current flows through R6 it shifts the input signal (V_PTAT) by the hysteresis differential.

The reference hysteresis current I_H, and hence I_HC1 and the hysteresis differential, are adjustable by connecting the hysteresis pin H_pin to different voltage levels. For example, I_H can have three preset levels: low, medium and high. These levels correspond to connecting H_pin to the V_ref pin, leaving it unconnected and connecting it to the GND pin, respectively. An important aspect of the invention is that the user can select one of the three preset levels without providing any additional external biasing circui¬ try. In general, the number of preset levels would be lim¬ ited only by the availability of reference voltages.

Leaving H_pin unconnected has no effect on Q5' s emitter current, and hence the medium level is determined by the reference hysteresis current provided by the current source IS. Tying H_pin to V_ref, which is greater than the voltage at Q5's emitter, causes the pin to source current. Hence the current source IS draws less current through Q5, which re¬ duces I_H. Conversely, tying H_pin to ground causes it to sink current such that both IS and H_pin draw current from Q5. The exact values for the high and low levels are determined by the selected voltage levels, such as 2.5 V for V_ref and 0 V for ground, and by the value of RIO. Intermediate hyster¬ esis levels can be selected by tying H_pin through a resistor R13 to V_re£ or GND.

The H_pin setting for a desired hysteresis differential is described in Table 1 below.

Table 1

Desired Hysteresis H_pin setting Differential ( °C)

^{H = H}low Tie to V_ref

^Hiow < H < H_med Tie to V_ref Through _{Rι3 =} R10 * (H_med-H_low) _ _{RI O}

^Hmed ~^{H H = H}med Leave Unconnected

^Hmed ^{< H <H}high Tie to Ground Through _{R13 β} R10 * (H_high-H_med) _ _{RI O}

^{H _H}med

^{H = H}high Tie to Ground

For example, under the following conditions: IS = 15 μA, Q5's emitter voltage = 2.011 V, RIO = 57.5 KΩ , R6 = 2Ω, I_HCI/Ϊ_H = i ^{4 an}^ V_ref =2.5 V, the preset hysteresis lev¬ els would be H_low = 0.5°C, H_med = 1.5°C and H_hiqh = 5°C An intermediate hysteresis of 1°C would be achieved by connec¬ ting a 40.3 KΩ resistor between the hysteresis pin and V_ref, and a hysteresis of 3°C would result from connecting a 76.6 KΩ resistor between the pin and ground. By providing a separate external hysteresis pin that is independent of the reference voltage pin, the hysteresis differential can be set without affecting the set point voltages and vice versa. The calculations for the voltage divider resistors for the desired set points and the calcu¬ lations for the hysteresis resistor R13 are independent, and thus much simpler. Furthermore, the reference voltage pin can be used to bias other circuits without requiring a high impedance buffer to avoid loading the pin. While several illustrative embodiments of the inven¬ tion have been shown and described, numerous variations and alternate embodiment will occur to those skilled in the art. For example, while the invention has been described in terms of shifting the input signal to produce hysteres- is, it may also be possible to produce hysteresis by shift¬ ing a set point, and making the set point shift programma¬ ble. Such variations and alternate embodiments are contem¬ plated, and can be made without departing from the spirit and scope of the invention as defined in the appended claims.

Claims

WE CLAIM :

1. A circuit for providing programmable hysteresis levels, comprising: a sensing circuit (12, 24, C1-C4) for producing an output signal in response to an input signal; a hysteresis circuit (38) for establishing a hys¬ teresis in said output signal; an adjustment circuit (IS,R10,Q5) for adjusting said hysteresis to different preset hysteresis levels; and a programmable input (40) to said adjustment cir- cuit for selecting one of said preset hysteresis levels.

2. The circuit of claim 1, wherein said programmable input is connectable to different potential levels (V_ref, GND) to select said preset hysteresis levels.

3. The circuit of claim 2, wherein said adjustment circuit can adjust said hysteresis to different intermedi¬ ate levels between said preset levels, said programmable input being connectable through a resistor (R13) to said different potential levels to select said intermediate lev¬ els.

4. The circuit of claims 2 or 3, further comprising a voltage reference circuit (18) that provides a reference potential at a reference potential output, said input se¬ lects a first one of said preset levels by connection to said voltage reference circuit, selects a second one of said preset levels by connection to a ground potential, and selects a reference preset level between said first and second preset levels when it is unconnected.

5. The circuit of claims 1,2,3 or 4, wherein said adjustment circuit comprises: a current circuit (Q5,IS) for providing a hyster¬ esis current, said programmable input being capable of pro¬ viding an adjustment current to vary said hysteresis cur¬ rent; and a current mirror (51) for reflecting said hyster¬ esis current to said hysteresis circuit to establish said hysteresis in accordance with the magnitude of said hyster¬ esis current .

6. The circuit of claim 5, wherein said current circuit has a current junction, and said programmable input is connectable to a plurality of predetermined voltages, said adjustment circuit further comprising: a resistor (RIO) that is connected between said current junction and said programmable input, the value of said resistor determining said preset current levels.

7. The circuit of claims 1,2,3,4 or 5, wherein said sensing circuit produces said output signal when said input signal crosses a set point, and said hysteresis circuit then shifts said input signal by said selected hysteresis level and maintains said output signal until the shifted input signal returns to the set point.

8. The IC of claim 7, wherein said sensing circuit comprises a comparator (C1-C4) that receives said input signal and said set point as inputs and turns said output signal on when said input signal crosses said set point, and said hysteresis circuit comprises a switch that is con¬ trolled by said output signal such that when said output signal is on said switch transmits said hysteresis current to offset said input signal by said selected hysteresis level .

9. A method for programming hysteresis levels for an integrated circuit (IC) , said IC (10) having a sensing cir¬ cuit (12, C1-C4) for producing an output signal in response to an input signal and a hysteresis circuit (38) for estab¬ lishing a hysteresis in said output signal, said hysteresis circuit having a programmable hysteresis pin (40) for se¬ lecting different hysteresis levels, comprising: connecting said hysteresis pin to a low reference voltage to select a first preset hysteresis level; connecting said hysteresis pin to a high refer- ence voltage to select a second preset hysteresis level; and leaving said hysteresis pin unconnected to said low and high reference voltages to select a third preset hysteresis level between said first and second preset lev- els.

10. The method of claim 9, further comprising connec¬ ting said hysteresis pin through a resistor (R13) to said low and high voltages to select intermediate levels between said first and third preset levels, and said second and third preset levels, respectively.