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WO1993016493A1 - Dispositif de connexion a impedance electrique variable destine aux sorties de plaquettes de circuits integres - Google Patents

Dispositif de connexion a impedance electrique variable destine aux sorties de plaquettes de circuits integres Download PDF

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Publication number
WO1993016493A1
WO1993016493A1 PCT/US1993/001233 US9301233W WO9316493A1 WO 1993016493 A1 WO1993016493 A1 WO 1993016493A1 US 9301233 W US9301233 W US 9301233W WO 9316493 A1 WO9316493 A1 WO 9316493A1
Authority
WO
WIPO (PCT)
Prior art keywords
integrated circuit
recited
chip
circuit chip
component
Prior art date
Application number
PCT/US1993/001233
Other languages
English (en)
Inventor
David Reynolds
Original Assignee
Analog Devices, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Analog Devices, Inc. filed Critical Analog Devices, Inc.
Publication of WO1993016493A1 publication Critical patent/WO1993016493A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/647—Resistive arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13062—Junction field-effect transistor [JFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Definitions

  • This invention relates generally to termination strategies for electrical leads on integrated circuit (IC) chips and, more particularly, to variable electrical impedance termination strategies for electrical leads on IC chips.
  • IC chips that convert digital data into analog signals representing information such as color and luminance. These chips are known by many different names, including RAM digital-to-analog converters (DACs), video DACs or color pallette DACs.
  • DACs RAM digital-to-analog converters
  • video DACs video DACs
  • color pallette DACs color pallette DACs.
  • the output signals from such a type of chip are typically forwarded to a video display which generates a video image from the signals.
  • the bias circuitry 37 operates to provide a bias voltage, v a ⁇ _ as ' to DAC 12a.
  • op amp 19 generates an output that is indicative of the difference between the reference voltage V f from voltage source 39 and the voltage on feedback line 29. This output is connected to the gate of MOSFET 13 to regulate the amount of current that flows through the MOSFET and out its drain.
  • the gate of the MOSFET 13 is connected to DAC 12a to provide the bias voltage V., . .
  • the drain of MOSFET 13 is connected in a negative feedback arrangement with a resistor 14 to the second input of op amp 19.
  • a third difficulty with conventional DAC chips concerns resonance.
  • Many prior art DAC chips may be modeled by the circuit shown in Fig. 3. In particular, they act like a conventional RLC circuit which experiences oscillations.
  • the high impedance current source 60 represents parasitic capacitance of the chip, bond wire package and board traces.
  • the inductor 64 represents the bond wire inductance of the package,
  • the capacitor 66 represents capacitances of the system such as pin-to-pin capacitance and printed circuit board capacitance.
  • the resistor 63 represents the termination resistors on the board and monitor (comparable to resistors 16a, 16b and 16c of Fig. l).
  • a problem with this RLC circuit is that it resonates. Specifically, resonance may occur when a step,change arises in the output excitation. The resonance produces a high frequency ringing on the cable interconnecting the monitor with the circuit board. This ringing interferes with the provision of the desired color outputs.
  • a chip such as a video chip, that includes at least one component on it such as a digital-to-analog converter (DAC) or an analog to digital converter (ADC) .
  • a connection is provided for each connection to the component to an external element off the chip to enable electrical signals to travel between the components on the chip and the external element.
  • the chip further includes an active element for adjusting the electrical impedance at the connection such that mismatches among the/outputs are substantially reduced.
  • These active elements may be variable resistors.
  • the variable resistors may be implemented using a plurality of MOSFETs.
  • the appropriate level of electrical impedance of each of the relevant connections must first be determined. This may be determined by measuring devices that measure the electrical signals on the connectors. These measurements are processed to determine the diferences in electrical impedance and how to compensate for these differences. Once this is determined, the active elements, such as variable resistors, are set to compensate for the mismatches. Once the active elements have been appropriately set, the mismatches in output voltages are significantly reduced or eliminated.
  • Fig. 1 is a schematic diagram of a prior art DAC chip connected to a video display
  • Fig. 2 is a schematic diagram of the prior art bias circuitry for the chip of Fig. l;
  • Fig. 3 is a schematic diagram for modeling the behavior of a prior art DAC chip
  • Fig. 4 is a schematic diagram of a DAC chip connected to video display in accordance with the present invention.
  • Fig. 5 is a schematic diagram of a variable resistor circuit and control circuitry for use in the DAC chip of Fig. 4;
  • Fig. 6 is a block diagram of the control circuitry of Fig. 5.
  • Figs. 7a and 7b show alternative embodiments of the bias circuitry for the chip of Fig. 4.
  • Fig. 8 is a schematic diagram of an alternative embodiment of the present invention employed in an ADC chip.
  • the present invention provides a means for compensating for mismatches in the output currents of devices, such as DACs 22a, 22b and 22c, on a chip 30. It should be appreciated that the chip 30 need not include three DACs as shown in Fig. 4.
  • the present invention also encompasses chips employing more or fewer DACs and encompasses chips employing other types of components which are not DACs.
  • at least one active element like element 28a, 28b or 28c, may be employed to make the output currents of the converters substantially equal. Alternatively, active elements may be provided for only selected DACs. As shown in Fig.
  • the active elements are variable resistors 28a, 28b and 28c which are connected to the outputs of the respective DACs 12a, 12b and 12c. These variable resistors 28a, 28b and 28c are on the chip as opposed to being on the printed circuit board 11.
  • the DAC chip 30 is connected via conductors 17a, 17b and 17c or other suitable connecting means to the video display monitor 18. These conductors may be incorporated together in a cable 23.
  • the variable resistors 28a, 28b and 28c not only resolve mismatches between DAC outputs but also compensate for electrical impedance mismatches between the chip 30 and the conductors 17a, 17b and 17c.
  • the termination resistors at the video display monitor are shown as resistors 16a, 16b and 16c in Fig. 4.
  • Suitable devices are photodetectors that measure the intensity of the output of the video display 18 or devices on the board that measure the intensity of the outputs from the DACs. Such devices need not reside on DAC chip 30 as shown in Fig. 4, but rather may reside on the video display 18.
  • the outputs from the measuring devices 95a, 95b and 95c are used to generate control signals to the variable resistors, as will be discribed in more detail below.
  • variable resistors 28a, 28b and 28c are set by control signals from control circuitry 41a, 41b and 41c, respectively, to resistances of approximately 76 ohms, 75 ohms and 74 ohms.
  • MOSFETs 32, 34 and 36 are all connected to corresponding second source potentials or grounds.
  • Each of the MOSFETs 32, 34 and 36 has a different cross-sectional area for its channel. The differences in channel area among the MOSFETs 32, 34 and 36 cause the MOSFETs to exhibit different drain to source resistances for the same gate-to-source voltage, V gs .
  • Additional MOSFETs 31, 33 and 35 are provided to prevent MOSFETs 32, 34 and 36, respectively, from floating when the switches 40, 42 and 44, respectively, are open. These MOSFETs 31, 33 and 35 are connected to the lines 43a, 43b and 43c, respectively, which carry the control signals. The sources of these MOSFETs 31, 33 and 35 are coupled to ground.
  • the system selects a particular branch of the circuit (or parallel branches of the circuit) by control signals 43a, 43b and 43c (which are shown as a single line in Fig. 4) and, thus, also selects one (or more) MOSFET(s) 32, 34 and 36.
  • the switch for the selected branch(es) is closed while the switches for the remaining branch(es) remains open.
  • each MOSFET 32, 34 or 36 provides a different resistance for the same value of V, D1.3._S.
  • the selection of a particular branch(es) results in a selection of a particular resistance.
  • the control signals on lines 43a, 43b and 43c originate from the control circuitry 41a.
  • a more detailed view of the control circuitry 41a is shown in Fig. 6.
  • the control circuitry includes the measuring device 95a as discussed above.
  • a measuring device 95a receives video output from DAC 12a and generates an indication of the output which is forwarded to a comparator 81.
  • the comparator 81 compares this output with a reference value indicative of the desired output.
  • the comparator 81 generates an indication of the difference between the reference valve and the measured output and forwards this to the control signal generator 83.
  • the control signal generator 83 generates an appropriate set of control signals to eliminate mismatches between the actual output and the reference valve for the respective colors. These control signals are passed to the variable resistor 28a as discussed with reference to Fig. 5.
  • the gate of MOSFET 13a is connected to the gate of MOSFET 80a, and the gate of MOSFET 80a is connected to the bias voltage input of the DAC 12a.
  • the source of the MOSFET 80a is connected to the supply voltage D;D , while the drain of MOSFET 80a is connected to an n-channel MOSFET 82a and to a branch 84a.
  • branch 84a leads to the first input of an op amp 86a.
  • the gate of n-channel MOSFET 82a is connected to the output of the op amp 86a.
  • the source of MOSFET 82a is tied to ground.
  • the other input to the op amp 86a is connected to line 88a, which leads to the reference voltage source 39a.
  • the op amp 86a receives an input on line 84a which is indicative of the voltage across the second MOSFET 82a.
  • the voltage generated at the first input of the op amp 86a is compared to the reference voltage, -, provided at the second input.
  • the output of the op amp 86a is indicative of the difference between the reference voltage and the voltage across MOSFET 82a. This output is coupled to the gate of second MOSFET 82a and serves as a bias for the variable resistor 28a.
  • Fig. 7b depicts a second alternative embodiment of the bias circuitry 37a.
  • bias circuitry 37b and 37c have a circuit arrangement like that of bias circuitry 37a.
  • This alternative embodiment differs from that of the first embodiment of Fig. 6a in that it employs a current mirror.
  • the second MOSFET 80a is employed as previously described; however, the drain of MOSFET 80a passes to an n-channel MOSFET 82a and to a branch 100a connected in a conventional current mirror configuration so that the current on line 104a mirrors that flowing through the second MOSFET 80a.
  • This line 104a connects to the bias input for the variable resistor 28a.
  • the present invention helps to diminish the resonant effects experienced by the DAC circuits. Specifically, by bringing the variable resistor onto the chip, the nature of the circuit is changed so that only part of the DAC output current goes to reactive elements, whereas in the prior art systems all of the output current goes to reactive elements (i.e.., the inductive bond wires and the capacitance of the circuit board) . The portion of the DAC output going to variable resistors in the present invention cannot resonate, and the present invention damps resonant effects. Thus, the non-ideal behavior (i.e., resonances) of the circuit is lessened.
  • variable resistor 76 or other suitable active element may be integrated into an ADC chip 70 having at least one ADC on it.
  • ADC chip 70 shown in Fig. 7 has two ADCs 72 and 74. These ADCs 72a and 72b receive input from off-chip on terminals 90a and 90b, respectively. These terminals 90a and 90b are, in turn, coupled to respective external electrical conductors 94a and 94b.
  • the input of ADC 74 is connected to a passive fixed value resistor 78.
  • variable resistor 76 serves much the same role served by the active element in the previously described alternative embodiment of Fig. 4.
  • the variable resistor 76 helps to eliminate a mismatch in signal amplitude experienced at the inputs to the ADC 72a and 72b.
  • inputs to different ADCs may have different electrical impedances due to non-idealities.
  • the variable resistor 76 is set to a resistance value so that the resulting input signals experienced by the inputs of the different ADCs 72a and 72b are the same.
  • variable resistor 76 may be used to compensate for any electrical impedance mismatch between the electrical impedance of electrical conductor 94a and the electrical impedance of the ADC chip 70.
  • This chip may include a servo loop similar to those shown in Figs. 7a and 7b for adjusting the variable resistor 76.
  • Fig. 8 depicts only one variable resistor 76. It should be appreciated, nevertheless, that the resistor 78 may also be a variable resistor rather than a passive resistor. Furthermore, even though plural ADCs are shown on ADC chip 70 in Fig. 7, this invention additionally encompasses embodiments where only a single ADC is positioned on a chip and, likewise, encompasses instances wherein more than two ADCs are situated on the chip.
  • variable resistors may be used with components other than DACs or ADCs, and the variable resistors may be incorporated in chips other than video chips; Still further, the variable resistors may be positioned elsewhere on the chip other than at the outputs of ADCs or the outputs of DACs.
  • the invention may have equal applicability to other on-chip components.
  • MOS components need not be used, rather other suitable components such as JFET components may be equally viable. The examples are, thus, not intended to be limiting, and the invention is defined only in the appended claims and equivalents thereto.

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

Une plaquette de circuit intégré comporte au moins un composant, par exemple un convertisseur analogique-numérique ou numérique-analogique. Ce composant comprend au moins une connexion sortante lui permettant de communiquer avec un dispositif extérieur. La plaquette comporte aussi un élément actif, tel qu'une résistance variable, prévu pour compenser une impédance électrique imparfaite caractérisant les signaux échangés par cette connexion.
PCT/US1993/001233 1992-02-11 1993-02-11 Dispositif de connexion a impedance electrique variable destine aux sorties de plaquettes de circuits integres WO1993016493A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US83469492A 1992-02-11 1992-02-11
US07/834,694 1992-02-11

Publications (1)

Publication Number Publication Date
WO1993016493A1 true WO1993016493A1 (fr) 1993-08-19

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PCT/US1993/001233 WO1993016493A1 (fr) 1992-02-11 1993-02-11 Dispositif de connexion a impedance electrique variable destine aux sorties de plaquettes de circuits integres

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3217553A1 (fr) * 2016-03-11 2017-09-13 Socionext Inc. Circuit intégré

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4111383A1 (de) * 1990-05-11 1991-11-14 Asea Brown Boveri Halbleiterbauelement

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4111383A1 (de) * 1990-05-11 1991-11-14 Asea Brown Boveri Halbleiterbauelement

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 10, no. 289 2 October 1986 *
PATENT ABSTRACTS OF JAPAN vol. 11, no. 342 10 November 1987 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3217553A1 (fr) * 2016-03-11 2017-09-13 Socionext Inc. Circuit intégré
US9966923B2 (en) 2016-03-11 2018-05-08 Socionext Inc. Integrated circuitry

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