WO1993005537A1 - Dispositif a semiconducteur - Google Patents

Dispositif a semiconducteur Download PDF

Info

Publication number: WO1993005537A1
Authority: WO; WIPO (PCT)
Prior art keywords: cell; gate electrodes; parts; center; respect
Prior art date: 1991-09-02

Application number

PCT/JP1992/001119

Other languages

English (en)

French (fr)

Inventor

Kensuke Torii

Yasuhiro Oguchi

Yasuhisa Hirabayashi

Masuo Tsuji

Original Assignee

Seiko Epson Corporation

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1991-09-02

Filing date

1992-09-02

Publication date

1993-03-18

1992-09-02 Application filed by Seiko Epson Corporation filed Critical Seiko Epson Corporation

1992-09-02 Priority to US08/050,119 priority Critical patent/US5517041A/en

1992-09-02 Priority to JP50394393A priority patent/JP3275313B2/ja

1993-03-18 Publication of WO1993005537A1 publication Critical patent/WO1993005537A1/ja

Classifications

- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/90—Masterslice integrated circuits
- H10D84/903—Masterslice integrated circuits comprising field effect technology
- H10D84/907—CMOS gate arrays

Landscapes

Design And Manufacture Of Integrated Circuits (AREA)

PCT/JP1992/001119 1991-09-02 1992-09-02 Dispositif a semiconducteur WO1993005537A1 (fr)

Priority Applications (2)

Application Number	Priority Date	Filing Date	Title
US08/050,119 US5517041A (en)	1991-09-02	1992-09-02	Semiconductor device
JP50394393A JP3275313B2 (ja)	1991-09-02	1992-09-02	半導体装置

Applications Claiming Priority (2)

Application Number	Priority Date	Filing Date	Title
JP3/221628		1991-09-02
JP22162891		1991-09-02

Publications (1)

Publication Number	Publication Date
WO1993005537A1 true WO1993005537A1 (fr)	1993-03-18

Family

ID=16769748

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
PCT/JP1992/001119 WO1993005537A1 (fr)	1991-09-02	1992-09-02	Dispositif a semiconducteur

Country Status (3)

Country	Link
US (1)	US5517041A (ja)
JP (1)	JP3275313B2 (ja)
WO (1)	WO1993005537A1 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
EP0730303A3 (en) *	1995-03-01	1997-07-02	Lsi Logic Corp	Microelectronic integrated circuit with hexagonal CMOS "NAND" gate
US8584069B2 (en)	2009-09-29	2013-11-12	Fujitsu Semiconductor Limited	Apparatus and method for design support using layout positions of first and second terminals

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPH07283377A (ja) *	1994-01-03	1995-10-27	Texas Instr Inc <Ti>	小型ゲートアレイおよびその製造方法
US5656850A (en) *	1995-03-01	1997-08-12	Lsi Logic Corporation	Microelectronic integrated circuit including hexagonal semiconductor "and"g
TW377493B (en) *	1996-12-27	1999-12-21	Matsushita Electric Industrial Co Ltd	Semiconductor integrated circuit device
JP4301462B2 (ja)	1997-09-29	2009-07-22	川崎マイクロエレクトロニクス株式会社	電界効果トランジスタ
US6202194B1 (en) *	1997-12-11	2001-03-13	Intrinsity, Inc.	Method and apparatus for routing 1 of N signals
JP3169883B2 (ja) *	1998-02-26	2001-05-28	日本電気アイシーマイコンシステム株式会社	半導体集積回路装置及びその機能セルの配置方法
US6201267B1 (en) *	1999-03-01	2001-03-13	Rensselaer Polytechnic Institute	Compact low power complement FETs
US6622905B2 (en) *	2000-12-29	2003-09-23	Intel Corporation	Design and assembly methodology for reducing bridging in bonding electronic components to pads connected to vias
US7462903B1 (en) *	2005-09-14	2008-12-09	Spansion Llc	Methods for fabricating semiconductor devices and contacts to semiconductor devices

Citations (8)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS5861645A (ja) *	1981-10-09	1983-04-12	Nec Corp	マスタ−スライス集積回路装置
JPS61193467A (ja) *	1985-02-22	1986-08-27	Hitachi Ltd	半導体集積回路装置
JPS62244148A (ja) *	1986-04-16	1987-10-24	Nec Corp	半導体装置
JPH01160859U (ja) *	1988-04-13	1989-11-08
JPH0223659A (ja) *	1988-07-12	1990-01-25	Sanyo Electric Co Ltd	半導体集積回路
JPH0316174A (ja) *	1989-03-17	1991-01-24	Kawasaki Steel Corp	集積回路
JPH03104275A (ja) *	1989-09-19	1991-05-01	Fujitsu Ltd	ゲートアレイ
JPH03263854A (ja) *	1990-03-14	1991-11-25	Fujitsu Ltd	ゲートアレイ型半導体集積回路装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS63107140A (ja) *	1986-10-24	1988-05-12	Hitachi Ltd	半導体集積回路装置
JP2558474B2 (ja) *	1987-08-31	1996-11-27	旭光学工業株式会社	ダビング装置
JPH023659A (ja) *	1988-06-20	1990-01-09	Ishihara Sangyo Kaisha Ltd	ベンゾイルウレア系化合物、それらの製造方法及びそれらを含有する有害動物防除剤
JPH0282647A (ja) *	1988-09-20	1990-03-23	Matsushita Electron Corp	半導体集積回路およびその製造方法

1992
- 1992-09-02 WO PCT/JP1992/001119 patent/WO1993005537A1/ja active Application Filing
- 1992-09-02 JP JP50394393A patent/JP3275313B2/ja not_active Expired - Fee Related
- 1992-09-02 US US08/050,119 patent/US5517041A/en not_active Expired - Lifetime

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS5861645A (ja) *	1981-10-09	1983-04-12	Nec Corp	マスタ−スライス集積回路装置
JPS61193467A (ja) *	1985-02-22	1986-08-27	Hitachi Ltd	半導体集積回路装置
JPS62244148A (ja) *	1986-04-16	1987-10-24	Nec Corp	半導体装置
JPH01160859U (ja) *	1988-04-13	1989-11-08
JPH0223659A (ja) *	1988-07-12	1990-01-25	Sanyo Electric Co Ltd	半導体集積回路
JPH0316174A (ja) *	1989-03-17	1991-01-24	Kawasaki Steel Corp	集積回路
JPH03104275A (ja) *	1989-09-19	1991-05-01	Fujitsu Ltd	ゲートアレイ
JPH03263854A (ja) *	1990-03-14	1991-11-25	Fujitsu Ltd	ゲートアレイ型半導体集積回路装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
EP0730303A3 (en) *	1995-03-01	1997-07-02	Lsi Logic Corp	Microelectronic integrated circuit with hexagonal CMOS "NAND" gate
US8584069B2 (en)	2009-09-29	2013-11-12	Fujitsu Semiconductor Limited	Apparatus and method for design support using layout positions of first and second terminals

Also Published As

Publication number	Publication date
JP3275313B2 (ja)	2002-04-15
US5517041A (en)	1996-05-14

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WO1993005537A1 - Dispositif a semiconducteur - Google Patents

Info

Links

Classifications

Landscapes

Priority Applications (2)

Applications Claiming Priority (2)

Publications (1)

Family

ID=16769748

Family Applications (1)

Country Status (3)

Cited By (2)

Families Citing this family (9)

Citations (8)

Family Cites Families (4)

Patent Citations (8)

Cited By (2)

Also Published As

Similar Documents

Legal Events