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US9271008B2 - Video encoding apparatus and method, video encoding program, and storage medium which stores the program - Google Patents

Video encoding apparatus and method, video encoding program, and storage medium which stores the program Download PDF

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US9271008B2
US9271008B2 US12/667,650 US66765008A US9271008B2 US 9271008 B2 US9271008 B2 US 9271008B2 US 66765008 A US66765008 A US 66765008A US 9271008 B2 US9271008 B2 US 9271008B2
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prediction error
step size
amount
upper limit
quantization step
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US20110013693A1 (en
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Atsushi Shimizu
Yasuyuki Nakajima
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Nippon Telegraph and Telephone Corp
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/436—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation using parallelised computational arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
    • H04N19/124—Quantisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
    • H04N19/136—Incoming video signal characteristics or properties
    • H04N19/137—Motion inside a coding unit, e.g. average field, frame or block difference
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
    • H04N19/146—Data rate or code amount at the encoder output
    • H04N19/149—Data rate or code amount at the encoder output by estimating the code amount by means of a model, e.g. mathematical model or statistical model
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
    • H04N19/146—Data rate or code amount at the encoder output
    • H04N19/15—Data rate or code amount at the encoder output by monitoring actual compressed data size at the memory before deciding storage at the transmission buffer
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
    • H04N19/146—Data rate or code amount at the encoder output
    • H04N19/152—Data rate or code amount at the encoder output by measuring the fullness of the transmission buffer
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
    • H04N19/61—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding

Definitions

  • the present invention relates to a video encoding apparatus and a corresponding method for applying orthogonal transformation to a prediction error signal between a video signal of an encoding target area and a predicted signal thereof, and quantizing an obtained orthogonal transformation coefficient by using a quantization step size so as to encode the coefficient, and also relates to a video encoding program used for implementing the video encoding apparatus and a storage medium which stores the program.
  • the present invention relates to a video encoding apparatus and a corresponding method, which do not require re-encoding or encoding which handles two or more encoding modes and implement encoding which generates codes less than an upper limit amount of code, a video encoding program used for implementing the video encoding apparatus, and a storage medium which stores the program.
  • the upper limit amount of code for one macroblock is determined (see, for example, Non-Patent Document 1).
  • a video encoding apparatus based on H.264 should perform encoding in a manner such that the amount of generated code generated for one macroblock does not exceed the above upper limit amount.
  • the amount of generated code is measured after encoding, and if the measured amount exceeds the upper limit, encoding should be again performed with revised encoding conditions.
  • encoding processes (orthogonal transformation, quantization, information source encoding, and the like) corresponding to two or more encoding modes to which different encoding conditions are assigned are simultaneously executed, and one which produces an encoding result whose amount of generated code does not exceed the relevant upper limit is selected.
  • H.264 employs a pulse code modulation (PCM) mode in which the pixel value is directly transmitted without compression (i.e., without quantization).
  • PCM pulse code modulation
  • encoding is executed after determining the encoding mode, and the amount of code generated in the encoding is measured. If the measured value exceeds an upper limit, re-encoding is performed in the PCM mode.
  • an arithmetic coding method employed in H.264 has a feature such that the amount of code cannot be instantaneously measured.
  • Non-Patent Document 2 relating to hardware devices for performing pipeline operation for macroblocks as units, when there is a macroblock whose number of bits exceeds an upper limit, not the input image of the macroblock but a local decoded image thereof in the relevant encoder is re-encoded in the PCM mode.
  • encoding should be performed in a manner such that the amount of code generated for one macroblock is within a specific upper limit.
  • the amount of generated code is measured after an encoding process, and if the amount of generated code exceeds a specific upper limit, re-encoding may be performed with revised encoding conditions.
  • encoding is performed after determining the encoding mode, and the amount of code generated in the encoding is measured. If the measured value exceeds an upper limit, re-encoding is performed in the PCM mode.
  • the arithmetic coding method employed in H.264 has a feature such that the amount of code cannot be instantaneously measured, and thus a processing delay occurs in a hardware device which executes a pipeline operation.
  • an object of the present invention is to provide a novel image encoding technique which does not require re-encoding or encoding corresponding to two or more encoding modes, and implements an encoding whose amount of generated code does not exceed an upper limit without awaiting a measured result of the amount of generated code.
  • the present invention provides a video encoding apparatus for applying orthogonal transformation to a prediction error signal between a video signal of an encoding target area and a predicted signal for the video signal, and quantizing an obtained orthogonal transformation coefficient by using a preset quantization step size so as to encode the coefficient.
  • the apparatus comprises:
  • processing devices can also be implemented by a computer program.
  • a computer program may be provided by storing it in an appropriate computer-readable storage medium, or by means of a network, and can be installed and operate on a control device such as a CPU so as to implement the present invention.
  • an approximate amount of generated code can be estimated.
  • a prediction error power which is a power of the prediction error signal (as an encoding target) is computed. Based on the computed prediction error power and the quantization step size to be used in the encoding, an amount of code generated when performing the quantization using the quantization step size to be used in the encoding is estimated. The estimated value is compared with the relevant upper limit of the amount of generated code, so that it can be determined whether or not the amount of code generated when performing quantization using the quantization step size to be used in the encoding exceeds the upper limit.
  • the amount of generated code is directly estimated.
  • the determination process is equivalent to a process for determining whether or not the prediction error power is within a permissive power range defined based on the upper limit of the amount of generated code.
  • a permissive power for the prediction error power is computed based on the upper limit of the amount of generated code and the quantization step size to be used in the encoding, and the permissive power is compared with the computed prediction error power so as to determine whether or not the amount of code generated when performing the quantization using the quantization step size to be used in the encoding exceeds the upper limit.
  • the estimated value for the amount of generated code or the permissive power for the prediction error power, which is used in the determination process, can be easily computed by means of a function or a table.
  • the permissive power for the prediction error power by setting variables of a function, which are the upper limit of the amount of generated code and the quantization step size, to the values of the upper limit and the quantization step size, where the value of the function is the permissive power for the prediction error power. It is also possible to compute the permissive power for the prediction error power by referring to a table in which a relationship between data values of the upper limit of the amount of generated code, the quantization step size, and the permissive power for the prediction error power is defined.
  • a quantized value of the orthogonal transformation coefficient may not be encoded, but the video signal may be encoded without quantizing the video signal; and (ii) in a second example, a quantization step size may be obtained, which is computed based on the prediction error power and the upper limit of the amount of generated code and implements generation of the amount of code which does not exceed the upper limit, and the quantization step size may be switched from the quantization step size to be used in the encoding to the obtained quantization step size.
  • the computation of the quantization step size used in the above switching operation is implemented using an inverse function of the function which is used for the above-described estimation of the amount of generated code. Therefore, also in this case, the relevant quantization step size can be easily computed using a function or a table.
  • the present invention can be applied to an apparatus for applying orthogonal transformation to a prediction error signal between a video signal of an encoding target area and a predicted signal for the video signal, and quantizing an obtained orthogonal transformation coefficient by using a quantization step size so as to encode the coefficient.
  • the present invention can implement encoding which generates codes less than an upper limit amount of code, without measuring the amount of generated code. Therefore, the present invention does not require re-encoding or encoding which handles two or more encoding modes and can implement the encoding which generates codes less than the upper limit amount of code.
  • the present invention can implement an encoding whose amount of generated code does not exceed an upper limit without awaiting a measured result of the amount of generated code, no processing delay occurs in a hardware device which executes a pipeline operation.
  • FIG. 1 is a diagram showing a video encoding apparatus as an embodiment of the present invention.
  • FIG. 2 is a diagram showing an example structure of the code amount estimator in the embodiment.
  • FIG. 3 is a diagram showing an example structure of the quantization step size computation unit in the embodiment.
  • FIG. 4 is a flowchart executed by the video encoding apparatus of the embodiment.
  • FIG. 5A is also a flowchart executed by the video encoding apparatus.
  • FIG. 5B is also a flowchart executed by the video encoding apparatus.
  • FIG. 6 is a diagram showing another example structure of the code amount estimator in the embodiment.
  • FIG. 7 is a flowchart executed by the video encoding apparatus employing the structure in FIG. 6 .
  • FIG. 8A is also a flowchart executed by the video encoding apparatus.
  • FIG. 8B is also a flowchart executed by the video encoding apparatus.
  • FIG. 9 is a diagram showing a video encoding apparatus as another embodiment of the present invention.
  • FIG. 10 is a flowchart executed by the video encoding apparatus of the embodiment.
  • FIG. 11 is another flowchart executed by the video encoding apparatus of the embodiment.
  • FIG. 12 is a diagram showing an example structure of the generated code amount estimator.
  • FIG. 13 is a diagram showing another example structure of the generated code amount estimator.
  • FIG. 14 is a diagram showing an example structure of the permissive prediction error power computation unit.
  • FIG. 15 is a diagram showing another example structure of the permissive prediction error power computation unit.
  • FIG. 16 is a diagram showing an example structure of the quantization step size computation unit.
  • FIG. 17 is a diagram showing another example structure of the quantization step size computation unit.
  • FIG. 18 is a flowchart explaining a conventional technique.
  • FIG. 1 shows a video encoding apparatus as an embodiment of the present invention.
  • reference numeral 10 indicates a structural part (surrounded by a dotted line) as an H.264 video encoding apparatus based on H.264
  • reference numeral 20 indicates a code amount estimator provided for implementing the present invention
  • reference numeral 21 indicates a quantization step size computation unit provided for implementing the present invention
  • reference numeral 22 indicates a selector switch for implementing the present invention.
  • the part 10 as the H.264 video encoding apparatus includes a motion detector 100 , a motion compensator 101 , a frame memory 102 , an interframe prediction mode determination unit 103 , an intraframe prediction mode determination unit 104 , a selector switch 105 , a subtractor 106 , an orthogonal transformer 107 , a quantizer 108 , a quantization controller 109 , an inverse quantizer 110 , an inverse orthogonal transformer 111 , an adder 112 , a loop filter 113 , and an information source encoder 114 .
  • the orthogonal transformer 107 subjects the generated prediction error signal to orthogonal transformation.
  • the quantizer 108 quantizes orthogonal transformation coefficients obtained by the orthogonal transformation.
  • the information source encoder 114 subjects the quantized values to entropy encoding so as to encode the video signal.
  • FIG. 2 shows an example structure of the code amount estimator 20 .
  • the code amount estimator 20 receives an upper limit value of the amount of code generated for the relevant macroblock (i.e., an upper limit amount of code), the prediction error signal generated by the subtractor 106 , and the quantization step size set by the quantization controller 109 , and includes a prediction error (electric) power computation unit 200 , a generated code amount estimator 201 , and a code amount comparator 202 .
  • the prediction error power computation unit 200 computes a prediction error power, which is a power of the prediction error signal generated by the subtractor 106 .
  • the generated code amount estimator 201 estimates an amount of code generated when quantizing the encoding target macroblock by the relevant quantization step size.
  • the code amount comparator 202 compares the estimated amount of generated code obtained by the generated code amount estimator 201 with the upper limit (defined in H.264) for the amount of code generated for the macroblock. If the estimated amount of generated code obtained by the generated code amount estimator 201 is greater than the upper limit for the amount of code generated for the macroblock, the code amount comparator 202 directs the selector switch 22 to switch the quantization step size supplied to the quantizer 108 from the quantization step size set by the quantization controller 109 to a quantization step size computed by the quantization step size computation unit 21 .
  • the code amount comparator 202 directs the selector switch 22 to switch the quantization step size supplied to the quantizer 108 from the quantization step size set by the quantization controller 109 to a quantization step size computed by the quantization step size computation unit 21 .
  • the code amount comparator 202 directs the selector switch 22 to directly use the quantization step size set by the quantization controller 109 as the quantization step size supplied to the quantizer 108 .
  • FIG. 3 shows an example structure of the quantization step size computation unit 21 .
  • the quantization step size computation unit 21 receives the upper limit value of the amount of code generated for the relevant macroblock (i.e., the upper limit amount of code) and the prediction error signal generated by the subtractor 106 , and includes a prediction error (electric) power computation unit 210 and a minimum quantization step size computation unit 211 .
  • the prediction error power computation unit 210 computes a prediction error power, which is a power of the prediction error signal generated by the subtractor 106 .
  • the minimum quantization step size computation unit 211 computes a quantization step size for implementing code amount generation which does not exceed the upper limit (i.e., a minimum quantization step size).
  • FIGS. 4 to 5B show flowcharts executed by the video encoding apparatus of the present embodiment.
  • the encoding mode is determined in the first step S 10 .
  • the amount of code generated when performing the encoding by using the currently-set quantization step size is estimated.
  • next step S 12 it is determined whether or not the estimated amount of code generated for the relevant macroblock is greater than the upper limit defined therefor. If it is determined that the estimated amount is greater than the upper limit, the operation proceeds to step S 13 , where the quantization step size is changed. In the next step S 14 , encoding is performed using the newly-set quantization step size.
  • step S 12 If it is determined in the determination of step S 12 that the estimated amount is smaller than or equal to the upper limit, the operation directly proceeds to step S 14 by skipping step S 13 , and encoding is performed using the currently-set quantization step size.
  • FIG. 5A is a flowchart of the process of estimating the amount of generated code in step S 11
  • FIG. 5B is a flowchart of the process of changing the quantization step size in step S 13 .
  • step S 11 the prediction error signal is received so as to compute the prediction error power (see first step S 110 ), and in the next step S 111 , the currently-set quantization step size is received.
  • the next step S 112 based on the computed prediction error power and the received quantization step size, the amount of code generated when performing the encoding by using the currently-set quantization step size is estimated.
  • step S 13 the upper limit value of the amount of code generated for the relevant macroblock (i.e., the upper limit amount of code) is received in the first step S 130 , and in the next step S 131 , the prediction error signal is received so as to compute the prediction error power.
  • the next step S 132 based on the received upper limit of the amount of generated code and the computed prediction error power, a quantization step size for implementing the code amount generation which does not exceed the upper limit is computed.
  • the quantization step size used in the relevant encoding is changed.
  • the video encoding apparatus shown in FIG. 1 estimates the amount of code generated when performing the encoding using the currently-set quantization step size, based on a relationship between the amount of generated code and the quantization step size. If the estimated value is greater than the upper limit for the amount of code generated for the relevant macroblock, a quantization step size for implementing the code amount generation which does not exceed the upper limit is computed, and the quantization step size used in the encoding is changed to the computed value.
  • re-encoding or encoding corresponding to two or more encoding modes is unnecessary, and an encoding whose amount of generated code does not exceed an upper limit can be implemented without awaiting a measured result of the amount of generated code.
  • FIG. 6 shows another example structure of the code amount estimator 20 .
  • the code amount estimator 20 receives an upper limit value of the amount of code generated for the relevant macroblock (i.e., an upper limit amount of code), the prediction error signal generated by the subtractor 106 , and the quantization step size set by the quantization controller 109 , and includes a prediction error power computation unit 200 , a permissive prediction error power computation unit 203 , and a prediction error comparator 204 .
  • the prediction error power computation unit 200 computes a prediction error power, which is a power of the prediction error signal generated by the subtractor 106 .
  • the permissive prediction error power computation unit 203 computes a permissive power of the prediction error power (i.e., permissive prediction error power) based on the upper limit of the amount of code generated for the macroblock and the quantization step size set by the quantization controller 109 .
  • the prediction error comparator 204 compares the prediction error power computed by the prediction error power computation unit 200 with the permissive prediction error power computed by the permissive prediction error power computation unit 203 . If the prediction error power computed by the prediction error power computation unit 200 is larger than the permissive prediction error power computed by the permissive prediction error power computation unit 203 , the prediction error comparator 204 directs the selector switch 22 to switch the quantization step size supplied to the quantizer 108 from the quantization step size set by the quantization controller 109 to a quantization step size computed by the quantization step size computation unit 21 .
  • the prediction error comparator 204 directs the selector switch 22 to directly use the quantization step size set by the quantization controller 109 as the quantization step size supplied to the quantizer 108 .
  • FIGS. 7 to 8B show flowcharts executed by the video encoding apparatus of the present embodiment when the code amount estimator 20 has the structure as shown in FIG. 6 .
  • the video encoding apparatus of the present embodiment determines the encoding mode in the first step S 20 .
  • the permissive prediction error power as a permissive power of the prediction error power is computed.
  • next step S 22 it is determined whether or not the prediction error power is larger than the permissive prediction error power. If it is determined that the prediction error power is larger than the permissive power, the operation proceeds to step S 23 , where the quantization step size is changed. In the next step S 24 , encoding is performed using the newly-set quantization step size.
  • step S 21 when computing the permissive prediction error power in step S 21 , the prediction error power used in step S 22 is also computed.
  • step S 22 If it is determined in the determination of step S 22 that the prediction error power is smaller than or equal to the permissive prediction error power, the operation directly proceeds to step S 24 by skipping step S 23 , and encoding is performed using the currently-set quantization step size.
  • FIG. 8A is a flowchart of the process of computing the permissive prediction error power in step S 21
  • FIG. 8B is a flowchart of the process of changing the quantization step size in step S 23 .
  • step S 21 the prediction error signal is received so as to compute the prediction error power (see first step S 210 ), and in the next step S 211 , the upper limit of the amount of code generated for the macroblock (i.e., the upper limit amount of code) is received.
  • the next step S 212 the currently-set quantization step size is received, and in the next step S 213 , the permissive prediction error power is computed based on the received upper limit of the amount of generated code and the received quantization step size.
  • step S 23 the upper limit value of the amount of code generated for the macroblock (i.e., the upper limit amount of code) is received in the first step S 230 , and in the next step S 231 , the prediction error signal is received so as to compute the prediction error power.
  • the next step S 232 based on the received upper limit of the amount of generated code and the computed prediction error power, a quantization step size for implementing the code amount generation which does not exceed the upper limit is computed.
  • the quantization step size used in the relevant encoding is changed.
  • the video encoding apparatus shown in FIG. 1 determines based on the permissive power of the prediction error power, which is derived by the upper limit of the amount of generated code and the quantization step size, whether or not the amount of code generated when performing the encoding by using the currently-set quantization step size exceeds the upper limit. If the relevant amount of generated code is greater than the upper limit, a quantization step size for implementing the code amount generation which does not exceed the upper limit is computed, and the quantization step size used in the encoding is changed to the computed value.
  • re-encoding or encoding corresponding to two or more encoding modes is unnecessary, and an encoding whose amount of generated code does not exceed an upper limit can be implemented without awaiting a measured result of the amount of generated code.
  • FIG. 9 shows another embodiment of the video encoding apparatus in accordance with the present invention.
  • parts identical to those explained in FIG. 1 are given identical reference numerals.
  • reference numeral 10 indicates a structural part (surrounded by a dotted line) as an H.264 video encoding apparatus based on H.264
  • reference numeral 30 indicates a code amount estimator provided for implementing the present invention
  • reference numeral 31 indicates a PCM encoder provided for implementing the present invention
  • reference numeral 32 indicates a selector switch for implementing the present invention.
  • the PCM encoder 31 subjects the relevant video signal as an encoding target to PCM encoding, without performing quantization, and outputs the encoded data via the selector switch 32 to the information source encoder 114 .
  • the code amount estimator 30 has a basic structure identical to that of the code amount estimator 20 in the embodiment shown in FIG. 1 , and may have a structure shown in FIG. 2 .
  • the code amount estimator 30 directs the selector switch 32 to supply the signal output from the PCM encoder 31 to the information source encoder 114 .
  • the code amount estimator 30 directs the selector switch 32 to supply the signal output from the quantizer 108 to the information source encoder 114 .
  • the video encoding apparatus of the present embodiment first determines the encoding mode (see the first step S 30 ).
  • the next step S 31 the amount of code generated when performing the encoding using the currently set quantization step size is estimated.
  • step S 32 it is determined whether or not the estimated amount of generated code is greater than the upper limit for the relevant amount of generated code. If it is determined that the estimated amount is greater than the upper limit, the operation proceeds to step S 33 , where the PCM encoding is executed. If it is determined that the estimated amount is smaller than or equal to the upper limit, the operation proceeds to step S 34 , where the ordinary encoding is executed.
  • the code amount estimator 30 may have the structure shown in FIG. 6 . In such a case, if the prediction error power is higher than a permissive prediction error power, the code amount estimator 30 directs the selector switch 32 to supply a signal output from the PCM encoder 31 to the information source encoder 114 . On the contrary, if the prediction error power is lower than or equal to the permissive prediction error power, the code amount estimator 30 directs the selector switch 32 to supply a signal output from the quantizer 108 to the information source encoder 114 .
  • the video encoding apparatus of the present embodiment first determines the encoding mode (see the first step S 40 ).
  • a permissive prediction error power as the permissive power for the prediction error power, is computed.
  • the video encoding apparatus of the present embodiment determines whether or not the amount of code generated when encoding is executed using the currently set quantization step size exceeds an upper limit defined therefore. If the amount of generated code exceeds the upper limit, PCM encoding is executed without performing quantization.
  • the code amount estimator 201 shown in FIG. 2 the permissive prediction error power computation unit 203 shown in FIG. 6 , and the minimum quantization step size computation unit 211 shown in FIG. 3 each can be implemented using a function or a look-up table.
  • the generated code amount estimator 201 in FIG. 2 has a plurality of functions (function 1 to function N) corresponding to a plurality of prediction modes, and one of the functions which is suitable for the prediction mode of the encoding target macroblock is selected and used.
  • the generated code amount estimator 201 in FIG. 2 has a plurality of look-up tables (LT 1 to LTN) corresponding to a plurality of prediction modes, and one of the look-up tables which is suitable for the prediction mode of the encoding target macroblock is selected and used.
  • the permissive prediction error power computation unit 203 in FIG. 6 has a plurality of functions (function 1 to function N) corresponding to a plurality of prediction modes, and one of the functions which is suitable for the prediction mode of the encoding target macroblock is selected and used.
  • the permissive prediction error power computation unit 203 in FIG. 6 has a plurality of look-up tables (LT 1 to LTN) corresponding to a plurality of prediction modes, and one of the look-up tables which is suitable for the prediction mode of the encoding target macroblock is selected and used.
  • the minimum quantization step size computation unit 211 shown in FIG. 3 has a plurality of functions (function 1 to function N) corresponding to a plurality of prediction modes, and one of the functions which is suitable for the prediction mode of the encoding target macroblock is selected and used.
  • the minimum quantization step size computation unit 211 shown in FIG. 3 has a plurality of look-up tables (LT 1 to LTN) corresponding to a plurality of prediction modes, and one of the look-up tables which is suitable for the prediction mode of the encoding target macroblock is selected and used.
  • the present invention can be applied to a video encoding apparatus for applying orthogonal transformation to a prediction error signal between a video signal of an encoding target area and a predicted signal for the video signal, and quantizing an obtained orthogonal transformation coefficient by using a quantization step size so as to encode the coefficient.
  • the present invention does not require re-encoding or encoding which handles two or more encoding modes and can implement encoding which generates codes less than an upper limit amount of code, without awaiting a measured result of the amount of generated code.

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US12/667,650 2007-07-17 2008-07-10 Video encoding apparatus and method, video encoding program, and storage medium which stores the program Active 2032-05-07 US9271008B2 (en)

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JP2007-185374 2007-07-17
JP2007185374 2007-07-17
PCT/JP2008/062484 WO2009011279A1 (fr) 2007-07-17 2008-07-10 Dispositif et procédé de codage vidéo, programme de codage vidéo, et support d'enregistrement contenant le programme

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Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG174323A1 (en) * 2009-03-23 2011-10-28 Ntt Docomo Inc Image predictive encoding device, image predictive encoding method, image predictive encoding program, image predictive decoding device, image predictive decoding method, and image predictive decoding program
CN101867799B (zh) * 2009-04-17 2011-11-16 北京大学 一种视频帧处理方法和视频编码器
JP5850214B2 (ja) 2011-01-11 2016-02-03 ソニー株式会社 画像処理装置および方法、プログラム、並びに記録媒体
UA109312C2 (uk) 2011-03-04 2015-08-10 Імпульсно-кодова модуляція з квантуванням при кодуванні відеоінформації
JP5873290B2 (ja) * 2011-10-26 2016-03-01 キヤノン株式会社 符号化装置
US8923388B2 (en) * 2011-11-21 2014-12-30 Texas Instruments Incorporated Early stage slice cap decision in video coding
JP2014003587A (ja) * 2012-05-25 2014-01-09 Canon Inc 画像符号化装置及びその方法
JP5850272B2 (ja) * 2014-01-10 2016-02-03 ソニー株式会社 画像処理装置および方法、プログラム、並びに記録媒体
JP6332502B2 (ja) * 2017-03-03 2018-05-30 ソニー株式会社 画像処理装置および方法、プログラム、並びに記録媒体
JP6299901B2 (ja) * 2017-03-03 2018-03-28 ソニー株式会社 画像処理装置および方法、プログラム、並びに記録媒体
TWI754206B (zh) * 2020-01-10 2022-02-01 祥碩科技股份有限公司 資料儲存系統、資料儲存裝置及其管理方法
US12087020B2 (en) 2021-09-15 2024-09-10 Synaptics Incorporated Image compression method and apparatus

Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0998427A (ja) 1995-09-29 1997-04-08 Toshiba Corp 動画像符号化装置
RU2123769C1 (ru) 1993-04-09 1998-12-20 Сони Корпорейшн Способы и устройства кодирования изображений и носители информации для записи изображений
JPH11331850A (ja) 1998-03-16 1999-11-30 Mitsubishi Electric Corp 動画像符号化方式
US6404933B1 (en) * 1997-06-02 2002-06-11 Nec Corporation Image encoding method and apparatus thereof
US20020136297A1 (en) 1998-03-16 2002-09-26 Toshiaki Shimada Moving picture encoding system
RU2217882C2 (ru) 1997-08-12 2003-11-27 Томсон Конзьюмер Электроникс, Инк. Устройство для сжатия блоков пикселов в системе обработки изображений
CA2491522A1 (fr) 2002-07-01 2004-01-08 E G Technology Inc. Compression et transport efficaces de video sur un reseau
US20050036698A1 (en) 2003-08-12 2005-02-17 Samsung Electronics Co., Ltd. Method of controlling encoding rate, method of transmitting video data, encoding rate controller for video encoder, and video data transmission system using the encoding rate controller
JP2005086249A (ja) 2003-09-04 2005-03-31 Toshiba Corp 動画像符号化方法および動画像符号化装置
US6961375B1 (en) * 1997-02-06 2005-11-01 Sony Corporation Picture coding device and method, picture transmitting device and method and recording medium
US6963608B1 (en) 1998-10-02 2005-11-08 General Instrument Corporation Method and apparatus for providing rate control in a video encoder
US20070133892A1 (en) 2005-12-09 2007-06-14 Takuma Chiba Image coding device, method and computer program
JP2007158430A (ja) 2005-11-30 2007-06-21 Matsushita Electric Ind Co Ltd 画像情報符号化装置
KR20070075585A (ko) 2006-01-13 2007-07-24 부산대학교 산학협력단 동영상 압축에서의 복원 오차 추정 방법 및 장치
RU2322770C2 (ru) 2002-04-23 2008-04-20 Нокиа Корпорейшн Способ и устройство для указания параметров квантователя в системе видеокодирования

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3416649B2 (ja) * 1998-01-21 2003-06-16 松下電器産業株式会社 可変長符号化装置
CN1194544C (zh) * 2003-04-25 2005-03-23 北京工业大学 基于时空域相关性运动矢量预测的视频编码方法

Patent Citations (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2123769C1 (ru) 1993-04-09 1998-12-20 Сони Корпорейшн Способы и устройства кодирования изображений и носители информации для записи изображений
JPH0998427A (ja) 1995-09-29 1997-04-08 Toshiba Corp 動画像符号化装置
US6961375B1 (en) * 1997-02-06 2005-11-01 Sony Corporation Picture coding device and method, picture transmitting device and method and recording medium
US6404933B1 (en) * 1997-06-02 2002-06-11 Nec Corporation Image encoding method and apparatus thereof
RU2217882C2 (ru) 1997-08-12 2003-11-27 Томсон Конзьюмер Электроникс, Инк. Устройство для сжатия блоков пикселов в системе обработки изображений
JPH11331850A (ja) 1998-03-16 1999-11-30 Mitsubishi Electric Corp 動画像符号化方式
US20020136297A1 (en) 1998-03-16 2002-09-26 Toshiaki Shimada Moving picture encoding system
US6963608B1 (en) 1998-10-02 2005-11-08 General Instrument Corporation Method and apparatus for providing rate control in a video encoder
RU2322770C2 (ru) 2002-04-23 2008-04-20 Нокиа Корпорейшн Способ и устройство для указания параметров квантователя в системе видеокодирования
CA2491522A1 (fr) 2002-07-01 2004-01-08 E G Technology Inc. Compression et transport efficaces de video sur un reseau
US20050036698A1 (en) 2003-08-12 2005-02-17 Samsung Electronics Co., Ltd. Method of controlling encoding rate, method of transmitting video data, encoding rate controller for video encoder, and video data transmission system using the encoding rate controller
JP2005086249A (ja) 2003-09-04 2005-03-31 Toshiba Corp 動画像符号化方法および動画像符号化装置
JP2007158430A (ja) 2005-11-30 2007-06-21 Matsushita Electric Ind Co Ltd 画像情報符号化装置
JP2007166039A (ja) 2005-12-09 2007-06-28 Matsushita Electric Ind Co Ltd 画像符号化装置
US20070133892A1 (en) 2005-12-09 2007-06-14 Takuma Chiba Image coding device, method and computer program
KR20070075585A (ko) 2006-01-13 2007-07-24 부산대학교 산학협력단 동영상 압축에서의 복원 오차 추정 방법 및 장치

Non-Patent Citations (7)

* Cited by examiner, † Cited by third party
Title
Hoang, Dzung T., et al., "Efficient Cost Measures for Motion Estimation at Low Bit Rates," IEEE Transactions on Circuits and Systems for Video Technology, vol. 8, No. 4, Aug. 1998, pp. 488-500.
ITU-T Rec.H.264, "Advanced video coding for generic audio visual services", pp. 249-256, 2005.
Keesman, Gertjan, et al., "Bit-rate control for MPEG encoders," Signal Processing: Image Communication, vol. 6, No. 6, Feb. 1995, pp. 545-560.
Keiichi Chono, Yuzo Senda, Yoshihiro Miyamoto, "A PCM Coding Method using Decoded Images for obeying the upper limit on the number of bits of MB in H.264 encoding", pp. 119-120, The Proceedings of the 21th Picture Coding Symposium of Japan, 2006.
Office Action, European Patent Application No. 08 791 042.8, Jan. 11, 2013.
Sullivan, Gary, "Seven Steps Toward a More Robust Codec Design," Joint Video Team (JVT) of ISO/IEC MPEG & ITU-T VCEG (ISO/IEC JTC1/SC29/WG11 and ITU-T SG16 Q.6), Doc. JVT-C117, 3rd Meeting: Fairfax, Virginia, May 6-10, 2002.
Summons to attend oral proceedings pursuant to Rule 115(1) EPC, European Patent Application No. 08 791 042.8, Apr. 10, 2015.

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JP4987080B2 (ja) 2012-07-25
CN101743754B (zh) 2012-04-18
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