US4282043A - Process for reducing the interdiffusion of conductors and/or semiconductors in contact with each other - Google Patents
Process for reducing the interdiffusion of conductors and/or semiconductors in contact with each other Download PDFInfo
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- US4282043A US4282043A US06/124,187 US12418780A US4282043A US 4282043 A US4282043 A US 4282043A US 12418780 A US12418780 A US 12418780A US 4282043 A US4282043 A US 4282043A
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- 239000004020 conductor Substances 0.000 title claims abstract description 27
- 238000000034 method Methods 0.000 title claims description 32
- 239000004065 semiconductor Substances 0.000 title abstract description 35
- 230000008569 process Effects 0.000 title description 7
- 239000000463 material Substances 0.000 claims abstract description 54
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 27
- 229910052737 gold Inorganic materials 0.000 claims description 27
- 239000010931 gold Substances 0.000 claims description 27
- 239000000203 mixture Substances 0.000 claims description 18
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 16
- 229910052804 chromium Inorganic materials 0.000 claims description 16
- 239000011651 chromium Substances 0.000 claims description 16
- UGFAIRIUMAVXCW-UHFFFAOYSA-N Carbon monoxide Chemical compound [O+]#[C-] UGFAIRIUMAVXCW-UHFFFAOYSA-N 0.000 claims description 12
- 229910002091 carbon monoxide Inorganic materials 0.000 claims description 12
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 12
- 239000000758 substrate Substances 0.000 claims description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 6
- 229910052697 platinum Inorganic materials 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical group [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 5
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 5
- 229910017052 cobalt Inorganic materials 0.000 claims description 5
- 239000010941 cobalt Substances 0.000 claims description 5
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 claims description 5
- 229910052802 copper Inorganic materials 0.000 claims description 5
- 239000010949 copper Substances 0.000 claims description 5
- 230000007423 decrease Effects 0.000 claims description 3
- 239000007789 gas Substances 0.000 description 15
- 229910052751 metal Inorganic materials 0.000 description 9
- 239000002184 metal Substances 0.000 description 9
- 150000002739 metals Chemical class 0.000 description 7
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
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- 238000013508 migration Methods 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 229910018404 Al2 O3 Inorganic materials 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 229910001092 metal group alloy Inorganic materials 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 230000037361 pathway Effects 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- -1 chromium Chemical compound 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000001627 detrimental effect Effects 0.000 description 1
- QDOXWKRWXJOMAK-UHFFFAOYSA-N dichromium trioxide Chemical compound O=[Cr]O[Cr]=O QDOXWKRWXJOMAK-UHFFFAOYSA-N 0.000 description 1
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- 238000003379 elimination reaction Methods 0.000 description 1
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- 238000004519 manufacturing process Methods 0.000 description 1
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- 229920005591 polysilicon Polymers 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000004611 spectroscopical analysis Methods 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/12—All metal or with adjacent metals
- Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
- Y10T428/12771—Transition metal-base component
- Y10T428/12861—Group VIII or IB metal-base component
- Y10T428/12889—Au-base component
Definitions
- the present invention is concerned with reducing the interdiffusion when subjected to elevated temperatures of a metallic-type electrical conductor or semiconductor and a second and different metallic-type electrical conductor or semiconductor which are in intimate contact with each other.
- the process of the present invention is suitable for various processing steps or preparing an article which involves elevated temperatures and is also suitable for preventing interdiffusion during the operation of an article at elevated temperatures.
- the process of the present invention is especially advantageous for use during the fabrication of metallic contacts to metallic-type conductors and/or semiconductors, and particularly when shallow junctions or interfaces are involved.
- the present invention is particularly concerned with employing certain controlled gaseous atmospheres during the time the article being treated is subjected to elevated temperatures.
- Typical semiconductor devices are multilayer structures which include a substrate of a semiconductor upon which is provided an intermediate layer of a conductor or semiconductor on top of which is provided another conductor or semiconductor layer of a material different from that of the intermediate layer.
- electrical contacts are normally provided on at least the top surface of the upper layer.
- electrical contact might be provided on the underside of the semiconductor substrate.
- This type of procedure is conducive to interdiffusion or migration of the interface of the material of the intermediate layers and the material of the top layer.
- This interdiffusion in turn, can result in material from the intermediate layer contaminating the top surface of the upper layer thereby significantly altering the electrical characteristics of the article.
- This can also result in the material from the top layer migrating all the way to the underside of the semiconductor substrate, thereby causing short circuiting.
- the heating is normally carried out in an inert atmosphere.
- the problem of interdiffusion still persists and is especially detrimental when preparing devices having shallow junctions or interfaces.
- the present invention is concerned with reducing the interdiffusion when subjected to elevated temperatures of a first metallic-type conductor or semiconductor and a second and different metallic-type electrical conductor or semiconductor which is adjacent to and in intimate contact with the first metallic-type electrical conductor and/or semiconductor.
- the first metallic-type electrical conductor and/or semiconductor and the second and different metallic-type electrical conductor and/or semiconductor have different electronegativities.
- the electronegativity of a material is the measure of the ability of the material to attract electrons. The greater the ability, the higher the electronegativity of the material.
- metal-type refers to electronically conductive metals, electrically conductive mixtures of metals, electrically conductive metal alloys, as well as nonmetallic materials, such as highly doped polycrystalline silicon or intermetallic silicides which, nevertheless, have electrical conductivities of the magnitude generally possessed by metals.
- the process of the present invention comprises subjecting or exposing at least one surface of at least one of the metallic-type electrical conductors or semiconductors when at elevated temperature to a gas.
- the gas contains at least one type of molecule which changes the surface potential of the exposed metallic-type conductor and/or semiconductor by increasing its work function when it is more electronegative than the other metallic-type conductor and semiconductor or by decreasing its work function when it is less electro-negative than the other metallic-type conductor or semiconductor, thereby reducing the interdiffusion of the conductors and/or semiconductors.
- the work function is the theshold energy needed to release the electron from the surface.
- Work function can be measured by the energy of light needed to cause release of an electron from the surface of a particular material according to procedure specified in B. Gysae and S. Wagener; Z. Physik, 115,296 (1940); and J. C. P. Mignolet: Discussions Faraday Society, 8, 326 (1950).
- FIGS. 1 and 2 are graphs illustrating the backscattering results obtained by subjecting Au--Cr--Al 2 O 3 structures to elevated temperatures in different atmospheres.
- the structures which are subjected to the process of the present invention include at least two layers adjacent to and in intimate contact with each other.
- One of the layers contains a first metallic-type electrical conductive material and/or semiconductor, while the other layer contains a second and different metallic-type electrical conductive material and/or semiconductor.
- the electronegativity of the first conductor and/or semiconductor is different from that of the second conductor and/or semiconductor.
- the metallic-type material can be an electrically conductive metal, mixture of electrically conductive metals, electrically conductive metallic alloys, as well as nonmetallic materials, such as highly doped polysilicon or intermetalic silicides which, nevertheless, have electrical conductivities of the magnitude generally possessed by metals.
- the metallic-type layer can contain nonconducting materials as long as such do not destroy the conductivity characteristics of the layer to an undesired extent.
- metallic-type materials advantageously processed according to the present invention include gold, chromium, cobalt, copper, palladium, platinum, and aluminum.
- the present invention also contemplates treatment of layers containing semiconductive materials, such as silicon, polycrystalline silicon, and GaAs. Moreover, the layers treated can contain mixtures of metallic type materials and semiconductors.
- the preferred structures treated according to the present invention include at least two layers which are adjacent each other and in intimate contact with each other wherein one of the layers is present on top of the layers.
- Most preferably the top layer is of a metallic-type material.
- Particular structures which are especially benefited by the present invention includes those which contain an upper layer of a metal which is very resistant to oxidation, expecially at elevated temperatures, such as gold, which is positioned on top of a layer of a different metallic-type material, such as chromium, cobalt or copper, or of a semiconductor, such as silicon, or polycrystalline silicon, or GaAs.
- the layers can contain mixtures or alloys of these metals. The process is most advantageous when the structures are of relatively thin layers, such as about 100 to about 5000 A thick, and preferably about 500 to about 3000 A thick.
- Semiconductor devices employing an upper layer of gold, an intermediate layer of one or more of the other metals or semiconductors mentioned hereinabove, and a substrate of a semiconductor, such as gallium arsenide are examples of devices which can be treated according to the present invention.
- metallic electrical contacts are provided on the top surface of the gold at preselected locations and sometimes at the underside of the semiconductor substrate whereby an electrical connection between the two can be provided by means of wire.
- This processing requires the use of elevated temperatures, such as at least about 100° C., and generally up to about 500° C. Most of the structures are prepared at temperatures of about 200° to about 350° C.
- the present invention is preferably concerned with treating those structures wherein the top surface is of a polycrystalline-type material.
- the gold inherently forms polycrystalline structure when prepared according to vacuum deposition in the film thicknesses experienced according to the present invention.
- the interdiffusion can further cause the gold to migrate through the intermediate layer and through the semiconductive substrate, thereby causing short circuiting.
- the relative amount of the gas in the mixture which changes the surface potential in the manner desired is sufficient so that the effect of the mixture of gases is such as to change the surface potential in the desired manner or direction (i.e.--decrease or increase the work function as required).
- the preferred structures treated according to the present invention are preferably treated by positioning the structure in a chamber with the supporting substrate facing downward on a support and the top surface of the upper layer facing upwards with the gas being supplied through the chamber.
- the gas upon contact with the upper surface of a polycrystalline layer, such as gold, will diffuse rapidly down to the interface, since the grain boundaries of the polycrystalline structure tend to act as pathways.
- the structures are subjected to elevated temperatures at any one time for a few minutes to about two hours, and more usually from about 10 minutes to about 1 hour under normal processing and/or operating conditions.
- a structure having a substrate of Al 2 O 3 upon which is provided a layer of about 2000 to about 3000 A chromium and a vapor deposited layer of about 2000 to about 3000 A of gold on the chromium is provided.
- the structure (the gold facing upward) is subjected to temperatures of about 250° C. for one hour in a mixture of about 1:1 volume ratio of air and carbon monoxide.
- the structure is tested for interdiffusion by using He + - ion backscattering spectrometry. This procedure involves counting the number of He + ions reflected back from the sample using He + at 2.8 MeV. and the counts times 10 -3 are plotted against the channel number and reproduced in FIG. 1. Also plotted in FIG. 1 is the backscattering data achieved from the same structure which has not been subjected to the elevated temperatures. As seen from FIG. 1, the 1:1 ratio of air and carbon monoxide resulted in completely stopping the interdiffusion.
- Example I is repeated except that the structure is heated in air for 1 hour at 250° C.
- the results obtained are presented in FIG. 2, and as apparent from FIG. 2, a comparison of that treatment with the reference shows a significant interdiffusion of the gold and chromium. Note the yield between the 300 and 400 channel numbers. As noted, for the reference within that range, the yield is about 0. On the other hand, significant yields are obtained when the heating is carried out in air.
- Example I is repeated except that the structure is heated in a mixture of about 5 parts by volume of air per 1 part by volume carbon monoxide at 250° C. for about 1 hour.
- the results obtained are shown in FIG. 2.
- the air and carbon monoxide mixture of 5:1 resulted in some reduction of the interdiffusion of the gold and chromium, but not the complete elimination of such as achieved by a ratio of 1:1 of air and carbon monoxide.
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Abstract
The interdiffusion at the interface between a metallic-type conductor or semiconductor and a second metallic-type conductor or semiconductor in intimate contact therewith due to elevated temperatures is reduced by subjecting a surface of at least one of the materials when at an elevated temperature to a gas which contains at least one component which changes the surface potential and work function of the surface which is subjected to the gas in a direction according to the relative electronegativities of the materials.
Description
1. Technical Field
The present invention is concerned with reducing the interdiffusion when subjected to elevated temperatures of a metallic-type electrical conductor or semiconductor and a second and different metallic-type electrical conductor or semiconductor which are in intimate contact with each other. The process of the present invention is suitable for various processing steps or preparing an article which involves elevated temperatures and is also suitable for preventing interdiffusion during the operation of an article at elevated temperatures.
The process of the present invention is especially advantageous for use during the fabrication of metallic contacts to metallic-type conductors and/or semiconductors, and particularly when shallow junctions or interfaces are involved. The present invention is particularly concerned with employing certain controlled gaseous atmospheres during the time the article being treated is subjected to elevated temperatures.
2. Background Art
Typical semiconductor devices are multilayer structures which include a substrate of a semiconductor upon which is provided an intermediate layer of a conductor or semiconductor on top of which is provided another conductor or semiconductor layer of a material different from that of the intermediate layer. In addition, electrical contacts are normally provided on at least the top surface of the upper layer. Also, electrical contact might be provided on the underside of the semiconductor substrate. These electrical contacts are usually provided by subjecting the multilayer structure and material for the contacts to elevated temperatures to cause fusion of the materials.
This type of procedure, however, is conducive to interdiffusion or migration of the interface of the material of the intermediate layers and the material of the top layer. This interdiffusion, in turn, can result in material from the intermediate layer contaminating the top surface of the upper layer thereby significantly altering the electrical characteristics of the article. This can also result in the material from the top layer migrating all the way to the underside of the semiconductor substrate, thereby causing short circuiting.
In order to minimize the interdiffusion, the heating is normally carried out in an inert atmosphere. However, the problem of interdiffusion still persists and is especially detrimental when preparing devices having shallow junctions or interfaces.
In addition, when various semiconductor devices are operated, depending upon their particular intended use, they may be subjected to very high temperatures. Thus, the operation, when at elevated temperature and depending upon the environment, can eventually result in failure of the device due to interdiffusion of adjacent conductive and/or semiconductive layers.
The present invention is concerned with reducing the interdiffusion when subjected to elevated temperatures of a first metallic-type conductor or semiconductor and a second and different metallic-type electrical conductor or semiconductor which is adjacent to and in intimate contact with the first metallic-type electrical conductor and/or semiconductor. The first metallic-type electrical conductor and/or semiconductor and the second and different metallic-type electrical conductor and/or semiconductor have different electronegativities. The electronegativity of a material is the measure of the ability of the material to attract electrons. The greater the ability, the higher the electronegativity of the material.
The term "metallic-type" as used herein refers to electronically conductive metals, electrically conductive mixtures of metals, electrically conductive metal alloys, as well as nonmetallic materials, such as highly doped polycrystalline silicon or intermetallic silicides which, nevertheless, have electrical conductivities of the magnitude generally possessed by metals.
The process of the present invention comprises subjecting or exposing at least one surface of at least one of the metallic-type electrical conductors or semiconductors when at elevated temperature to a gas. The gas contains at least one type of molecule which changes the surface potential of the exposed metallic-type conductor and/or semiconductor by increasing its work function when it is more electronegative than the other metallic-type conductor and semiconductor or by decreasing its work function when it is less electro-negative than the other metallic-type conductor or semiconductor, thereby reducing the interdiffusion of the conductors and/or semiconductors.
The work function is the theshold energy needed to release the electron from the surface. Work function can be measured by the energy of light needed to cause release of an electron from the surface of a particular material according to procedure specified in B. Gysae and S. Wagener; Z. Physik, 115,296 (1940); and J. C. P. Mignolet: Discussions Faraday Society, 8, 326 (1950).
FIGS. 1 and 2 are graphs illustrating the backscattering results obtained by subjecting Au--Cr--Al2 O3 structures to elevated temperatures in different atmospheres.
The structures which are subjected to the process of the present invention include at least two layers adjacent to and in intimate contact with each other. One of the layers contains a first metallic-type electrical conductive material and/or semiconductor, while the other layer contains a second and different metallic-type electrical conductive material and/or semiconductor. The electronegativity of the first conductor and/or semiconductor is different from that of the second conductor and/or semiconductor.
The metallic-type material can be an electrically conductive metal, mixture of electrically conductive metals, electrically conductive metallic alloys, as well as nonmetallic materials, such as highly doped polysilicon or intermetalic silicides which, nevertheless, have electrical conductivities of the magnitude generally possessed by metals. In addition, the metallic-type layer can contain nonconducting materials as long as such do not destroy the conductivity characteristics of the layer to an undesired extent.
Examples of some metallic-type materials advantageously processed according to the present invention include gold, chromium, cobalt, copper, palladium, platinum, and aluminum. The present invention also contemplates treatment of layers containing semiconductive materials, such as silicon, polycrystalline silicon, and GaAs. Moreover, the layers treated can contain mixtures of metallic type materials and semiconductors.
The preferred structures treated according to the present invention include at least two layers which are adjacent each other and in intimate contact with each other wherein one of the layers is present on top of the layers. Most preferably the top layer is of a metallic-type material.
Particular structures which are especially benefited by the present invention includes those which contain an upper layer of a metal which is very resistant to oxidation, expecially at elevated temperatures, such as gold, which is positioned on top of a layer of a different metallic-type material, such as chromium, cobalt or copper, or of a semiconductor, such as silicon, or polycrystalline silicon, or GaAs. When desired, the layers can contain mixtures or alloys of these metals. The process is most advantageous when the structures are of relatively thin layers, such as about 100 to about 5000 A thick, and preferably about 500 to about 3000 A thick.
Semiconductor devices employing an upper layer of gold, an intermediate layer of one or more of the other metals or semiconductors mentioned hereinabove, and a substrate of a semiconductor, such as gallium arsenide are examples of devices which can be treated according to the present invention. When fabricating such types of semiconductor devices, metallic electrical contacts are provided on the top surface of the gold at preselected locations and sometimes at the underside of the semiconductor substrate whereby an electrical connection between the two can be provided by means of wire. This processing requires the use of elevated temperatures, such as at least about 100° C., and generally up to about 500° C. Most of the structures are prepared at temperatures of about 200° to about 350° C.
However, as discussed hereinabove, when such structures are subjected to these elevated temperatures, interdiffusion at the interface between the gold, and the underlying layer, such as chromium, tends to occur. With respect to a structure which includes gold as the top surface and chromium as the intermediate or underlying layer, once interdiffusion takes place, the chromium tends to quickly migrate to the top surface of the gold, thereby causing problems with respect to reliability of the device.
For instance, since chromium is much more susceptible to oxidation than is gold, this migration could eventually result in formation of areas of chrome oxide on the top surface which would act as an insulator and hinder electrical contact with the top surface.
Migration through the gold is accelerated, since the gold layer as normally deposited by vapor deposition is polycrystalline, thereby providing pathways for the chromium or other material to migrate. Accordingly, the present invention is preferably concerned with treating those structures wherein the top surface is of a polycrystalline-type material. The gold inherently forms polycrystalline structure when prepared according to vacuum deposition in the film thicknesses experienced according to the present invention.
In addition, the interdiffusion can further cause the gold to migrate through the intermediate layer and through the semiconductive substrate, thereby causing short circuiting.
In order to minimize and, preferably, substantially eliminate this interdiffusion at the interface, it has been discovered, according to the present invention, that when the structure is subjected to elevated temperatures (e.g. about 100° C. and above), at least one surface of at least one of the metallic-type electrical conductors or semiconductors, and preferably at least the top surface of the upper layer, is exposed to a gas, wherein the gas contains at least one type of molecule which changes the surface potential of the layer exposed to the gas by increasing its work function when it is more electronegative than the layer adjacent it, or which decreases its work function when it is less electronegative than the layer adjacent it.
When the gas is a mixture of gases, the relative amount of the gas in the mixture which changes the surface potential in the manner desired is sufficient so that the effect of the mixture of gases is such as to change the surface potential in the desired manner or direction (i.e.--decrease or increase the work function as required).
The determination of whether a particular gas or mixture of gases increases or decreases the work function of a particular surface can be readily determined by persons skilled in the art by the techniques referred to hereinabove. In addition, many gases have already been tested and reported as to the manner in which such alter the work function of particular materials. Along these lines, see Somorjai, G,A.--Principles of Surface Chemistry, Prentice-Hall, Inc., Englewood Cliffs, N.J. (1972), pages 249, 158, and 159, disclosure of which is incorporated herein by reference.
The preferred structures treated according to the present invention are preferably treated by positioning the structure in a chamber with the supporting substrate facing downward on a support and the top surface of the upper layer facing upwards with the gas being supplied through the chamber. The gas upon contact with the upper surface of a polycrystalline layer, such as gold, will diffuse rapidly down to the interface, since the grain boundaries of the polycrystalline structure tend to act as pathways.
Normally, the structures are subjected to elevated temperatures at any one time for a few minutes to about two hours, and more usually from about 10 minutes to about 1 hour under normal processing and/or operating conditions.
It has been found, according to the present invention, that structures wherein the upper layer is gold and the intermediate layer is a material less electronegative than the gold, such as chromium, silicon, cobalt, and copper, that both carbon monoxide and hydrogen increase the work function of the gold layer and are suitable for carrying out the present invention. The carbon monoxide is much more effective than the hydrogen. In addition, it is noted that steam, air, and oxygen actually reduce the work function of the surface of the gold and, therefore, result in an increase in the interdiffusion of the gold and the material adjacent thereto.
It is desirable to use mixtures of carbon monoxide and another gas, such as air, so long as sufficient carbon monoxide is present in the mixture to effect the desired minimization of the interdiffusion. For instance, it was noted that a ratio of 1:1 air and carbon monoxide actually prevented the interdiffusion of gold and chromium.
In addition, it has been found, according to the present invention, that structures of platinum on top of a layer of material which is less electronegative than the platinum, such as chromium, can be processed according to the present invention employing oxygen or air. Oxygen and air actually increase the work function of platinum as opposed to its effect on the work function of gold.
In addition, certain preferred aspects of the present invention are also discussed in IBM Technical Disclosure Bulletin, Volume 21, No. 10, March 1979--"Passivating Process for the Thin Gold Layer on Silicon", by C. A. Chang, disclosure of which is incorporated herein by reference.
In order to further illustrate the present invention, the following examples are presented.
A structure having a substrate of Al2 O3 upon which is provided a layer of about 2000 to about 3000 A chromium and a vapor deposited layer of about 2000 to about 3000 A of gold on the chromium is provided. The structure (the gold facing upward) is subjected to temperatures of about 250° C. for one hour in a mixture of about 1:1 volume ratio of air and carbon monoxide. After this, the structure is tested for interdiffusion by using He+ - ion backscattering spectrometry. This procedure involves counting the number of He+ ions reflected back from the sample using He+ at 2.8 MeV. and the counts times 10-3 are plotted against the channel number and reproduced in FIG. 1. Also plotted in FIG. 1 is the backscattering data achieved from the same structure which has not been subjected to the elevated temperatures. As seen from FIG. 1, the 1:1 ratio of air and carbon monoxide resulted in completely stopping the interdiffusion.
Example I is repeated except that the structure is heated in air for 1 hour at 250° C. The results obtained are presented in FIG. 2, and as apparent from FIG. 2, a comparison of that treatment with the reference shows a significant interdiffusion of the gold and chromium. Note the yield between the 300 and 400 channel numbers. As noted, for the reference within that range, the yield is about 0. On the other hand, significant yields are obtained when the heating is carried out in air.
Example I is repeated except that the structure is heated in a mixture of about 5 parts by volume of air per 1 part by volume carbon monoxide at 250° C. for about 1 hour. The results obtained are shown in FIG. 2. As apparent from FIG. 2, the air and carbon monoxide mixture of 5:1 resulted in some reduction of the interdiffusion of the gold and chromium, but not the complete elimination of such as achieved by a ratio of 1:1 of air and carbon monoxide.
Claims (20)
1. A method for reducing the interdiffusion when at elevated temperature of a first material and a second material which is adjacent to and in intimate contact with the first material, wherein the electronegativity of the first material is different from the electronegativity of the second material, and wherein each of the first material and the second material is a metallic-type electrical conductive material or a semiconductive material or a mixture thereof which method comprises when at elevated temperature of at least about 100° C. exposing at least one surface of said first material containing CO or O2 or both, provided that the gas increases the work function of the first material when it is more electronegative than the second material or decreases the work function of the first material when it is less electronegative than the second material, and thereby reducing the interdiffusion of the first and second materials at their interface and at elevated temperature.
2. The method of claim 1 wherein the first material is located on top of the second material.
3. The method of claim 2 wherein said first material is a layer comprising a metallic-type electrical conductive material.
4. The method of claim 2 wherein the first and second materials are layers about 100 to about 5000 A thick.
5. The method of claim 2 wherein the first and second materials are layers about 500 to about 3000 A thick.
6. The method of claim 3 wherein said metallic-type electrical conductive material is polycrystalline gold.
7. The method of claim 6 wherein said second material is a layer of a material selected from the group of chromium, cobalt, copper, silicon, and mixtures thereof.
8. The method of claim 1 wherein said second material is a layer of a material selected from the group of chromium, cobalt, copper, silicon, and mixtures thereof.
9. The method of claim 2 wherein the second material is located on top of a semiconductive substrate.
10. The method of claim 9 wherein said substrate is gallium arsenide.
11. The method of claim 1 wherein said elevated temperature is at least about 100° C.
12. The method of claim 1 wherein said elevated temperature is up to about 500° C.
13. The method of claim 1 wherein said elevated temperature is about 200° to about 350° C.
14. The method of claim 7 wherein said gas is a mixture of carbon monoxide and air.
15. The method of claim 6 wherein said gas is a mixture of carbon monoxide and air in a ratio of about 1:1.
16. The method of claim 6 wherein said second material is less electronegative than said gold.
17. The method of claim 7 wherein said substrate is gallium arsenide.
18. The method of claim 3 wherein said metallic-type electrical conductive material is platinum.
19. The method of claim 18 wherein said second material is less electronegative than said platinum.
20. The method of claim 19 wherein the gas contains O2.
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/124,187 US4282043A (en) | 1980-02-25 | 1980-02-25 | Process for reducing the interdiffusion of conductors and/or semiconductors in contact with each other |
| JP276181A JPS56126920A (en) | 1980-02-25 | 1981-01-13 | Method of mutually reducing diffusion |
| DE8181101071T DE3176304D1 (en) | 1980-02-25 | 1981-02-16 | Process for reducing the interdiffusion of conductors and/or semiconductors in contact with each other |
| EP81101071A EP0034785B1 (en) | 1980-02-25 | 1981-02-16 | Process for reducing the interdiffusion of conductors and/or semiconductors in contact with each other |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/124,187 US4282043A (en) | 1980-02-25 | 1980-02-25 | Process for reducing the interdiffusion of conductors and/or semiconductors in contact with each other |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| US4282043A true US4282043A (en) | 1981-08-04 |
Family
ID=22413330
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US06/124,187 Expired - Lifetime US4282043A (en) | 1980-02-25 | 1980-02-25 | Process for reducing the interdiffusion of conductors and/or semiconductors in contact with each other |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US4282043A (en) |
| EP (1) | EP0034785B1 (en) |
| JP (1) | JPS56126920A (en) |
| DE (1) | DE3176304D1 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4350993A (en) * | 1980-06-16 | 1982-09-21 | The United States Of America As Represented By The Secretary Of The Navy | Heterojunction and Schottky barrier EBS targets |
| US4576659A (en) * | 1982-12-02 | 1986-03-18 | International Business Machines Corporation | Process for inhibiting metal migration during heat cycling of multilayer thin metal film structures |
| US4675243A (en) * | 1983-02-25 | 1987-06-23 | Shinko Electric Industries Co., Ltd. | Ceramic package for semiconductor devices |
| US4709252A (en) * | 1982-07-16 | 1987-11-24 | The United States Of America As Represented By The Administrator, National Aeronautics And Space Administration | Integrated photo-responsive metal oxide semiconductor circuit |
| US5374589A (en) * | 1994-04-05 | 1994-12-20 | The United States Of America As Represented By The Secretary Of The Navy | Process of making a bistable photoconductive component |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2184288A (en) * | 1985-12-16 | 1987-06-17 | Nat Semiconductor Corp | Oxidation inhibition of copper bonding pads using palladium |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3982908A (en) * | 1975-11-20 | 1976-09-28 | Rca Corporation | Nickel-gold-cobalt contact for silicon devices |
| US4065588A (en) * | 1975-11-20 | 1977-12-27 | Rca Corporation | Method of making gold-cobalt contact for silicon devices |
| US4110488A (en) * | 1976-04-09 | 1978-08-29 | Rca Corporation | Method for making schottky barrier diodes |
| US4172906A (en) * | 1977-05-11 | 1979-10-30 | Rockwell International Corporation | Method for passivating III-V compound semiconductors |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4183781A (en) * | 1978-09-25 | 1980-01-15 | International Business Machines Corporation | Stabilization process for aluminum microcircuits which have been reactive-ion etched |
-
1980
- 1980-02-25 US US06/124,187 patent/US4282043A/en not_active Expired - Lifetime
-
1981
- 1981-01-13 JP JP276181A patent/JPS56126920A/en active Granted
- 1981-02-16 DE DE8181101071T patent/DE3176304D1/en not_active Expired
- 1981-02-16 EP EP81101071A patent/EP0034785B1/en not_active Expired
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3982908A (en) * | 1975-11-20 | 1976-09-28 | Rca Corporation | Nickel-gold-cobalt contact for silicon devices |
| US4065588A (en) * | 1975-11-20 | 1977-12-27 | Rca Corporation | Method of making gold-cobalt contact for silicon devices |
| US4110488A (en) * | 1976-04-09 | 1978-08-29 | Rca Corporation | Method for making schottky barrier diodes |
| US4172906A (en) * | 1977-05-11 | 1979-10-30 | Rockwell International Corporation | Method for passivating III-V compound semiconductors |
Non-Patent Citations (5)
| Title |
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| C. A. Chang et al., Appl. Phys. Letts. 37 (1980) 161. * |
| C. A. Chang, J. Electrochem. Soc. 127 (1980) 1331. * |
| Hiraki et al. J. Appl. Phys. 43 (1972) 3643. * |
| Ho et al., IBM-TDB, 21 (1978) 1752. * |
| Ohkawa et al., Japan J. Appl. Phys. 14 (1975) 1589. * |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4350993A (en) * | 1980-06-16 | 1982-09-21 | The United States Of America As Represented By The Secretary Of The Navy | Heterojunction and Schottky barrier EBS targets |
| US4709252A (en) * | 1982-07-16 | 1987-11-24 | The United States Of America As Represented By The Administrator, National Aeronautics And Space Administration | Integrated photo-responsive metal oxide semiconductor circuit |
| US4576659A (en) * | 1982-12-02 | 1986-03-18 | International Business Machines Corporation | Process for inhibiting metal migration during heat cycling of multilayer thin metal film structures |
| US4675243A (en) * | 1983-02-25 | 1987-06-23 | Shinko Electric Industries Co., Ltd. | Ceramic package for semiconductor devices |
| US5374589A (en) * | 1994-04-05 | 1994-12-20 | The United States Of America As Represented By The Secretary Of The Navy | Process of making a bistable photoconductive component |
Also Published As
| Publication number | Publication date |
|---|---|
| EP0034785A2 (en) | 1981-09-02 |
| EP0034785A3 (en) | 1983-09-28 |
| EP0034785B1 (en) | 1987-07-08 |
| JPH0156524B2 (en) | 1989-11-30 |
| JPS56126920A (en) | 1981-10-05 |
| DE3176304D1 (en) | 1987-08-13 |
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