US3860878A

US3860878A - Temperature compensation circuit for a multi-frequency receiver

Info

Publication number: US3860878A
Application number: US348100A
Authority: US
Inventors: Yuji Tanaka; Matsuo Takaoka; Kazuhiro Gosho
Original assignee: Nitsuko Corp
Current assignee: NEC Platforms Ltd; Nippon Tsushin Kogyo KK
Priority date: 1973-01-13
Filing date: 1973-04-05
Publication date: 1975-01-14
Anticipated expiration: 1992-01-14
Also published as: JPS5241086B2; JPS49124904A

Abstract

A frequency detection circuit is driven by an input signal limiter circuit, which is temperature compensated by a zener diode having a negative temperature coefficient, and includes a threshold detection circuit, which is temperature compensated by a zener diode having a positive temperature coefficient.

Description

United States Patent 11 1 Tanaka et al.

1 1 Jan. 14, 1975 TEMPERATURE COMPENSATION CIRCUIT FOR A MULTI-FREQUENCY RECEIVER [75] Inventors: Yuji Tanaka; Matsuo Takaoka, both of Kawasaki; Kazuhiro Gosho, Yokohama, all of Japan [73] Assignees: Nippon Tsu Shin Kogyo K.K.,

Kanagawa-ken, Japan; TIE/Communications Inc., Stamford, Conn.

[22] Filed: Apr. 5, 1973 [21] Appl. No.: 348,100

[30] Foreign Application Priority Data Primary ExaminerAlfred L. Brody Attorney, Agent, or Firm-Kenyon & Kenyon Reilly Carr & Chapin [57] ABSTRACT A frequency detection circuit is driven by an input sig- Jan. 13,1973 Japan 48/12512 nal limiter circuit, which is temperature compensated by a zener diode having a negative temperature coeffi- 52 1 1 U S C 329/136 307/310 4 clent, and lncludes a threshold detection clrcuit, [51] Int Cl H03c 3/04 which is temperature compensated by a zener diode 53 Field 01 Search 329/110, 143, 136, 131; having a lmsmve temperature coefficien 307/310 3 Claims, 14 Drawing Figures l o-- LIMITER iNVERTER o 4 Vs i 202 Z0 5 PATEHTED JAN 1 4|975 SHEET 1 UF 3 INVERTER LIMITER PATENTED JAN 1 4|975 SHEET 2 BF 3 PATENTEB JAN 1 M975 SHEHSUFS INQ PN Q0 TEMPERATURE COMPENSATION CIRCUIT FOR A MULTI-FREQUENCY RECEIVER BACKGROUND OF THE INVENTION The invention relates to frequency detection circuits and in particular to frequency detection circuits for use in DTMF receivers for converting dual tone multifrequency (DTMF) dial signals into d-c contact closures.

Specifically, the invention relates to temperature compensation of such detection circuits to minimize recognition bandwidth variations with respect to temperature. In effecting such compensation conventionally, the capacitors and coils incorporated in the tuning circuit are selected to provide mutually complementary temperature coefficients. In addition, fixed voltages are utilized for establishing threshold levels in the circuit to obtain further improvement.

However, as a practical matter, selection of temperature coefficients of coils and capacitors alone does not eliminate variations in the recognition bandwidth because the temperature coefficients of the coils can not be exactly complementary to those of the capacitors. Moreover, zener diodes are utilized to obtain fixed the threshold levels. Since the diodes themselves exhibits a voltage breakdown characteristic which varies with respect to temperature, undesirable variations in the frequency recognition bandwidth result.

SUMMARY OF THE INVENTION It is, therefore, an object of the invention to provide a simple and inexpensive temperature compensated frequency detection circuit.

In accordance with one aspect of the invention, a frequency detection circuit comprises in combination means, including a zener diode, for regulating the output level of the input signal limiter circuit means driving the detection circuits, the zener diode having a negative temperature coefficient to compensate for the positive temperature coefficient of the limiter circuit.

In accordance with a second aspect of the invention, a frequency detecting circuit comprises means including a negative temperature coefficient zener diode for compensating the positive coefficients of elements of the detector circuits.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. I is an electrical schematic and block diagram of a temperature compensated frequency detection circuit constructed in accordance with the invention;

FIG. 2 is a graph illustrating the detection circuit recognition band displacement shown by the output level as a function of frequency at three temperatures;

FIG. 3 is a graph illustrating bandwidth variation resulting from changes in Q factor of the detection circuits tuning network, shown by the output level as a function of frequency at three temperatures;

FIG. 4 is a graph illustrating the output voltage as a function of temperature for the output of an uncompensated limiter circuit.

FIG. 5 is a graph illustrating the forward conducting voltage as a function of temperature for the diode D1 shown in FIG. 1;

FIG. 6 is a graph illustrating the base forward conducting voltage as a function of temperature for the transistor TRl shown in FIG. 1;

FIG. 7 is a graph illustrating the zener voltage as a function of temperature for the zener diode ZDI shown in FIG. 1;

FIG. 8 is a graph illustrating the zener voltage as a function of temperature for the zener diode ZD2 shown in FIG. 1;

FIG. 9 is a graph illustrating bandwidth variation of the detection circuit caused by threshold drift due to the temperature characteristics of the uncompensated limiter circuit;

FIG. 10 is a graph illustrating bandwidth variation of the detection circuit caused by threshold drift due to the temperature characteristics of the diode D1;

FIG. 11 is a graph illustrating the bandwidth variation of the detection circuit caused by threshold drift due to the temperature characteristics of transistor TRl;

FIG. 12 is a graph illustrating the bandwidth variation of the detection circuit caused by the compensating temperature characteristics of zener diode ZDl;

FIG. 13 is a graph illustrating the bandwidth variation of the detection circuit output caused by the compensating temperature characteristics of zener diode ZD2; and

FIG. 14 is a graph showing the ideal remaining recognition band displacement variation without bandwidth variation of the detection circuit compensated in ac-' cordance with this invention.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS The temperature compensated frequency detection circuit shown in FIG. 1 has general application in detector circuits in telephone systems employing voice frequency signalling techniques and has particular utility in multi-frequency address signalling system receivers well known to the telecommunication art, such as subscriber dual-tone multi-frequency pulsing.

Referring to FIG. 1, a sinusoidal input signal, whose frequency is numerically representative, is applied to the

input terminals

1, 2 of a temperature compensated frequency detector constructed in accordance with the invention. If the frequency of the input signal lies within the recognition band of the tuned series resonant circuit Ll, C2 the detection circuit develops a d-c output signal across output terminals 4, 5.

In particular, the input signal applied to terminal I, 2 is fed to a conventional limiter circuit 10, which converts the input signal into an output signal of rectangular waveform andfixed voltage level, and couples the output signal to a tuned circuit, which may comprise the series tuned circuit resistor R2, capacitor C2 and inductor L1.

The characteristics of capacitor C2 and inductor L] are selected to provide series resonance at the frequency to be detected. Resistor R2 provides a means for controlling the Q factor of this circuit. Moreover, the temperature coefficients are selected to provide the closest possible complementary temperature match. Typically, capacitor C2 is of polystyrole dielectric, and inductor Ll comprises a coil winding on a ferrite core. If the coil temperature coefficient is somewhat greater than that of the capacitor, the tuning center frequency will vary inversely with respect to temperature, as shown in FIG. 2. The Q will also vary inversely with respect to temperature, as shown in FIG. 3.

As shown in FIGS. 4, 9, an uncompensated limiter circuit output voltage 10 has a positive temperature coefficient (FIG. 4); the bandwidth of the frequency detection circuit would increase with temperature as a result of this characteristic (FIG. 9), that is, the detection circuit would become more sensitive as temperature increases. However, the limiter circuit output level is compensated by zener diode 2D]. The cathode of diode ZDI is coupled through resistor R1 to a suitable source of d-c power applied between terminals 3, of the detection circuit. Capacitor C1 provides an a-c bypass path for diode ZDl.

In accordance with one aspect of the invention, the zener diode ZDl selected for incorporation in the circuit is of the low voltage kind, and has a negative temperature coefficient, FIG. 7, causing a corresponding limiter output voltage correction, FIG. 12 to complement the positive temperature coefficient of the limiter circuit itself (FIG. 9).

When the limiter circuit 10 output signal lies within the recognition band of series resonant circuit L1, C2, and when the peak value of the positive half-cycle of the voltage across coil Ll exceeds the sum of three voltages, which are; the forward conducting voltage (V of diode D1, the forward conducting base-emitter voltage (V,,,;) of transistor TRl, and the zener voltage (V of diode ZD2, transistor TRl is switched on. During its period of conduction, the charge previously stored in capacitor C3, rapidly discharges through the collector-emitter circuit.

During the negative half-cycle of the voltage across inductor L1, capacitor C3 is recharged via the path to the dc power supply comprising resistor R4. As a result of this on-off-on operation of transistor TRl, a low level d-c signal is obtained at the collector of transistor TRI. This signal is corrected by the conventional inverter circuit 11, and is supplied thereby to the detection circuit output terminals 4, 5.

As stated above, the conduction threshold level of transistor TRl is set by the zener voltage (V of diode ZD2. The cathode thereof is coupled through a suitable resistor R5 to the d-c power source at terminals 3, 5. Capacitor C4 provides an a-c bypass path for diode ZD2.

As illustrated in the drawings, the temperature coefficients of rectifier diode D1 (FIG. 5) and the baseemitter junction or transistor TRl (FIG. 6) are negative. Consequently, the bandwidth of the detection circuit, by virtue of these negative coefficients, increases with temperature increases, that is, the detection circuit sensitivity increases with temperature increases as can be seen from FIGS. 10 and 11.

In accordance with another aspect of the invention, the zener diode ZD2, selected for incorporation in the detection circuit, is of the high breakdown voltage kind, and has a positive temperature coefficient, FIG. 8, to compensate for the negative temperature coefficients of diode D1 and transistor TRl. FIG. 13 shows the compensation introduced by the characteristics of ZD2, complementing FIGS. 10 and 11.

Accordingly, the only characteristics of the detection circuit which are not independently compensated are those of the tuned circuit elements, inductor L1 and eapacitor C2. As noted above, these can be appropriately selected with respect to each other to obtain almost complementary temperature characteristics to achieve a detection circuit center frequency drift characteristic (FIG. 2) as close to ideal as possible. Moreover, temperature compensation of the threshold level in accordance with this invention will limit the recognition bandwidth shift to that shown by FIG. 14.

It will be appreciated by those skilled in the art that the temperature compensated frequency detection circuit disclosed herein can be used to detect periodic input signals of non-sinusoidal waveform, and that with appropriate modification, well within the skill of those in the art, shunt resonant networks, or other equivalent tuning circuits, and P-N-P transistors or equivalent switching devices, can be used in place of the specific tuning circuit and N-PN transistor described above.

Moreover, while specific embodiments of the invention have been disclosed, variations in procedural and structural detail within the scope of the appended claims are possible, and are contemplated. There is, therefore, no intention of limitation to the abstract, or the exact disclosure herein presented.

What is claimed is:

1. A frequency detection circuit comprising: an input amplitude limiter circuit means having a constant output signal level over a predetermined range of input signal levels, and having a positive output signal level temperature coefficient; at least one tuned bandpass circuit means for coupling said output signal to the next mentioned means; and at least one threshold detection means having a negative threshold level temperature coefficient for deriving a DC output signal in response to the output of said tuned circuit lying within the bandwidth thereof, wherein the improvement comprises, in combination, means, coupled to said limiter means and including a first zener diode means having a negative temperature coefficient, for setting the output level of said limiter circuit means independently of its temperature by compensating for the positive temperature coefficient of said limiter circuit means; and means, coupled to said threshold detection means and including a second zener diode means having a positive temperature coefficient, for setting the conduction level of said threshold detection means, and for compensating for the negative temperature coefficient of said threshold detection means.

2. A frequency detection circuit comprising in combination:

means, having an output port and being responsive to input signals supplied to said detection circuit, for deriving a first signal having a rectangular waveform and the same period as said input signal, said means having a positive output voltagetemperature coefficient;

means, coupled to said deriving means and including a first zener diode means having a negative voltage temperature coefficient, for setting the output voltage of said deriving means independently (a) of the temperature of said deriving means and (b) of the level of the input signals supplied thereto:

means for detecting an input signal lying within a preselected band of frequencies, coupled to said output port of said deriving means and including in serial connection, a network means tuned to reject signals of frequency outside said band and arranged to pass signals of frequency within said band; means having a negative conductancevoltage-temperature coefficient for rectifying the positive half-cycles of the voltage developed across at least one energy storage element in said tuned network means; and means, responsive to the output of said rectifying means for developing a D-C cient of said rectifying means, whereby the output sensitivity of the frequency detection circuit with respect to temperature variations, is primarily substantially dependent upon the frequency band drift with respect to temperature of said tuned network means and independent of the temperature dependent frequency variations of said deriving means and said detecting means.

3. The frequency detection circuit according to claim 10 2 wherein said tuned network means comprises a series resonant circuit means, and further wherein said one energy storage element comprises an inductance means.

Claims

1. A frequency detection circuit comprising: an input amplitude limiter circuit means havinG a constant output signal level over a predetermined range of input signal levels, and having a positive output signal level temperature coefficient; at least one tuned bandpass circuit means for coupling said output signal to the next mentioned means; and at least one threshold detection means having a negative threshold level temperature coefficient for deriving a D-C output signal in response to the output of said tuned circuit lying within the bandwidth thereof, wherein the improvement comprises, in combination, means, coupled to said limiter means and including a first zener diode means having a negative temperature coefficient, for setting the output level of said limiter circuit means independently of its temperature by compensating for the positive temperature coefficient of said limiter circuit means; and means, coupled to said threshold detection means and including a second zener diode means having a positive temperature coefficient, for setting the conduction level of said threshold detection means, and for compensating for the negative temperature coefficient of said threshold detection means.

2. A frequency detection circuit comprising in combination: means, having an output port and being responsive to input signals supplied to said detection circuit, for deriving a first signal having a rectangular waveform and the same period as said input signal, said means having a positive output voltage-temperature coefficient; means, coupled to said deriving means and including a first zener diode means having a negative voltage temperature coefficient, for setting the output voltage of said deriving means independently (a) of the temperature of said deriving means and (b) of the level of the input signals supplied thereto: means for detecting an input signal lying within a preselected band of frequencies, coupled to said output port of said deriving means and including in serial connection, a network means tuned to reject signals of frequency outside said band and arranged to pass signals of frequency within said band; means having a negative conductance-voltage-temperature coefficient for rectifying the positive half-cycles of the voltage developed across at least one energy storage element in said tuned network means; and means, responsive to the output of said rectifying means for developing a D-C output signal representative of a detected input signal lying within said band; and means, coupled to said detecting means and including a second zener diode means having a positive voltage temperature coefficient, for setting the threshold level of conduction of said rectifying means; the enumerated means being so proportioned and the combination being so constructed and arranged that the said temperature coefficient of said first zener diode means complements the said temperature coefficient of said deriving means, and the said temperature coefficient of said second zener diode means complements the said temperature coefficient of said rectifying means, whereby the output sensitivity of the frequency detection circuit with respect to temperature variations, is primarily substantially dependent upon the frequency band drift with respect to temperature of said tuned network means and independent of the temperature dependent frequency variations of said deriving means and said detecting means.

3. The frequency detection circuit according to claim 2 wherein said tuned network means comprises a series resonant circuit means, and further wherein said one energy storage element comprises an inductance means.