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US3467005A - Printer hammer drive circuit - Google Patents

Printer hammer drive circuit Download PDF

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US3467005A
US3467005A US724881A US3467005DA US3467005A US 3467005 A US3467005 A US 3467005A US 724881 A US724881 A US 724881A US 3467005D A US3467005D A US 3467005DA US 3467005 A US3467005 A US 3467005A
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hammer
input
flip
flop
circuit
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US724881A
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Francis A Bernard
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Collins Radio Co
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Collins Radio Co
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J9/00Hammer-impression mechanisms
    • B41J9/44Control for hammer-impression mechanisms
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K15/00Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers
    • G06K15/02Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers
    • G06K15/08Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers using printers by flight printing with type font moving in the direction of the printed line, e.g. chain printers

Definitions

  • FIG 4 44 FRANCIS A. BERNARD M ATT EY Se t. 16, 1969 F. A. BERNARD PRINTER HAMMER DRIVE CIRCUIT 3 Sheets-Sheet 2 Filed April 29, 1968 Sept. 16, 1969 F. A. BERNARD PRINTER HAMMER DRIVE CIRCUIT 3 Sheets-Sheet 5 Filed April 29, 1968 ATTO E7 mm mmEE I E on.
  • This invention relates in general to high-speed revolving drum-type line printers with a plurality of characters engraved around the circumferential surface of the drum and with each character engraved repeatedly transversely across the surface of the drum, and in particular, to a specific printer hammer drive circuit used in a plurality of printer hammer drives duplicating the plurality of addresses and characters of the line printer system and with logic control through a flip-flop circuit for each of the plurality of printer hammer drive circuits.
  • the present invention may be best understood through considering it in an environment of, for example, a 1,000 line per minute high-speed line printer containing a revolving drum with 64 different characters engraved around its circumferential surface with each of the 64 different characters engraved 132 times transversely across the surface of the drum and in correlation with what may be considered as 132 addresses of the control system.
  • Each of the 132 images engraved or embossed as repeated duplications of the same character are successively offset a little each one from the previous character in order to compensate for rotation of the drum.
  • a relatively small gear shaped magnetic pulse initiating wheel is connected for rotation with the drum and is so rotationally set that the magnetic pulses initiated with rotation thereof through a magnetic pulse pickup system correspond timing wise with respect to degrees of rotation of the drum and with particular character relation relative to the circumferential rotational position of the drum.
  • a count of the pulses produced through this magnetic pickup system as generated with rotation of the toothed gear provides an indexing way of knowing where each of the 64 characters is located with respect to the first character. It is a system making possible the controlled selective actuation of respective hammers in striking an ink impregnated ribbon and paper for printing the desired characters through the controlled timing actuation of the hammers relative to selected character positions on the drum in printing a line through each print cycle of operation of the line printer.
  • the 1,000 line per minute printer also is provided with a core memory buffer that stores data as received from a computer, with the buffer being large enough in storage capacity to store one complete line of print.
  • a print cycle is started. The first character that was stored during the input cycle is read out again.
  • the location of the character on the drum is translated into the code for that character and then, if the code read out from the memory and the translated code compare, a bit is set into a core plane reserved Patented Sept. 16, 1969 "ice for storing information that a compare has been found for that character.
  • a print compare strobe is generated that is gated with an address to selectively determine just which specific hammer of the 132 hammers is thereby controlled to fire. Further, this controls the output of a print cycle flip-flop to insure the firing of the hammers actuated for print only during the print cycle, and with logic circuitry being such that the flip-flop with the same address is reset two print scans later with the individual hammers being fired in effect through duration of two print characters timing from the print drum.
  • Another object is to provide such a hammer drive circuit that may be positively held off during a power on sequence of the line printer system and that thereby substantially eliminates the possibility of hammer misfire during such power on sequences.
  • a further object is to provide in such a printer hammer drive circuit, with activating pulse width, a function of drum rotational speed that varies only with respect to variations in drum speed and that regardless of variation in drum rotational speed remains synchronous with rotation of the drum.
  • a printer hammer drive circuit a flip-flop circuit controlled by logic input signalling and providing an output to a hammer driver having positive on and consistent actuation pulse duration and positive off control providing good hammer print registration in printing on a drum-type line printer, such as a high-speed 1,000 line per minute printer presently in use.
  • the control logic inputs to the hammer drive circuit flip-flop are such that the output pulse therefrom as supplied to each respective hammer driver solenoid will be the same for each solenoid and remain the same as long as the printer is in use.
  • the setting and resetting of the flip-flop circuitry driving the hammer driver solenoid is accomplished with logic control in turn using pulses generated off the toothed gear via the magnetic pulse pickup system with gear and drum rotation for its timing duration.
  • the turning on and off of the hammer driver, in being controlled by logic signalling to the flip-flop circuitry, is a decided improvement over being controlled by RC time constants, as is inherent with many existing hammer drive systems using one-shot circuits. With duplication of the hammer drive systems and the action 132 times, all hammers will be driven under flip-flop control.
  • the logic of the printer sets ONE into a core plane with equivalent location of this particular hammer being that which was just turned on, and with this core plane being identified as the LC (Last Character) flip-flop plane.
  • the compare plane is also turned on at the same time and, as the next character on the drum is approached, the address location of this hammer that is fired corresponds to the location of the core memory reading out a ONE in the print compare plane and a LC (Last Character) plane.
  • the presence of these two flip-flops being set at this time inhibits the setting and resetting of the particular hammer driver flip-flop that has been fired in the previous character action.
  • the logic is such that while a ONE is written into the LC flip-flop plane, the print compare plane is inhibited.
  • the LC flip-flop will be set to read out that contained in core storage at that address and the print compare flip-flop will not be set at this time.
  • a reset pulse will be sent to the hammer driver flip-flop turning it off at the proper time in a logic actuating system thereby allowing the hammer driver flipflop to stay set through a two character pulse duration in a 1,000 line per minute drum-type line printer.
  • FIGURE 1 represents a general schematic and block dagram of a computer controlled high-speed line printer system
  • FIGURE 2 a more detailed block diagram of portions of the computer controlled high-speed line printer system of FIGURE 1 showing relationships of components more directly related to a printer hammer driver system;
  • FIGURE 3 a showing of the ten planes in just one address of the storage buffer that is used to store character and special information in ten planes for each of 132 addresses;
  • FIGURE 4 a circuit schematic showing of one of the 132 individual printer hammer drive circuits used.
  • FIGURE 5 a showing of various waveforms generated in operation of the system of FIGURES 1 and 2 and including waveforms applied as inputs to the printer hammer drive circuit schematic of FIGURE 4.
  • the high-speed line printer system of FIGURE 1 is shown as having an input output (I/O) line A information input connection from a computer circuit 11 to a line printer control circuit 12 within the high-speed line printer system 10 from which transmit computer data (TXCD) information return is connected back to the computer circuitry 11.
  • the high-speed line printer system 10 provides, for example, a high-speed printing capability of up to 1,000 lines per minute using 48 consecutive characters on print drum 13 with 132 print positions (or addresses). This is with a horizontal spacing of 10 characters per inch, and vertical spacing of 6 or 8 lines per inch along with other desired charcteristics.
  • the line printer control circuit 12 is shown to have a signal output connection to the hammers and drive actuating circuit section 14 from which the individual hammer drives 15 extend for printing of characters on paper at the print drum 13. Additional signal outputs from the line printer control circuit include, a paper and ribbon advance signal connection to the paper and ribbon assemblies section 16, and a channel select signal output connection to the paper tape reader section 17 which generates a paper advance signal output connected through signal means, as an additional input, to the paper and ribbon feed assembly section 16.
  • the print drum 13, the hammers and drive actuating circuit section 14, the paper and ribbon assembly section 16 and the paper tape reader 17 are all contained within a line printer section 18.
  • a ZERO reference or home pulse magnetic pickup signal is generated within the line printer section with each 360 rotation of the drum by a magnetic pickup system 19 and applied back as an input to the line printer control circuit 12. Further, drum position signals generated as character pulse magnetic pickups through magnetic pickup system 20 are also fed back as an input to the line printer control circuit 12.
  • computer circuitry 11 sends data and commands to the line printer control circuit 12 on the I/O input A line and receives responses on the TXCD line.
  • the line printer control 12 accepts and processes the data and commands from the computer circuitry 11 and monitors positioning of the drum and paper in the high-speed line printer 10.
  • the line printer cntrol 12 sends the required responses to the record channel and provides required commands in the high-speed line printer 10 for positioning the paper and to print the required characters.
  • Various commands received and processed by the line printer control 12 include:
  • character counter circuit 21 is shown to be connected for receiving home pulse signals from magnetic pulse pickup system 19, and drum character pulses from the magnetic pulse pickup signal system 20.
  • the home pulse magnetic pickup system includes a magnetic pulse initiating tooth, or insert, in the print drum 13, as shown in FIGURE 1, wherein, for each 360 rotation of the print drum a home pulse or ZERO reference signal is generated and fed back to the character counter circuit 21 of line printer control 12.
  • teeth of a gear wheel in the drum character pulse magnetic pickup system 29 generates character position pulses with rotation of the print drum 13 and of the gear wheel of the pickup system 20 with the magnetic pickup pulses being fed back to the character counter circuit 21 of line printer control 12.
  • character counter circpit 21 is connected to character counter decoder circuit 22 which is provided with a signl output feedback connection to the character counter circuit 21 and also with an output connecton to character counter encoder 23.
  • the output of character counter encoder 23 is connected as an input to compare logic circuit 24 having an output connected to parity generator and error detector circuit 25.
  • the output of circuit 25 is applied as an input to error status circuit 26 which has an additional input form timing and control circuit 27 and develpes an output applied as a TXCD input to computer circuitry 11.
  • timing and control circuit 27 is connected as an additional input to compare logic circuit 24 and as an additional input to parity generator and error detector circuit 25 as well as being connected as an input to the memory control clock circuit 28 having an output applied as an input to read-and-write control circuit 29 also receiving an input from the timing and control circuit 27.
  • An additional input to the Read/ Write control circuit 29 is provided from the address register circuit 30 also receiving an input signal from timing and control circuit 27.
  • the output of Read/ Write control circuit 29 is applied as an input to storage buffer circuit 31 having an output connection as an input to the respective sense amplifiers 32 in turn having a feedback connection to timing and control circuit 27, and with an output signal connection as an input to data register 33.
  • the data register circuit 33 along with computer circuit 11, in addition to other circuits heretofore mentioned, is connected for receiving signal inputs from the timing and control circuit 27.
  • the data register 33 also'receives an input from the computer circuitry 11 in order to develop a Signal output applied through a connection back to the compare logic circuit 24, and also a signal output connected to the inhibit generators section 34.
  • the inhibit generators section 34 is connected for feeding output signals to storage buffer circuit 31 and also has anoutput connection to parity generator and error detector circuit 25.
  • the hammers and drive actuating circuit section 14, as shown in FIGURE 2, has a signal input connection from the address register 30 to hammer decoder circuit 35, additionally having an input from compare logic 24 and also a signal input connection from timing and control circuit 27 Signal output of the hammer decoder circuit 35 is passed through interconnect circuitry to individual hammer drivers 36 that have individual circuit connections for respective hammers 37.
  • the hammer decoder circuit 35 accepts address information fromfthe address register and hammer set or reset strokes from the compare logic circuit 24 and uses this information to determine which, if any, of the hammer drivers in'the hammer drivers section 36 are to be activated.
  • the hammer decoder 35 activates hammer drivers only during the print mode.
  • the hammer decoder When a synchronization error exists, or at any time other than a print load, the hammer decoder holds a constant reset signal to all hammer drivers. Please note further that there are 132 individual addressable hammer circuits, one for each hammer. When a specific hammer driver 47 is addressed and a hammer set strobe is applied simultaneously, the hammer driver causes the associated hammer to fire and print. When the same driver 47 is addressed two scans later, the hammer set stroke resets that hammer driver.
  • a memory clock provides a 32 count clock sequence of approximately 1.6 microseconds duration, and the 32 counts are decoded to provide high precision timing for the memory control functions (read, write, inhibit, etc.). Further, there is a sync at the start of each three counts in each data print mode individual hammer print cycle. It is opportune at this point to consider the storage buffer with particular reference to the showing in FIGURE 3 of ten planes at just one address in 132 addresses of the storage buffer that is used to store character and special information in ten planes for that address.
  • the storage buifer is a card mounted core buffer used to store character and special information in ten planes for each of the 132 addresses that are used by the line printer control.
  • Information stored in the ten planes for each of the 132 individual addresses includes the following: six data planes with six bits of the data character stored in the first six data planes.
  • the seventh data plane of FIGURE 3 is used as a parity plane if necessary for storing a parity bit to maintain odd parity for the data character plus parity bit.
  • the LC plane shown in FIGURE 3 is the last character plane indicating that all characters are printed and controls initiation of the line terminate sequence.
  • the PC plane is actually the print compare plane providing an error check in conjunction with a hammer fire echo pulse. And finally, the error plane stores any error indication that may have occurred during the print mode.
  • the circuit is shown to include part of the timing and control circuit 27 wherein a storage buffer sense PC plane signal line is connected as an input to AND gate 38, and a buffer read strobe signal line is connected as an input both to the AND gate 38 and to AND gate 39.
  • the additional input to AND gate 39 is a buffer sense LC plane signal line and the outputs of the AND gates 38 and 39 are connected to the set inputs of the PC flip-flop 40 and the LC flipfiop 41 respectively.
  • the reset inputs of both of the flipfiops 40 and 41 of timing and control circuit 27 are connected in common to receive a print clock count two signal input.
  • the 6 output terminal of PC flip-flop 40* is connected as an input to AND gate 42 which is a four input AND gate and also as an input to three input AND gate 44.
  • the Q output terminal of LC flip-flop 41 is connected as an input to three input AND gate 44 while the '65 output of LC flip-flop 41 is connected as an input to the four input AND gate 42.
  • AND gate 42 also has an input connection for receiving a compare pulse signal input and an input connection for receiving a print clock count five input for developing an AND gate output applied in turn as an input to AND gate 43.
  • the print clock count five signal line is connected also as an input to AND gate 44 for developing with other input signals an output connected as an input to AND gate 45.
  • a buffer address X1 signal line and a buffer address Y0 signal line are connected as inputs to AND gate 45 and are also connected as inputs to AND gate 43.
  • the outputs of AND gates 43 and 41 are connected to the set and reset input terminals respectively of hammer flip-flop 46, the Q output terminal of which is connected to the individual driver amplifier 47 of the hammer driver section 36.
  • the driver amplifier 47 which may be, and in one working embodiment is, a solid state electronic switch, and has an output connection through the hammer driving coil 48 to a positive voltage supply 49 indicated as being a positive 50 volts line, and acts with activating current flow through the coil 48 to move the respective hammer drive 15 and hammer to print.
  • LC flip-flop 41 is also connected as an input to AND gate 50 of generator and detector circuit 25 for the one specific address, for the illustrated circuit, of 132 addresses.
  • the AND gate 50 also has an input connection for receiving a compare pulse signal and also an input connection for an inhibit input signal line that is also connected as an input to AND gate 51.
  • the Q output terminal of LC flip-flop 41 is also connected as an input to AND gate 51.
  • AND gate 50 which is a logic 1 signal output line for a write 1 in the PC core plane of the respective specific address of the storage buffer is also connected as an input to OR gate 52, the other input connection of which is the output of AND gate 51, and this is with the OR gate 52 output being the logic 1 out for writing a l in the LC core plane of the respective specific address of the storage buffer, such as indicated in FIGURE 3.
  • the waveforms include first, at the top, a specific scan waveform with character scan initiating sequence pulses as initiated from the magnetic pickup system with rotation of the drum 13 and as processed through circuitry of the system to and including the character encoder 23, and is shown as an output therefrom that is applied as an input to the compare logic circuit 24.
  • the next waveform line down, the print clock count waveform is developed with the timing and control circuit 27 with other system circuitry as initiated by the respective scans A, B, and C, etc. and counting therefrom with distribution of various specific count pulse signals through specific circuits of the specific count signals to other reacting circuits.
  • the next four lines down are illustrative of X addresses, X1, X2, X3, and X4 that are connected to respective hammer drive circuits 14 with address X1 waveform being the one used for the specific address illustrated in FIGURE 4.
  • the next three waveforms down are buffer read, buffer strobe, and buffer write waveforms respectively that originates in the memory control clock 28 and are passed through the read and write control 29 and applied to the storage buffer 31.
  • the buffer inhibit pulse waveform is generated in the inhibit generators section 34 and applied as an additional input to the storage buifer 31.
  • the buffer read and strobe waveforms are also passed on from the storage buffer circuit 31 through the sense amplifiers circuit 32 to the data register 33.
  • the compare pulse write 1 waveform is generated in the compare logic circuit 24 and passed therefrom as an input to the hammer decoder circuit 35 in the hammers and drive actuating circuit section 14. This same waveform is also applied from the compare logic circuit 24 to the parity generator and error detector circuit 25.
  • the write 1 waveform provides a pulse applied to both the LC and the PC planes of the storage buffer in the A scan, and then a pulse only for the LC plane in the B and C scans shown, and in like manner for other scans not shown.
  • the set pulse to hammer waveform line is developed as an output of AND gate.43 and applied as an input to the set terminal of the hammer flip-flop 46 in the hammers and drive actuating circuit section 14.
  • the next waveform is the LC flip-flop waveform developed as an output at the Q output terminal of flip-flop 41 that is applied as an input to AND gate. 44 and also an input to AND gate 51.
  • the PC flipflopwaveform is actually developed as an output appearing at the Q terminal of flip-flop 40. However, instead of being used in this form, it is used in the inverted form as an output of the 5 output terminal of the PC flip-flop 40 and in the inverted form applied as an input to AND gate 42 and AND gate 44.
  • this waveform is initially initiated to the on state by the start of the pulse of the set to pulse to hammer waveform output of AND gate 43 and then ultimately is turned off by the start of the reset pulse to hammer flip-flop waveform developed as an output of AND gate 45 applied as an input to the reset terminal of hammer flip-flop 46.
  • An important waveform is the address Y waveform applied as an input to AND gate 45 where it as an input along with the buffer address X1 input can also, along with the output of AND gate 44 as an input to AND gate 45, produce the reset pulse to hammer flip-flop 46 waveform output.
  • the AND gate 44 output is the result of the LC flip-flop signal waveform input thereto along with the T inverted waveform of the PC fiip-fiop input to the AND gate 44 and including a print clock count five input thereto which is also an input to AND gate 42.
  • the circuitry and logic action shown and described with respect to one address is substantially duplicated 132 times with, of course, the address input information being specific for each of the 132 addresses.
  • the setting and resetting of the flip-flop 46 necessitates the use of two additional flip-flops 40 and 41 along with two core planes that must be used in a line printer in order to control the setting and resetting of the hammer drivers used in a line printer.
  • the operational action is such that when the proper character on the rotating drum is aligned with the respective hammer and is equal to the same character that is loaded into the buffer for printing outthis character, a set pulse is sent to this flip-flop while the X and Y addresses are still being sent to the hammer flipfiop logic.
  • the reset pulse to the flip-flop is inhibited at this particular time since the LC flip-flop is not on for the particular address.
  • the logic of the printer sets 1 into a core plane with the equivalent location of this particular hammer that is turned on with the particular core plane involved being the LC flip-flop plane.
  • the print compare plane is also turned on at this same time.
  • the address location of the just-fired hammer corresponds to the location of the core memory then reading out a 1 in the print compare plane and a LC plane.
  • the presence of these two flip-flops being set at this time will inhibit the setting and resetting of the particular hammer driver flip-flop that has been fired for its particular previously fired character.
  • the logic is such that, whereas a 1 is written into the LC flip-flop plane, the print compare is inhibited.
  • the LC flip-flop will be set from read-out in the core storage, and the print compare flipfiop will not be set at this time.
  • a reset pulse will be sent to the hammer driver flip-flop turning it off at the proper time.
  • a hammer driver control system for a line printer using a plurality of print hammers and having: a plurality of hammer addresses in a computer logic control section for relative specific print hammers; a hammer flip-flop having set and reset" input terminals and an output terminal; logic circuit input connection to said set and reset input terminals for logic controlled setting and resetting of said hammer flip-flop and providing a precise logic determined start, stop and duration output pulse; and a hammer driver actuating coil circuit connected to said output terminal of the hammer flip-flip and a voltage potential source for current flow actuation of the coil and hammer drive when said hammer flip-flop is activated for providing an output terminal output pulse.
  • hammer driver control system of claim 1, 75 wherein said hammer driver actuating coil circuit includes, a hammer driver coil and a driver amplifier between said hammer flip-flop output terminal and said hammer driver coil.
  • each individual hammer driver control circuit also includes an AND gating section developing two outputs that are applied as the inputs to the set" and reset terminals of said hammer flip-flop, and with the AND gating section receiving a plurality of logic control inputs including: inputs from a compare pulse signal source, a print clock source specific count pulse, and specific X and Y address inputs from a computer bufier logic source.
  • the hammer driver control system of claim 6, also including two additional flip-flops in the logic control circuitry specific to and in each individual hammer driver control circuit.
  • said two additional flip-flops receive a specific count pulse from said print clock source applied as an input to the reset input terminals of both of said two additional flip-flops; with one of said additional flip-flops being a PC flip-flop receiving a set input terminal input from an AND gate having a buffer sense PC plane signal source input connection, and a, bulfer read strobe signal source input connection; and with the other flipfiop being a LC flip-flop receiving a set input from an AND gate having a buffer sense LC plane signal source input connection and also a buifer read strobe signal input connection.
  • said gating section includes at least one four input AND gate, and a plurality of three input AND gates.

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Description

p 16, 1969 F. A. BERNARD 3,467,005
PRINTER HAMMER DRIVE CIRCUIT Filed April 29, 1968 3 Sheets-Sheet 1 HEHSPE E5 LWEPR ITJTER r- DRUM POSITION SIGNAL I I H6 5 REFZEEFEQVCE "-3 SIGQIAL I /9/ PRINT l I i l l I :HAMMER I I I A IRV E I COMPUTER {NPUT Io P -mi ACTIVATING I I CIRCUITRY TXCD I E I CIRCUITS I I PAPER AND I I Q RIBBON FEED l ,mBBON As EMBLIEs I IADVANCE :sIeNALs l6 ggai l I 52023 1 i $1 -$53 I L I EJBL I B -1 I I32 LOCATIONS L l w i I I 2 /0 a 4 DATA 5 PLANEs s 7 LC PLANE PC PLANE FIG 3 ERRoR PLANE I" '1 COMPARE PuLsE 1 AND i WITH LOGIC "I" OUT BUFFER SENSE AND PC W I Pc PLANE 40 I WITH L095: I OUT 38 WRITE I IN LC PRINT CLOCK COUNT 2 R Q I CORE PLANE BUFFE EAD T BE AND R P L NPA IEQ PBI' AND COMPARE PULSE PRINT CLOCK COUNT 5 I DRIVER s Q BUFFER DDR ss R 47 BUFFER DDR ss AND HMm-ER 4 +5OV 45 INVENTOR.
FIG 4 44 FRANCIS A. BERNARD M ATT EY Se t. 16, 1969 F. A. BERNARD PRINTER HAMMER DRIVE CIRCUIT 3 Sheets-Sheet 2 Filed April 29, 1968 Sept. 16, 1969 F. A. BERNARD PRINTER HAMMER DRIVE CIRCUIT 3 Sheets-Sheet 5 Filed April 29, 1968 ATTO E7 mm mmEE I E on.
E25: oh E -93 Gm 55w 3 y FL L x 1L E E FT'E JL E JL HIT E bmiz. 5&3 .L NEE E 9mm x 3m FIIL mx wwwmn -x mmmmo x 8m United States Patent Int. Cl. B41j 9/38 US. Cl. 101-93 10 Claims ABSTRACT OF THE DISCLOSURE A hammer driver control system used for each of a plurality of hammers and hammer addresses used in, for example, a 1,000 line per minute high-speed drum-type line printer. A flip-flop circuit is used in each hammer driver control circuit that can be held off during a power on sequence, and with hammer drive pulse width a function of drum speed, and synchronous with drum speed, through logic control using a magnetic pulse pickup signal input.
This invention relates in general to high-speed revolving drum-type line printers with a plurality of characters engraved around the circumferential surface of the drum and with each character engraved repeatedly transversely across the surface of the drum, and in particular, to a specific printer hammer drive circuit used in a plurality of printer hammer drives duplicating the plurality of addresses and characters of the line printer system and with logic control through a flip-flop circuit for each of the plurality of printer hammer drive circuits.
The present invention may be best understood through considering it in an environment of, for example, a 1,000 line per minute high-speed line printer containing a revolving drum with 64 different characters engraved around its circumferential surface with each of the 64 different characters engraved 132 times transversely across the surface of the drum and in correlation with what may be considered as 132 addresses of the control system. Each of the 132 images engraved or embossed as repeated duplications of the same character are successively offset a little each one from the previous character in order to compensate for rotation of the drum. A relatively small gear shaped magnetic pulse initiating wheel is connected for rotation with the drum and is so rotationally set that the magnetic pulses initiated with rotation thereof through a magnetic pulse pickup system correspond timing wise with respect to degrees of rotation of the drum and with particular character relation relative to the circumferential rotational position of the drum. A count of the pulses produced through this magnetic pickup system as generated with rotation of the toothed gear provides an indexing way of knowing where each of the 64 characters is located with respect to the first character. It is a system making possible the controlled selective actuation of respective hammers in striking an ink impregnated ribbon and paper for printing the desired characters through the controlled timing actuation of the hammers relative to selected character positions on the drum in printing a line through each print cycle of operation of the line printer. With such line printer systems of the drum type, the 1,000 line per minute printer also is provided with a core memory buffer that stores data as received from a computer, with the buffer being large enough in storage capacity to store one complete line of print. When a line of print has been stored in the buffer, a print cycle is started. The first character that was stored during the input cycle is read out again. At this point, the location of the character on the drum is translated into the code for that character and then, if the code read out from the memory and the translated code compare, a bit is set into a core plane reserved Patented Sept. 16, 1969 "ice for storing information that a compare has been found for that character. With this occurring, a print compare strobe is generated that is gated with an address to selectively determine just which specific hammer of the 132 hammers is thereby controlled to fire. Further, this controls the output of a print cycle flip-flop to insure the firing of the hammers actuated for print only during the print cycle, and with logic circuitry being such that the flip-flop with the same address is reset two print scans later with the individual hammers being fired in effect through duration of two print characters timing from the print drum.
With the individual hammer control and firing circuits, in many existing line printers using a revolving drum, oneshot circuits have been utilized for firing the respective hammers for print since, with many of these existing line printer systems, no reset pulses were conveniently available to turn off a flip-flop such as employed in applicants system. With such one-shot controlled systems, there is a very high sensitivity to noise, with noise many times inadvertently causing hammers to fire, particularly during power on sequences. A further deficiency of significance with many of the existing systems was that the hammer drive actuating pulse widths out of these one-shot control systems for driving the individual hammers have a tendency to drift due to aging and is also highly sensitive to marginal voltages. These significant problems have in large measure been substantially eliminated through applicants hammer drive circuits employing flip-flop circuitry.
It is, therefore, a principal object of this invention to provide a printer hammer drive circuit for use in line printers of the revolving drum type substantially eliminating the problems of noise actuation of hammer drive circuits to fire.
Another object is to provide such a hammer drive circuit that may be positively held off during a power on sequence of the line printer system and that thereby substantially eliminates the possibility of hammer misfire during such power on sequences.
A further object is to provide in such a printer hammer drive circuit, with activating pulse width, a function of drum rotational speed that varies only with respect to variations in drum speed and that regardless of variation in drum rotational speed remains synchronous with rotation of the drum.
Features of this invention useful in accomplishing the above objects include, in a printer hammer drive circuit, a flip-flop circuit controlled by logic input signalling and providing an output to a hammer driver having positive on and consistent actuation pulse duration and positive off control providing good hammer print registration in printing on a drum-type line printer, such as a high-speed 1,000 line per minute printer presently in use. The control logic inputs to the hammer drive circuit flip-flop are such that the output pulse therefrom as supplied to each respective hammer driver solenoid will be the same for each solenoid and remain the same as long as the printer is in use. The setting and resetting of the flip-flop circuitry driving the hammer driver solenoid is accomplished with logic control in turn using pulses generated off the toothed gear via the magnetic pulse pickup system with gear and drum rotation for its timing duration. The turning on and off of the hammer driver, in being controlled by logic signalling to the flip-flop circuitry, is a decided improvement over being controlled by RC time constants, as is inherent with many existing hammer drive systems using one-shot circuits. With duplication of the hammer drive systems and the action 132 times, all hammers will be driven under flip-flop control. This is with logic control being applied to two other flip-flops having resulting logic outputs that are applied with other logic signal inputs to gating circuitry controlling the flip-flop of the hammer driver circuit. When the proper character on. the rotating drum is aligned wth a hammer and is equal to the same character that is loaded into the buffer for printing out of this character, a set pulse is sent to this flip-flop while the X and Y address is being sent to the hammer flip-flop logic. The reset pulse to the flip-flop is inhibited at this time due to the fact that the compare pulse is present. At the same time that the hammer set pulse turns on the flip-flop, the logic of the printer sets ONE into a core plane with equivalent location of this particular hammer being that which was just turned on, and with this core plane being identified as the LC (Last Character) flip-flop plane. The compare plane is also turned on at the same time and, as the next character on the drum is approached, the address location of this hammer that is fired corresponds to the location of the core memory reading out a ONE in the print compare plane and a LC (Last Character) plane. The presence of these two flip-flops being set at this time inhibits the setting and resetting of the particular hammer driver flip-flop that has been fired in the previous character action. Simultaneously, through this time, the logic is such that while a ONE is written into the LC flip-flop plane, the print compare plane is inhibited. As the next character pulse is approached with drum rotation and the proper address is sensed for the hammer driver circuit in question, the LC flip-flop will be set to read out that contained in core storage at that address and the print compare flip-flop will not be set at this time. Through the use of these two flip-flops and their associated address, a reset pulse will be sent to the hammer driver flip-flop turning it off at the proper time in a logic actuating system thereby allowing the hammer driver flipflop to stay set through a two character pulse duration in a 1,000 line per minute drum-type line printer.
A specific embodiment representing what is presently regarded as the best mode of carrying out the invention is illustrated in the accompanying drawings.
In the drawings:
FIGURE 1 represents a general schematic and block dagram of a computer controlled high-speed line printer system;
FIGURE 2, a more detailed block diagram of portions of the computer controlled high-speed line printer system of FIGURE 1 showing relationships of components more directly related to a printer hammer driver system;
FIGURE 3, a showing of the ten planes in just one address of the storage buffer that is used to store character and special information in ten planes for each of 132 addresses;
FIGURE 4, a circuit schematic showing of one of the 132 individual printer hammer drive circuits used; and
FIGURE 5, a showing of various waveforms generated in operation of the system of FIGURES 1 and 2 and including waveforms applied as inputs to the printer hammer drive circuit schematic of FIGURE 4.
Referring to the drawings:
The high-speed line printer system of FIGURE 1 is shown as having an input output (I/O) line A information input connection from a computer circuit 11 to a line printer control circuit 12 within the high-speed line printer system 10 from which transmit computer data (TXCD) information return is connected back to the computer circuitry 11. The high-speed line printer system 10 provides, for example, a high-speed printing capability of up to 1,000 lines per minute using 48 consecutive characters on print drum 13 with 132 print positions (or addresses). This is with a horizontal spacing of 10 characters per inch, and vertical spacing of 6 or 8 lines per inch along with other desired charcteristics. The line printer control circuit 12 is shown to have a signal output connection to the hammers and drive actuating circuit section 14 from which the individual hammer drives 15 extend for printing of characters on paper at the print drum 13. Additional signal outputs from the line printer control circuit include, a paper and ribbon advance signal connection to the paper and ribbon assemblies section 16, and a channel select signal output connection to the paper tape reader section 17 which generates a paper advance signal output connected through signal means, as an additional input, to the paper and ribbon feed assembly section 16. The print drum 13, the hammers and drive actuating circuit section 14, the paper and ribbon assembly section 16 and the paper tape reader 17 are all contained within a line printer section 18. Please note that a ZERO reference or home pulse magnetic pickup signal is generated within the line printer section with each 360 rotation of the drum by a magnetic pickup system 19 and applied back as an input to the line printer control circuit 12. Further, drum position signals generated as character pulse magnetic pickups through magnetic pickup system 20 are also fed back as an input to the line printer control circuit 12.
In operation, computer circuitry 11 sends data and commands to the line printer control circuit 12 on the I/O input A line and receives responses on the TXCD line. The line printer control 12 accepts and processes the data and commands from the computer circuitry 11 and monitors positioning of the drum and paper in the high-speed line printer 10. The line printer cntrol 12 sends the required responses to the record channel and provides required commands in the high-speed line printer 10 for positioning the paper and to print the required characters. Various commands received and processed by the line printer control 12 include:
Write (No Automatic Space);
Write in space 1, 2, or 3 lines after print;
Write and skip to Channels 1 through 8 after print; Immediate space l, 2, or 3 lines);
Immediate skip (Channels 1 through 8);
Status Request; and
End of Line (Short Report).
Referring also to the more detailed block and schematic diagram of FIGURE 2, character counter circuit 21 is shown to be connected for receiving home pulse signals from magnetic pulse pickup system 19, and drum character pulses from the magnetic pulse pickup signal system 20. Please note that the home pulse magnetic pickup system includes a magnetic pulse initiating tooth, or insert, in the print drum 13, as shown in FIGURE 1, wherein, for each 360 rotation of the print drum a home pulse or ZERO reference signal is generated and fed back to the character counter circuit 21 of line printer control 12. In a somewhat similar manner, teeth of a gear wheel in the drum character pulse magnetic pickup system 29 generates character position pulses with rotation of the print drum 13 and of the gear wheel of the pickup system 20 with the magnetic pickup pulses being fed back to the character counter circuit 21 of line printer control 12. The output of character counter circpit 21 is connected to character counter decoder circuit 22 which is provided with a signl output feedback connection to the character counter circuit 21 and also with an output connecton to character counter encoder 23. The output of character counter encoder 23 is connected as an input to compare logic circuit 24 having an output connected to parity generator and error detector circuit 25. The output of circuit 25 is applied as an input to error status circuit 26 which has an additional input form timing and control circuit 27 and develpes an output applied as a TXCD input to computer circuitry 11. Please note that timing and control circuit 27 is connected as an additional input to compare logic circuit 24 and as an additional input to parity generator and error detector circuit 25 as well as being connected as an input to the memory control clock circuit 28 having an output applied as an input to read-and-write control circuit 29 also receiving an input from the timing and control circuit 27..An additional input to the Read/ Write control circuit 29 is provided from the address register circuit 30 also receiving an input signal from timing and control circuit 27. The output of Read/ Write control circuit 29 is applied as an input to storage buffer circuit 31 having an output connection as an input to the respective sense amplifiers 32 in turn having a feedback connection to timing and control circuit 27, and with an output signal connection as an input to data register 33. The data register circuit 33, along with computer circuit 11, in addition to other circuits heretofore mentioned, is connected for receiving signal inputs from the timing and control circuit 27. The data register 33 also'receives an input from the computer circuitry 11 in order to develop a Signal output applied through a connection back to the compare logic circuit 24, and also a signal output connected to the inhibit generators section 34. The inhibit generators section 34 is connected for feeding output signals to storage buffer circuit 31 and also has anoutput connection to parity generator and error detector circuit 25.
The hammers and drive actuating circuit section 14, as shown in FIGURE 2, has a signal input connection from the address register 30 to hammer decoder circuit 35, additionally having an input from compare logic 24 and also a signal input connection from timing and control circuit 27 Signal output of the hammer decoder circuit 35 is passed through interconnect circuitry to individual hammer drivers 36 that have individual circuit connections for respective hammers 37. Please note that the hammer decoder circuit 35 accepts address information fromfthe address register and hammer set or reset strokes from the compare logic circuit 24 and uses this information to determine which, if any, of the hammer drivers in'the hammer drivers section 36 are to be activated. The hammer decoder 35 activates hammer drivers only during the print mode. When a synchronization error exists, or at any time other than a print load, the hammer decoder holds a constant reset signal to all hammer drivers. Please note further that there are 132 individual addressable hammer circuits, one for each hammer. When a specific hammer driver 47 is addressed and a hammer set strobe is applied simultaneously, the hammer driver causes the associated hammer to fire and print. When the same driver 47 is addressed two scans later, the hammer set stroke resets that hammer driver.
In a buffer logic, a memory clock provides a 32 count clock sequence of approximately 1.6 microseconds duration, and the 32 counts are decoded to provide high precision timing for the memory control functions (read, write, inhibit, etc.). Further, there is a sync at the start of each three counts in each data print mode individual hammer print cycle. It is opportune at this point to consider the storage buffer with particular reference to the showing in FIGURE 3 of ten planes at just one address in 132 addresses of the storage buffer that is used to store character and special information in ten planes for that address. The storage buifer is a card mounted core buffer used to store character and special information in ten planes for each of the 132 addresses that are used by the line printer control. Information stored in the ten planes for each of the 132 individual addresses includes the following: six data planes with six bits of the data character stored in the first six data planes. The seventh data plane of FIGURE 3 is used as a parity plane if necessary for storing a parity bit to maintain odd parity for the data character plus parity bit. The LC plane shown in FIGURE 3, is the last character plane indicating that all characters are printed and controls initiation of the line terminate sequence. The PC plane is actually the print compare plane providing an error check in conjunction with a hammer fire echo pulse. And finally, the error plane stores any error indication that may have occurred during the print mode.
Referring now to the individual printer hammer drive circuit of FIGURE 4, which is just one of the 132 individual printer hammer drive circuits used, the circuit is shown to include part of the timing and control circuit 27 wherein a storage buffer sense PC plane signal line is connected as an input to AND gate 38, and a buffer read strobe signal line is connected as an input both to the AND gate 38 and to AND gate 39. The additional input to AND gate 39 is a buffer sense LC plane signal line and the outputs of the AND gates 38 and 39 are connected to the set inputs of the PC flip-flop 40 and the LC flipfiop 41 respectively. The reset inputs of both of the flipfiops 40 and 41 of timing and control circuit 27 are connected in common to receive a print clock count two signal input. The 6 output terminal of PC flip-flop 40* is connected as an input to AND gate 42 which is a four input AND gate and also as an input to three input AND gate 44. The Q output terminal of LC flip-flop 41 is connected as an input to three input AND gate 44 while the '65 output of LC flip-flop 41 is connected as an input to the four input AND gate 42. AND gate 42 also has an input connection for receiving a compare pulse signal input and an input connection for receiving a print clock count five input for developing an AND gate output applied in turn as an input to AND gate 43. The print clock count five signal line is connected also as an input to AND gate 44 for developing with other input signals an output connected as an input to AND gate 45. A buffer address X1 signal line and a buffer address Y0 signal line are connected as inputs to AND gate 45 and are also connected as inputs to AND gate 43. The outputs of AND gates 43 and 41 are connected to the set and reset input terminals respectively of hammer flip-flop 46, the Q output terminal of which is connected to the individual driver amplifier 47 of the hammer driver section 36. The driver amplifier 47 which may be, and in one working embodiment is, a solid state electronic switch, and has an output connection through the hammer driving coil 48 to a positive voltage supply 49 indicated as being a positive 50 volts line, and acts with activating current flow through the coil 48 to move the respective hammer drive 15 and hammer to print.
Please note that the 6 output of LC flip-flop 41 is also connected as an input to AND gate 50 of generator and detector circuit 25 for the one specific address, for the illustrated circuit, of 132 addresses. The AND gate 50 also has an input connection for receiving a compare pulse signal and also an input connection for an inhibit input signal line that is also connected as an input to AND gate 51. The Q output terminal of LC flip-flop 41 is also connected as an input to AND gate 51. The output of AND gate 50 which is a logic 1 signal output line for a write 1 in the PC core plane of the respective specific address of the storage buffer is also connected as an input to OR gate 52, the other input connection of which is the output of AND gate 51, and this is with the OR gate 52 output being the logic 1 out for writing a l in the LC core plane of the respective specific address of the storage buffer, such as indicated in FIGURE 3.
Referring also to FIGURE 5, the waveforms include first, at the top, a specific scan waveform with character scan initiating sequence pulses as initiated from the magnetic pickup system with rotation of the drum 13 and as processed through circuitry of the system to and including the character encoder 23, and is shown as an output therefrom that is applied as an input to the compare logic circuit 24. The next waveform line down, the print clock count waveform, is developed with the timing and control circuit 27 with other system circuitry as initiated by the respective scans A, B, and C, etc. and counting therefrom with distribution of various specific count pulse signals through specific circuits of the specific count signals to other reacting circuits. The next four lines down are illustrative of X addresses, X1, X2, X3, and X4 that are connected to respective hammer drive circuits 14 with address X1 waveform being the one used for the specific address illustrated in FIGURE 4. The next three waveforms down are buffer read, buffer strobe, and buffer write waveforms respectively that originates in the memory control clock 28 and are passed through the read and write control 29 and applied to the storage buffer 31. The buffer inhibit pulse waveform is generated in the inhibit generators section 34 and applied as an additional input to the storage buifer 31. The buffer read and strobe waveforms are also passed on from the storage buffer circuit 31 through the sense amplifiers circuit 32 to the data register 33. The compare pulse write 1 waveform is generated in the compare logic circuit 24 and passed therefrom as an input to the hammer decoder circuit 35 in the hammers and drive actuating circuit section 14. This same waveform is also applied from the compare logic circuit 24 to the parity generator and error detector circuit 25. The write 1 waveform provides a pulse applied to both the LC and the PC planes of the storage buffer in the A scan, and then a pulse only for the LC plane in the B and C scans shown, and in like manner for other scans not shown. The set pulse to hammer waveform line is developed as an output of AND gate.43 and applied as an input to the set terminal of the hammer flip-flop 46 in the hammers and drive actuating circuit section 14. The next waveform is the LC flip-flop waveform developed as an output at the Q output terminal of flip-flop 41 that is applied as an input to AND gate. 44 and also an input to AND gate 51. The PC flipflopwaveform is actually developed as an output appearing at the Q terminal of flip-flop 40. However, instead of being used in this form, it is used in the inverted form as an output of the 5 output terminal of the PC flip-flop 40 and in the inverted form applied as an input to AND gate 42 and AND gate 44. Referring now to the hammer flip-flop 46 Q output waveform, this waveform is initially initiated to the on state by the start of the pulse of the set to pulse to hammer waveform output of AND gate 43 and then ultimately is turned off by the start of the reset pulse to hammer flip-flop waveform developed as an output of AND gate 45 applied as an input to the reset terminal of hammer flip-flop 46. An important waveform is the address Y waveform applied as an input to AND gate 45 where it as an input along with the buffer address X1 input can also, along with the output of AND gate 44 as an input to AND gate 45, produce the reset pulse to hammer flip-flop 46 waveform output. The AND gate 44 output is the result of the LC flip-flop signal waveform input thereto along with the T inverted waveform of the PC fiip-fiop input to the AND gate 44 and including a print clock count five input thereto which is also an input to AND gate 42.
In operation with such hammer driver control circuitry and the related computer system, please note again that in order to acquire a good acceptable quality of print registration with high-speed line print operation, such as a print rate of 1,000 lines per minute, it is extremely important that substantially the same pulse duration be achieved in actuation of each hammer driver solenoid coil 48. With other systems employing one-shot circuits and other circuits with RC time constant factors in control of the drive-to-hammer solenoids, the print registration has been poor, particularly as influenced by the adverse affect of aging components in causing activating pulse duration drift and change. In applicants system, as shown and described, the hammer driver solenoid actuating pulses are of substantially the same duration after initial set and adjustment and remain the same. so long as the printer is in use. This is with setting and resetting of the flip-flop driving the respective hammer driver solenoids being accomplished with logic control as initiated through timing pulse pickups from a magnetic pickup sys tem developing time pulses with rotation of the print drum. Please note that since the speed of the drum 13 is controlled by a 60 cycle source, the rotational speed of the drum may vary from printer to printer, but will not vary for a specific particular printer once the print speed has been established. Further, with the flip-flop driving hammer circuit control, the individual hammer driver solenoid coils 48 are much less susceptible to noise actuation than in many of the existing systems using oneshot circuits and other RC time actuating pulse time control circuits. In one specific machine having 132 addresses and 132 individual hammers, the circuitry and logic action shown and described with respect to one address is substantially duplicated 132 times with, of course, the address input information being specific for each of the 132 addresses. With respect to the hammer flip-flop 46 actuation and control, simply stated, the setting and resetting of the flip-flop 46 necessitates the use of two additional flip-flops 40 and 41 along with two core planes that must be used in a line printer in order to control the setting and resetting of the hammer drivers used in a line printer. The operational action is such that when the proper character on the rotating drum is aligned with the respective hammer and is equal to the same character that is loaded into the buffer for printing outthis character, a set pulse is sent to this flip-flop while the X and Y addresses are still being sent to the hammer flipfiop logic. The reset pulse to the flip-flop is inhibited at this particular time since the LC flip-flop is not on for the particular address. At the same time that the hammer set pulse turns on the flip-flop, the logic of the printer sets 1 into a core plane with the equivalent location of this particular hammer that is turned on with the particular core plane involved being the LC flip-flop plane. The print compare plane is also turned on at this same time. As the next charcater of the drum is approached, the address location of the just-fired hammer corresponds to the location of the core memory then reading out a 1 in the print compare plane and a LC plane. The presence of these two flip-flops being set at this time will inhibit the setting and resetting of the particular hammer driver flip-flop that has been fired for its particular previously fired character. Through this same time interval, the logic is such that, whereas a 1 is written into the LC flip-flop plane, the print compare is inhibited. Then, as the next character pulse of the drum approaches and the proper address is sensed for the particular hammer driver, the LC flip-flop will be set from read-out in the core storage, and the print compare flipfiop will not be set at this time. Through use of these two flip-flops and their associated addresses, a reset pulse will be sent to the hammer driver flip-flop turning it off at the proper time. This in turn allows the hammer flip-flop to stay set through a two-character pulse duration in a 1,000 line per minute operation drum line printer where with such high-speed operation use of such a logic control flip-flop hammer driver control system is particularly useful as opposed to one-shot circuit control operation in that the pulse duration to the hammer solenoids remains substantially constant with a particular printer, while oneshot control circuits and other RC time influenced control circuits allow pulse duration to vary as components age.
Whereas this invention is herein illustrated and described with respect to a specific embodiment thereof, it should be realized that various changes may be made without departing from the essential contributions to the art made by the teachings hereof.
I claim:
1. A hammer driver control system for a line printer using a plurality of print hammers, and having: a plurality of hammer addresses in a computer logic control section for relative specific print hammers; a hammer flip-flop having set and reset" input terminals and an output terminal; logic circuit input connection to said set and reset input terminals for logic controlled setting and resetting of said hammer flip-flop and providing a precise logic determined start, stop and duration output pulse; and a hammer driver actuating coil circuit connected to said output terminal of the hammer flip-flip and a voltage potential source for current flow actuation of the coil and hammer drive when said hammer flip-flop is activated for providing an output terminal output pulse.
2. The hammer driver control system of claim 1, 75 wherein said hammer driver actuating coil circuit includes, a hammer driver coil and a driver amplifier between said hammer flip-flop output terminal and said hammer driver coil.
3. The hammer driver control system of claim 2, wherein said hammer flip-flop output is a flip-flop Q terminal output.
4. The hammer driver control system of claim 2, wherein said driver amplifier is a switching amplifier.
5. The hammer driver control system of claim 1, wherein said line printer is: a high-speed.drum-type line printer with a rotating character drum and magnetic pulse pickup signal means having magnetic pulse initiating means in synchronous rotation with drum rotation; said magnetic pulse pickup signal means being a pulse signal source acting as an input to said computer logic control section with resulting logic timing and control of each hammer driver control circuit to be held off during a power on sequence, with hammer drive pulse width a function of drum speed, and in synchronous with drum speed.
6. The hammer driver control system of claim 1, wherein each individual hammer driver control circuit also includes an AND gating section developing two outputs that are applied as the inputs to the set" and reset terminals of said hammer flip-flop, and with the AND gating section receiving a plurality of logic control inputs including: inputs from a compare pulse signal source, a print clock source specific count pulse, and specific X and Y address inputs from a computer bufier logic source.
7. The hammer driver control system of claim 6, also including two additional flip-flops in the logic control circuitry specific to and in each individual hammer driver control circuit.
8. The hammer driver control system of claim 7, wherein said two additional flip-flops receive a specific count pulse from said print clock source applied as an input to the reset input terminals of both of said two additional flip-flops; with one of said additional flip-flops being a PC flip-flop receiving a set input terminal input from an AND gate having a buffer sense PC plane signal source input connection, and a, bulfer read strobe signal source input connection; and with the other flipfiop being a LC flip-flop receiving a set input from an AND gate having a buffer sense LC plane signal source input connection and also a buifer read strobe signal input connection.
9. The hammer driver control system of claim 8, wherein the Q (inverted signal output) of the PC flip-flop is connected as an input to said gating section; and both the Q and Q outputs of the LC flip-flop are connected as additional inputs to said gating section.
10. The hammer driver control system of claim 9, wherein said gating section includes at least one four input AND gate, and a plurality of three input AND gates.
References Cited UNITED STATES PATENTS 2,909,678 10/1959 Jensen 307291 X 3,117,514 1/196l4 Doersam 10l--93 3,142,247 7/1964 Sweeney 101--93 3,211,087 10/1965 Sapino et al. 101-93 3,247,788 4/1966 Wilkins et al. 101--93 3,270,288 8/1966 Hackett 307269 X 3,309,530 3/1967 Lacher 307269 X 3,358,238 12/1967 Shapiro et a1 307269 X 3,366,044 1/ 1968 Marsh 101-93 3,406,381 10/1968 Peyton 340172.5
WILLIAM B. PENN, Primary Examiner
US724881A 1968-04-29 1968-04-29 Printer hammer drive circuit Expired - Lifetime US3467005A (en)

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US3633496A (en) * 1970-01-29 1972-01-11 Mohawk Data Sciences Corp Printer and control circuit therefor
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US3795186A (en) * 1969-11-14 1974-03-05 Nortec Computer Devices High speed printer
US3796156A (en) * 1971-07-12 1974-03-12 J Bracken Line printer with recirculating line store and line print memories
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US3999478A (en) * 1969-09-12 1976-12-28 Iomec, Inc. Type carrier
US3795186A (en) * 1969-11-14 1974-03-05 Nortec Computer Devices High speed printer
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US3633496A (en) * 1970-01-29 1972-01-11 Mohawk Data Sciences Corp Printer and control circuit therefor
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