US3018333A - Transistorized telegraph receiving unit - Google Patents

Description

' Jan. 23, 1962 M. TONELLI 3,018,333 TRANSISTORIZED TELEGRAPH RECEIVING UNIT Filed March 11, 1958 /NVENT'OR MICHELE mNELLI 47TORNEVS United States Patent 3,018,333 TRAN SISTORIZED TELEGRAPH RECEIVING UNIT Michele Tonelii, Ivrea, Italy, assignor to lug. C. Olivetti & C., S.p.A., Ivrea, Italy, a corporation of Italy Filed Mar. 11, 1958, Ser. No. 720,633 Claims priority, application Italy Mar. 13, 1957 1 Claim. (Cl. 178-88) The present invention concerns telegraph receiving units wherein incoming signals are received by a neutral selector magnet.

As is known in the art, such neutral magnets are adapted only for single current operation.

To enable a neutral magnet for double current opera tion it has been proposed to drive it through the intermediary of an electronic circuit employing three-electrode semi-conductor devices known as transistors. This circuit comprises a pair of flip-flop connected transistors for driving a selector magnet whose steady marking condition is further cont-rolled by a third transistor. The receiving unit becomes therefore highly intricated and expensive.

'It is an object of the present invention to provide an improved and inexpensive telegraph receiving unit.

It is a further object of the invention to provide an improved circuit for enabling a neutral selector magnet for double current operation.

In accordance with the invention a telegraph receiving unit comprises input means for receiving telegraph signals, a single semi-conductor device having an emitter electrode, a collector electrode and a base electrode, and a direct current source supplying the collector circuit of said semi-conductor device. In said unit I provide a signal responsive device inserted in said collector circuit, and a resistance network connecting said base electrode both to said input means and to said supply source.

The line marking current will thus hold the transistor cut-off, whereas a spacing pulse will cause the transistor to conduct and thus to energize the selector magnet.

These and other features of the invention will become apparent from the following description of a preferred embodiment thereof, taken in conjunction with the accompanying drawing showing the circuit diagram of a telegraph receiving unit according to the invention.

Referring to the drawing, the numeral 1 designates a neutral selector magnet which is inserted in the collector circuit of a transistor 3 supplied by a direct current source 2. Through the terminals 4 and 5 the magnet 1 is driven by the signals incoming from a telegraph line L.

The transistor 3 is of the well known pnp-type and comprises a collector electrode 6, an emitter electrode 7 and a base electrode 8.

Through a resistor 14 and the magnet 1 the collector 6 is connected to the negative side of the source 2, where as the emitter 7 is directly connected both to the positive side of the source 2 and to the terminal 5.

The base 8 is connected through a resistance network comprising the resistors 9, 10, 11, 12 and 13 both to the supply source 2 and to the input line L. More particularly, through the series combination of the resistors 13 and 9 the base 8 is connected to the negative side of the source 2, while through the parallel combination of the resistor 12 and the resistors 13 and 10 the base 8 is connected to the terminal 5 and thus also to the emitter 7 and to the positive side of the source 2. Finally, through the resistor 11 the base 8 is connected to the terminal 4.

It will thus be apparent that the voltage of the base 8 is conditioned both by the source 2 acting in conjunction with said resistors to provide biasing means for the base and through a resistance voltage divider (11, 12) by the voltage developed between the terminals 4 and 5 by a telegraphic pulse of current coming through the line L. It will further be clear that said base voltage depends upon the resistance values of the resistors 9, 10, 11, 12 and 13.

'In the present embodiment said resistances are so predetermined as to positively bias the base 8 with respect to the emitter 7 when the terminal 4 becomes positive with respect to the terminal 5 in response to a positive marking pulse of current. Hence, as is known, the transistor 3' is held cut-off and therefore no current flows in its collector circuit, whereby the magnet 1 is held deenergized.

On the contrary, upon receiving either a negative spacing pulse such as a line current inversion, or a zero level spacing pulse such as a line current interruption, the voltage between the terminals 4 and 5 becomes either zero or negative thus rendering the base 8 negative with respect to the emitter 7. Hence the transistor 3 is brought into conduction so that an exciting current may flow from the source 2 through the emitter 7 and the collector 6 to the magnet 1 thus energizing same.

It will thus be apparent that the magnet 1 is held constantly deenergized during a steady marking condition. Moreover, by means of the described circuit the neutral magnet 1 is enabled to receive both single-current and double-current telegraph signals.

Furthermore, through an appropriate predetermination of the biasing resistance network the transistor 3 may be bottomed when conducting so that the exciting current developed through its collector circuit will have a constant value irrespective of the eventual fluctuations of the telegraphic line current, thus assuring a constant reliability of the selector magnet.

It is finally to be noted that in a receiving unit according to the invention the telegraphic line is loaded by a true resistance, thus avoiding the distortions which are normally introduced into the telegraphic signals by the inductance of the selector magnet or other receiving relays directly connected to the line.

What I claim is:

Telegraph receiving unit comprising a pair of input terminals for receiving telegraph signals, including positive marking pulses, negative spacing pulses and zero level spacing pulses, a single transistor having an emitter electrode, a collector electrode and a base electrode, a direct current source supplying the emitter-collector circuit of said transistor, 21 neutral selector magnet, said current source and said magnet being connected in series with each other between said emitter and collector electrodes, a first and a second resistance connected in series with each other across said source, the junction between said first and second resistance being connected to said base electrode through a third resistance, a fourth and a fifth resistance connected in series with each other across said input terminals, said fourth resistance being connected between said emitter electrode and said base electrode, said first, second, third and fourth resistances having such a value, that by receiving said zero level spacing pulses said source produces through said fourth resistance a first voltage drop which biases the emitter-base circuit of said transistor to saturate said transistor for energizing said magnet, and said fifth resistance having such a value with respect to the other resistances that in response to said positive marking pulses a second opposite voltage drop is produced through said fourth resistance which biases said emitter-base circuit to cut-off said transistor for deenergizing said magnet, said first voltage drop being further increased in response to said negative spacing pulses.

(References on following page) References Cited in the file of this patent UNITED STATES PATENTS Snijders Apr. 20, 1954 Harris Sept. 20, 1955 Wideroe Aug. 14, 1956 Aron Dec. 4, 1956 Pinckaers Mar. 25, 1958 Publication: 1 010178.

4 FOREIGN PATENTS France Nov. 25, 1957

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