US3098157A - Logical element - Google Patents

Description

y 1963 HAJlME ENOMOTO ETAL 3,098,157

LOGICAL ELEMENT Filed Dec. 16. 1958 8 Sheets-Sheet 2 Figm 30 y 15, 1963 HAJIME ENOMOTO ETAL 3,098,157

LOGICAL ELEMENT Filed Dec. 16. 1958 I 8 Sheets-Sheet 5 July 16, 1963 HAJIME ENOMOTO ETAL 3,098,157

LOGICAL ELEMENT Filed Dec. 16. 1958 Fig- 104 8 Sheets-Sheet 4 4 y 1963 HAJIME ENOMOTO ETAL 3,09

LOGICAL ELEMENT 8 Sheets-Sheet 6 Filed Dec. 16. 1958 are)" J y 16, 1963 HAJIME ENOMOTO ETAL 3,

LOGICAL ELEMENT Filed Dec. 16. 1958 s Sheets-Sheet v aired. biases This invention relates to improved logical elements having rectangular hysteresis characteristics.

The logical element utilizing a magnetic core having rectangular hysteresis characteristic has been broadly used for various objects owing to its durability and economy. The fundamental operation of said element consists in writing of any information signal into a magnetic core and reading it to transmit said information signal to the next stage. However, in the above-mentioned logical element, it is required that any undesirable electric current does not appear in the output winding during the writing operation, and the information signal is transmitted only in one direction. Accordingly, it is the state of things in the present to use the above-mentioned logical element in combination with diodes, for the various systems which necessitate writing and reading of any information signal.

An essential object of this invention is to obtain an improved logical element capable of carrying out a stable, reliable and high speed logical operation.

The novel features which are believed to be characteristics of the present invention are set forth with particularity in the appended claims, the present invention itself, however, both as to its construction and operation, together with further objects and advantages thereof, may best be understood by reference to the following description taken in connection with the accompanying drawings, in which the same or similar members are indicated by the same references, and in which FIG. 1 is a schematic diagram of a conventional logical element to be improved by this invention.

FIG. 2 shows two kinds of the reading pulse currents which are used for the logical element of FIG. 1.

FIGS. 3A, 3B and 3C are schematic connection diagrams of three kinds of the examples of this invention.

FIG. 4 is a hysteresis curve of the magnetic core to be used for the logical element of this invention.

FIG. 5 shows various pulse currents to be used for the logical element of FIG. 3A.

FIGS. 6, 7, 8, 9, 10, 11 and 12 are schematic connection diagrams of the other examples of this invention.

FIG. 13 is a schematic connection diagram of a system for showing an actual application of the logical elements of this invention.

FIG. 14 shows the various pulse currents to be used for the system of FIG. 13.

FIG. 15 shows other kinds of the various pulse currents to be used for the system of FIG. 13.

FIGS. 16 and 17 are schematic connection diagrams of the other system for showing actual applications of the logical elements of this invention.

FIG. 18 is a schematic connection diagram of a still further example of this invention.

FIG. 19 is a schematic connection diagram of a shifting register constructed by using the logical elements of this invention.

FIG. 20 is a diagram of pulse currents for describing the operation of the shifting register of FIG. 19.

FIGS. 21A, 21B and 22 are, respectively, diagrams of various pulse currents for describing the operation of the shifting register.

-In the conventional logical operation system, the logical 3,098,157 Patented July 16, 1963 "ice elements such as shown in FIG. 1 are used, each of said elements consisting of a magnetic core Ma, Mb, Me or Md, coils 11, 12, 13), 21 22 23), 31 32: 33) or (L L L wound, respectively, thereon and diodes 11, 12), 21 22) or 31, 32), n reading Pulse currents A and B having such time relations as shown in FIG. 2 are applied to the first logical element, thereby logical operation is carried out.

That is to say, for example, when an information 1 has been written in the magnetic core Ma by applying an input signal pulse current to the coil L of said core, an output pulse current can be led out of the coil L by applying the reading pulse current .A of FIG. 2 to the coil L By applying said output pulse current to the coil L of the core Mb, the information 1 is written in said core Mb. Next, an output pulse current can be led out of the coil L by applying such a reading pulse current B as shown in FIG. 2 to the coil L and then the information 1 can be written in the magnetic core M0 by applying said output pulse current to the coil L In such a manner as described above, the information 1 can be successively transmitted to the magnetic core of the next stage.

However, in the above system, when an information 1 is written in the magnetic core Ma by applying an input pulse current to the input coil L an undersirable induced electric voltage occurs in the output coil L said induced voltage having a phase opposite tothat of the output electric voltage to be read which has been induced by applying a reading pulse current to the coil L When an electric current is produced in the coil L by the above-mentioned undesirable induced output electric voltage, writing becomes incomplete and complete writing of the magnetic core Ma can not expected. Said undesirable electric current can be suppressed by providing the diodes D D D D D D as shown in FIG. 1.

However, in general, diode has such a characteristic that its backward resistance decreases just after any forward electric current has passed owing to the so-called hole storage action.

Accordingly, when the pulse interval of the pulse current A or B of FIG. 2 is shortened by increasing the frequency of said pulse current in order to increase the operation speed, the following unfavourable phenomenon will occur. For instance, when any information signal is to be written in the magnetic core Md by passing a forward electric current through the diode D said electric current being produced by an output voltage having been induced in the output coil L by applying the pulse current A of @FIG. 2 to the exciting coil L of the magnetic core Me, the next writing is carried out before the restoration of the backward resistance of the diode D is established. Consequently, when any input pulse current is applied to the coil L through the diode D by applying such a pulse current B as shown in FIG. 2 to the coil L of the magnetic core Mb, a reverse electric current due to the electric voltage induced in the output coil L is produced owing to the decrease of the backward resistance of the diode D whereby the insertion of the diode D becomes meaningless and writing of the magnetic core Mc becomes incomplete, thus causing an incomplete logical operation. Such a disadvantageous phenomenon as described above becomes particularly noticeable when it is gecgssary to pass a large electric current through the 10 e.

The above-mentioned disadvantage of the conventional logical element has been removed by this invention. In the following, the principle of this invention will first be described. In FIG. 3A, the ferromagnetic cores Ma, Mb, Ma and Md have the hysteresis characteristic as shown in FIG. 4, said cores being, respectively, provided with input coils L L L and L which are wound in the same direction and connected in'series, whereby a signal input winding IN having input terminals Ti for impression of signal pulse electric current Si is formed. Furthermore, the core Ma is provided with coils L and L having the same winding direction as the input signal winding IN and a coil L having the reverse winding di rection to that of said winding IN, the magnetic core Mb is provided with coils L and L having the reverse winding direction to that cf said winding IN, the magnetic core Me is provided with a coil L having the same winding direction as said winding IN and a coil L having the reverse winding direction to that of said winding IN, and the magnetic core Md is provided with a coil L having the reverse winding direction to that of said winding IN and coils L and L having the same winding direction as said winding IN, said coils L L L and L being connected in series to form a writing and resetting winding WS, said coils L L L and L being connected in series to form an output signal winding 0, and said coils L and L being connected in series to form an erasing winding B. When windings are wound as described above, for example in FIG. 3A, the three kinds of the coils wound on one magnetic core Ma of the hour magnetic cores, namely the signal input coil L writing and reset-ting coil L and output coil L are in the .same direction. However, in each of the other three cores Mb, Me and Md, two coils are wound in the same direction and the other coil is wound in the reverse direction. That is, in the core Mb, the writing and resetting coil L and output coil L are wound in the same direction and the signal input coil L is wound in the reverse direction. In the core Me, the signal input coil L and writing and resetting coil L are wound in the same direction and the output coil L is wound in the reverse direction. In the core Md, the signal input coil L and output coil L are wound in the same direction and writing and resetting coil L is wound in the reverse direction. Furthermore, the erasing coil L and L are wound respectively on the cores Ma and Md so as to be reversed to each other, on each of said cores Ma and Md being wound the signal input coil and output coil in the same direction. The output signal S is led out of the output terminals To through a transformer T. Between the junction point of the coil L and L and a neutral point of the primary winding of the transformer are provided other exciting terminals R which are used for applying a reading pulse current.

Now, when a resetting current s having such sufficiently large negative polarity as shown in FIG. is applied to the writing and resetting winding WS, the polarities of the residual polarizations of the magnetic cores Ma, Mb, Me and Md become, respectively, and In this case, it is necessary to select the absolute value of the peak magnetic field produced in each magnetic core by said pulse electric current to be relatively larger than the coercive force He (see FIG. 4) of each magnetic core.

When, after the polarity of the residual polarization of each magnetic core has been set as described above, a signal pulse current Si and such a writing pulse current w having positive polarity as to produce a peak magnetic field substantially equal to the coercive rliorce Hc of each magnetic core are applied, respectively, to the signal input winding IN and to the writing and setting winding WS, said current Si and w being shown in FIG. 5. The magnetic field produced by the positive Writing pulse current w and having an amplitude equal to the coercive force Hc is applied to the magnetic cores Ma and Me in the positive direction and to the magnetic cores Mb and Md in the negative direction and moreover another magnetic field produced by the signal pulse current Si is superposed on said cores. Since the coils L L and L L are wound on the magnetic cores Ma and Me in the same direction, when the polarity of the signal pulse current Si is positive, the magnetic fields due to the above-mentioned both kinds of the pulse currents are superposed, whereby positive magnetic field larger than the coercive force He is produced in the magnetic cores Ma and Me and the polarity of the residual polarization of each of said magnetic cores is switched from to On the other hand, since the coils L L and L L are wound on the magnetic cores Mb and Md in the reverse direction, the magnetic fields due to the above-mentioned both kinds of the pulse currents are difierentially superposed to each other, whereby the negative magnetic field less than the coercive force He is applied to the magnetic cores Mb and Md and the residual polarizations of said cores are maintained at positive polarity. On the contrary, when the polarity of the signal pulse current Si is negative, the positive magnetic field less than the coercive force He is applied to the magnetic cores Ma and Mc, whereby the negative polarities of the residual polarization of said magnetic cores are maintained as they are. On the other hand, since a negative magnetic field larger than the coercive force He is applied to the magnetic cores Mb and Md, the polarities of the residual polarizations of the magnetic cores Mb and Md are switched from to As a whole, when the polarity of the signal pulse current Si which is an information signal is positive, the polarities of the residual polarizations of the magnetic cores Ma, Mb, Me and Md become, respectively, and and when the polarity of said signal pulse current is negative, the polarities of said residual polarizations become, and When the polarities of the residual polarizations of the magnetic cores Ma and Mc are switched from to or those of the magnetic cores Mb and Md are switched from to in accordance with the polarity of the signal pulse current Si, an electric voltage is induced in the output coils L L L or L belonging to its respective magnetic core when the residual polarization of said core is switched in its polarity. However, since the winding direction of the output coils L and L of the magnetic cores Ma and Mb are, respectively, opposite to those of the output coils L and L of the magnetic cores Me and Md, the Voltages induced in said coils L and L and in said coils L and L respectively, cancel each other so long as the internal impedance of the electric source for applying any reading pulse current to the terminals R is selected so as to be relatively high, so that any counter current for weakening the magnetizing force of the input signal pulse current is scarcely induced in the output winding 0. Consequently, it is unnecessary to connect the diode for preventing the unfavourable current appearing in the case of writing operation.

Reading of the signal having been written in the condition of the polarity of the residual polarization of the magnetic core by the signal pulse current Si corresponding to the information signal is carried out in the following manner. First, negative and positive magnetic fields larger than the coercive force He are, respectively, app-lied to the magnetic cores Ma and Md by applying a positive erasing pulse current 8 such as shown in FIG. 5 into the erasing winding E. Next, the magnetic polarities of the magnetic cores Ma, Mb, Me, and Md are, if they are the conditions and (these conditions are correspondent to the case in which the writing is carried out by application of a positive signal pulse current), switched to the conditions and by switching the polarity of the residual polarization of the magnetic core Ma from to and then positive reading pulse current 1' as shown in FIG. 5 is applied to the terminal R. This positive pulse current applied to the output winding 0 is divided into two components In and lb. The current Ia produces a negative magnetic field in the magnetic core Ma and a positive magnetic field in the magnetic core Mb. The current Ib also produces a negative magnetic field in the magnetic core Me and a positive magnetic field in the magnetic core Md. However, since the polarities of the residual polarizations of the magnetic cores Ma, Mb,

Ma and Md are, respectively, maintained at and before the application of said reading positive pulse current, the polarities of the magnetic fields produced in the magnetic cores Ma and Mb by the current In are coincident with the polarities of the residual polarizations of the magnetic cores Ma and Mb, whereby the impedances of the output coils L and L ecome very low. On the other hand, since the polarities of the magnetic fields produced in the magnetic cores Mo and Md by the cur-rent Ib are and and the polarities of the residual polarizations of the magnetic cores Me and Md are and the magnetic field produced in the magnetic core Me by the current lb acts to vary the polarity of said core from to whereby the impedance of the output coil L becomes high. Accordingly, when the positive writing input signal current Si, the erasing pulse current e for switching the magnetic polarities of the magnetic cores Ma, Mb, M and Md from and to and and the positive reading pulse current r for reading are successively applied to the terminals Ti, erasing winding E and terminals R, almost all parts of the reading pulse current consists of the current Ia and passes substantially through the output coil-s L and L whereby a positive output pulse current So can be led out of the output terminals To through the secondary winding of the transformer T.

When, after the output signal pulse current So having the same polarity as that of the input signal pulse current Si has been taken out, a negative resetting pulse current s such as shown in FIG. of which amplitude is sufficiently large is applied to the writing and resetting winding WS, the polarity of the residual polarization of the magnetic core Mc is completely switched from to whereby the polarities of the magnetic cores Ma, Mb, Me and Md are restored to the initially set conditions, that is to say, to the conditions and On the contrary, when, after the magnetic polarities of the magnetic cores have been set to the conditions and by writing with the negative signal pulse current Si, the polarities of the residual magnetizations of the magnetic cores Ma, Mb, Mc and Md are switched to and by applying the positive erasing pulse cur-rent e to the erasing winding B, only the magnetic polarity of the magnetic core Md becomes Consequently, when the positive reading pulse current r for reading is applied to the terminals R, negative magnetic fields are produced in the magnetic cores Ma and Ma and positive magnetic field is produced in the magnetic cores Mb and Md. However, since in this case, the polarities of the magnetic polarizations are and in the cores Ma and Mb and and in the cores Me and Md, the impedances of the output coils L and L against the current Ib become very low and the impedance of the output coil L against the current Ia becomes very high. Consequently, almost all parts of the pulse current 1' passes through the output coils L and L as the current Ib, so that the negative output pulse current So having the same polarity as that of the input signal pulse current Si can be led out of the terminals T0 through the secondary winding of the transformer T. Next, when the resetting pulse current s is applied to the writing and the resetting winding WS, the magnetic polarities of the magnetic cores are restored to their initial conditions, that is to say, to and In the above-mentioned operation, since the magnetic polarity of either one of the magnetic cores Ma and Md is varied by applying the erasing pulse current 2 to the erasing winding E before the application of the reading pulse current 1', an electric voltage is induced in the output coil L or L owing to said polarity variation of the core Ma or Md, whereby an electric current passes through the output coils L and L of the other magnetic cores Mb and Mc, thus disturbing the written statuses of said cores Mb and Mc. Such a disturbance as described above 6 can be eliminated or remarkably reduced by broadening suitably the pulse width of the pulse current e. Furthermore, said disturbance occurring in the writing can be removed by bringing the electric voltages induced in the coils L and L of the magnetic cores Mb and Md or in the coil-s L and L of the magnetic cores Ma and Me to the balanced state by reducing the number of turns of the output coils L and L of the magnetic cores Mb and Me and by increasing the volumes of the magnetic cores Mb and Mc, whereby the written conditions of the magnetic cores Mb and Mc can be held in the non disturbed states even when the electric current flowing through the output coil-s is increased by the pulse current e.

On the other hand, since the electric current induced by the erasing pulse current e and disturbing the written states of the magnetic cores Mb and Mc passes through the output winding 0 in the reverse direction to that of the reading pulse current, the electric current disturbing the written states of the magnetic cores Ma and Mc can be also suppressed by connecting, directly or through a transformer, diodes D and D to the output winding 0 as shown in FIG. 3B or 3C, said diodes giving no unfavourable influence to the reading pulse current r, because the reading pulse current flows in (the forward direction even when said diodes are connected in the output side as shown in FIGS. 3B and 30. For said object, the cheap and simple diodes having no special characteristics can be used, because said diodes are used for only the object of suppressing the electric current disturbing the written conditions of the magnetic cores Mb and Me.

When any one of the above-mentioned countermeasures isadopted to suppress the disturbance of the written conditions of the magnetic cores Mb and Mc due to the erasing pulse current 2, a sufficiently large output pulse current can be obtained by the pulse current r.

As described above, according to this invention, the undesirable electric voltages induced in the writing operation cancel one another by balancing said voltages by a particular connection of the windings of the magnetic cores, whereby it has become possible to lead out the output voltage with sufficiently writ-ten magnetization state. The input winding IN, output winding 0 and writing and resetting winding WS may be of any type so far as they are orthogonal one another. Cores are said to be orthogonally wound with respect to each other when a plurality of coils are wound on each of an even plurality of cores in which half the even plurality is also even, the individual coils of the separate cores being respectively connected in series to provide a plurality of series windings, the series coils in at least one winding being all wound in the same direction; and in each of the other windings an equal number of coils are wound in one direction as in the reverse directions and the coils on each core including at least one coil oppositely wound from the other coils wound thereon.

When, as described above, the written information is to be read out by the flowing direction of the reading pulse current r applied to the output winding, an output current having a constant current characteristic can be obtained so far as the electric source for supplying the terminals r with a reading current is maintained at a constant current condition by making the internal impedance of said source high, because the reading pulse current is led out, as it is, as the reading output.

As described above, and differing from ttllfi conventional logical element in which the undesirable current occurring due to the electric voltage induced in the output winding in the writing operation is suppressed by diodes, said undesirable electric current is cancelled by arranging the input winding IN, output winding 0 and writing and resetting winding WS in the orthogonal states and by balancing the electric voltages induced in the output windings of the magnetic cores, it becomes possible to make the clock frequency of the reading pulse current high, whereby the logical element capable of carrying out a quick operation can be obtained.

In FIG. 6 is shown a modified example of this invention, in which the winding manner of the winding WS is modified. In this example, since the coils L and L and L and L are respectively, balanced from each other, the impedance of the electric source for applying the pulse current r to the terminals R may be low. When it is desirable to omit the coupling transformer T, the example in FIG. 6 may be modified as shown in FIG. 7 by doubling the input winding IN of the next stage. Furthermore, when a reading winding RE consisting of the coils L L L and L is wound on the magnetic cores Ma, Mb, Mo and Md to be orthogonal to the windings IN, WS and O as shown in FIG. 8 and a positive pulse current is applied to said winding RE in the reading, the same operation as those in the above mentioned various examples will be attained. In this case also, the coupling transformer T becomes unnecessary.

In the above examples, both the resetting pulse current s and writing pulse current w are applied to the Winding WS. However, since the polarities of the magnetic fields produced in the magnetic cores are the same in the reading of the output signal by applying the positive reading pulse current r to the terminals R and in the resetting of the polarities of the magnetic fields of the magnetic cores by applying the negative resetting pulse current s to the Winding WS, it is possible to take out the output signal while restoring the magnetic cores to their initial set conditions by means of simultaneous application of the pulse currents r and s. In this case, the magnetic fields produced by the pulse currents r and s are superimposed in the same direction, so that the intensity of the resetting pulse current s may be low so far as it can produce the magnetic field which is almost equal to the coercive force He. In this example, the same operation can be attained by adopting a negative writing pulse current w and by applying a resetting positive pulse current s of a suitable amplitude following the application of a reading pulse current.

Furthermore, it is possible to reset the polarities of the residual polarizations of the magnetic cores to their initial conditions such as and (-1-) by applying the reading pulse current 1' to the terminals R even when said current r is so large that the magnetic fields produced in the magnetic cores by said current r become larger than the coercive force He. Accordingly, in such a case as described above, the resetting pulse current s to be applied to the winding WS will become unnecessary. On the other hand, since the magnetic fields having, respectively, the polarities and can be produced in the magnetic cores Ma, Mb, Ma and Md by applying any pulse current having the reverse polarity to that of the reading pulse current r to the terminals R, the terminals R can be used also as the Writing terminals W in the case of writing instead of the application of the positive writing pulse current w to the winding WS. In this case, the writing can be carried out by applying the negative writing pulse current w to the terminals R to produce the magnetic'fields being almost equal to the coercive force He in the magnetic cores Mu, Mb, Me and Md, and by applying the input signal pulse current Si to the winding IN. Accordingly, so far as the abovementioned conditions are established, the same operation as those in the former examples can be attained even when the winding WS is removed as shown in FIG. 9. The example in FIG. 9 may be modified as shown in FIG. 10, in which the winding IN is connected in series to the secondary winding of an input transformer T 3 to form a closed circuit and the writing terminals W are provided between the central point of said secondary winding and the junction point of the coils L and L of the magnetic cores Mb and Me. In the example of FIG. 10 also, when any input signal pulse current is applied to the primary winding of the transformer T and the positive writing pulse current w having such an intensity as to produce the magnetic fields which are almost equal to the coercive force He in the magnetic cores Ma, Mb, Me and Md is applied to the terminals W, the entirely same operation as those in the above-mentioned other examples can be attained.

The above-mentioned examples relate to the case in which for suppressing the counter electric current appearing in the output winding 0 in the writing, four magnetic cores are used and said output winding 0 consists of four output coils L L L and L which are, respectively, wound on said magnetic cores and are connected reversely per pair. However, the magnetic cores Ma and Md among the four cores may be substituted by the diodes D and D as shown in FIG. 11 so far as the internal impedance of the electric source connected to the terminals R is selected to be large. In this example, the erasing winding E becomes unnecessary. That is to say, when the logical element is set, the magnetic polarities of the magnetic cores Mb and Mc are and but when the writing pulse current w and the input signal pulse current Si are, respectively, applied to the windings VJS and IN in the writing, the magnetic polarity of either one of the magnetic cores Mb and Me is switched to reverse polarity in accordance with the polarity of the input signal pulse current Si, whereby the magnetic polarities of the magnetic cores Mb and Mc become and or and The counter electric current induced by said switching of the magnetic polarities must pass through the circuit consisting of L --D D L because of high internal impedance of the electric source connected to the terminals R, but since the diodes D and D are reversely connected to each other to the closed circuit, said counter electric current is prevented by any one of the diodes D and D whereby information writing can be easily carried out by use of a relatively small input signal current, as in the case in which four magnetic cores are used. In this example, the reading can be carried out by applying the positive reading pulse current r to the terminals R, whereby an output pulse can be led out by switching the magnetic polarity of the magnetic core Mc from to when the magnetic cores Mb and Mc have been written in the polarities of and and by switching the magnetic polarity of the magnetic core Mb from to (-5-) when said cores Mb and Mc have been written in the polarities of and Said electric current r is not aifected by the diodes D and D because said diodes are connected in the forward direction of said current. Resetting of the conditions can be done by applying the pulse current s to the winding WS after or at the same time with the reading by the pulse current r, or by enlarging remarkably the pulse current r, said resetting being same as those in the former examples. In this example, the same operation can be attained by adopting a negative writing pulse current and by applying a resetting positive pulse current of a suitable amplitude next to the application of a reading pulse current.

The example in FIG. 11 may be further modified as shown in FIG. 12, in which both of the input terminals Ti are formed, respectively, at a point between the coil L of the magnetic core Me and the diode D and at a point between the coil L of the magnetic core Mb and the diode D whereby the winding IN is made unnecessary.

As described above, since in the logical element of this invention, the counter electric current appearing in the writing and weakening the magnetization force of the magnetic cores which is produced at the time when the input signal pulse current Si is applied to the terminal Ti is so suppressed or cancelled that it may not pass through the output winding 0, writing can be easily carried out by use of a relatively weak input signal pulse current. Furthermore, the reading pulse current 1' is passed directly through the output winding, so that the output pulse electric current having a constant current characteristic can be led out by making the internal inrpedance of the electric source for the application of the reading pulse current high, thus enabling very easy branching in the case in which a plurality of the logical elements is used. We have completely described in connection with the operation the principle of the logical elements of this invention.

Now, we will describe the combination of said logical elements for carrying out an actual logical operation in the following.

In the construction of a shifting register, as shown in FIG. 13, the output terminals T of the logical elements in FIGS. 3, 6, and 1 1 are successively connected to the input terminals Ti of the next stage through respective coupling impedance Z, and the windings of each stage are grouped in three groups -I, II and III. To the windings and terminals of each group are, as shown in FIG. 13, applied, successively, the writing pulse current w, erasing pulse current e, reading pulse current r and resetting pulse current s so that the phases of the pulse currents to be applied to the groups I, II and III may be, succesively, lagged by 120 and the pulse current r and resetting pulse current s of any stage may be applied at the same time with the application of the Writing pulse current w of the next stage as shown in FIG. 14, the above-mentioned case being correspondent to the case of simultaneous application of the currents r and s, and the current s being not necessary when the pulse current r is remarkably large, whereby the information can be successively transmitted .to the following stages. The example in FIG. 13 relates to the system in which the logical elements of this invention are connected in cascade through the coupling impedances Z. The operation of said system will be described in the following. When a positive writing pulse current w is applied to the Winding WS of the left end logical elements belonging to the first group I, that is to say, a positive or negative information signal pulse current Si is applied to the input winding IN of said logical elements at the time t of FIG. 14, the polarities of the residual polarizations of the magnetic cores are switched from the reset conditions and to the conditions and or and in accordance with the polarity of the cur-rent Si, whereby any information can be written in the magnetic cores in the form of polarity of the residual polarization. On the other hand, when a positive erasing pulse current e is applied to the erasing winding E at the time t of FIG. 14, the polarities of the residual polarizations of the magnetic cores are switched to the conditions and or and in accordance with the polarity of the current Si. Furthermore, when the reading positive pulse current r and resetting pulse current s are simultaneously applied, respectively, to the terminals R and the winding WS at the time t of FIG. 14, a positive or negative output pulse current will be led out from the output terminals T0 in accordance with the polarity of the written information signal according to such principle of the logical element as described already. At the same time with said reading, the magnetic cores belonging to the first group I are reset to the condition and At this time, the output pulse current is transmitted to the input winding IN of the second group II of the next stage and recording pulse cur-rent w is applied to the winding WS of the second group of said next stage, whereby the polarities of the residual polarizations of the magnetic cores belonging to said second group II are switched to the same conditions and or and as those in the just prior stage, thus causing the trans mission of the information signal from the prior stage to the next stage.

Similarly, the information signal can be successively transmitted to the magnetic cores belonging to the third group III and so on.

In the above system, when the number of turns of the output winding and input winding, and their coupling impedances are suitably selected, the magnetization force to the reverse direction can be reduced to fractional value of the regular direction, whereby the reverse transmission can be effectively prevented. In such a case, a shifting register can be constructed by grouping the cascaded logical elements into only two groups I and II and by applying, successively, such pulse currents as shown in FIG. 15 to the groups.

Tire system in FIG. 13 relates to the shifting register, but when the output terminals T0 are reversely connected to the input terminals Ti of the next stage as shown in FIG. 16, the written information in the prior stage is transmitted with a reverse polarity to the next stage, whereby logical operation Not is carried out.

Still furthermore, when, as shown in FIG. 17, an input transformer T having primary windings of odd number over three is provided on the input side and three signal pulse currents having the polarities being corresponding to the information input signals and having equal amplitude are simultaneously applied, respectively, to the first, second and third primary windings Ti Ti and Tig, the polarity of the pulse current passing through the input winding IN can be determined by the resultant polarities of the pulse currents passing through said primary windings, thus enabling the operation of any logical sum or logical product. The same object can be attained by use of three input coils and by the application of input signm to each of said coils, in the place of application of input signal through a transformer.

Furthermore, the logical element necessitating no transformer can be obtained by adopting the connection of FIG. 18, in which the reading winding RE in FIG. 8 is omitted and the erasing winding E is used as the reading winding to which the reading pulse current is applied in the place of the erasing pulse current. In the embodiment of FIG. 18, the input signal winding IN is formed by series connection of four coils L 21, L and L which are wound, respectively, on the magnetic cores Ma, Mb, Me and Md in the same winding direction, the writing and resetting Winding WS is formed by series conncction of two coils L and L wound on the magnetic cores Ma and Mc in the same direction as the winding IN and other two coils L and L wound, respectively, on the magnetic cores Mb and Md in the reverse direction to the winding IN, the reading winding R is formed by series connection of two coils L and L Wound, respectively, .on the magnetic cores Ma and Md, said coil L being wound in the reverse direction to the winding IN and said coil L being wound in the same direction as the winding IN, and the output winding 0 is formed by series connection of four coils L L L and L wound, respectively, on the magnetic cores Ma, Mb, Me and Md, said coils L and L being wound in the reverse direction to the winding IN, said coils L and L being Wound in the same direction as the winding IN, and said winding 0 being provided with a coupling impedance Z connected thereto in series.

According to the example in FIG. 18, writing of information signal in the magnetic cores can be attained by resetting said cores by applying a negative resetting pulse current to the winding WS and then by applying the input pulse current and writing pulse current. The electric voltage induced by said writing can not appear in the output winding. When a reading pulse current 1' is applied to the reading winding E, after the above-mentioned writing is completed as described above, an output electric current having the polarity corresponding to the polarity of the written information will appear in the output winding and will be transmitted to the next stage, whereby the magnetic cores of said next stage will be written by said output current. After said writing of said next stage, the prior stage is reset by a resetting pulse current. In this case, an output current due to said resetting pulse current is induced in the output winding of said prior stage, but this output current does not affect the written information of the magnetic cores of said next stage, because an information has been already written in the magnetic cores of said next stage, writing pulse current is not applied to the next stage, and the magnetic field of the cores in the next stage can not exceed the coercive force He.

As described in connection with FIG. 3A, when the disturbing current flowing through the output winding at the writing-in is balanced out by increasing the volumes of two magnetic cores in comparison with those of the other two magnetic cores (but coercive force represented by ampere-turn being made equal) and by decreasing winding turn of the output windings of the former two cores, the writing condition is not disturbed by said disturbing current.

On the other hand, the disturbing current flowing through the output winding at the time except writing-in becomes to be small, is made so small by said increase of the volumes of the magnetic cores and by decreasing turn number of the output windings of said cores as that said disturbing current produces ampere-turn which is not sufiicient to vary the magnetization states of said cores, so that in this case also, said disturbing current would not disturb the written condition. The actual embodiment of the above case is shown in FIG. 23. This embodiment is entirely same as that of FIG. 18. However, the volume of each of the magnetic cores Ma and Md and turn number of the output winding of each of said cores are made, respectively, n and N times those of FIG. 18, and the volume of each of the magnetic cores Mb and M and turn number of the output winding of each of said cores are made, respectively, N and n times those of FIG. 18. In this case, let it be assumed that N n. Operation of the embodiment of FIG. 23 is as follows.

Taking in consideration of FIG. 22, when a sufiiciently large reset pulse current having negative polarity is made to pass through the writing and resetting windings, the states of the magnetic cores Ma, Mb, Me and Md become, respectively, and

Next, a writing pulse current capable of producing positive magnetic fields equal to coercive force of the mag netic cores is impressed into the writing winding and simultaneously, input pulse current of positive or negative polarity corresponding to the information is impressed into the signal input winding. In this case, if the input pulse current is of positive polarity, the states of the magnetic cores become (-1-), (-1-) and In this state, magnetic filed variation occurs in the magnetic cores Ma and Me and electric currents are induced in the output windings of said cores. However, since the winding directions of the output coils L and L of the cores Ma and Mc are opposite to each other and the volume of the core Ma, turn number of the output coil of said core Ma, volume of the magnetic core Mo, and turn number of the output coil of said core Mc are, respectively, n, N, N and n times those of FIG. 18, the induced electric voltage are equal and reverse one another so as to be balanced out, whereby any current does not occur in the output circuit, and the writing is efliciently carried out. Now, when a reading-out pulse current of positive polarity is impressed into the erasing winding, the state of only the magnetic core Ma varies and an electric voltage is induced at the terminals of the coil L whereby an output pulse current flows through the coupling impedance Z, output terminals To, signal input winding of the next stage, output terminals T0, coils L L and L In this case, the coil L is directed so as to be low impedance for the output pulse current. Although the coils L and L are directed so as to be high im- 12 pedance, their ampere-turns, because of their reduced number of turns, cannot exceed the coercive forces of their cores, so that said coils L and L assume low impedance. Accordingly, a large output pulse current can be led out of the output terminals To without being reduced by the output winding. Similarly, when input signal pulse current of negative polarity is impressed into the signal input winding, a large output pulse current, but having reverse polarity, can be led out of the output terminals T0.

The logical operation of the logical circuit consisting of the logical elements such as shown in FIG. 18 will be described in the following in connection with the example of FIG. 19 which relates to a shifting register.

In FIG. 19, the output winding 0 of each stage consisting of such a logical element as shown in FIG. 18 is connected in series to the input winding IN of the next stage through a coupling impedance Z and all the windings are, successively, grouped into four groups I, II, III and IV. Let it be assumed that the writing pulse current w, reading pulse current 1' and resetting pulse current s are successively and synchronously applied to the writing and resetting winding WS and reading winding E so that the phases of said pulses of each group may be, successively lagged by as shown by I, II, III and IV in FIG. 20, the reading pulse current r of the prior stage and the writing pulse current W of the next stage may be simultaneously applied, and the resetting pulse current s of the prior stage and the reading pulse current may be simultaneously applied. Now, when a positive or negative information pulse current is applied to the input Winding IN at the time when a positive writing pulse current in is applied to the writing and resetting winding WS of the left side logical element belonging to the first group I, the residual polarizations of the magnetic cores are switched from the reset conditions and to the conditions i-, and or and in accordance with the polarity of the input signal pulse current, whereby the information is written in the magnetic cores in the form of the polarity of the residual polarization. The information written in the form of polarity of the residual polarization is led out of the output winding 0 in the form of the polarity of the electric current by applying the reading pulse current r to the first group I at the time 1 This current is transmitted through the coupling impedance Z to the input winding IN belonging to the logical element of the next stage and to the second group II in the form of the same polarity as the information signal pulse current applied to the prior stage. At the same time with said transmission of said output current, the writing pulse current w of the second group II passes through the winding WS of the logical element belonging to the second group II, so that the residual polarizations of the magnetic cores belonging to the second group II become the same conditions and or and thus causing the transmission of the information signal to the next stage. When, after said transmission of the information signal of the prior stage to the next stage, a negative resetting pulse current s is applied to the winding WS belonging to the group I at the time 2 the residual polarizations of the magnetic cores of the first group I are reset to the conditions and When, at the same time with said resetting, a reading pulse current 1' and writing pulse current w are, respectively, applied to the Winding E of the second group II and the winding WS of the third group III, the information signal transmitted from the group I to the group II is further transmitted to the magnetic cores of the group III. In such a manner as described above, the information signal can be successively transmitted in the order of I-IIIII'IV-I. Of course, when a reading pulse current I is applied to the winding E of the group II, not only an output current occurs in the output winding 0, but also a counter current occurs in the input winding IN through the coupling impedance Z and the output winding 0 of the first group I of the prior stage. However, as described already, the polarities of the residual polarizations of the magnetic cores of the first group I can be determined by the resetting pulse current s applied to the group I without being affected by said counter current, because a large resetting pulse current s is flowing in the group I. Moreover, when the residual polarizations of the magnetic cores of the group II is reset by the resetting pulse current s applied to the group II of the next stage at the time t the counter current passes through the output winding and input winding 'IN, but since a large reading pulse current r is flowing in the group III of the next stage connected to said output winding 0, the reading action of the group III of the next stage is not affected by said counter current. The group I of the prior stage connected to the input winding IN is in dormant state between reset and rewrite pulses. The above-mentioned counter current is induced in the output Winding of the group I by the variation of the magnetic flux in the magnetic cores Mb or Me, because the winding direction of the input winding IN are same. However, reverse transmission of the information may be prevented by selecting the "alue of the coupling impedance Z so that the magnetic field produced in the magnetic cores of the group I of the prior stage by said counter current may not exceed the coercive force He.

As described above, the logical element of this invention can transmit successively the information by use of the magnetic cores and impedances without using the directional control elements between the stages. Accordingly, diodes are not necessary, whereby an operation circuit of which reliability and operation speed are very high can be obtained.

The example of FIG. 19 relates to the system in which the cascaded logical elements are grouped into four groups I, II, III and IV, but when said elements are grouped into three groups I, II and III, the writing and reading pulse currents w and r and resetting pulse current s which are applied in the time order as shown in FIG. 21A and 21B are adopted.

Furthermore, when the ratio of the turn number of the output winding to that of the input winding is selected to be so large that the electric voltage induced in the input Winding may be smaller than that induced in the output winding, the directional shifting of the information can be attained by grouping the windings into two groups I and II and by applying successively the various pulse currents in the order such as shown in FIG. 22. On the other hand, when the output terminals T0 is connected in reverse series to the input winding of the neXt stage, Not operation can be carried out. Of course, any logical sum or logical product can be obtained in accordance with the principle of the majority by the resultant polarity of odd informations.

As described above, this invention relates to the improved logical elements characterized in that reading is carried out after the writing has been sufiiciently completed by maintaining the input and output windings in the unrelated conditions by arranging the input, writing and output windings to be in orthogonal states relative to one another and by balancing the undesirable electric voltage induced in the output winding by the writing operation. Accordingly, a sutl'icient output power can be obtained, and diodes can be omitted or only the simple and cheap diodes are necessary, thus enabling the formation of a cheap and reliable logical element in which operation speed is high.

While we have described particular embodiments of our invention, it will, of course, be understood that we do not wish our invention to be limited thereto, since many modifications may be made and we, therefore, contemplate by the appended claims to cover all such modifications as fall within the tune spirit and scope of our invention.

What we claim is:

1. A logical element comprising four magnetic cores having rectangular hysteresis characteristic, each of the four cores being provided with signal input coils of odd number, a writing and resetting coil, and an output coil, the coils of the same kinds being connected in series to form, respectively, input windings, a writing and resetting winding and an output winding, and all the said coils being wound on respective cores in such a manner that three kinds of the coils of one core are wound on said core in the same direction, one of three kinds of the coils of each of the other three cores is wound in the direction reverse to those of the remaining two kinds of the coils and each of said input windings, writing and resetting Winding and output winding includes one of said reversely wound coils; erasing coils wound on either one pair of two pairs of the four magnetic cores, the respective input and output coils ofthe said pair of cores having the same winding direction, one of the said erasing coils being wound on the same direction as the input coil of the same core and the other of said erasing coils being wound in the direction reverse to the input coil of the same core; a reset pulse current rneans supplying a reset pulse current to the writing and resetting winding for magnetizing two cores to a similar polarity and the other two cores to the opposite polarity; writing pulse current means supplying, after said reset pulse current, a Writing pulse current for producing a magnetic force equal to coercive magnetic force of each of the said magnetic cores to the writing and resetting winding in the direction opposite to that of said reset pulse current; input signal pulse current means impressing simultaneously with the said impression of said writing pulse current, input signal pulse currents having, respectively, the same amplitude and a positive or negative polarity corresponding to the decision by majority of the information signals to the signal input windings, whereby magnetization states of only two cores among tour cores are changed and those of the other two cores are unchanged, thus causing the writing of the information signals in the form of polarity of the residual magnetization; and read-out pulse current means impressing a reading-out pulse current to the erasing winding for inducing an electric voltage according to positive or negative polarity of the writing condition in the one or the other of the output coils wound on the cores having the erasing coil whereby an output pulse current having a positive or negative polarity is obtained at the terminals of the output winding. said reset pulse current means being impressed, thereafter for resetting the magnetic cores.

2. A logical element according to claim 1, in which the volume of the magnetic cores having no erasing coils is so made n times that of the other magnetic cores having the erasing coils and the number of turns of the output coils of said former cores is made 1/11 of that of the latter cores whereby the voltages induced in the output coils at the writing are counterbalanced to mutually cancel each other, and in which the output winding and erasing winding are relative for an output pulse current having positive or negative polarity corresponding to the decision by majority of the input information signs is obtained from the output terminals by means of the electric voltage induced in the output winding by impressing a reading-out pulse current to the erasing winding 23.

3. A logical element according to claim 1, in which the logical element is provided with an output transformer having a center tap at its primary coil, both the terminals of said primary coil being connected to both the terminals of the output winding, the center tap of the said output winding and the said center tap of the primary coil of said output transformer being used as the reading-out terminals for impressing a reading-out pulse current thereto; and the means for impressing respectively, a reading, resetting, writing, erasing, and reading-out pulse currents are so related that resetting, writing, erasing and reading-out pulse currents are successpears? l sively impressed in said order and only the writing and reading-out pulse currents are impressed by a means for producing simultaneously a reading pulse current and a writing pulse current of the next stage, whereby an output pulse current having positive or negative polarity is roduced at the secondary coil of said output transformer.

4. A logical element according to claim 1 in which the writing and resetting winding is eliminated and the means for impressing writing pulse current and input signal pulse current are so related that writing is carried out by impressing a writing pulse current to the reading-out terminals and by impressing input signal pulse currents to the input signal windings at the same time as said impression of said writing pulse current, and the means for impressing resetting pulse current is connected to impress a reset pulse current to said terminals in the direction reverse to that of said writing pulse current after reading-out of the information by application of a reading-out pulse current to said terminals.

5. A logical element according to claim 1, in which the writing and resetting winding is eliminated and an input transformer having a center tap at its second coil is provided, the signal input coils of all the magnetic cores are successively connected to every other core in series, both the terminals of the secondary coil of said input transformer are connected to both the terminals of the signal input winding, and the said center tap of said input transformer and the center point of said signal input winding are utilized as the input terminals of the writing and resetting pulse current source, said transformer input winding and resetting and writing winding are being so assembled that writing is carried out by impressing an input signal pulse current to the primary side of said transformer and at the same time by impressing a writing pulse current to the input terminals of writing and resetting pulse current source, and resetting is carried out by impressing a resetting pulse current in the direction reverse to that of the writing pulse current to the writing and resetting electric source terminals after reading-out has been carried out by a reading-out pulse current.

6. A logical element according to claim 1, wherein primary winding of the said input transformer consists of several coils of odd number, both the terminals of the secondary coil of the said input transformer being connected to both the terminals of the input winding, the terminals of each of said primary coils being used as the respective signal input terminal, and wherein input signal pulse current sources are, respectively, connected to said primary coils so that input signal pulse currents having, respectively, positive or negative polarity corresponding to the information signals and having the same amplitude are simultaneously applied, respectively, to said input terminals of the said primary coils, whereby a logical operation by decision of majority in the presence of writing pulse current is carried out by means of said simultaneous application of the input signal pulse currents, the result of said logical operation being written in the magnetic cores.

7. A logical element according to claim 1, wherein at least two signal input windings are used as the input windings, said input windings being connected in series and both the end terminals of said series connected windings being connected to both the terminals of the output winding of the just preceding stage, and the center tap of said output winding and the connection point of two said input windings being used as the terminals for impressing a reading-out pulse current so that the readingout current of the just preceding stage is directly impressed as the output current to said input windings.

8. A logical element according to claim 1, wherein an output transformer is connected at its primary coil in series to the output circuit of the logical element and the loop circuit consisting of said output circuit and primary circuit is provided with rectifying elements which are, respectively, inserted in two arms of said loop circuit so 16 as to make only the current having the direction as the reading-out pulse current ilow through said output circuit, whereby a disturbing current flowing through the output circuit in the case of changing of the magnetization state of the magnetic core is checked, thus making the logical operation accurate.

9. A logical element according to claim 1, wherein the output circuit is provided with two output transformers, the primary sides of which being connected in series, both the end terminals of said series connected primary sides being, respectively, connected to both the terminals of the output winding of the logical element to form a loop, the center of the output winding and the connection point of two primary coils of said two transformers being connected to the terminals for impressing a reading-out pulse current, and the secondary coils of said transformers being so connected that one side terminals of said coils are connected in reverse series and other two terminals are connected in series through two rectifying elements which are directed in the same direction, output terminals for leading the output pulse current being provided at the connection point of two secondary coils of said two transformers and at the connection point of said two rectifying elements.

10. A logical element according to claim 1, wherein two magnetic cores wound with erasing coils are eliminated together with said coils, an output transformer is provided at the output circuit of the logical element, the input coils, writing and resetting coils and output coils, wound on the two remaining magnetic cores are connected in series, respectively, the both terminals of the output coils are connected to both terminals of the primary coil of the said output coils are connected to both terminals of the primary coil of the said output transformer and the connection point of two output coils are connected to the input terminals of the reading-out pulse current source, thus dividing the primary side of said transformer into two arms, each arm containing an output coil wound on a magnetic core and a rectifying element inserted in series therein so as to make only the current having the same direction as the reading-out pulse current pass through the circuit of the output winding; the means for impressing a reset pulse current is connected to the writing and resetting winding so as to magnctize on magnetic core in one state and the other in the opposite state; the means for impressing a writing pulse current is connected to the writing and resetting winding so as to impress, after imression of said reset pulse current, a writing pulse current capable of producing a magnetic force which is equal to the coercive magnetic force of each of the magnetic cores to said winding in the direction opposite to that of said reset pulse current to magnetize two cores in positive or negative state depending on the decision by majority of input pulse currents having, respectively, positive or negative polarity and supplied from the prior stage; the means for impressing a reading-out pulse current is connected to said reading-out terminals to make a reading-out pulse current flow through each of said arms in the primary circuit of said output transformer, said pulse current having a magnitude being in inverse proportion to respective impedance of said arm; and the terminals of the secondary coil of said output transformer is used as the terminals for obtaining an output pulse current; said writing and readingout pulse currents are impressed, respectively, simultaneously with a reading-out pulse current and a writing pulse current of the next stage.

11. A logical element according to claim 10, wherein the signal input winding is eliminated and signal input terminals are provided at the connection points of the rectifying elements with the output winding, and writing is carried out by simultaneous application of writing pulse current and signal input pulse current, respectively, to the writing and resetting winding and to said terminals.

(References on following page) References Cited in the file of this patent UNITED STATES PATENTS Van Nice Aug. 21, 1956 Van Nice Aug. 21, 1956 5 Lubk-in July 30, 1957 Collins Oct. 8, 1957 Lanning Mar. 25, 1958 Canepa May 6, 1958 Spencer May 13, 1958 10 Goodell et a1 Aug. 5, 1958 Bartik Sept. 30, 1958 18 Wylen Oct. 21, 1958 Meyerhoflf Nov. 18, 1958 Shelman Sept. 1, 1959 Meyerhoff Sept. 15, 1959 Gunderson Oct. 20, 1959 Lawrence Feb. 2, 1960 Richards May 3, 1960 Ridler et a1 May 31, 1960 Lincoln et a1 June 28, 1960 Loev et al June 28, 196 0 Eckert Aug. 16, 1960

Claims (1)

1. A LOGICAL ELEMENT COMPRISING FOUR MAGNETIC CORES HAVING RECTANGULAR HYSTERESIS CHARACTERISTIC, EACH OF THE FOUR CORES BEING PROVIDED WITH SIGNAL INPUT COILS OF ODD NUMBER, A WRITING AND RESETTING COIL, AND AN OUTPUT COIL, THE COILS OF THE SAME KINDS VEING CONNECTED IN SERIES TO FORM, RESPECTIVELY, INPUT WINDINGS, A WRITING AND RESETTING WINDING AND AN OUTPUT WINDINGS, AND ALL THE SAID COILS VEING WOUND ON RESPECTIVE CORES IN SUCH A MANNER THAT THREE KINDS OF THE COILS OF ONE CORE ARE WOUND ON SAID CORE IN THE SAME DIRECTION, ONE OF THREE KINDS OF THE COILS OF EACH OF THE OTHER THREE CORES IN WOUND IN THE DIRECTION REVERSE TO THOSE OF THE REMAINING TWO KINDS OF THE COILS AND EACH OF SAID INPUT WINDINGS WRITING AND RESETTING WINDING AND OUTPUT WINDING INCLUDES ONE OF SAID REVERSELY WOUND COILS; ERASING COILS WOUND ON EITHER ONE PAIR OF TWO PAIRS OF THE FOUR MAGNETIC CORES, THE RESPECTIVE INPUT AND OUTPUT COILS OF THE SAID PAIR OF CORES HAVING THE SAME WINDING DIRECTION, ONE OF THE SAID ERASING COILS BEING WOUND ON THE SAME DIRECTION AS THE INPUT COIL OF THE SAME CORE AND THE OTHER OF SAID ERSING COIL OF THE SAME CORE; A RESET PULSE CURRENT MEANS INPUT COIL OF THE SAME CORE; A RESET PULSE CURRENT MEANS SUPPLYING A RESET PULSE CURRENT TO THE WRITING AND RESETTING WINDING FOR MAGNETIZING TWO CORES TO A SIMILAR POLARITY AND THE OTHER TWO CORES TO THE OPPOSITE POLARITY; WRITING PULSEL CURRENT MEANS SUPPLYING, AFTER SAID RESET PULSE CURRENT, A WRITING PULSE CURRENT FOR PRODUCING A MAGNETIC FORCE EQUAL TO CORECIVE MAGNETIC FORCE OF EACH OF THE SAID MAGNETIC CORES TO THE WRITING AND RESETTING WINDING IN THE DIRECTION OPPOSITE TO THAT OF SAID RESET PULSE CURRENT; INPUT SIGNAL PULSE CURRENT MEANS IMPRESSING SIMULTANEOUSLY WITH THE SAID IMPRESSION OF SAID WRITING PULSE CURRENT, INPUT SIGNAL PULSE CURRENTS HAVING, RESPECTIVELY, THE SAME AMPLITUDE AND A POSITIVE OR NEGATIVE POLARITY CORRESPONDING TO THE DECISION BY MAJORITY OF THE INFORMATION SIGNALS TO THE SIGNAL INPUT WINDINGS, WHEREBY MAGNETIZATIONED STATES OF ONLY TWO CORES AMONG FOUR CORES ARE CHANGED AND THOSE OF THE OTHER TWO CORES ARE UNCHANGED, THUS CAUSING THE WRITING OF THE INFORMATION SIGNALS IN THE FORM OF POLARITY OF THE RESIDUAL MAGNETIZATION; AND READ-OUT PULSE CURRENT MERANS IMPRESSING A READING-OUT PULSE CURRENT TO THE ERASING WINDING FOR INDUCING AN ELECTRIC VOLTAGE ACCORDING TO POSITIVE OR NEGATIVE POLARITY OF THE WRITING CONDITION IN THE ONE OR THE OTHER OF THE OUTPUT COILS WOUND ON THE CORES HAVING THE ERASING COIL WHEREVY AN OUTPUT PULSE CURRENT HAVING A POSITIVE OR NEGATIVE POLARITY IS OBTAINED AT THE TERMINALS OF THE OUTPUT WINDING, SAID RESET PULSE CURRENT MEANS BEING IMPRESSED, THEREAFTER FOR RESETTING THE MAGNETIC CORES.

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