US3069603A - Semi-conductor device and method of making - Google Patents
Semi-conductor device and method of making Download PDFInfo
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- US3069603A US3069603A US784589A US78458959A US3069603A US 3069603 A US3069603 A US 3069603A US 784589 A US784589 A US 784589A US 78458959 A US78458959 A US 78458959A US 3069603 A US3069603 A US 3069603A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
- H10D62/834—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge further characterised by the dopants
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/40—Resistors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D99/00—Subject matter not provided for in other groups of this subclass
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
- Y10S257/926—Elongated lead extending axially through another elongated lead
Definitions
- the present invention relates in general to semiconductor devices and more particularly concerns a novel voltage reference device characterized by an exceptionally low temperature coefficient and methods of making such devices.
- the novrl device relatively insensitive to temperature variations, but the desired reference potential is accurately provided even at very low currents.
- the novel method of making the device facilitates production in large quantities within rigid specifications with elatively few rejects.
- a significant reduction in physical size compared to prior art devices is efiiected without sacrificing power handling capabilities.
- a semi-conductor diode may be utilized as a voltage regulator if operated in the saturation region of its inverse characteristic.
- Diodes used for voltage regulation are frequently referred to as Zener diodes.
- Zener diodes When the saturation voltage is applied across the diode in the inverse direction, a nearly constant voltage drop is maintained across the diode over a relatively wide current range.
- the semi-conductor diode when used as a regulator or voltage reference, eliminates many of the problems inherent in other types of regulators. It is smaller, lighter in weight, and has a mechanical ruggedness unavailable in electron tubes or batteries. There is essentially no deterioration under storage and little or no aging over its operating life as compared with other regulating devices. Because aging and deterioration are reduced to unimportant factors, the semi-conductor regulator has a long useful life expectancy.
- Voltage regulator diodes are preferably made of silicon because silicon devices operate more reliably over wide temperature ranges and are characterized by a relatively high inverse saturation voltage.
- the saturation voltage of a silicon regulator is determined by the type of silicon material used and is a controllable element in the manufacturing process. This voltage can be predetermined within certain limits for a particular regulator.
- the saturation voltage is further dependent upon the operating ambient temperature.
- the coefiicient relating saturation voltage to temperature typically approaches 0.1% per degree C. at higher voltages, passes through in the region around 5.0 volts and is negative at lower voltages. Thus, ideally it would be desired to operate the device where the temperature coefficient is precisely zero. However, it has been difiicult in the past to obtain a precise control over saturation voltage and its relation to ambient temperature.
- the present invention contemplates and has an important object the provision of a compact silicon voltage regulator characterized by a virtually constant inverse saturation voltage over a wide range of temperatures and operating currents.
- the novel semiconductor device includes means defining a semiconducting region having first and second adjacent portions of opposite conductivity type.
- a layer of silver, having an impurity of the same conductivity type as the second portion, is in contact therewith, a portion of this impurity being diffused into the second portion.
- two of said means are pro vided with the layer of silver separating and in contact with the second portions. Ohmic contacts are electrically connected to each first portion.
- the first portions are P-type silicon impregnated with boron and the impurity in the silver is arsenic.
- the method of making the novel device includes the steps of placing the silver sheet with the impurities between and in contact with sheets of semi-conductor material, bonding the former sheets to the latter sheets to form a sandwich and heating the sandwich to diffuse at least some of the impurities from the silver to the semiconductor sheets.
- the ohmic contacts are then alloyed to the exposed sides of the semi-conductor sheets and the assembly thus formed, diced to size.
- FIGURE shows a cross sectional view of a preferred embodiment of the invention.
- view is a greatly magnified section through the thickness dimension in order to better illustrate the structure, the size of a typical unit being 0.02 thick by 0.04 square.
- Two semi-conducting regions 11 and 12 separate a layer of silver 13 having an N-type impurity, such as arsenic, at a concentration of at least /2% from ohmic contacts 14 and 15, respectively. These contacts may be made of doped gold or other suitable conducting material. Leads may be attached to the ohmic contacts 14 and 15 for connecting the device to an external circuit.
- the impurity of the silver sheet 13 is also in the portions 16 and 17 of regions 11 and 12, respectively, so that these portions are both N-type as indicated.
- the portions 21 and 22 of regions 11 and 12 are of P-type conductivity. P-N junctions 23 and 24 are thus formed in regions 11 and 12, respectively.
- the preferred method of fabricating the novel voltage regulator includes the step of first doping silicon with boron to provide a sample of P-type silicon. Borondoped silicon is preferred because its resistivity may be very accurately controlled due to the high segregation coefficient of boron. This sample of P-type silicon is then sliced to provide slices of preferably the same thickness which define the regions 11 and 12.
- Silver is doped with a concentration of at least /2% of arsenic or other suitable N-type doping material.
- the sheet 13 is formed from the doped silver.
- the slices of P-type silicon defining regions 11 and 12 are placed in contact with opposite sides of silver sheet 13.
- the silver is bonded to the two slices by heating the assembly at a temperature of approximately 1,000 C. for at least five minutes in a vacuum or inert atmosphere to form a sandwich.
- This sandwich is then heated in the same atmosphere to a temperature of approximately 1300 C. for approximately /2 hour to diffuse at least some of the impurities in the silver into the regions 11 and 12 to form the two N-type portions 16 and 17.
- the latter ternperature and time is by way of example only.
- the time and temperature may be varied to control the inverse saturation voltage of the voltage reference units. Ternper'atures within the range 1150 C. to 1300 C. and times ranging from /2 hour to six hours are suitable.
- the saturation voltage may be controlled in three different ways; by controlling the resistivity of the P-type silicon when doping the material with boron, by controlling the diflusion temperature and by controlling the diifusion time. This permits a more precise establishment of the saturation voltage than is possible with the methods of making prior art semi-conductor voltage regulators.
- the inverse saturation voltage varies directly as a function of the time temperature product and inversely as a function of the doping concentration in the P-type silicon.
- a typical value of resistivity for the P-type silicon in a representative embodiment of the invention is 0.02 ohms-cm.
- Sheets of ohmic contact material 14 and 15 are then alloyed to the P-type regions 21 and 22. After this alloying step, the assembly may be diced to form the individual voltage regulating units. These units are encapsulated with leads electrically connected to each of the ohmic contacts 14 and 15.
- Each unit is a double diode, that is, each has a nor mal inverse characteristic, regardless of the polarity of the voltage applied across contacts 14 and ll because one of the junctions 22 and 23 is forward-biased while the other is reversed-biased.
- the saturation voltage in both directions may be determined before marking the encapsulated unit with the recommended polarity orientation.
- the polarity orientation resulting in a saturation voltage closer to the prescribed value is selected for normal operation. This approximately doubles the yield of units falling within a narrow prescribed voltage range.
- a semi-conductor device comprising, first and second means defining semi-conducting regions each having first and second adjacent portions of opposite conductivity with a rectifying junction therebetween each first portion being of the same conductivity type, a layer of silver in contact with and separating both second portions and having an impurity of the same type conductivity as a potential between said first portions B, said layer interconnecting said first and second means so that said rectifying junctions therein are coupled in series and exhibit diode action but prevented thereby from exhibiting transistor action, and means for applying a potential between said first portions.
- each of said first portions is doped with boron and said impurity is arsenic.
- a voltage reference device comprising, first and second means defining semi-conducting regions each having first and second adjacent portions of opposite conductivity, with a rectifying junction therebetween each first portion being of the same conductivity type, and a layer of conducting material having an impurity of the same type conductivity as said second portion in contact with and separating both second portions, said layer interconnecting said first and second means so that said rectifying junctions therein are coupled in series and exhibit diode action but prevented thereby from exhibiting transistor action, and means for applying a potential between said first portions.
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
Description
Dec. 18, 1962 w. H. HUNTER SEMI-CONDUCTOR DEVICE AND METHOD OF MAKING Filed Jan. 2. 1959 United States Patent Gfifice 3,069,603 Patented Dec. 18, 1962 3,069,603 SEMI-C(PNBUCTOR DEVICE AND METHGD OF MAKING Windsor H. Hunter, Wabau, Mass, assignor, by mesue assignments, to Transitron Electronic Corporation, Wake= field, Mass a corporation of Delaware Filed Jan. 2, 1959, Ser. No. 784,589 8 Claims. (Cl. 317-434) The present invention relates in general to semiconductor devices and more particularly concerns a novel voltage reference device characterized by an exceptionally low temperature coefficient and methods of making such devices. Not only is the novrl device relatively insensitive to temperature variations, but the desired reference potential is accurately provided even at very low currents. The novel method of making the device facilitates production in large quantities within rigid specifications with elatively few rejects. In addition to the improved electrical performance of the novel voltage reference source, a significant reduction in physical size compared to prior art devices is efiiected without sacrificing power handling capabilities.
It is well known that a semi-conductor diode may be utilized as a voltage regulator if operated in the saturation region of its inverse characteristic. Diodes used for voltage regulation are frequently referred to as Zener diodes. When the saturation voltage is applied across the diode in the inverse direction, a nearly constant voltage drop is maintained across the diode over a relatively wide current range.
The semi-conductor diode, when used as a regulator or voltage reference, eliminates many of the problems inherent in other types of regulators. It is smaller, lighter in weight, and has a mechanical ruggedness unavailable in electron tubes or batteries. There is essentially no deterioration under storage and little or no aging over its operating life as compared with other regulating devices. Because aging and deterioration are reduced to unimportant factors, the semi-conductor regulator has a long useful life expectancy.
Voltage regulator diodes are preferably made of silicon because silicon devices operate more reliably over wide temperature ranges and are characterized by a relatively high inverse saturation voltage. The saturation voltage of a silicon regulator is determined by the type of silicon material used and is a controllable element in the manufacturing process. This voltage can be predetermined within certain limits for a particular regulator.
The saturation voltage is further dependent upon the operating ambient temperature. The coefiicient relating saturation voltage to temperature typically approaches 0.1% per degree C. at higher voltages, passes through in the region around 5.0 volts and is negative at lower voltages. Thus, ideally it would be desired to operate the device where the temperature coefficient is precisely zero. However, it has been difiicult in the past to obtain a precise control over saturation voltage and its relation to ambient temperature.
In an effort to provide a silicon regulator with a desired saturation voltage and low temperature coetficient, it was found necessary to select a pair of silicon diodes having similar characteristics near the desired range of saturation voltage and connect them in series, whereby in operation, one was forward-biased, and the other reversedbiased. This has a number of disadvantages. First, the selection process is slow, laborious, and results in a large number of rejects. Second, the resulting physical package is relatively large. Third,'an extra step is involved in connecting the two diodes together. Fourth, even after a careful selection process, the desired operating characteristics of virtually zero temperature coefficient at a prescribed saturation voltage is difiicult to obtain.
The difficulties will be better understood by considering the steps required to provide voltage regulators having the desired characteristics in accordance with prior art methods. The inverse saturation voltage of each diode must be measured to within a millivolt at room temperature, high limit temperature and low limit temperature. These readings are then recorded. It is then necessary to examine the records to identify pairs of devices having temperature characteristics related in such a manner that they are likely to cancel when the two diodes are connected in series with regions of like conductivity connected together. The paired diodes must then be individually located from a large group tested in this manner and connected together. Finally, the inverse saturation voltage of the connected-together pairs must be measured at room temperature, high limit temperature and within specified tolerances.
Accordingly, the present invention contemplates and has an important object the provision of a compact silicon voltage regulator characterized by a virtually constant inverse saturation voltage over a wide range of temperatures and operating currents.
It is another object of the invention to provide a semiconductor voltage regulator in accordance with the preceding object in which the saturation voltage may be specified within relatively close limits.
It is a further object of the invention to provide a method for making semi-conductor voltage regulators in accordance with the preceding objects which minimizes the number of steps required for fabrication, the number of rejects, and the time required to fabricate the novel regulators while providing close control over the operating characteristics of the finished product.
According to broad aspects of the invention, the novel semiconductor device includes means defining a semiconducting region having first and second adjacent portions of opposite conductivity type. A layer of silver, having an impurity of the same conductivity type as the second portion, is in contact therewith, a portion of this impurity being diffused into the second portion. To form the novel voltage regulator, two of said means are pro vided with the layer of silver separating and in contact with the second portions. Ohmic contacts are electrically connected to each first portion. In a preferred form of the invention, the first portions are P-type silicon impregnated with boron and the impurity in the silver is arsenic.
The method of making the novel device includes the steps of placing the silver sheet with the impurities between and in contact with sheets of semi-conductor material, bonding the former sheets to the latter sheets to form a sandwich and heating the sandwich to diffuse at least some of the impurities from the silver to the semiconductor sheets. The ohmic contacts are then alloyed to the exposed sides of the semi-conductor sheets and the assembly thus formed, diced to size.
Other features, objects and advantages of the invention will become apparent from the following specification when read in connection with the accompanying drawing, the single FIGURE of which shows a cross sectional view of a preferred embodiment of the invention.
With reference now to the drawing, there is shown a sectional view through the novel voltage regulator which illustrates the relationship between the different layers of material forming the device. Since the exemplary embodiment of the novel regulator described herein is of generally rectangular shape, the cross sectional view shown, best illustrates the features of the invention. The
view is a greatly magnified section through the thickness dimension in order to better illustrate the structure, the size of a typical unit being 0.02 thick by 0.04 square.
Two semi-conducting regions 11 and 12 separate a layer of silver 13 having an N-type impurity, such as arsenic, at a concentration of at least /2% from ohmic contacts 14 and 15, respectively. These contacts may be made of doped gold or other suitable conducting material. Leads may be attached to the ohmic contacts 14 and 15 for connecting the device to an external circuit. The impurity of the silver sheet 13 is also in the portions 16 and 17 of regions 11 and 12, respectively, so that these portions are both N-type as indicated. The portions 21 and 22 of regions 11 and 12 are of P-type conductivity. P-N junctions 23 and 24 are thus formed in regions 11 and 12, respectively.
The preferred method of fabricating the novel voltage regulator, includes the step of first doping silicon with boron to provide a sample of P-type silicon. Borondoped silicon is preferred because its resistivity may be very accurately controlled due to the high segregation coefficient of boron. This sample of P-type silicon is then sliced to provide slices of preferably the same thickness which define the regions 11 and 12.
Silver is doped with a concentration of at least /2% of arsenic or other suitable N-type doping material. The sheet 13 is formed from the doped silver. The slices of P-type silicon defining regions 11 and 12 are placed in contact with opposite sides of silver sheet 13. The silver is bonded to the two slices by heating the assembly at a temperature of approximately 1,000 C. for at least five minutes in a vacuum or inert atmosphere to form a sandwich. This sandwich is then heated in the same atmosphere to a temperature of approximately 1300 C. for approximately /2 hour to diffuse at least some of the impurities in the silver into the regions 11 and 12 to form the two N- type portions 16 and 17. The latter ternperature and time is by way of example only. The time and temperature may be varied to control the inverse saturation voltage of the voltage reference units. Ternper'atures within the range 1150 C. to 1300 C. and times ranging from /2 hour to six hours are suitable. Thus the saturation voltage may be controlled in three different ways; by controlling the resistivity of the P-type silicon when doping the material with boron, by controlling the diflusion temperature and by controlling the diifusion time. This permits a more precise establishment of the saturation voltage than is possible with the methods of making prior art semi-conductor voltage regulators.
The inverse saturation voltage varies directly as a function of the time temperature product and inversely as a function of the doping concentration in the P-type silicon. A typical value of resistivity for the P-type silicon in a representative embodiment of the invention is 0.02 ohms-cm.
Sheets of ohmic contact material 14 and 15 are then alloyed to the P- type regions 21 and 22. After this alloying step, the assembly may be diced to form the individual voltage regulating units. These units are encapsulated with leads electrically connected to each of the ohmic contacts 14 and 15.
Each unit is a double diode, that is, each has a nor mal inverse characteristic, regardless of the polarity of the voltage applied across contacts 14 and ll because one of the junctions 22 and 23 is forward-biased while the other is reversed-biased. Thus before marking the encapsulated unit with the recommended polarity orientation, the saturation voltage in both directions may be determined. The polarity orientation resulting in a saturation voltage closer to the prescribed value is selected for normal operation. This approximately doubles the yield of units falling within a narrow prescribed voltage range.
It is unnecessary to match and separately encapsulate in order to obtain a low temperature coeflicient. Two diodes effectively in series are provided having temperature coeificients of very nearly the same magnitude but of opposite sense. Hence, the effects due to the temperature variations cancel, and the saturation voltage is virtually insensitive to temperature. Typically, units are regularly produced having a nominal saturation voltage of 6.2 volts over a current range from 0.1 milliampere to 10 milliamperes with a temperature coefiicient of 0.005%. Despite this exceptional performance, the physical size of the unit may be fully encapsulated in a cylinder 0.4 long and 0.25" in diameter.
The particular materials, times and temperatures described herein are by way of example, for illustrating the best mode now contemplated for practicing the invention. Numerous modifications of and departures from the specific materials and techniques disclosed may now be practiced by those skilled in the art without departing from the inventive concepts. Consequently, the invention is to be construed as limited only by the spirit and scope of the appended claims.
What is claimed is:
l. A semi-conductor device comprising, first and second means defining semi-conducting regions each having first and second adjacent portions of opposite conductivity with a rectifying junction therebetween each first portion being of the same conductivity type, a layer of silver in contact with and separating both second portions and having an impurity of the same type conductivity as a potential between said first portions B, said layer interconnecting said first and second means so that said rectifying junctions therein are coupled in series and exhibit diode action but prevented thereby from exhibiting transistor action, and means for applying a potential between said first portions.
2. A semi-conductor device 'in accordance with claim 1, wherein both of said means are formed primarily of silicon.
3. A semi-conductor device in accordance with claim 2, wherein both said first portions are formed of P-type silicon.
4. A semi-conductor device in accordance with claim 3, wherein each of said first portions is doped with boron and said impurity is arsenic.
5. A semi-conductor device in accordance with claim 4, wherein the concentration of said arsenic with respect to said silver is at least one-half percent.
6. A semi-conductor device in accordance with claim 1, and further comprising first and second ohmic contacts electrically connected to respective ones of said first portions.
7. A semi-conductor device in accordance with claim 6, wherein the resistivity of said first and second means is substantially the same.
8. A voltage reference device comprising, first and second means defining semi-conducting regions each having first and second adjacent portions of opposite conductivity, with a rectifying junction therebetween each first portion being of the same conductivity type, and a layer of conducting material having an impurity of the same type conductivity as said second portion in contact with and separating both second portions, said layer interconnecting said first and second means so that said rectifying junctions therein are coupled in series and exhibit diode action but prevented thereby from exhibiting transistor action, and means for applying a potential between said first portions.
(References on folicwing page) References Cited in the file of this patent UNITED STATES PATENTS '6 Shockley Nov. 12, 1957 Fuller May 27, 1958 Ishikawa et a1. May 27, 1958 Tanenbaum Nov. 3, 1959 MacDonald April 18, 1961 UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTION Patent No, 3 O69 603 December 18 1962 Windsor Ha Hunter It is hereby certified that error appears in the above numbered patent requiring correction and that the said Letters Patent should read as corrected below.
Column 4 line 30 after "therebetween"' insert a comma; line 34 strike out a potential between said first portions B and insert instead said second portion same column 41 line 64 after "therebetween", insert a commao Signed and sealed this 18th day of June 1963c.
SEAL) Attest:
ERNEST w. SWIDEB. DAVID LADD Attesting Officer Commissioner of Patents
Claims (1)
1. A SEMI-CONDUCTOR DEVICE COMPRISING, FIRST AND SECOND MEANS DEFINING SEMI-CONDUCTING REGIONS EACH HAVING
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US784589A US3069603A (en) | 1959-01-02 | 1959-01-02 | Semi-conductor device and method of making |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US784589A US3069603A (en) | 1959-01-02 | 1959-01-02 | Semi-conductor device and method of making |
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| US3069603A true US3069603A (en) | 1962-12-18 |
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| US784589A Expired - Lifetime US3069603A (en) | 1959-01-02 | 1959-01-02 | Semi-conductor device and method of making |
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Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3243322A (en) * | 1962-11-14 | 1966-03-29 | Hitachi Ltd | Temperature compensated zener diode |
| US3288656A (en) * | 1961-07-26 | 1966-11-29 | Nippon Electric Co | Semiconductor device |
| US3433677A (en) * | 1967-04-05 | 1969-03-18 | Cornell Aeronautical Labor Inc | Flexible sheet thin-film photovoltaic generator |
| US3437889A (en) * | 1965-12-22 | 1969-04-08 | Bbc Brown Boveri & Cie | Controllable semiconductor element |
| US4490111A (en) * | 1982-09-23 | 1984-12-25 | California Linear Circuits, Inc. | Apparatus for making stacked high voltage rectifiers |
| US4510672A (en) * | 1982-09-23 | 1985-04-16 | California Linear Circuits, Inc. | Process for making stacked high voltage rectifiers |
| US4704785A (en) * | 1986-08-01 | 1987-11-10 | Texas Instruments Incorporated | Process for making a buried conductor by fusing two wafers |
| US20050121732A1 (en) * | 2003-12-05 | 2005-06-09 | Jean-Luc Morand | Active semiconductor component with an optimized surface area |
| US20050121691A1 (en) * | 2003-12-05 | 2005-06-09 | Jean-Luc Morand | Active semiconductor component with a reduced surface area |
| WO2005057660A1 (en) * | 2003-12-05 | 2005-06-23 | Stmicroelectronics Sa | Small-surfaced active semiconductor component |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2701326A (en) * | 1949-11-30 | 1955-02-01 | Bell Telephone Labor Inc | Semiconductor translating device |
| US2795742A (en) * | 1952-12-12 | 1957-06-11 | Bell Telephone Labor Inc | Semiconductive translating devices utilizing selected natural grain boundaries |
| US2813233A (en) * | 1954-07-01 | 1957-11-12 | Bell Telephone Labor Inc | Semiconductive device |
| US2836523A (en) * | 1956-08-02 | 1958-05-27 | Bell Telephone Labor Inc | Manufacture of semiconductive devices |
| US2836776A (en) * | 1955-05-07 | 1958-05-27 | Nippon Electric Co | Capacitor |
| US2911539A (en) * | 1957-12-18 | 1959-11-03 | Bell Telephone Labor Inc | Photocell array |
| US2980860A (en) * | 1957-12-26 | 1961-04-18 | Texas Instruments Inc | Hall effect device |
-
1959
- 1959-01-02 US US784589A patent/US3069603A/en not_active Expired - Lifetime
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2701326A (en) * | 1949-11-30 | 1955-02-01 | Bell Telephone Labor Inc | Semiconductor translating device |
| US2795742A (en) * | 1952-12-12 | 1957-06-11 | Bell Telephone Labor Inc | Semiconductive translating devices utilizing selected natural grain boundaries |
| US2813233A (en) * | 1954-07-01 | 1957-11-12 | Bell Telephone Labor Inc | Semiconductive device |
| US2836776A (en) * | 1955-05-07 | 1958-05-27 | Nippon Electric Co | Capacitor |
| US2836523A (en) * | 1956-08-02 | 1958-05-27 | Bell Telephone Labor Inc | Manufacture of semiconductive devices |
| US2911539A (en) * | 1957-12-18 | 1959-11-03 | Bell Telephone Labor Inc | Photocell array |
| US2980860A (en) * | 1957-12-26 | 1961-04-18 | Texas Instruments Inc | Hall effect device |
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3288656A (en) * | 1961-07-26 | 1966-11-29 | Nippon Electric Co | Semiconductor device |
| US3243322A (en) * | 1962-11-14 | 1966-03-29 | Hitachi Ltd | Temperature compensated zener diode |
| US3437889A (en) * | 1965-12-22 | 1969-04-08 | Bbc Brown Boveri & Cie | Controllable semiconductor element |
| US3433677A (en) * | 1967-04-05 | 1969-03-18 | Cornell Aeronautical Labor Inc | Flexible sheet thin-film photovoltaic generator |
| US4490111A (en) * | 1982-09-23 | 1984-12-25 | California Linear Circuits, Inc. | Apparatus for making stacked high voltage rectifiers |
| US4510672A (en) * | 1982-09-23 | 1985-04-16 | California Linear Circuits, Inc. | Process for making stacked high voltage rectifiers |
| US4704785A (en) * | 1986-08-01 | 1987-11-10 | Texas Instruments Incorporated | Process for making a buried conductor by fusing two wafers |
| US20050121732A1 (en) * | 2003-12-05 | 2005-06-09 | Jean-Luc Morand | Active semiconductor component with an optimized surface area |
| US20050121691A1 (en) * | 2003-12-05 | 2005-06-09 | Jean-Luc Morand | Active semiconductor component with a reduced surface area |
| WO2005057660A1 (en) * | 2003-12-05 | 2005-06-23 | Stmicroelectronics Sa | Small-surfaced active semiconductor component |
| US7053404B2 (en) | 2003-12-05 | 2006-05-30 | Stmicroelectronics S.A. | Active semiconductor component with an optimized surface area |
| US20100078673A1 (en) * | 2003-12-05 | 2010-04-01 | Stmicroelectronics S.A. | Active semiconductor component with a reduced surface area |
| US7939887B2 (en) | 2003-12-05 | 2011-05-10 | Stmicroelectronics S.A. | Active semiconductor component with a reduced surface area |
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