US2846575A - Electronic switch - Google Patents

Description

Aug. 5, 1958 E. l... HAVENS.

ELECTRONIC SWITCH 2 Sheets-Shea?s l Filed Sept. 29. 1954 'A7' TORNE Y E. L. HAE/ENS ELECTRONIC SWlTC'H Aug. 5 195s ATTORNEY nited States Patent C mnemonic swrrcn Byron L. Havens, Closter, N. J., assignor to International Business Machines Corporation, New York, N. Y., a corporation of New York Application September 29, 1954, Serial No. 459,111

7 Claims. (Cl. Z50-27) The present invention relates to an electronic switch and more particularly to what is known in the art as a multi-channel electronic switch.

Briefly, the novel electronic switch herein disclosed is capable of transmitting in serial order, a plurality of distinct sources of information. Further, the switch includes means for selecting any one of said plurality of sources and transmitting only the selected one.

The novel electronic switch herein disclosed in conjunction with an ordinary oscilloscope, also nds application in many electronic circuits including those ultilized in computers and complex switching networks.

The primary object of the present invention is an improved multi-channel electronic switch.

A second object of the present invention is an improved electronic switch for use in simultaneously displaying on the screen of a cathode ray tube, a plurality of items of information.

A yet additional object of the present invention is a multi-channel electronic switch that is fast, accurate and reliable in operation, simple and economical to produce, and not subject to transient disturbances.

Other objects of the invention will be pointed out in the following description and claims and illustrated in the accompanying drawings, which disclose, by way of example, the principle of the invention and the best mode, which has been contemplated of applying that principle.

In the drawings:

Fig. l is a block diagram disclosing how the two sheets of drawing containing Figs. 2 and 3, respectively, are to be joined;

Fig. 2 is a portion of Fig. l of the complete disclosure of the multi-channel switch;

Fig. 3 is the second portion of Fig. l of the complete disclosure of the multi-channel switch;

Fig. 4 discloses a plurality of voltage waveforms that will be explained in conjunction with the electronic switch of Figs. 2 and 3; and

Fig. 5 discloses a schematic drawing of the face of the cathode ray tube showing in particular the relative displacement ofthe channels when the novel electronic switch herein disclosed is utilized in conjunction with an oscilloscope.

By denition, the term up used hereinafter will indicate a voltage pulse or shift in voltage in the positive direction, Whereas the term down will indicate a voltage pulse or shift in voltage in the negative direction. The terms up and down will be used without regard to the original and final voltage values. In brief, throughout the terms up and down are relative and not absolute.

Reference is made to Fig. 2, of composite Fig. 1, and in particular to the circuitry enclosed by the broken line labelled Source of Voltage Waveforms. The circuitry enclosed within this broken line consists of a sine wave generator S whose output is coupled through a capacitor C1 to the control grid of an inverter tube TV1. The plate of inverter tube TV1 is coupled through capacitor C2 to a 2,846,575'. Patented Aug. 5, 1958 first trigger that includes tubes TA and TB. The plate of tube TB of the first trigger is coupled through capacitor C3 to a second trigger that includes tubes TC and TD.

Briey, the first and second triggers are binary connected and respond to a source of negative pulses obtained from the plate of inverter tube IV1. In the illustrative embodiment herein disclosed, the sign wave generator S will have a period of approximately sixteen microseconds (a frequency of approximately 16 cycles per second).

Thus the sine wave generator will result, through the medium of inverter TV1 in a negative pulse being impressed on the input of the first trigger circuit every sixteen microseconds. Correspondingly, the output of said first trigger circuit (being binary coupled to said second trigger circuit) will result in a negative pulse being impressed on the input of said second trigger circuit every thirty-two microseconds. Thus the tirst trigger circuit will change its condition every sixteen microseconds, whereas the second trigger circuit will change its condition every thirty-two microseconds. Hence, the waveforms at the anode of tube TA will be generally of the type shown by the waveform A of Fig. 4. Correspondingly, the anodes of tubes TB, TC, and TD will respectively have appearing thereat waveforms of the general configuration of waveforms B, C and D of Fig. 4. That is, the anode of tube TA will be up during the first sixteen-microsecond period, down during the second sixteen-microsecond period and continue in this fashion. The anode of tube TD will at al1 times be in the opposite condition (up or down) to that of the anode of tube TA. The anode of tube TC will be up during the rst two consecutive sixteen-microsecond periods, and down during the next two consecutive sixteen-microsecond periods and continue in this manner. The anode of tube TD will at all times be in the opposite condition (up or down) to that of the anode of tube TC.

Now still referring to Fig. 2, it will be seen that there are four cathode follower tubes (CF1 through CFA) having their plates connected in common to a positive source of potential of approximately volts in magnitude and their cathodes respectively connected, each through a separate resistor, to a negative source of potential of approximately 110 volts. The cathode follower tubes CF1- CF4 are represented as pentodes having their screen and suppressor grids connected to suitable potentials and their respective control grids connected to the plates of tubes TA, TB, Tc and TD of the tirst and second triggers of the source of voltage waveforms.

The control grid of cathode follower CF1 is connected to the anode of tube TA and thus the potential at the cathode of tube CF1 will be generally of the form represented by waveform A of Fig. 4. Correspondingly the potential at the cathodes of cathode followers CP2, CF3 and CFA will be respectively generally of the form represented by waveforms B, C and D of Fig. 4.

Now still referring to Fig. 3 and in particular to twin diodes 17, 18, 27, 28, 29 and 30, it will be seen that: the anodes of twin diode 27 are connected in common through lead 10 to the cathode of cathode follower CF1; that the anodes of twin diode 28 are connected in common through lead 11 to the cathode of cathode follower CF2; that the anodes of twin diode 29 are connected in common through lead 12 to the cathode of cathode follower CFS; and that the anodes of twin diode 30 are connected in common through lead 13 to the cathode of cathode follower CFA. From the preceding discussion of the cathode followers, it will now be apparent that the anodes of twin diodes 27 through 30, respectively, have impressed thereon voltage waveforms generally of the form represented by waveforms A through D shown in Fig. 4. Still referring to Fig. 3 and in particular to twin diodes 17 and 18 and their immediately associated circuitry. For purposes of explanation, it will be convenient to refer to the right diode of twin diode 18 as diode ISR and the left diode of twin diode 18 as diode 18L, and correspondingly as to twin diode 17. The anode of diode 17R and the cathode of diode 18L are connected in common by lead 31 and serially through current limiting resistor 1S and lead 11 to the cathode of cathode follower CF2. The anode of diode 17L and the cathode of diode 18R are connected in common by lead 32, and serially through current limiting resistor 16 and lead 13 to the cathode of cathode follower CF1. Serially connected between leads 31 and 32 is a pair of resistors R and R1. The mid-point of the series circuit consisting of resistors R5 and R1 has a lead 36 connected thereto. Resistor R5 is approximately twice the size of resistor R1 in ohmic magnitude. Resistors R5 and R1 in conjunction with current limiting resistors 15 and 16 may be thought of as a current resistor adding network. These four resistors are enclosed by a broken line labelled Current Resistor Adding Network, and are eiective in conjunction with the additional circuitry, hereinafter more fully explained, in impressing on lead 36 a waveform generally of the form of that represented by waveform E of Fig. 4.

Still referring to Figs. 3, it will be seen that the cathodes of diodes 17L and 17R are connected in common and through lead 33 to a tap, on resistor R1 and through capacitor C1 to ground. The anodes of diodes 18L and 18R are connected in common through lead 34 to a tap on resistor R2, and through capacitor C5 to ground. It will be seen that resistors R1, R2 and R3 are serially connected between ground and a potential source of approximately negative 180 volts magnitude. Thus resistors R1, R2 and R5 constitute a potentiometer arrangement for effectively impressing and substantially maintaining a rst potential V2 on lead 33 and a second potential V1 on lead 34. The relative magnitudes of potentials V1 and V2 are shown by waveform E of Fig. 4.

Waveform E of Fig. 4 during the rst sixteen-microsecond period or time interval has a magnitude of approximately V1. During the second sixteen-microsecond period Waveform E has a magnitude of approximately During the third sixteen-microsecond period waveform E has a magnitude of approximately During the last sixteen-microsecond period waveform E has a magnitude of V2. Thus it is seen that waveform E is essentially a step wave having four uniform steps.

The waveform E of Fig. 4 is developed in the following manner: diode 17R serves to prevent lead 31 from becoming more positive than the potential V2; diode 17L serves to prevent lead 32 from becoming more positive than the potential V2; diode 18L serves to prevent lead 31 from becoming more negative than potential V1; and diode 18R serves to prevent lead 32 from becoming more negative than potential V1. Thus it is apparent that the potential on lead 31 and lead 32, respectively, may only vary from V1 to V2.

It will be recalled that waveform E is the potential appearing at the mid-point of resistors R5 and R1 which are serially connected between leads 31 and 32 (R5 being approximately twice as large as R1). The potential appearng at the mid-point, namely, waveform E, will he utilized as explained hereinafter to determine the relative vertical position of the cathode ray tube beam during the four successive sixteen-microsecond time intervals.

Now referring to Fig. 4, waveforms B and D in particular, it will be seen that during the first time interval leads 11 and 13 are respectively in the down condition. Under these conditions there will be no potential difference between leads 11 and 13 and the potential at the midpoint of serially connected resistors R5 and R1 will be approximately V1; that is, the step of lowest magnitude occurring during the rst time interval of waveform E of Fig. 4.

During the second time interval, that is, the second sixteen-microsecond period shown in Fig. 4, a waveform B is up and waveform D is down This results in a potential difference between leads 11 and 13 resulting in a flow of current from lead 11 through resistors 15, R5 and R1 to lead 13. Now it will be recalled as pointed out earlier, that R5 is approximately twice as large in ohmic value as resistor R1', hence the potential dropped across resistor R5 as a result of the current flowing from lead 11 to lead 13, is approximately two-thirds of the potential existing between leads 11 and 13. Viewed in another manner, the potential on lead 13 is lower than the potential on lead 11 and the potential at the mid-point of resistors R5 and R1 is approximately one-third of the potential difference between said leads. Thus it is seen that during the second time interval or sixteen-microsecond period, the magnitude of voltage waveform E of Fig. 4 is approximately During the third sixteen-microsecond period lead 11 is down while lead 13 is up. These conditions will be apparent from an inspection of waveforms B and D of Fig. 4. Hence current will flow from lead 13 through resistors 16, R1, R5 and 16 to lead 11. The potential dropped across resistors R1 and R5 will be in the ratio of l to 2, the same ratio as during the second sixteen-microsecond period, supra. However, it is to be appreciated that during the third time interval, the polarity of the potential is reversed since during the second time interval lead 11 was up and lead 13 down, whereas during the instant time interval (third) the conditions are exactly reverse. Hence, it will be apparent that during the third time interval lead 36 which manifests waveform E will have a potential impressed upon it of a magnitude of approximately Referring to Fig. 4, it will be seen that during the fourth time interval, leads 11 and 13 are each in the up condition. Thus there will be no potential difference between leads 11 and 13 and no current will ilow through resistors R5 and R1 as a result of a potential difference between leads 11 and 13. Actually viewing the situation in another manner leads 31 and 32 may be thought of as being respectively at approximately a potential of magnitude V2. Thus the junction point of resistors R5 and R1 connected between leads 31 and 32 will be at a potential of approximately V2.

Waveform E shown in Fig. 4 and developed in the manner explained above, is applied via lead 36 to the input of a sweep amplifier. Referring to Fig. 3 and enclosed within a broken line labelled Sweep Amplier is a circuit that may be used. Essentially the sweep amplifier `shown in Fig. 3 consists of an inverter circuit including inverter tube IVG coupled through a capacitor C7 to an amplier circuit including amplifier tube A1. (It is to be noted that the plate of tube A1 is connected through lead 71, resistor R70 and lead 72 to the cathode of tube IV5.)

Brieily, the sweep ampliiier of Fig. 3 functions in the following manner: The voltage waveform generally of the type represented by waveform E of Fig. 4 is impressed via lead 36 and capacitor C5 on the control grid of inverter tube IVG. The plate of inverter tube IVS is coupled via capacitor C7 to the control grid of amplifier tube A1. lt will now be apparent from an inspection of the circuitry of the sweep amplifier of Fig. 3, that when the potential on the control grid of inverter tube IVG goes up the potential on the control grid of amplifier tube A1 goes down and the potential at the plate of amplifier tube A1 goes up. In actuality then the sweep amplifier may be thought of as merely amplifier means since when the input, i. e., lead of the sweep amplifier, is up, the output of the sweep amplifier, i. e., plate of tube A1, is "up. Thus when a voltage waveform of the type represented by waveform E of Fig. 4 is impressed on lead 36, a voltage waveform generally of the type represented by waveform 1VP shown in Fig. 4 will be available at the plate of tube A1.

Now still referring to Fig. 3 it will be seen that voltage waveform lVP appearing at the plate of tube A1 is impressed via lead 61 on vertical deflection plate 1V of the cathode ray tube CRT. As is apparent to those skilled in the art, the potentials impressed on deflection plates 1V and 2V of cathode ray tube CRT will determine the vertical displacement of the beam.

Referring to Figs. 2 and 3 it will be seen: that the anodes of twin diode 27 are connected to the cathode ot' cathode follower CF1; that the anodes of twin diode 23 are connected to the cathode of cathode follower CF2; that the anodes of twin diodes 29 are connected to the cathode of cathode follower CFB; and that the anodes of twin diode 30 are connected to the cathode of cathode follower CF4. Now for convenience, the left diode of twin diode 27 will be referred to as diode 27L and the right diode of twin diode 27 as diode 27R. Corresponding notation will be utilized with respect to twin diodes 28, 29 and 30. It will be observed: that the cathodes of diodes 27R and 29R are respectively connected through lead 83, resistor 87 and lead 82 to a source of negative potential of approximately ll() `volts in magni tude; that the cathodes of diodes 28R and 29L are respectively connected through lead.84, resistor 88 and lead Si to a source of negative potential of approximately ll() volts in magnitude; that the cathodes of diodes 27L and 30R are respectively connected through lead 85, resistor 89 and lead S2 to a source of negative potential of approximately ll() volts in magnitude; and that the cathodes of diodes ZSL and 30L are respectively connected through lead 86, resistor 90, and lead 82 to a source of negative potential of approximately llO volts in magnitude. In other words, each of the above-mentioned pair of diodes and the assothe negative llO volt source circuit which is most freart as a logical diode OR ciated resistor connected to comprise a diode mixing quently referred to in the circuit.

It will now be appreciated that during the first time interval (waveform A and C of Fig. 4) leads 10 and l2 which are respectively connected to the cathodes of cathode follower tubes CF1 and CFE, will be in the up condition. Thus the potential impressed on the anodes of twin diodes 27 and 29 will be such as to render the following diodes conductive, namely, 271., 27R, 2.9L and 29R. When the afore-recited diodes are conductive, then leads 83, 84 and S5 will be respectively in the up condition and lead '86 will be in the down condition. (Leads 83, S4 and 85 will be in the up condition as a result of the potential dropped across resistors 87, 88 and 89.) The aforo-recited conditions occur during the first sixteen-microsecond period or time interval as represented in Fig. 4.

Referring to Fig. 3, it will be seen that there are four inverter circuits each having an inverter tube respectively labelled iV2, iV3, IV4 and lV5. Each of the four inverter circuits is substantially identical and each has a potential of approximately llO volts impressed through a resistor on the plate of the inverter tube and the cathode connected to a potential of approximately negative ll0 volts. Inverter tubes IV2 through IV5 are pentodes. Each of the screen grids of the four pentode tubes are respectively connected through a resistor to lead 35. Lead 35 is also connected to the 0 position of switch S1, the screen grid of tube A1 of the sweep amplifier, and through a resistor 35A to a source of negative potential of approximately 180 volts in magnitude. (It will be noted that when switch S2 is in the 0 position, lead 35 is effectively at ground potential as the movable contact of said switch is grounded through lead 81.)

Now assuming that switch Sl is the 0 position, then the screen grids of each of the four inverter circuits IV2 through TV5 will be at approximately ground potential. Now observing from Fig. 3 that the control grid of tube IV2 is connected through a resistor to ground and through a capacitor C7 to lead 83, it Will be appreciated that during the rst time interval (sixteenmicrosecond period) since lead 83 is in the up condition the control grid of tube IV2 will be up rendering said tube conductive. Tubes IVB and IV., will be respectively conductive during the first time interval as a result of leads 84 and 85 being respectively in the up condition. The circuitry in the case of tubes TV3, IV4 and IVE, and leads 84, 85 and 86, respectively, corresponds to that explained in detail with respect to tube IV2.

Thus it will be apparent that during the first sixteenmicrosecond period inverter tubes IV2, IV?, and IV are respectively conductive and the anodes of each of said tubes will be in a down condition, whereas inverter tube IV5 will be non-conductive and the anode of said tube will be in an up condition.

The cathodes of twin diodes 39 and 40 are respectively connected each through a separate resistor to the plates of inverter tubes IV2 through IV5. In detail, the circuitry is as follows: the cathode of diode 39R is connected through resistor R11, to the plate of tube IV2; the cathode of diode 39L is connected through resistor R11 to the plate of tube IV3; the cathode of diode 40R is connected through resistor R12 to the plate of tube IV4; and the cathode of diode 40L is connected through resistor R13 to the plate of tube TV5. It will now be apparent that during the first time interval the plates of tubes IV2, TV3 and IV will be respectively in the down condition resulting in the cathodes of the following diodes, namely, 39R, 3.9L and 40R, being respectively in the down condition. Correspondingly, the plate of tube IV5 is up during the first time interval and thus the cathode of diode 40L wil be up during said interval.

Now still referring to Fig. 3, there are four identical cathode follower circuits respectively including cathode follower tubes OF5 through CFB. The cathode follower tubes are pentodes each having their plate connected through a separate resistor to a potential of approximately positive llO volts in magnitude. The cathodes of cathode follower tubes CF5 through CFS are connected in common by lead 50 and through resistor R6 (resistor R6 is a common cathode resistor) to a source of potential of approximately negative Volts. Lead 50 is also connected to the 0 position of switch S2. The control grids of cathode follower tubes CF5 through CFS are respectively connected as follows: the control grid of tube CF5 is connected through lead 62 to the anode of diode 39L and through resistor R14 to lead 52; the control grid of tube CFG is connected through lead 61 to the anode of diode 39R and through resistor R15 to lead 51; the control grid of tube CF', is connected through lead 54 to the anode of diode 40L and through resistor R16 to lead 54; and the control grid of' tube CF1, is connected through lead 53 to the anode of diode 40R and through resistor R11 to lead 53. Leads 51 through 55 shown in the upper portion of Fig. 3 also respectively interconnect input terminals 1 through 5 with switch positions l through 5 of switch S2.

Input terminals 1 through 5 will normally have impressed thereon voltage waveforms that it is desired to View on the face of the CRT tube of the oscilloscope. Consider for the present only input terminals 1 through 4 and assume that both switches S1 and S2 are in their respective positions. Now recalling that4 during the first time interval the cathodes of diodes 39L, 39R and 4DR are respectively down, whereas the cathode of diode 40L is up, it will be appreciated that if leads 51, 52 and 53 respectively were to attempt to manifest a positive potential that diodes 39L, 39R and 40R would become conductive. In brief, during the first time interval diodes 39L, 39R and 40R serve to clamp the control grids of cathode followers OF5, OF5 and CFB thus precluding any information in the form of voltage waveforms appearing on input terminals 1, 2 or 3, respectively, from being transmitted by the afore-recited cathode follower tubes. However, since the cathode of diode 40L is up during the first time interval, lead 54 may go positive as a result of an input voltage being impressed on input terminal 4. Since lead 54 is free to go positive during the rst time interval, the control grid of cathode follower tube CF7 will follow the condition of lead 54 and the condition of lead 54 will, during the first time interval, be manifested on lead 50. In brief, the voltage waveform impressed on input terminal 4 during the first time interval, will, during said interval be manifested by the potential on lead S0.

Now referring to Fig. 4, it will be observed that voltage waveforms B and C are up during the second sixteen-microsecond interval. Thus leads 11 and 12 are respectively up and twin diodes 28 and 29 are each conductive during said interval. When twin diodes 28 and 29 are conductive, then leads 83, 84 and 86 are respectively in the up condition, whereas lead 85 will be in the down condition. When leads 83, 84 and 86 are up, then inverter tubes IVZ, IV3 and 1V5 are respectively conductive. Since lead 85 is down inverter tube IV., is non-conductive. With inverter tube IV4 nonconductive, the cathode of diode 40R is up, whereas the cathodes of diodes 39L, 39R and 40L are respectively down. The anode of diode 40R is connected through lead 53 to the control grid of cathode follower CFS and said control grid is also connected through resistor R17 to lead 53. Lead 53 is connected between input terminal 3 and the 3 position of switch S2. It will now be apparent that since switches S1 and S2 are each in their respective "0 positions, that during the second time interval the voltage waveform impressed on input terminal 3 will, through the medium of cathode follower tube CFB and resistor Re, appear on lead 50.

Once again referring to Fig. 4, it will be observed that during the third sixteen-microsecond period, waveforms A and D are respectively up When waveforms A and D are up the following conditions exist: leads 10 and 13 are respectively up, twin diodes 27 and 30 are each conductive; leads 83, 85 and 86 are respectively up, whereas lead 84 is down, inverter tubes IVZ, IV4 and IV5 are respectively conductive, whereas inverter tube IV3 is non-conductive; and the cathode of diode 39L is up, whereas the cathodes of diodes 39R, 40L and 4612 are downf From the preceding discussion with respect to the first and second time intervals and the afore-recited conditions that occur during the third time interval, it will be apparent that the voltage waveform impressed on input terminal 2 (through lead 52, resistorv R14 and the control grid of cathode follower CF5) will be manifested by the up-down condition of lead 50 during the third sixteen-microsecond period.

Still referring to Fig. 4, it will be observed that during the fourth siXteen-microsecond period waveforms B and D are up and the following conditions exist: leads 11 and 13 respectively in the up condition; twin diodes 28 and 30 are each conductive; leads 84, 85 and 86 are respectively up, whereas lead 83 is down; inverter tubes IV3, IV4, and IV5 are respectively conductive, whereas tube W2 is non-conductive; and the cathode of diode 39R is up, whereas the cathodes of diodes 39L, 40L and 40K are each down.

It will be apparent that during the fourth time interval during which the cathode of diode 39R is up, that the voltage waveform impressed on input terminal 1 will be manifested on lead 50 as a result of the following circuitry: lead 51, resistor R15, cathode follower tube GF6 and common cathode resistor R5.

To briefly summarize: with switches S1 and S2 in their respective O positions, the information appearing in the form of voltage waveforms on input terminals 1 through 4 will be respectively manifested during the first through fourth sixteen-microsecond time intervals of Fig. 4. The voltage waveform 1VP of Fig. 4 will be impressed during the first four time intervals on vertical deflection plate 1V of cathode ray tube CRT.

Now referring to Fig. 3, it will be seen that lead 50 is connected to the 0 position terminal of switch S2 and that when said switch is in its 0 position, the voltage manifested on lead 50 will, through lead 82, be impressed on the control grid of cathode follower tube CFS. Cathode follower tube CFQ and amplifier tube AZ comprise twin triode 100. Twin triode and its associated circuitry is enclosed within a broken line labelled Non- Inverting Amplifier. The non-inverting amplier accepts its input from lead 82 and manifests its output on lead 92. Briey, the non-inverting amplifier consists of a cathode follower coupled to a grounded grid amplifier. The output of the non-inverting amplifier appearing on lead 92 is impressed on the control grid of cathode follower CFm. The output of cathode follower CFm is impressed via lead 62 on vertical deection plate 2V of cathode ray tube CRT. Thus it is apparent that the information appearing on lead 50 is, through the medium of the non-inverting amplifier and cathode follower CFM), impressed on the second vertical deflection plate of the cathode ray tube. The first vertical deflection plate 1V has impressed thereon voltage waveform 1VP.

In Fig. 3 a horizontal sweep circuit is represented by a block having its output impressed on horizontal deliection plates 1H and 2H of the cathode ray tube CRT. The potential impressed on horizontal plate 1H is generally of the type shown in waveform 1HP of Fig. 4 and the potential impressed on horizontal deiiection plate 2H is generally of the type shown in waveform ZHP of Fig. 4. Circuits for developing the waveforms lHP and 2HP are well known in the art and thus no detailed discussion of any such circuit is deemed necessary herein.

It will now be apparent that the information in the forrn of voltage waveforms impressed on input terminals 1, 2, 3 and 4 will respectively appear displaced on the face of cathode ray tube CRT generally in accordance with the showing of Fig. 5, that is, the information from input terminal 4 will be mainfested by a visual indication varying up and down in the vicinity of channel 4 shown as a straight line in Fig. 5. Correspondingly, the information impressed upon input terminals 1, 2 and 3 will be mainfested respectively in the general vicinity of channels 1, 2 and 3 of Fig. 5.

Throughout the preceding discussion switches S2 and S1 were each in their respective 0 position. Now assume that it is desired to exhibit on the face of cathode ray tube CRT only one of the four inputs respectively impressed on input terminals 1, 2, 3 and 4 or an input impressed on input terminal 5. Assume, for purpose of explanation, that it is desired to only view the waveform impressed on input terminal 3, then it is necessary to transfer switches S1 and S2 each to their 3 position.

With switches S1 and S2 respectively in their 3 position, the following conditions exist: lead 35 is no longer grounded but is at a highly negative potential of approximately negative volts. (This condition results from switch S1 being transferred from its "0 position.) With lead 35 highly negative, the screen grids of inverter tubes IV2 through IV5 and amplifier tube A1 will be highly negative. This will result in inverter tubes IV2 through IV being precluded from being rendered conductive. Also the sweep amplifier including amplifier tube A1 will be ineffective, i. e., a constant output manifested on lead 61. Since none of the inverter circuits IV2 through IV 5 can be rendered conductive, no orderly selection of the waveforms impressed on input terminals 1, 2, 3 and 4 will appear on lead 50. However, under the conditions assumed at this time, switch S2 is in its positon 3 and hence lead 50 is not connected to the input of the noninverting amplifier. Input terminal 3 however, is connected through lead 53, switch S2, to the input, namely, lead 82, of the non-inverting amplifier. Thus the output of the non-inverting amplifier, namely lead 92, will manifest the waveform impressed on input terminal 3 and will be impressed via cathode follower tube CF1@ and lead 62 on vertical deiiection plate 1V of cathode ray tube CRT.

It will now be apparent that manifested on the face of the oscilloscope will be the waveform impressed on terminal 3. It will also be apparent to those skilled in the art that suitable variations in the frequency of the horizontal sweep circuit may be made when a single waveform is to be exhibited by the oscilloscope.

Correspondingly, when switches S1 and S2 are each in their first through fifth positions, the waveforms impressed on input terminals 1, 2, 3, 4 and 5 will respectively be exhibited on the face of the oscilloscope. Again under certain circumstances it may be desirable to adjust the frequency of the horizontal sweep circuit.

It will be apparent that when switches S1 and S2 are respectively in their 0 position resulting in the information impressed on input terminals 1 through 4 being simultaneously exhibited by the oscilloscope, that the waveforms appearing at said input terminals must be of the proper frequency. The period of the waveforms impressed upon input terminals 1 through 4 under the condition of the illustrative embodiment must be either sixteen microseconds or properly related thereto. It is to be appreciated, however, that the invention disclosed is not limited to a device employing a sixteen-microsecond period but that by judicious design a wide Variation is available.

Further, although the circuits for the non-inverting amplifier and the sweep amplifier are shown in detail, any of a number of circuits well known in the art may be utilized in place of said circuits. voltage waveforms shown in Fig. 2 is merely illustrative of one suitable source of the desired waveforms.

While there have been shown and described and pointed out the fundamental novel features of the invention as applied to a preferred embodiment, it will be understood that various omissions and substitutions and changes in the form and details of the device illustrated and in its operation may be made by those skilled in the art, without departing from the spirit of the invention. It is the intention, therefore, to be limited only as indicated by the scope of the following claims.

What is claimed is:

l. A multi-channel electronic switch capable of cyclically assuming a number of conductive conditions, said switch being controlled by a plurality of voltage waveforms and including: a plurality of cathode follower circuit means responsive to said plurality of voltage waveforms; a plurality of inverter circuit means; a plurality of diode mixing circuit means, each coupling a plurality of said cathode follower means to a predetermined one of said inverter circuit means; a plurality of second cathode follower means each comprising a channel of said switch; a plurality of input terminals respectively coupled to said second cathode follower means; clamping diode means respectively coupling each said second cath- Also the source of r ode follower means to a predetermined one of said inverter circuit means for conditioning said second cathode follower means to transmit an input signal; and means combining the outputs of all of said second cathode follower means into a single output channel, whereby signals respectively impressed on said input terminals are cyclically transmitted to said single output channel.

2. A multi-channel electronic switch as claimed in claim l further characterized by the provision of current adder means controlled by said rst cathode follower means for rendering a repetitive step voltage waveform.

3. A multi-channel electronic switch as claimed in claim 1 further characterized in that means is provided for selecting and transmitting a predetermined one of said plurality of inputs impressed on said plurality of input terminals of said multi-channel switch.

4. A multi-channel electronic switch adapted for producing a voltage waveform having a plurality of steps and for rendering operative one of a plurality of paths during each step of said voltage waveforms, said switch including a plurality of input terminals, a plurality of cathode followers respectively associated with said plurality of input terminals, means for combining the outputs of said plurality of cathode followers into a single channel for application to an oscilloscope, first means for controlling said plurality of cathode followers whereby only one of said cathode followers is conductive at any one time and that said cathode followers are each conductive in cyclic order thereby transmitting the electrical input impressed on the input terminal associated with said cathode follower, current adding means comprising a pair of serially connected resistors and including means for maintaining the variation in potential of each of the extremities of said serially connected resistors between a lower voltage limit and an upper voltage limit, means coupling a first extremity of said serially connected resistors to said first means and responsive thereto to cause current to ow through said resistors in a first direction, and further means coupling the other extremity of said resistors to said first means and responsive thereto to cause current to flow through said resistors in the opposite direction, and amplifier means connected to the juncture of said serially connected resistors to amplify the voltage waveform present thereat having the general configuration of a step wave, each step in said voltage waveform corresponding and occurring at the time during which only a particular cathode follower is conductive.

5. A multi-channel electronic switch as claimed in claim 4 further characterized in that the means for generating a voltage waveform having the general configuration of a step wave includes: a plurality of cathode follower means, a current adding network controlled by predetermined ones of said cathode follower means and adapted to produce a step wave voltage, and amplifying means coupled to said current adding network for amplifying said step wave voltage.

6. An electronic circuit adapted to produce a voltage waveform having the general configuration of a step wave, said electronic circuit including a first source of rectangular voltage pulses each pulse of fixed duration, a second source of voltage pulses synchronized with said first source for producing rectangular voltage pulses of twice the `duration of the rectangular pulses of said first source, a first lead, a second lead, means for maintaining the variation in potential of said first and second leads between a lower voltage limit and an upper voltage limit, a first and second resistor serially connected between said leads, means coupling said first lead to said first source to cause current to fiow through said first and second resistors in a first direction when the potential of said first source is greater than said upper voltage limit and the potential of said second source is below said lower voltage limit, means coupling said second lead to said second source to cause current to fiow through said first and second resistors in the opposite direction when the potential of said rst source is lower than said lower voltage limit and the potential of said second source is above said upper voltage limit whereby a step wave voltage is periodically manifested at the junction between said resistors, and means coupling the junction of said resistors only to an amplier for amplifying said step wave voltage.

7. In an electronic circuit adapted to produce a step Wave voltage, a first diode, a second diode, a third diode and a fourth diode, each diode having an anode and a cathode, a first source of fixed potential impressed on the cathodes of said first and second diodes, a second source of fixed potential impressed on the anodes of said second and fourth diodes, means connecting the anode of said first diode to the cathode of said third diode, means connecting the anode of said second diode to the cathode of said fourth diode, current adding means connected between the anode of said rst diode and the cathode of said fourth diode, variable voltage means connected to the anode of said first diode to cause current to ow through said current adding means in a first direction, and further variable volta-ge means connected to the cathode of said fourth diode to cause current to flow through said current adding means in the opposite direction whereby the output of said current adding means is a voltage Waveform having the general configuration of a step wave produced in response to the variations of said variable voltage means and said 10 further variable voltage means.

References Cited in the le of this patent UNITED STATES PATENTS 15 2,413,440 Farrington Dec. 3l, 1946 2,474,266 Lyons June 28, 1949 2,668,188 Naslund Feb. 2, 1954 2,719,670 Jacobs et al. Oct. 4, 1955

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