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US20100288729A1 - Methods for Manufacturing a Microstructure - Google Patents

Methods for Manufacturing a Microstructure Download PDF

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Publication number
US20100288729A1
US20100288729A1 US12/681,851 US68185108A US2010288729A1 US 20100288729 A1 US20100288729 A1 US 20100288729A1 US 68185108 A US68185108 A US 68185108A US 2010288729 A1 US2010288729 A1 US 2010288729A1
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US
United States
Prior art keywords
microstructure
mask layer
etching
mask
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US12/681,851
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English (en)
Inventor
Ronny van't Oever
Marko Theodoor Blom
Johannes Oonk
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micronit Technologies BV
Original Assignee
Micronit Microfluidics BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micronit Microfluidics BV filed Critical Micronit Microfluidics BV
Assigned to MICRONIT MICROFLUIDICS B.V. reassignment MICRONIT MICROFLUIDICS B.V. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: OEVER, RONNY VAN'T, BLOM, MARKO THEODOOR, OONK, JOHANNES
Publication of US20100288729A1 publication Critical patent/US20100288729A1/en
Abandoned legal-status Critical Current

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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00023Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
    • B81C1/00119Arrangement of basic structures like cavities or channels, e.g. suitable for microfluidic systems
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00023Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
    • B81C1/00103Structures having a predefined profile, e.g. sloped or rounded grooves
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2203/00Basic microelectromechanical structures
    • B81B2203/03Static structures
    • B81B2203/0369Static structures characterized by their profile
    • B81B2203/0376Static structures characterized by their profile rounded profile
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2201/00Manufacture or treatment of microstructural devices or systems
    • B81C2201/01Manufacture or treatment of microstructural devices or systems in or on a substrate
    • B81C2201/0101Shaping material; Structuring the bulk substrate or layers on the substrate; Film patterning
    • B81C2201/0128Processes for removing material
    • B81C2201/0146Processes for removing material not provided for in B81C2201/0129 - B81C2201/0145

Definitions

  • the invention relates to methods for manufacturing a microstructure, wherein use is made of powder blasting and/or etching and a mask layer.
  • ‘Microstructure’ is defined within the scope of the invention as a ‘structure characterized by its very small size, in particular within the range of 10 ⁇ 4 to 10 ⁇ 7 metre, i.e. the significant features in at least one direction cannot be fully discerned without the aid of an optical microscope’, see also the notes under IPC class B81.
  • ‘structure’ is understood to mean a cavity, recess, reservoir, channel, tunnel, opening, passage and so forth, and all possible combinations thereof.
  • Microfluidics is concerned with microstructural devices and systems with fluidic functions. This may involve the manipulation of very small quantities of fluid, i.e. liquid or gas, in the order of microlitres, nanolitres or even picolitres. Important applications lie in the field of biotechnology, chemical analysis, medical testing, process monitoring and environmental measurements.
  • a more or less complete miniature analysis system or synthesis system can herein be realized on a microchip, a so-called ‘lab-on-a-chip’ or, in specific applications, a so-called ‘biochip’.
  • the device or the system can comprise microfluidic components such as microchannels, microtunnels or microcapillaries, mixers, reservoirs, diffusion chambers, pumps, valves and so forth.
  • the microchip is usually built up of one or more layers of glass, silicon or a plastic such as a polymer.
  • Glass in particular is very suitable for many applications because of a number of properties. Glass has been known for many centuries and there are many types and compositions readily available at low cost.
  • glass is hydrophilic, chemically inert, stable, optically transparent, non-porous and suitable for prototyping; properties which are in many cases advantageous or required.
  • etching is generally used only for chemical and/or physical etching, although it is sometimes also understood to mean mechanical abrasion.
  • powder blasting also includes sandblasting.
  • ‘Blast lag’ or ‘etch lag’ indicates that the blasting speed or etching speed, and thereby the blasting depth or the etching depth at a given point in time, depend on the form and dimensions of the opening in the mask layer. This dependence is in turn subject to the type of process and the process parameters. The smaller the dimensions of the opening, the smaller the blasting speed or the etching speed will generally be. ‘Blast lag’ and ‘etch lag’ are as a rule undesirable, although advantageous use can also be made thereof, see for instance US 2005/0148158 which describes how in a single process step a relatively shallow and narrow breaking groove is arranged simultaneously with relatively deep and wide fluidic structures by making clever use of ‘blast lag’.
  • US 2003/0027425 provides further examples of the manufacture by means of sandblasting of structures with differing depths making use of the phenomenon that the blasting speed, and thereby the blasting depth, depend on the size and the form of the relevant opening in a mask layer.
  • WO 03/007026 provides similar examples, but then for isotropic etching.
  • WO 2007/000363 and US 2007/0065967 describe processes for forming a cavity by means of chemical etching using a mask layer in the form of a pattern of holes.
  • US 2005/0113004 and U.S. Pat. No. 6,422,920 provide examples of the use of powder blasting for the purpose of making recesses, passages, cavities or openings with a special form.
  • GB 2375063 and GB 2375064 relate to powder blasting wherein use is made of multiple ‘blast guns’ and of particles having a range of sizes.
  • Described herein is how different forms of cavity, channel and so on can also be realized in a single process step by making use of the phenomenon of ‘blast lag’ and by varying the angle of incidence of the particles, their size, the mask form, the number of ‘guns’ and so forth.
  • the number of possible forms and dimensions, and combinations thereof, does however remain limited because for a given process there is a determined fixed relation between on the one hand the blasting speed or etching speed, and thereby the blasting depth or the etching depth at a given point in time, and on the other the dimensions of the blasting opening or the etching opening in the mask layer.
  • U.S. Pat. No. 4,957,592 describes a method for forming structures with differing depths in silicon by means of anisotropic etching, wherein use is made of a mask layer consisting of a non-erodable part ( 22 ) and an erodable part ( 18 ). At a given moment during the etching process the erodable part will have been worn away, after which the underlying silicon will also be etched.
  • the design options are hereby increased, although the build-up of the non-homogeneous mask layer comprises multiple steps and is therefore relatively complex and expensive.
  • 5,173,442 describes the forming of structures of differing depths in a substrate by means of dry or wet etching, wherein use is made of a mask layer built up of multiple layers, for instance a hard lower layer ( 16 ) with a soft upper layer ( 18 ), or two stacked soft layers ( 30 , 34 ) with mutually differing patterns.
  • a mask layer built up of multiple layers, for instance a hard lower layer ( 16 ) with a soft upper layer ( 18 ), or two stacked soft layers ( 30 , 34 ) with mutually differing patterns.
  • the design options are increased, although here too the build-up of the non-homogeneous mask layer comprises multiple steps and is therefore relatively complex and expensive.
  • the invention provides for this purpose methods for manufacturing a microstructure, wherein use is made of powder blasting and/or etching and a single mask layer with openings and structures of varying dimensions, characterized in that the mask layer at least at one given point in time has been wholly worn away within at least one region by mask erosion while the microstructure is not yet wholly realized.
  • a ‘single mask layer’ is understood here and in the following to mean a layer which is arranged in a single process step and which is patterned in a single process step, with a substantially uniform thickness and substantially uniform properties. Use can be made here of a combination of ‘vertical’ erosion, i.e. parallel to the thickness direction, and ‘horizontal’ erosion, i.e. perpendicularly of the thickness direction, of the mask layer.
  • the horizontal mask erosion occurs at the edges of the mask structure.
  • the microstructure can be fully realized, wherein use can once again be made of powder blasting and/or etching.
  • a method according to the invention has the advantage that for instance in a single process run, with a single lithographic step, a mask structure can be defined and a structure with components having different blast depth or etch depth can subsequently be realized, while normally necessary for this purpose are two or more separate process runs with separate lithographic steps, or a mask layer built up of multiple parts and/or multiple layers with different properties and/or patterns. It will be apparent that this will result in a great cost advantage. This will be further elucidated in the following description of exemplary embodiments of methods according to the invention.
  • FIG. 1 shows schematically process steps of a first exemplary embodiment of a method according to the invention.
  • FIG. 2 shows schematically process steps of a second exemplary embodiment of a method according to the invention.
  • FIG. 1 shows schematically a process (I-IV) for manufacturing a microstructure (A).
  • Use is made (I) of a substrate ( 1 ) having arranged thereon a mask layer ( 2 ) comprising a larger opening ( 3 ), a plurality of smaller openings ( 4 ), a first region with larger mask structures ( 8 ) and a second region with smaller mask structures ( 7 ).
  • a start is made with powder blasting, wherein ‘blast lag’ ensures that the blasting speed for the smaller openings ( 4 ) is lower than for the larger opening ( 3 ).
  • a larger and deeper cavity ( 5 ) will be created in addition to a plurality of smaller and shallower cavities ( 6 ).
  • the process and the pattern ( 3 , 4 , 7 , 8 ) of mask layer ( 2 ) are chosen such that, at a given point in time (III), a passage ( 5 ′) is then created while the mask layer in the second region is then almost wholly worn away by a combination of vertical and horizontal mask erosion, but in the first region the thickness of the mask layer is still sufficient to protect the underlying material.
  • powder blasting is continued, wherein the mask layer in the second region is wholly worn away and the desired microstructure (A) is finally created.
  • a microstructure (A) can thus be manufactured comprising a passage ( 5 ′′) and a recess ( 6 ′′) of a determined desired depth.
  • the part of the mask layer in the second region almost wholly worn away following step II-III can optionally also be removed by means of an etchant, after which the powder blasting is resumed in order to arrive at the desired structure (A). Etching could also have been used in the final step (III-IV).
  • microstructure (A) being manufactured by using a suitable etching process during the first steps (I-II, II-III) and subsequently continuing with etching (III-IV) or, conversely, then switching to powder blasting (III).
  • FIG. 2 shows schematically a process (I′-III′) for manufacturing a microstructure (B).
  • a substrate ( 11 ) having arranged thereon a mask layer ( 12 ) comprising a larger opening ( 13 ), a plurality of smaller openings ( 14 ), a first region with larger mask structures ( 18 ), a second region with smaller mask structures ( 19 ), a third region with even smaller mask structures ( 20 ) and a fourth region with still smaller mask structures ( 21 ).
  • a start is made with isotropic etching, wherein ‘etch lag’ ensures that the etching speed for the smaller openings ( 14 ) is lower than for the larger opening ( 13 ).
  • a larger and deeper passage ( 15 ) is created in addition to multiple smaller and shallower cavities ( 16 ).
  • the process and the pattern ( 13 , 14 , 18 - 21 ) of mask layer ( 12 ) are chosen such that at that point in time (II′) the mask layer in the second region and the third region is almost wholly worn away, and in the fourth region wholly worn away, by a combination of vertical and horizontal mask erosion, while the thickness of the mask layer is still sufficient in the first region to protect the underlying material. Etching is then continued, wherein the mask layer is wholly worn away, first in the third region and then also in the second region, and the desired microstructure (B) is finally created.
  • a microstructure (B) can thus be manufactured which comprises a passage ( 15 ′) and a downward sloping recess ( 16 ′).
  • the part of the mask layer in the second region and the third region almost wholly worn away following step I′-II′ can optionally also be removed by means of powder blasting, after which the etching is resumed in order to arrive at the desired structure (B).

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dispersion Chemistry (AREA)
  • Micromachines (AREA)
US12/681,851 2007-10-09 2008-10-03 Methods for Manufacturing a Microstructure Abandoned US20100288729A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
NL1034489A NL1034489C2 (nl) 2007-10-09 2007-10-09 Werkwijzen voor het vervaardigen van een microstructuur.
NL1034489 2007-10-09
PCT/NL2008/000217 WO2009048321A2 (fr) 2007-10-09 2008-10-03 Procédés de fabrication d'une microstructure

Publications (1)

Publication Number Publication Date
US20100288729A1 true US20100288729A1 (en) 2010-11-18

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
US12/681,851 Abandoned US20100288729A1 (en) 2007-10-09 2008-10-03 Methods for Manufacturing a Microstructure

Country Status (4)

Country Link
US (1) US20100288729A1 (fr)
EP (1) EP2207749B1 (fr)
NL (1) NL1034489C2 (fr)
WO (1) WO2009048321A2 (fr)

Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4911783A (en) * 1987-04-15 1990-03-27 Bbc Brown Boveri Ag Process for etching recesses in a silicon substrate
US4957592A (en) * 1989-12-27 1990-09-18 Xerox Corporation Method of using erodable masks to produce partially etched structures in ODE wafer structures
US5173442A (en) * 1990-07-23 1992-12-22 Microelectronics And Computer Technology Corporation Methods of forming channels and vias in insulating layers
US5846442A (en) * 1995-03-02 1998-12-08 Hutchinson Technology Incorporated Controlled diffusion partial etching
US6387810B2 (en) * 1999-06-28 2002-05-14 International Business Machines Corporation Method for homogenizing device parameters through photoresist planarization
US6422920B1 (en) * 1999-08-18 2002-07-23 Koninklijke Philips Electronics, N.V. Methods of obtaining a pattern of concave spaces or apertures in a plate
US20030027425A1 (en) * 2001-07-12 2003-02-06 Yoshitaka Kawanishi Patterned product and its manufacturing method
US6555479B1 (en) * 2001-06-11 2003-04-29 Advanced Micro Devices, Inc. Method for forming openings for conductive interconnects
US20040130265A1 (en) * 2002-08-02 2004-07-08 Yoshitaka Terao Plasma display panel and manufacturing method thereof
US20050113004A1 (en) * 2003-11-25 2005-05-26 Brandes Anita G. Surface treatment of mechanically abraded glass
US20050148158A1 (en) * 2001-12-19 2005-07-07 Micronit Microfluidics B.V. Method of dividing a substrate into a plurality of individual chip parts
US20070065967A1 (en) * 2005-09-16 2007-03-22 Dalsa Semiconductor Inc. Micromachined structures using collimated DRIE
US20100260974A1 (en) * 2005-06-27 2010-10-14 Hans Artmann Method for Manufacturing a Micromechanical Component, and Micromechanical Component

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6066569A (en) * 1997-09-30 2000-05-23 Siemens Aktiengesellschaft Dual damascene process for metal layers and organic intermetal layers
GB2375063B (en) 2001-05-03 2003-04-16 Morgan Crucible Co Abrasive blast machining
GB2375064B (en) 2001-05-03 2003-06-04 Morgan Crucible Co Abrasive blast machining
FR2827270B1 (fr) * 2001-07-13 2004-01-02 Centre Nat Rech Scient Procede de fabrication de pieces microscopiques

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4911783A (en) * 1987-04-15 1990-03-27 Bbc Brown Boveri Ag Process for etching recesses in a silicon substrate
US4957592A (en) * 1989-12-27 1990-09-18 Xerox Corporation Method of using erodable masks to produce partially etched structures in ODE wafer structures
US5173442A (en) * 1990-07-23 1992-12-22 Microelectronics And Computer Technology Corporation Methods of forming channels and vias in insulating layers
US5846442A (en) * 1995-03-02 1998-12-08 Hutchinson Technology Incorporated Controlled diffusion partial etching
US6387810B2 (en) * 1999-06-28 2002-05-14 International Business Machines Corporation Method for homogenizing device parameters through photoresist planarization
US6422920B1 (en) * 1999-08-18 2002-07-23 Koninklijke Philips Electronics, N.V. Methods of obtaining a pattern of concave spaces or apertures in a plate
US6555479B1 (en) * 2001-06-11 2003-04-29 Advanced Micro Devices, Inc. Method for forming openings for conductive interconnects
US20030027425A1 (en) * 2001-07-12 2003-02-06 Yoshitaka Kawanishi Patterned product and its manufacturing method
US20050148158A1 (en) * 2001-12-19 2005-07-07 Micronit Microfluidics B.V. Method of dividing a substrate into a plurality of individual chip parts
US20040130265A1 (en) * 2002-08-02 2004-07-08 Yoshitaka Terao Plasma display panel and manufacturing method thereof
US20050113004A1 (en) * 2003-11-25 2005-05-26 Brandes Anita G. Surface treatment of mechanically abraded glass
US20100260974A1 (en) * 2005-06-27 2010-10-14 Hans Artmann Method for Manufacturing a Micromechanical Component, and Micromechanical Component
US20070065967A1 (en) * 2005-09-16 2007-03-22 Dalsa Semiconductor Inc. Micromachined structures using collimated DRIE

Also Published As

Publication number Publication date
WO2009048321A2 (fr) 2009-04-16
NL1034489C2 (nl) 2009-04-14
EP2207749A2 (fr) 2010-07-21
EP2207749B1 (fr) 2015-05-20
WO2009048321A3 (fr) 2009-06-04

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Owner name: MICRONIT MICROFLUIDICS B.V., NETHERLANDS

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:OEVER, RONNY VAN'T;BLOM, MARKO THEODOOR;OONK, JOHANNES;SIGNING DATES FROM 20100528 TO 20100602;REEL/FRAME:024788/0241

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION