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US20090085194A1 - Wafer level packaged mems device - Google Patents

Wafer level packaged mems device Download PDF

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Publication number
US20090085194A1
US20090085194A1 US11/864,725 US86472507A US2009085194A1 US 20090085194 A1 US20090085194 A1 US 20090085194A1 US 86472507 A US86472507 A US 86472507A US 2009085194 A1 US2009085194 A1 US 2009085194A1
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US
United States
Prior art keywords
layer
wafer
active
cover plate
handle
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US11/864,725
Other languages
English (en)
Inventor
Peter H. LaFond
Lianzhong Yu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Honeywell International Inc
Original Assignee
Honeywell International Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell International Inc filed Critical Honeywell International Inc
Priority to US11/864,725 priority Critical patent/US20090085194A1/en
Assigned to HONEYWELL INTERNATIONAL INC. reassignment HONEYWELL INTERNATIONAL INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: LAFOND, PETER H., YU, LIANZHONG
Priority to EP08833140.0A priority patent/EP2193542B1/fr
Priority to JP2010527259A priority patent/JP2012506616A/ja
Priority to PCT/US2008/080691 priority patent/WO2009043062A2/fr
Publication of US20090085194A1 publication Critical patent/US20090085194A1/en
Priority to US12/965,569 priority patent/US8685776B2/en
Abandoned legal-status Critical Current

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Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00261—Processes for packaging MEMS devices
    • B81C1/00333—Aspects relating to packaging of MEMS devices, not covered by groups B81C1/00269 - B81C1/00325
    • A—HUMAN NECESSITIES
    • A01—AGRICULTURE; FORESTRY; ANIMAL HUSBANDRY; HUNTING; TRAPPING; FISHING
    • A01B—SOIL WORKING IN AGRICULTURE OR FORESTRY; PARTS, DETAILS, OR ACCESSORIES OF AGRICULTURAL MACHINES OR IMPLEMENTS, IN GENERAL
    • A01B1/00—Hand tools
    • A01B1/02—Spades; Shovels
    • A—HUMAN NECESSITIES
    • A01—AGRICULTURE; FORESTRY; ANIMAL HUSBANDRY; HUNTING; TRAPPING; FISHING
    • A01B—SOIL WORKING IN AGRICULTURE OR FORESTRY; PARTS, DETAILS, OR ACCESSORIES OF AGRICULTURAL MACHINES OR IMPLEMENTS, IN GENERAL
    • A01B1/00—Hand tools
    • A01B1/02—Spades; Shovels
    • A01B1/026—Spades; Shovels with auxiliary handles for facilitating lifting
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2203/00—Forming microstructural systems
    • B81C2203/01—Packaging MEMS
    • B81C2203/0118—Bonding a wafer on the substrate, i.e. where the cap consists of another wafer
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2203/00—Forming microstructural systems
    • B81C2203/03—Bonding two components
    • B81C2203/033—Thermal bonding
    • B81C2203/036—Fusion bonding

Definitions

  • MEMS devices are generally well-known. In the most general form, MEMS devices consist of mechanical microstructures, microsensors, microactuators and electronics integrated in the same environment, i.e., on a silicon chip. MEMS technology is an enabling technology in the field of solid-state transducers, i.e., sensors and actuators. The microfabrication technology enables fabrication of large arrays of devices, which individually perform simple tasks but in combination can accomplish complicated functions. Current applications include accelerometers, pressure, chemical and flow sensors, micro-optics, optical scanners, and fluid pumps. For example, one micromachining technique involves masking a body of silicon in a desired pattern, and then deep etching the silicon to remove unmasked portions thereof. The resulting three-dimensional silicon structure functions as a miniature mechanical force sensing device, such as an accelerometer that includes a proof mass suspended by a flexure.
  • MEMS technology is an enabling technology in the field of solid-state transducers, i.e., sensors and actuators.
  • the microfabrication technology
  • the present invention provides an apparatus and method for sensor architecture based on bulk machining of Silicon-On-Oxide (SOI) and Double-Sided Polished (DSP) wafers and fusion bond joining that simplifies manufacturing and reduces costs by providing a nearly all-silicon, hermetically sealed, microelectromechanical system (MEMS) device, such as an electrostatic accelerometer or rate gyro device.
  • SOI Silicon-On-Oxide
  • DSP Double-Sided Polished
  • the device includes a device sensor mechanism formed in an active semiconductor layer separated from a handle layer by a dielectric layer, and a first silicon cover plate having a relatively thicker handle portion with a thin dielectric layer.
  • the dielectric layer of the cover plate is bonded to an active layer face of the device sensor mechanism. Cavities are formed in one or both of the handle layers and corresponding dielectric layer to expose electrical leads.
  • the cover is an SOI wafer and set backs from the active components are anisotropically etched into the handle layer while the active layer has been protectively doped.
  • FIG. 1 is a cross-sectional view of a sensor mechanism device formed in accordance with an embodiment of the present invention
  • FIGS. 2A-E illustrate a fabrication process for creating a sensor mechanism device
  • FIG. 3 is a cross-sectional view of another sensor mechanism device formed in accordance with an embodiment of the present invention.
  • FIGS. 4A-G illustrate a fabrication process for creating the device of FIG. 3 ;
  • FIG. 5 is a perspective view of an isolator flange of the present invention.
  • FIGS. 1 , 2 A-E illustrate a sensor mechanism device 20 and process for making same.
  • a first silicon-on-insulator (SOI) wafer 30 has a mechanism layer 34 on a dielectric (e.g., SiO 2 ) layer 36 which is on a handle layer (Si) 32 .
  • the dielectric layer 36 has a thickness from about 0.5 to 3.0 microns that is sandwiched between the handle layer 32 and the mechanism layer 34 .
  • the dielectric layer 36 is oxide or some other insulator.
  • the mechanism layer 34 is etched using a known etchant (e.g., RIE (Reactive Ion Etch) or DRIE (Deep Reactive Ion Etch)) according to a predefined etching pattern(s).
  • a known etchant e.g., RIE (Reactive Ion Etch) or DRIE (Deep Reactive Ion Etch)
  • the dielectric layer 36 acts as an etch stop.
  • Etching exposes appropriate actuator and/or sensor mechanical features (e.g. 38 ) in the mechanism layer 34 .
  • hydrogen fluoride (HF) etching and/or carbon dioxide (CO 2 ) is used to etch away the dielectric below and around the features 38 .
  • Other etchants may be used provided the handle layer 32 acts as an etch stop.
  • FIG. 2C is a cross-sectional view that illustrates fabrication of a silicon cover 40 from a double sided polished (DSP) wafer.
  • the cover 40 includes a dielectric layer 44 on one side of a handle layer 42 .
  • the dielectric layer 44 is etched to expose a pattern of cooperating interior cover plate features that correspond to the location of the etched features 38 .
  • the dielectric layer 44 is etched using known etching techniques (see above) with the handle layer 42 being an etch stop.
  • the silicon cover 40 is fusion or Au-eutectic bonded to the SOI wafer 30 .
  • the remaining portions of the dielectric layer 44 are bonded to non-feature components of the mechanical layer 34 .
  • one or both of the handle layers 32 and 42 are etched away at locations relative to some of the non-feature portions of the mechanism layer 34 using a conventional wet etching process, such as potassium hydroxide (KOH).
  • KOH potassium hydroxide
  • one or both of the exposed dielectric material from the dielectric layers 36 and 44 are then etched away, using a standard etching process, to expose a portion of the non-featured portion of the mechanism layer 34 .
  • metallized connectors 50 are applied to portions of the exposed non-featured sections of the mechanism layer 34 .
  • the metallized connectors 50 provide electrical connections to exposed electrical traces on the mechanism layer 34 that are in electrical communication with the active internal components (features 38 ).
  • dicing occurs in order to separate sealed functional components and associated externally exposed metallized connectors 50 .
  • FIGS. 3 and 4 A-G illustrate an alternate sensor mechanism device 100 and process for making same.
  • the sensor mechanism device 100 is similar to the sensor mechanism device 20 as shown in FIGS. 1 and 2 A-E except that a cover 120 ( FIG. 4D ) is an SOI wafer.
  • FIG. 4C illustrates additional steps for producing a set-back from active components 112 .
  • a base SOI wafer 102 is processed in a similar manner as the steps as shown in FIGS. 2A and 2B to produce active components 112 .
  • the surfaces of the components 112 and other portions of the mechanism layer 106 are or have been previously doped.
  • an anisotropic etch e.g., Ethylene-Diamene-Pyrocatechol (EDP), KOH, Tetra-Methyl Ammonium Hydroxide (TMAH)
  • EDP Ethylene-Diamene-Pyrocatechol
  • TMAH Tetra-Methyl Ammonium Hydroxide
  • the cover 120 is etched to expose a handle layer 122 at positions that would correspond to the active components 112 from the base wafer 102 .
  • an optional mechanical isolation peripheral device 130 is etched using DRIE or comparable etching technique.
  • the cover 120 is attached to the base wafer 102 using a fusion bond, Au-eutectic bond, or comparable type of bonding process.
  • a KOH etch or comparable etching technique is used to etch away a handle layer 110 of the base wafer 102 and the handle layer 122 is etched by DRIE process in order to complete the mechanical isolation around the periphery and to expose portions of a dielectric layer 124 .
  • the mechanical isolation around the periphery reduces the amount of mechanical loads that can impinge upon the components 112 when they are in a package.
  • the exposed dielectric material in the dielectric layer 124 is etched to expose the surface of the mechanism layer 106 .
  • Metalized contacts 140 are then applied to the exposed surface of the mechanism layer 106 in order to allow for connection of the active components 112 within corresponding hermetically sealed cavities to external devices (not shown). Dicing (not shown) of the entire package is then performed.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Engineering (AREA)
  • Soil Sciences (AREA)
  • Environmental Sciences (AREA)
  • Micromachines (AREA)
  • Pressure Sensors (AREA)
US11/864,725 2007-09-28 2007-09-28 Wafer level packaged mems device Abandoned US20090085194A1 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
US11/864,725 US20090085194A1 (en) 2007-09-28 2007-09-28 Wafer level packaged mems device
EP08833140.0A EP2193542B1 (fr) 2007-09-28 2008-10-22 Dispositif mems en boîtier sur tranche
JP2010527259A JP2012506616A (ja) 2007-09-28 2008-10-22 ウェーハレベルでパッケージングされたｍｅｍｓデバイス
PCT/US2008/080691 WO2009043062A2 (fr) 2007-09-28 2008-10-22 Dispositif mems en boîtier sur tranche
US12/965,569 US8685776B2 (en) 2007-09-28 2010-12-10 Wafer level packaged MEMS device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/864,725 US20090085194A1 (en) 2007-09-28 2007-09-28 Wafer level packaged mems device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/965,569 Continuation US8685776B2 (en) 2007-09-28 2010-12-10 Wafer level packaged MEMS device

Publications (1)

Publication Number Publication Date
US20090085194A1 true US20090085194A1 (en) 2009-04-02

Family

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Family Applications (2)

Application Number Title Priority Date Filing Date
US11/864,725 Abandoned US20090085194A1 (en) 2007-09-28 2007-09-28 Wafer level packaged mems device
US12/965,569 Active 2028-04-24 US8685776B2 (en) 2007-09-28 2010-12-10 Wafer level packaged MEMS device

Family Applications After (1)

Application Number Title Priority Date Filing Date
US12/965,569 Active 2028-04-24 US8685776B2 (en) 2007-09-28 2010-12-10 Wafer level packaged MEMS device

Country Status (4)

Country Link
US (2) US20090085194A1 (fr)
EP (1) EP2193542B1 (fr)
JP (1) JP2012506616A (fr)
WO (1) WO2009043062A2 (fr)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090323170A1 (en) * 2008-06-30 2009-12-31 Qualcomm Mems Technologies, Inc. Groove on cover plate or substrate
US8379392B2 (en) * 2009-10-23 2013-02-19 Qualcomm Mems Technologies, Inc. Light-based sealing and device packaging
US9006015B2 (en) 2013-01-24 2015-04-14 Taiwan Semiconductor Manfacturing Company, Ltd. Dual layer microelectromechanical systems device and method of manufacturing same
US10273147B2 (en) 2013-07-08 2019-04-30 Motion Engine Inc. MEMS components and method of wafer-level manufacturing thereof
WO2015003264A1 (fr) 2013-07-08 2015-01-15 Motion Engine Inc. Dispositif mems et procédé de fabrication
WO2015013827A1 (fr) 2013-08-02 2015-02-05 Motion Engine Inc. Capteur de mouvement à système microélectromécanique (mems) pour détection de vitesse angulaire de sous-résonance
JP6590812B2 (ja) 2014-01-09 2019-10-16 モーション・エンジン・インコーポレーテッド 集積ｍｅｍｓシステム
WO2015154173A1 (fr) 2014-04-10 2015-10-15 Motion Engine Inc. Capteur de pression mems
WO2015184531A1 (fr) 2014-06-02 2015-12-10 Motion Engine Inc. Capteur de mouvement mems à plusieurs masses
CA3004760A1 (fr) 2014-12-09 2016-06-16 Motion Engine Inc. Magnetometre de systeme micro electromecanique (mems) 3d et procedes associes
CA3004763A1 (fr) 2015-01-15 2016-07-21 Motion Engine Inc. Dispositif mems 3d a cavite hermetique

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US6105427A (en) * 1998-07-31 2000-08-22 Litton Systems, Inc. Micro-mechanical semiconductor accelerometer
US6423563B2 (en) * 1998-05-08 2002-07-23 Denso Corporation Method for manufacturing semiconductor dynamic quantity sensor
US6718824B2 (en) * 2000-12-20 2004-04-13 Nippon Soken, Inc. Semiconductor dynamic quantity detecting sensor and manufacturing method of the same
US20060163679A1 (en) * 2005-01-21 2006-07-27 Honeywell International, Inc. High performance MEMS packaging architecture
US20070054433A1 (en) * 2005-09-08 2007-03-08 Rockwell Scientific Licensing Llc High temperature microelectromechanical (MEM) devices and fabrication method

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US20070054433A1 (en) * 2005-09-08 2007-03-08 Rockwell Scientific Licensing Llc High temperature microelectromechanical (MEM) devices and fabrication method

Also Published As

Publication number Publication date
US20110092018A1 (en) 2011-04-21
EP2193542B1 (fr) 2015-09-23
WO2009043062A2 (fr) 2009-04-02
EP2193542A4 (fr) 2014-07-23
US8685776B2 (en) 2014-04-01
JP2012506616A (ja) 2012-03-15
EP2193542A2 (fr) 2010-06-09
WO2009043062A3 (fr) 2009-09-03

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Legal Events

Date Code Title Description
AS Assignment

Owner name: HONEYWELL INTERNATIONAL INC., NEW JERSEY

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:LAFOND, PETER H.;YU, LIANZHONG;REEL/FRAME:019904/0845

Effective date: 20070928

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION