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US20070277036A1 - Intelligent data storage and processing using fpga devices - Google Patents

Intelligent data storage and processing using fpga devices Download PDF

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Publication number
US20070277036A1
US20070277036A1 US10/550,326 US55032604A US2007277036A1 US 20070277036 A1 US20070277036 A1 US 20070277036A1 US 55032604 A US55032604 A US 55032604A US 2007277036 A1 US2007277036 A1 US 2007277036A1
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Prior art keywords
data
programmable logic
logic device
storage medium
search
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US10/550,326
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English (en)
Inventor
Roger Chamberlain
Benjamin Brink
Jason White
Mark Franklin
Ron Cytron
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IP Reservoir LLC
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Washington University in St Louis WUSTL
Exegy Inc
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Priority to US10/550,326 priority Critical patent/US20070277036A1/en
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Publication of US20070277036A1 publication Critical patent/US20070277036A1/en
Priority to US13/165,155 priority patent/US8620881B2/en
Assigned to IP RESERVOIR, LLC reassignment IP RESERVOIR, LLC ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: WASHINGTON UNIVERSITY
Assigned to WASHINGTON UNIVERSITY reassignment WASHINGTON UNIVERSITY SECURITY AGREEMENT Assignors: IP RESERVOIR, LLC
Assigned to IP RESERVOIR, LLC reassignment IP RESERVOIR, LLC ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: EXEGY INCORPORATED
Abandoned legal-status Critical Current

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Definitions

  • Indications are that the average database size and associated software support systems are growing at rates that are greater than the increase in processor performance (i.e., more than doubling roughly every 18 months). This is due to a number of factors including without limitation the desire to store more detailed information, to store information over longer periods of time, to merge databases from disparate organizations, and to deal with the large new databases which have arisen from emerging and important applications. For example, two emerging applications having large and rapidly growing databases are those connected with the genetics revolution and those associated with cataloging and accessing information on the Internet. In the case of the Internet, current industry estimates are that in excess of 1.5 million pages are added to the Internet each day. At the physical level this has been made possible by the remarkable growth in disk storage performance where magnetic storage density has been doubling every year or so for the past five years.
  • Search and retrieval functions are more easily performed on information when it is indexed.
  • information can be indexed by company name, stock symbol and price.
  • the information being searched is of a type that is either hard to categorize or index or which falls into multiple categories.
  • the accuracy of a search for information is only as good as the accuracy and comprehensiveness of the index created therefor.
  • the information is not indexed.
  • the bottleneck for indexing is the time taken to develop the reverse index needed to access web pages in reasonable time.
  • searching engines available designing a search which will yield a manageable result is becoming increasingly difficult due to the large number of “hits” generated by less than a very detailed set of search instructions. For this reason, several “intelligent” search engines have been offered on the web, such as Google, which are intended to whittle down the search result using logic to eliminate presumed undesired “hits”.
  • Associative memory devices for dealing with large databases are known in the prior art.
  • these associative memory devices comprise peripheral memories for computers, computer networks, and the like, which operate asynchronously to the computer, network, etc. and provide increased efficiency for specialized searches.
  • these memory devices can include certain limited decision-making logic as an aid to a main CPU in accessing the peripheral memory.
  • An example of such an associative memory device particularly adapted for use with a rotating memory such as a high speed disk or drum can be found in U.S. Pat. No. 3,906,455, the disclosure of which is incorporated herein by reference.
  • This particular device provides a scheme for use with a rotating memory and teaches that two passes over a memory sector is necessary to presort and then sort the memory prior to performing any logical operations thereon. Thus, this device is taught as not being suitable for use with any linear or serial memory such as magnetic tape or the like.
  • Dixon performs fixed comparisons on a fixed number of bytes. They don't have the ability to scan and correlate arbitrarily over the data. They search serially along the tracks in a given disk cylinder but there is no provision for parallel searching across disks. Dixon's comparisons are limited by a fixed rigid number of standard logical operation types. Additionally, the circuitry presented supports only these single logical operations. There is no support for approximate or fuzzy matching.
  • this necessarily requires that the accessing circuit process the memory according to the structure of the data stored. In other words, if the data is stored in octets, then the accessing circuitry must access the data in octets and process it in an incremental manner.
  • This “start and stop” processing serves to increase the input/output time required to access data. As is also well known in the art, this input/output time typically represents the bottleneck and effective limitation of processing power in any computer or computer network.
  • data reduction and classification operations e.g., the ability to summarize data in some aggregate form
  • data reduction and classification operations e.g., the ability to summarize data in some aggregate form
  • FPGA's may be quickly programmed in the field to optimize the search methodology using a template, the template having been prepared in advance and merely communicated to the FPGA's over a connecting bus. Should it then be desired to search using a different methodology, the FPGA's may then be quickly and conveniently re-programmed with another prepared template in a minimal number of clock cycles and the second search started immediately.
  • FPGA's as the re-configurable logic, shifting from one search to another is quite easy and quick, relative to other types of re-programmable logic devices.
  • a second aspect of speed is the amount of time, once programmed, that a search requires.
  • FPGA's are hardware devices, searching is done at hardware processing speeds which is orders of magnitude faster than at software processing speeds as would be experienced with a microprocessor, for example.
  • FPGA's are desirable over other software implementations where speed is a consideration as it most often is.
  • the 10/153,151 application discloses that at least several “generic” templates can be prepared in advance and made available for use in performing text searching in either an absolute search, an approximate search, or a higher or advanced search mode incorporating a Boolean algebra logic capability, or a graphics search mode. These could then be stored in a CPU memory and be available either on command or loaded in automatically in response to a software queue indicating one of these searches.
  • the invention of the 10/153,151 application may be described as a technique for data retrieval through approximate matching of a data key with a continuous reading of data as stored on a mass storage medium, using FPGA's to contain the template for the search and do the comparison, all in hardware and at essentially line speed.
  • FPGA's By utilizing FPGA's, the many advantages and features commonly known are made available. These include the ability to arrange the FPGA's in a “pipeline” orientation, in a “parallel” orientation, or even in an array incorporating a complex web overlay of interconnecting data paths allowing for complex searching algorithms.
  • the data key may be an analog signal and it is matched with an analog signal generated by a typical read/write device as it slews across the mass storage medium.
  • the steps taught to be required in the prior art of not only reading the analog representation of digital data stored on the mass storage medium but also the conversion of that signal to its digital format prior to being compared are eliminated.
  • the data be “framed” or compared utilizing the structure or format in which the data has been organized and stored.
  • all that need be specified is the elapsed time of that signal which is used for comparison with a corresponding and continuously changing selected time portion of the “read” signal.
  • the data “key” may then be approximately matched to the sliding “window” of data signal to determine a match.
  • the same amount of data may be scanned much more quickly and data matching the search request may be determined much more quickly as well.
  • CPU based approximate searches of 200 megabytes of DNA sequences can take up to 10 seconds on a typical present day “high end” system, assuming the offline processing to index the database has already been completed. In that same 10 seconds, the inventors have found that a 10-gigabyte disk could be searched for approximate matches using the present invention. This represents a 50:1 improvement in performance.
  • a typical hard disk drive there are four surfaces and corresponding read/write heads, which may be all searched in parallel should each head be equipped with the present invention. As these searches can proceed in parallel, the total increase in speed or improvement represents a 200:1 advantage. Furthermore, additional hard disk drives may be accessed in parallel and scaled to further increase this speed advantage over conventional systems.
  • the search may be conducted to exactly match the desired signal, or more importantly and perhaps more powerfully, the threshold may be lowered to provide for approximate matching searches.
  • This is generally considered a more powerful search mode in that databases may be scanned to find “hits” which may be valid even though the data may be only approximately that which is being sought. This allows searching to find data that has been corrupted, incorrectly entered data, data which only generally corresponds to a category, as well as other kinds of data searches that are highly desired in many applications. For example, a library of DNA sequences may be desired to be searched and hits found which represent an approximate match to a desired sequence of residues.
  • Still another application involves Internet searches provided by Internet search engines.
  • approximate matching allows for misspelled words, differently spelled words, and other variations to be accommodated without defeating a search or requiring a combinatorial number of specialized searches.
  • This technique permits a search engine to provide a greater number of hits for any given search and ensure that a greater number of relevant web pages are found and cataloged in the search.
  • this approximate matching casts a wider net which produces a greater number of “hits” which itself creates its own problems.
  • Still another possible application for this inventive technology is for accessing databases which may be enormous in size or which may be stored as analog representations.
  • our society has seen the implementation of sound recording devices and their use in many forums including judicial proceedings.
  • tape recordings made in the President's oval office have risen in importance with respect to impeachment hearings.
  • tape recordings made over the years of a presidency can accumulate into a huge database which might require a number of persons to actually listen to them in order to find instances where particular words are spoken that might be of interest.
  • an analog representation of that spoken word can be used as a key and sought to be matched while the database is scanned in a continuous manner and at rapid speed.
  • the present and parent inventions provide a powerful search tool for massive analog databases as well as massive digital databases.
  • While text-based searches are accommodated by the present and parent inventions as described above, storage media containing images, sound, and other representations have traditionally been more difficult to search than text.
  • the present and parent inventions allow searching a large data base for the presence of such content or fragments thereof.
  • the key in this case could be a row or quadrant of pixels that represent the image being sought. Approximate matching of the key's signal can then allow identification of matches or near matches to the key.
  • differences in pixels or groups of pixels can be searched and noted as results which can be important for satellite imaging where comparisons between images of the same geographic location are of interest as indicative of movement of equipment or troops.
  • the present and parent inventions may be embodied in any of several configurations, as is noted more particularly below.
  • a disk drive accelerator which would be readily installed in any PC as an interface between the hard disk drive and the system bus.
  • This disk drive accelerator could be provided with a set of standardized templates and would provide a “plug and play” solution for dramatically increasing the speed at which data could be accessed from the drive by the CPU. This would be an after market or retrofit device to be sold to the large installed base of PC's. It could also be provided as part of a new disk drive, packaged within the envelope of the drive case or enclosure for an external drive or provided as an additional plug in pc card as an adapter for an internal drive. Additional templates for various kinds of searches on various kinds of databases could be made available either with the purchase of the accelerator, such as by being encoded on a CD, or even over the Internet for download, as desired.
  • the present invention extends the novel technological technology disclosed in the parent applications Ser. Nos. 09/545,472 and 10/153,151 such that a programmable logic device (PLD) such as an FPGA performs any of a variety of additional processing operations including but not limited to operations such as encryption, decryption, compression, and decompression.
  • PLD programmable logic device
  • FPGA field-programmable gate array
  • the term “manipulating” or “manipulation” refers to the performance of a search operation, a reduction operation, or a classification operation on data in combination with any or all of a compression operation, a decompression operation, an encryption operation, and a decryption operation also performed on the data, or the performance of a compression operation or a decompression operation on data alone or in combination with any or all of a search operation, a reduction operation, a classification operation, an encryption operation, and a decryption operation also performed on the data.
  • the present invention provides flexibility to data owners in controlling who has access to their data, and speed in providing authorized users with access to that data (or targeted access to a portion of that data through scanning capabilities).
  • compression and/or decompression allows data to be stored in a manner that takes up less space in the mass storage medium, while still retaining the ability to search through the data at high speeds.
  • these manipulation operations when implemented with multiple stages, are implemented in a pipelined manner.
  • the combination of one or more stages dedicated to encryption/decryption or compression/decompression with one or more stages dedicated to data searching or data reduction synergistically produces an intelligent, flexible, high speed, and secure design technique for data storage and retrieval.
  • data is stored on the magnetic medium as a plurality of discontiguous arcs positioned on the magnetic medium, preferably in a helical or spiral pattern.
  • a novel technique for storing data files in memory wherein a data file is stored using a sum of powers of 2 technique.
  • the combination of data file storage using this sum of powers of 2 technique with the data processing capabilities of the re-configurable logic platform described herein also synergistically results in enhanced processing speeds.
  • FIG. 1 is a block diagram illustrating an information search and retrieval system in accordance with one embodiment
  • FIG. 2 is a schematic of a conventional rigid disk drive system illustrating different insertion points for connection of the inventive system
  • FIG. 3 is a block diagram of one embodiment of the transformation of a search inquiry processed by the system of FIG. 1 ;
  • FIG. 4 is a block diagram of one embodiment of a hardware implementation used to conduct an exact match search in a digital domain
  • FIG. 5 is a block diagram of one embodiment of a hardware implementation used to conduct an approximate match search in a digital domain
  • FIG. 6 is a block diagram depicting the implementation of the inventive system in a stand-alone configuration
  • FIG. 7 is a block diagram depicting an inventive implementation as a shared remote mass storage device across a network
  • FIG. 8 is a block diagram depicting an inventive implementation as a network attached storage device (NASD);
  • NNASD network attached storage device
  • FIG. 9 is a flowchart detailing the logical steps for searching and retrieving data from a magnetic storage medium
  • FIG. 10 is a graphical representation of an analog signal as might be used as a data key
  • FIG. 11 is a graphical representation of an analog signal representing the continuous reading of data from a magnetic storage medium in which the data key is present;
  • FIG. 12 is a graphical representation of the signal of FIG. 10 overlying and matched to the signal of FIG. 11 ;
  • FIG. 13 is a graphical representation of a correlation function calculated continuously as the target data in the magnetic storage medium is scanned and compared with the data key;
  • FIG. 14 is a graphical representation of a correlation function as the data key is continuously compared with a signal taken from reading a different set of target data from the magnetic storage medium but which also contains the data key;
  • FIG. 15 is one embodiment of a table generated by the present invention for use in performing sequence matching operations
  • FIG. 16 is a block diagram of one embodiment of a systolic array architecture that can be used by the inventive system to compute the values of the table of FIG. 15 ;
  • FIGS. 17 and 18 are block diagrams of the systolic array architecture of FIG. 15 in operation during the combinatorial and latch part of the clock cycle, respectively, of the system of FIG. 1 ;
  • FIG. 19 is the table of FIG. 15 representing a particular sequence matching example
  • FIG. 20 is a block diagram of the systolic array architecture of FIG. 16 for the example of FIG. 19 ;
  • FIGS. 20, 21 and 22 are block diagrams of the systolic array architecture of FIG. 20 in operation during the combinatorial and latch part of the clock cycle, respectively, of the system of FIG. 1 ;
  • FIG. 23 is a block diagram of one embodiment of a systolic array architecture that can be used by the inventive system in performing image matching operations;
  • FIG. 24 is a block diagram of another arrangement for the systolic array architecture in performing image matching operations
  • FIG. 25 is a block diagram of one embodiment of an individual cell of the systolic array shown in FIG. 23 ;
  • FIG. 26 is a block diagram of another embodiment of an individual cell of the systolic array shown in FIG. 23 ;
  • FIG. 27 is a block diagram showing an example using the inventive system for performing data reduction operations.
  • FIG. 28 is a block diagram showing a more complex arrangement of FPGA's
  • FIGS. 29 and 30 illustrate exemplary embodiments for multi-stage processing pipelines implemented on a re-configurable logic device
  • FIG. 31 illustrates an encryption engine implemented on a re-configurable logic device
  • FIG. 32 illustrates another exemplary embodiment for a multi-stage processing pipeline implemented on a re-configurable logic device
  • FIGS. 33-35 illustrate various encryption engines that can be implemented on re-configurable logic
  • FIG. 37 illustrates a non-secure data warehousing decryption scenario
  • FIGS. 38 - 39 ( b ) illustrate various exemplary embodiments for secure data delivery in a data warehousing scenario
  • FIGS. 40-42 illustrate various exemplary embodiments for implementing compression and/or decompression on a re-configurable logic device
  • FIG. 43 depicts a process flow for creating a template to be loaded onto a re-configurable logic device
  • FIGS. 44 ( a ) and ( b ) illustrate a conventional hard disk using circular tracks and a disk drive system for use therewith;
  • FIG. 45 illustrates a novel planar magnetic medium having discrete circular arcs arranged in a helical pattern
  • FIG. 46 illustrates a head positioning flow for reading data from the magnetic medium of FIG. 45 ;
  • FIGS. 47 ( a ) and ( b ) illustrate two embodiments of a sum of powers of 2 file system
  • FIGS. 48-50 plot various performance characteristics for a sum of powers of 2 file system.
  • the present invention is readily implemented in a stand-alone computer or computer system.
  • the invention is comprised of at least one re-configurable logic device 21 coupled to at least one magnetic mass storage medium 26 , with that re-configurable logic device being an FPGA.
  • the re-configurable logic device 21 may itself include a plurality of functional logic elements including a data shift register and possibly a microprocessor, or they could be on separate chips, or the individual logic elements could be configured in a pipeline or parallel orientation as shown in some of the other figures herein.
  • re-configurable logic refers to any logic technology whose form and function can be significantly altered (i.e., reconfigured) in the field post-manufacture.
  • re-configurable logic devices include without limitation programmable logic devices (PLDs).
  • PLD programmable logic devices
  • a PLD is an umbrella term for a variety of chips that are programmable. There are generally three physical structures for a PLD. The first is the permanent fuse type which blows apart lines or fuses them together by electrically melting an aluminum trace or insulator. This was the first type of PLD, known as a “programmable array logic” or PAL.
  • the second type of PLD uses EEPROM or flash memory, and causes a transistor to open or close depending on the contents of its associated memory cell.
  • the third type of PLD is RAM-based (which makes it dynamic and volatile), and its contents are loaded each time it starts up.
  • An FPGA is an integrated circuit (IC) that contains an array of logic units that can be interconnected in an arbitrary manner. These logic units are referred to as CLB's or configurable logic blocks by one vendor (Xilinx). Both the specific function of each logic unit and the interconnections between logic units can be programmed in the field after manufacture of the IC.
  • FPGAs are one of the most common PLD chips. FPGAs are available in all three structures. The box labeled in FIG.
  • reconfigurable logic device 21 is meant to convey that not only can the task performed by reconfigurable logic device 20 be implemented in reconfigurable hardware logic, but the tasks of the data shift register 24 and/or control microprocessor 22 may also optionally be implemented in the reconfigurable hardware logic of reconfigurable logic device 21 .
  • re-configurable logic device 21 is constructed using Xilinx FPGA technology, and its configuration is developed using the Mentor synthesis tools or Synplicity synthesis tools and the Xilinx place-and-route tools, all of which are presently commercially available as known to those of skill in the art.
  • the re-configurable logic device 21 interfaces with the system or input/output bus 34 and, in one configuration, also interfaces with any disk caches 30 which may be present. It receives and processes search requests or inquires from the CPU 32 or network interface 36 . Additionally, the device may aid in passing the results of the inquiries to either or both the disk cache 30 and/or the CPU 32 (by way of the bus 34 ).
  • the mass storage medium 26 provides the medium for storing large amounts of information which will hereafter be referred to as target data.
  • the term “mass storage medium” should be understood as meaning any device used to store large amounts of data, and which is typically designated for use in a computer or computer network. Examples include without limitation hard disk drives, optical storage media, or sub-units such as a single disk surface, and these systems may be rotating, linear, serial, parallel, or various combinations of each.
  • a rack of hard disk drive units could be connected in parallel and their parallel output provided at the transducer level to one or more re-configurable logic devices 21 .
  • a bank of magnetic tape drives could be used, and their serial outputs each provided in parallel to one or more re-configurable logic devices 21 .
  • the data stored on the medium may be in analog or in digital form.
  • the data could be voice recordings.
  • the invention is thus scalable, permitting an increase in the amount of data stored by increasing the number of parallel mass storage media, while preserving the performance by increasing the number of parallel re-configurable logic devices or replicating the re-configurable logic device.
  • a disk controller 28 and/or a disk cache 30 may be used in the traditional sense for access by a CPU 32 over its system or input/output bus 34 .
  • the re-configurable logic device 21 accesses target data in the mass storage medium 26 via one or more data shift registers 24 and presents it for use at the system bus 34 without moving large blocks of memory from the mass storage medium 26 over the system bus 34 and into the working memory 33 of CPU 32 for sorting and accessing.
  • the CPU 32 may send a search request or inquiry to the re-configurable logic device 21 which then asynchronously accesses and sorts target data in the mass storage medium 26 and presents it for use either in a disk cache 30 as is known in the prior art or directly onto the system bus 34 without further processing being required by CPU 32 or use of its working memory 33 .
  • the CPU 32 is thus free to perform other tasks while the searching and matching activity is being performed by the invention.
  • the control microprocessor may provide the search inquiry and template or programming instructions for the FPGA 21 , and then perform the search and present the data on system bus 34 for access and use by CPU 32 .
  • the invention may be used to perform a variety of different types of matching or data reduction operations on the target data. Each one of these operations will now be discussed in detail below. For all operations, however, it will be assumed that the target data is written onto the magnetic mass storage medium 26 with sufficient formatting information attached so that the logical structure of the target data can be extracted. Exact and approximate string matching will be described with reference to FIGS. 2-5 . It can be appreciated, however, that the invention is not limited to single string matches and is equally suitable for compound query matching (i.e., queries involving a plurality of text strings having a certain logical relationship therebetween or which use Boolean algebra logic). When performing an exact match with the re-configurable logic device 21 in the analog domain, shown as Point A in FIG.
  • an exact match corresponds to setting a sufficiently high threshold value for matching the data key with analog target data on the mass storage medium 26 .
  • Approximate matching in the analog domain corresponds to setting appropriate (lesser) threshold values.
  • the success of an approximate match may be determined by the correlation value set in the re-configurable logic device 21 or by using one of a number of matching-performance metrics stored therein such as the number of bits within a data key that are equal to the corresponding bits in the scanned target data.
  • a conventional rigid disk drive may have a plurality of rotating disks with multiple transducers accessing each disk.
  • Each of these transducers typically has its output feeding analog signal circuitry 18 , such as amplifiers. This is represented at point A.
  • analog signal circuitry 18 such as amplifiers.
  • FIG. 2 typically the outputs of the analog circuitry are selectively provided to a single digital decoder 23 which then processes one such output. This is represented at point B.
  • This digital output is typically then sent through error correction circuitry (ECC) 25 and at its output C is then passed on to the bus 34 or disk cache 30 .
  • ECC error correction circuitry
  • it may be desirable to provide multiple parallel paths for target data by providing multiple digital decoders and ECC's. Exact matching in the digital domain could be performed at Point B or Point C, which corresponds to the pre- and post-error-corrected digital signal, respectively.
  • the results may be sent to a control microprocessor 22 , which may or may not be configured as part of an FPGA, to execute logic associated with a compound or complex search inquiry.
  • a compound search inquiry 40 will go through the transformation process illustrated in FIG. 3 .
  • the software system (not shown) that resides on the CPU 32 generates the search inquiry 40 .
  • This inquiry proceeds through a compiler 42 , also located on the CPU 32 , that is responsible for analyzing the search inquiry.
  • the resulting logic functions may correspond to exact or inexact matches or wildcard operations and simple word level logic operations such as “and” and “or.”
  • This synthesis information is sent to the control microprocessor 22 which acts to set up the re-configurable logic device 21 , or FPGA.
  • a high-level language 48 such as C or C++ is used in conjunction with a compiler 50 to generate the appropriate synthesis commands to the microprocessor 22 .
  • the data shift register 27 contains target data streaming off the head (not shown) of one or more disks 19 .
  • a compare register stores the data key for which the user wishes to match. In the example shown, the data key is “Bagdad.”
  • Fine-grained comparison logic device 31 performs element by element comparisons between the elements of the data shift register 27 and the compare register 35 .
  • the fine-grained comparison logic device 31 can be configured to be either case sensitive or case insensitive.
  • Word-level comparison logic 37 is responsible for determining whether or not a match at the world-level occurs. In the case of a compound search inquiry, the word-level match signals are delivered to the control microprocessor 22 for evaluation thereof. A match to the compound search inquiry is then reported to the CPU 32 for further processing.
  • FIG. 5 One embodiment of a hardware template for conducting approximate matching is illustrated in FIG. 5 .
  • the data shift register 27 ′ contains target data streaming off the head (not shown) of one or more disks 19 ′.
  • a compare register 35 ′ stores the data key for which the user wishes to match. In the example shown, the data key is again “Bagdad.”
  • Fine-grained comparison logic 31 ′ performs element by element comparisons between the elements of the data shift register 27 ′ and the compare register 21 ′.
  • the fine-grained comparison logic device 31 ′ can be configured to be either case sensitive or case insensitive.
  • the template 29 ′ provides for alternate routing of elements in data shift register 27 ′ to individual cells of the fine-grained comparison logic device 21 ′.
  • each cell of the fine-grained comparison logic device 31 ′ can match more than one position in the data shift register 27 ′ such that the compare register 21 ′ can match both the commonly used spelling of “Baghdad” as well as the alternate “Bagdad” in shared hardware.
  • Word-level comparison logic 37 ′ is responsible for determining whether or not a match at the word level occurs. In the case of a compound search inquiry, the word-level match signals are delivered to the control microprocessor 22 for evaluation thereof. A match to the compound search inquiry is then reported to the CPU 32 for further processing.
  • the actual configuration of the hardware template will of course vary with the search inquiry type.
  • the hardware templates e.g., the target data stored in the compare registers, the routing of signals from the data shift registers and compare register elements to the cells of the fine-grained comparison logic device, and the width of the word-level comparison logic
  • such a template can support a wide range of word matches. As a result, this diminishes the frequency with which the full search inquiry transformation represented in FIG. 3 must take place, which in turn, increases the speed of the search.
  • the data entries identified in an “approximate” match search will include the “exact” hits that would result from an “exact” search.
  • match when the word “match” is used, it should be understood that it includes a search or a data result found through either of an approximate search or an exact search.
  • exact match or even just “approximate” is used, it should be understood that it could be either of the two searches described above as approximate searches, or for that matter any other kind of “fuzzy” search that has a big enough net to gather target data that are loosely related to the search inquiry or in particular, data key.
  • an exact match is just that, and does not include any result other than an exact match of the search inquiry with a high degree of correlation.
  • FIG. 1 Also shown in FIG. 1 is a network interface 36 interconnecting the present invention to a network 38 which may be a LAN, WAN, Internet, etc. and to which other computer systems 40 may be connected. With this arrangement, other computer systems 40 may conveniently also access the data stored on the mass storage medium 26 through the present invention 21 . More specific examples are given below. Still further as shown in FIG. 1 , the elements 20 - 24 may themselves be packaged together and form a disk drive accelerator that may be separately provided as a retrofit device for adapting existing pc's having their own disk drives with the advantages of the invention.
  • the disk drive accelerator may also be offered as an option on a hard drive and packaged in the same enclosure for an external drive or provided as a separate pc board with connector interface for an internal drive. Still further alternatively, the disk drive accelerator may be offered as an option by pc suppliers as part of a pc ordered by a consumer, business or other end user. Still another embodiment could be that of being offered as part of a larger magnetic mass storage medium, or as an upgrade or retrofit kit for those applications or existing installations where the increased data handling capability could be used to good advantage.
  • the invention may be implemented in a variety of computer and network configurations. As shown in FIG. 6 , the invention may be provided as part of a stand-alone computer system 41 comprising a CPU 43 connected to a system bus 45 which then accesses a mass storage medium 47 having the invention as disclosed herein.
  • the mass storage medium 51 coupled with the invention may be itself connected directly to a network 52 over which a plurality of independent computers or CPU's 54 may then access the mass storage medium 51 .
  • the mass storage medium 51 may itself be comprised of a bank of hard disk drives comprising a RAID, disk farm, or some other massively parallel memory device configuration to provide access and approximate matching capabilities to enormous amounts of data at significantly reduced access times.
  • a mass storage medium 56 coupled with the invention may be connected to a network 58 as a network attached storage device (NASD) such that over the network 58 a plurality of stand-alone computers 60 may have access thereto.
  • NASH network attached storage device
  • each mass storage medium represented for illustrative purposes only as a disk 57 , would be accessible from any processor connected to the network.
  • One such configuration would include assigning a unique IP address or other network address to each mass storage medium.
  • FIGS. 1 and 6 - 8 represent only examples of the various computer and network configurations with which the invention would be compatible and highly useful. Others would be apparent to those having skill in the art and the present invention is not intended to be limited through the examples as shown herein which are meant to be instead illustrative of the versatility of the present invention.
  • a CPU performs certain functions during which it may choose to access target data stored in a mass storage medium.
  • the CPU runs a search inquiry application 62 which may be representative of a DNA search, an Internet search, an analog voice search, a fingerprint search, an image search, or some other such search during which an exact or approximate match to target data is desired.
  • the search inquiry contains directives specifying various parameters which the disk control unit 28 and the re-configurable logic device 20 must have to properly obtain the data key from the mass storage medium 26 .
  • parameters include but are not limited to the following: the starting location for scanning the storage device; the final location after which (if there is not match) scanning is terminated; the data key to be used in the scanning; a specification of the approximate nature of the matching; and what information should be returned when a match occurs.
  • the sort of information that can be returned includes the address of the information where the match was found, or a sector, record, portion of record or other data aggregate which contains the matched information.
  • the data aggregate may also be dynamically specified in that the data returned on a match may be specified to be between bounding data specifiers with the matched data contained within the bounding field. As the example in FIG.
  • the search inquiry will typically result in the execution of one or more operating system utilities.
  • a higher level utility command for the UNIX operating system, this could be modified versions of glimpse, find, grep, apropos, etc.
  • commands 66 such as search, approximate search, etc.
  • relevant portions of these commands also being sent to the disk controller 28 to, for example, initiate any mass storage medium positioning activity 69 that is later required for properly reading target data from the mass storage medium.
  • an analog or digital data key is determined.
  • This data key which can be either exact or approximate for a text search, corresponds to the data being searched for.
  • it may either be pre-stored such as in the mass storage medium, developed using dedicated circuitry, or required to be generated.
  • a send pre-stored data key step 68 would be performed by the microprocessor 22 (see FIG. 1 ) which would transmit the data key in digital and sampled format to the re-configurable logic device 20 as shown in step 70 .
  • the analog data key can be developed using one of a number of mechanisms, two of which are shown in FIG. 9 .
  • the microprocessor 22 would write the data key on the magnetic mass storage medium as at step 72 and then next read the data key as at step 74 in order to generate an analog signal representation of the data key.
  • the digital version of the data key received from the CPU would be converted using appropriate digital to analog circuitry to an analog signal representation which would in turn be appropriately sampled.
  • the data key would then next be stored as a digital sample thereof as in step 70 .
  • the microprocessor 22 store the digital data key as at step 76 in the compare register of the re-configurable logic device. It should be understood that depending upon the particular structures desired to be included for each re-configurable logic device, the data key may reside in either or all of these components, it merely being preferable to ultimately get the appropriate digital format for the data key into the re-configurable logic device 21 for comparison and correlation.
  • the target data stored on the mass storage medium is continuously read as at step 78 to generate a continuous stream signal representative of the target data. Should an analog data key have been used, this analog data key may then be correlated with an analog read of the target data from the mass storage medium 26 as at step 80 .
  • this analog signal generated from reading the target data from mass storage medium 26 may be conveniently generated by devices in the prior art from the reading of either analog or digital data, it not being necessary that a digital data key be used to match digital target data as stored in mass storage medium 26 .
  • a correlation step 82 may be performed by matching the digital data key with a stream of digital target data as read from the mass storage medium 26 .
  • the data key may reflect the inclusion of approximate information or the re-configurable logic device 21 may be programmed to allow for same. Thus, correlating this with target data read from the mass storage medium enables approximate matching capabilities.
  • decision logic 84 next makes an intelligent decision as to whether a portion of the target data approximately matches or does not approximately match the data key. Should a match be found, then the target data is processed as at step 86 and the key data requested by the search inquiry is sent to a disk cache 30 , directly onto system bus 34 , or otherwise buffered or made available to a CPU 32 , network interface 36 , or otherwise as shown in FIGS. 1 , and 6 - 8 .
  • a logical step 88 is preferably included for returning to the continuous reading of target data from the mass storage medium 26 , indicating something like a “do” loop.
  • target data is processed from the mass storage medium 26 as a stream and not in individualized chunks, frames, bytes, or other predetermined portions of data. While this is not precluded, the present invention preferably allows a data key to be in essence “slid” over a continuously varying target data read signal such that there is no hesitation in reading target data from the mass storage medium 26 . There is no requirement to synchronize reading to the start or end of any multi-bit data structure, or any other intermediate steps required to be performed as the target data is compared continuously “on the fly” as it is read from the mass storage medium 26 . Eventually, the data access is completed as at step 90 and the process completed.
  • FIG. 10 is a graphical representation of a measured analog signal output from a read/write head as the read/write head reads a magnetic medium on which is stored a 10-bit digital data key.
  • FIG. 10 there are peaks in the analog signal which, as known in the art, represents the true analog signal generated by a read/write head as target data is read from a magnetic medium such as a hard disk.
  • the scales shown in FIG. 10 are volts along the vertical axis and tenths of microseconds along the horizontal axis.
  • an analog signal is generated, again by a read/write head, as target data is read from a pseudo-random binary sequence stored in a test portion of a magnetic medium. The read signal does not provide an ideal square wave output when examined at this level.
  • FIG. 12 is a graphical representation, with the horizontal scale expanded, to more specifically illustrate the overlap between approximately two bits of the 8-bit data key and the corresponding two bits of target data found in the pseudo-random binary sequence encoded at a different location on the disk or magnetic medium.
  • FIG. 13 is a graphical representation of a correlation coefficient calculated continuously as the comparison is made between the data key and the continuous reading of target data from the hard disk.
  • This correlation coefficient is calculated by sampling the analog signals at a high rate and using prior art signal processing correlation techniques.
  • One such example may be found in Spatial Noise Phenomena of Longitudinal Magnetic Recording Media by Hoinville, Indeck and Muller, IEEE Transactions on Magnetics, Volume 28, no. 6, November 1992, the disclosure of which is incorporated herein by reference.
  • a prior example of a reading, comparison, and coefficient calculation method and apparatus may be found in one or more of one of the co-inventor's prior patents, such as U.S. Pat. No. 5,740,244, the disclosure of which is incorporated herein by reference.
  • the foregoing represent examples of devices and methods which may be used to implement the present invention, however, as mentioned elsewhere herein, other similar devices and methods may be likewise used and the purposes of the invention fulfilled.
  • FIG. 13 As shown in FIG. 13 , at approximately the point labeled 325 , a distinct peak is noted at approximately 200 microseconds which approaches 1 Volt, indicating a very close match between the data key and the target data.
  • FIG. 10 is also illustrative of the opportunity for approximate matching which is believed to be a powerful aspect of the invention. Looking closely at FIG. 13 , it is noted that there are other lesser peaks that appear in the correlation coefficient. Thus, if a threshold of 0.4 Volts were established as a decision point, then not only the peak occurring which approaches 1 would indicate a match or “hit” but also another five peaks would be indicative of a “hit”. In this manner, a desired coefficient value may be adjusted or predetermined as desired to suit particular search parameters. For example, when searching for a particular word in a large body of text, lower correlation values may indicate the word is present but misspelled.
  • FIG. 14 depicts the continuous calculation of a correlation coefficient between the same 8-bit data key but with a different target data set. Again, a single match is picked up at approximately 200 microseconds where the peak approaches 1 Volt. It is also noted that should a lower threshold be established additional hits would also be located in the target data.
  • a table 38 is generated by the re-configurable logic device 20 to conduct such a search.
  • P 1 P 2 P 3 P 4 represents the data key, p, or desired sequence to be searched. While the data key of FIG. 15 only shows four characters, this is for illustrative purposes only and it should be appreciated that a typical data key size for sequence searching is on the order of 500-1000, or even higher.
  • the symbols t 1 , t 2 , t 3 . . . t 9 represent the target data, t, streaming off of the mass storage medium 26 .
  • the symbols d i,j represent the edit distance at position i in the data key and position j in the target data. It is assumed that the data key is shorter relative to the target data, although it is not required to be so. There may be a set of known (constant) values for an additional row (d0,j) and column (di,0) not shown in FIG. 15 .
  • di,j The values for di,j are computed by the re-configurable logic device 20 using the fact that di,j is only a function of the following characters: (1) pi, (2) tj, (3) di ⁇ 1,j ⁇ 1, (4) di ⁇ 1,j, and (5) di,j ⁇ 1. This is illustrated in FIG. 15 with respect to the position d3,6 by showing its dependency on the values of d2,5 and d2, 6 and d3,5 as well as p3 and t6.
  • B is referred to as the scoring function.
  • the value of B is dependent upon the specific characters in p and t.
  • FIG. 16 shows one embodiment of a systolic array architecture used by the invention to compute the values in the table 38 of FIG. 15 .
  • the characters of the data key are stored in the column of data registers 53 , while the characters of the target data streaming off of the mass storage medium 26 are stored in the data shift registers 55 .
  • the values of di,j are stored in the systolic cells 59 which themselves are preferably FPGA's.
  • FIGS. 17 and 18 The operation of the array of FIG. 16 will now be illustrated using FIGS. 17 and 18 .
  • the four underlined values are computed in the first (i.e., combinational) part of the clock cycle of the system.
  • the new value d3,6 is shown to depend upon the same five values illustrated earlier in FIG. 15 .
  • the second (i.e., latch) part of the clock cycle all the characters in di,j and tj are shifted one position to the right.
  • a comparator 61 is positioned at each diagonal cell of the d array and determines when the threshold has been exceeded.
  • a portion of the synthesis arrays representing the values present in FIGS. 16-18 for this example are shown in FIGS. 20-22 , respectively.
  • a match is identified by the re-configurable logic device 20 when the value on any row exceeds a predetermined threshold.
  • the threshold is set based on the desired degree of similarity desired between the data key and the target data stored in mass memory device 26 . For example, in the case of an exact match search, the data key and target data must be identical.
  • the match is then examined by the CPU 32 via a traceback operation with the table of FIG. 19 . Specifically a “snapshot” of the table is sent to the CPU 32 at a predetermined time interval to assist in traceback operations once a match is identified.
  • the interval is preferably not too often to overburden the CPU 32 , but not so infrequent that it takes a lot of time and processing to recreate the table.
  • the CPU 32 To enable the CPU 32 to perform the traceback operation, it must be able to recreate the d array in the area surrounding the entry in the table that exceeded the threshold.
  • the systolic array can periodically output the values of a complete column of d (“a snapshot”) to the CPU 32 . This will enable the CPU 32 to recreate any required portion of d greater than the index j of the snapshot.
  • FIG. 23 illustrates a systolic array 120 of re-configurable logic devices 20 , preferably FPGA's, which enables matches on two dimensional data.
  • the individual cells 122 each hold one pixel of the image for which the user is desiring to match (the image key) and one pixel of the image being searched (the target image).
  • the image key For images of sufficiently large size, it is likely they will not all fit into one re-configurable logic chip 124 .
  • a candidate partitioning of cells to chips is shown with the dashed lines, placing a rectangular subarray of cells in each chip 124 .
  • the number of chip-to-chip connections can be minimized by using a subarray that is square (i.e., same number of cells in the vertical and horizontal dimension). Other more complicated arrangements are shown below.
  • FIG. 24 Loading of the target image into the array 120 is explained using FIG. 24 .
  • Individual rows of each target image streaming off the mass magnetic medium 26 shown generally as point A, into the top row 130 of the array via the horizontal links 134 connecting each cell.
  • the top row 130 operates as a data shift register.
  • the row is shifted down to the next row 132 via the vertical links 136 shown in each column.
  • a comparison operation is performed, which might require arbitrary communication between neighboring cells. This is supported by both the horizontal and vertical bi-directional links 126 and 128 , respectively, shown in FIG. 23 .
  • FIG. 28 shows the flexibility for implementing a much more complex set of bi-directional links.
  • data may be communicated from a mass storage medium 180 and be input to a first row of a plurality of cells 182 , with each cell of the first row having a direct link to the corresponding cell 184 below it in a second row of cells with a simple link 186 , and so on throughout the array 188 of cells.
  • a connector web 190 overlying the array 188 of cells is a connector web 190 which provides direct connectivity between any two cells within the array without the need for transmission through any intervening cell.
  • each cell in the array may be comprised of an FPGA, each one of which preferably has a re-configurable logic element corresponding to element 20 in FIG. 1 , or any one of which may have a re-configurable logic element 20 as well as a data shift register 24 , or any one of which may have the entirety of re-configurable logic device 21 .
  • the cell 140 includes a pixel register 142 , LOADTi,j, which contains the pixels of the target image currently being loaded into the array.
  • a register, 144 CMPTi,j contains a copy of the pixel register 142 once the complete target image has been loaded. This configuration enables the last target image loaded to be compared in parallel with the next target image being loaded, essentially establishing a pipelined sequence of load, compare, load, compare, etc.
  • a register 146 , CMPPi,j contains the pixels of the image key to be used for comparison purposes, and the compare logic 148 performs the matching operation between register 144 and register 146 .
  • the compare logic 148 may include the ability to communicate with the neighboring cells to the left, right, up, and down shown generally as 150 , 152 , 154 , and 156 , respectively, to allow for complex matching functions.
  • FIG. 26 Another embodiment for the individual cells of array 120 of FIG. 23 is illustrated in FIG. 26 .
  • the cell 140 of FIG. 25 has been augmented to support simultaneous loading of the image key and the target image.
  • the cell 160 includes the same components of the cell 140 , but adds a new register 162 , LOADPi,j, which is used to load the image key, and is operated in the same manner as register 142 .
  • LOADPi,j LOADPi,j
  • the operation performed within the compare logic block can be any function that provides a judgment as to whether or not there are significant differences between the target image and the image key.
  • An example includes cross-correlations across the entire image or sub-regions of the image as described in John C. Russ, The Image Processing Handbook, 3 rd edition, CRC Press 1999, which is incorporated herein by reference.
  • the invention is also capable of performing data reduction searching.
  • Such searching involves matching as previously described herein, but includes summarizing the matched data in some aggregate form.
  • a re-configurable logic device for computing such aggregate data reductions is illustrated as 100 in FIG. 27 .
  • a data shift register 102 reads target data from a mass storage medium containing stock price information.
  • three data reduction searches are shown, namely calculating the minimum price, the maximum price, and the latest price.
  • decision logic computes the desired data reduction operation.
  • the stock price is fed to a minimum price comparator 110 and maximum price comparator 112 and stored therein.
  • comparator 110 Each time a stock price is fed to comparator 110 , it compares the last stored stock price to the stock price currently being fed to it and whichever is lower is stored in data register 104 .
  • comparator 112 each time a stock price is fed to comparator 112 , it compares the last stored stock price to the stock price currently being fed to it and whichever is higher is stored in data register 106 .
  • the stock price is fed into a data register 108 and the current time is fed into a comparator 114 .
  • comparator 114 Each time a time value is fed into comparator 114 , it compares the last stored time with the current time and which ever is greater is stored in data register 116 . Then, at the end of the desired time interval for which a calculation is being made, the latest price is determined.
  • data processing operations other than searching and reduction may also be implemented on the re-configurable logic device 21 .
  • these operations are referred to herein as data manipulation operations.
  • Examples of data manipulation operations or suboperations thereof that can be performed on a PLD 20 include encryption, decryption, compression, and decompression operations.
  • the preferred PLD 20 is an FPGA, even more preferably, a Xilinx FPGA.
  • any of these additional operations can be combined with searching and/or reduction operations in virtually any manner to form a multi-stage data processing pipeline that provides additional speed, flexibility, and security.
  • the complexity of each operation is also virtually limitless, bounded only by the resources of the re-configurable logic device 21 and the performance requirements of a practitioner of the invention.
  • Each processing operation can be implemented in a single stage or in multiple stages, as may be necessary.
  • FIG. 29 illustrates a multi-stage data processing pipeline 200 implemented within a re-configurable logic device 21 for a system as shown in FIG. 1 .
  • At least one stage in the pipeline 200 is implemented on a PLD.
  • Each stage 202 of the pipeline 200 is configured to process the data it receives according to its intended functionality (e.g., compression, decompression, encryption, decryption, etc.), and thereafter pass the processed data either to the next stage in the pipeline, back to a prior stage, or to the control processor 204 .
  • the first stage 202 in the pipeline 200 operates on data streaming from a mass storage medium 26 and processes that data according to its functionality.
  • the data processed by stage 1 is thereafter passed to stage 2 for further processing, and so on, until stage N is reached.
  • the result(s) of that processing can be forwarded to the control processor 204 and/or the computer over system bus 34 .
  • This exemplary pipeline 200 of FIG. 29 can also be replicated so that a separate pipeline 200 is associated with each head on a disk system of the mass storage medium 26 .
  • Such a design would improve performance associated with performing parallel processing operations on multiple data streams as those streams are read out from the disk. If there are no other performance bottlenecks in the system, it is expected that throughput will increase linearly with the number of pipelines 200 employed.
  • each stage need not necessarily be implemented on a PLD 20 within the re-configurable logic device 21 .
  • some stages may be implemented in software on a processor (not shown) or dedicated hardware (not shown) accessible to the PLD 20 .
  • the exact design of each stage and the decision to implement each stage on a PLD 20 , in software, or in dedicated hardware such as an ASIC, will be dependent upon the associated cost, performance, and resources constraints applicable to each practitioner's plans.
  • pipelining entirely within a PLD 20 such as an FPGA, the processing throughput can be greatly increased.
  • the increase in data throughput is directly proportional to the number of stages. Assuming no other bottlenecks, as mentioned above, then with N stages, one can expect a throughput increase of N.
  • the multi-stage pipeline may also utilize feedback between stages, which may be desirable for certain operations (e.g., some encryption operations) to reduce implementation cost or increase efficiency.
  • FIG. 30 illustrates an exemplary multistage pipeline 200 wherein the first four stages 202 comprise a decryption engine 210 .
  • the decryption engine 210 in this example operates to receive encrypted and compressed data streaming from the mass storage medium 26 .
  • the fifth stage 202 serves as a decompression engine to decompress the decrypted compressed data exiting the decryption engine 210 .
  • the output of the decompression engine is thus a stream of decrypted and decompressed data that is ready to be processed by the stage 6 search engine.
  • Control processor 204 controls each stage to ensure proper flow therethrough.
  • the control processor 204 preferably sets up parameters associated with each pipeline stage (including, if appropriate, parameters for stages implemented in software).
  • FIG. 31 depicts an example wherein a PLD is used as an encryption engine for data either flowing from the system bus 34 to the mass storage medium 26 or data flowing from the mass storage medium 26 to the system bus 34 .
  • FIG. 32 depicts yet another exemplary pipeline wherein the pipeline 200 is comprised of multiple processing engines (each engine comprising one or more stages), each of which can be either activated by the control processor 204 such that the engine performs its recited task on the data it receives or deactivated by the control processor 204 such that is acts as a “pass through” for the data it receives. Activation/deactivation of the different engines will in turn depend on the functionality desired for the pipeline.
  • the decryption engine 210 , decompression engine 214 , and search engine 218 can each be activated while the encryption engine 212 and compression engine 216 can each be deactivated.
  • the compression engine 216 and the encryption engine 212 can be activated while the decryption engine 210 , the decompression engine 214 , and the search engine 218 are each deactivated.
  • other activation/deactivation combinations can be used depending on the desired functionality for the pipeline 200 .
  • Advanced encryption/decryption algorithms require a complex set of calculations. Depending on the particular algorithm employed, performing encryption/decryption at disk speed requires that one employ advanced techniques to keep up with the streaming data arriving at the encryption/decryption engine.
  • the PLD-based architecture of the present invention supports the implementation of not only relatively simple encryption/decryption algorithms, but also complex ones. Virtually any known encryption/decryption technique can be used in the practice of the present invention, including but not limited to DES, Triple DES, AES, etc. See Chodowiec et al., “Fast Implementations of Secret-Key Block Ciphers Using Mixed Inter- and Outer-Round Pipelining”, Proceedings of International Symposium on FPGAS, pp.
  • FIG. 33 illustrates an example of single stage encryption that can be implemented with the present invention.
  • the data flow direction is top to bottom.
  • a block of text (typically 64 or 128 bits) is loaded into input register 220 (by either control processor 204 or CPU 32 ).
  • Combinational logic (CL) 224 computes the cipher round, with the results of the round being stored in output register 226 .
  • the contents of output register 226 are fed back through feedback path 225 into the CL 224 through MUX 222 to compute subsequent rounds.
  • the data in the output register is the encrypted block and is ready to be stored in the mass storage medium.
  • This configuration can also be used as a single stage decryption engine as well, wherein the CL that computes the cipher is decryption logic rather than encryption logic.
  • FIG. 34 depicts an example of a pipelined encryption engine wherein there is pipelining within the combinational logic of the round itself.
  • Each CL 224 includes multiple intra-round pipeline registers 228 .
  • the number of intra-round pipeline registers 228 used can be variable and need not be limited to two per CL.
  • the loops represented by the feedback path 225 can be unrolled with multiple copies of the round CL 224 a, 224 b, . . . , each with an inter-round pipeline register 230 therebetween.
  • the degree of unrolling i.e., number of round CLS 224
  • the engine of FIG. 34 will consume more resources on the PLD 20 , but will provide a higher data throughput.
  • FIG. 35 illustrates an example of an encryption engine wherein the rounds are completely unrolled.
  • the feedback paths 225 of FIGS. 33 and 34 are no longer necessary, and data can continuously flow from the input register 220 through the pipeline of CLs 224 (each including multiple intra-round pipeline registers 228 and separated by inter-round pipeline registers 230 ) to the output register 226 .
  • this configuration provides the highest data throughput, but also requires the greatest amount of resources in the re-configurable logic.
  • data is retained in a data warehouse, as shown in FIG. 36 .
  • the person or entity who owns the data warehouse (the actual hardware and related database technology on which data resides) is often not the same person or entity who owns the actual data stored therein.
  • Party A a data warehouser
  • Party B a data owner who is to use Party A's data warehouse to physically store data
  • the data owner has a legitimate concern about the third parties who may have access to the data stored in the data warehouser's warehouse. That is, the data warehouser controls physical access to the data, but it is the data owner who wants to control who may physically access the data through an access gateway, as shown in FIG. 36 .
  • the data owner's data it is conventional for the data owner's data to be stored in the data warehouse in an encrypted format, and the data owner retains control over the distribution of any decryption algorithm(s) and/or key(s) for the stored data. That way, the risk of unauthorized third parties gaining access to the unencrypted format of the data owner's data is reduced.
  • the data warehouser is not provided with access to an unencrypted version of the data owner's stored data.
  • the data owner wishes to communicate all or a portion of its stored encrypted data from the data warehouse to Party C via a network such as the Internet, that data can be protected during delivery over the network via another form of encryption (e.g., different algorithm(s) and/or different decryption key(s)).
  • the data owner can then provide Party C with the appropriate algorithm(s) and/or key(s) to decrypt the data.
  • the data owner and the authorized third party are the only two parties who have access to the decrypted (plain text) data.
  • the authorized third party will not be able to decrypt the data owner's data that is still stored in the data warehouse because that data will possess a different mode of encryption than the data received.
  • the computations required to perform encryption/decryption in data warehousing scenarios are performed in software on computers owned and under the direct control of the data warehouser.
  • the plain text that is the output of the decryption operation is stored in the main memory of the processor used to perform the encryption/decryption operations. If this software (or other software running on the processor) has been compromised by a virus or other malware, the data owner may lose control over the plain text data to an unknown party.
  • one or both of the data warehouser and an unknown malware-related party has access to the processor main memory, and therefore access to the plain text form of the data owner's data.
  • the present invention can be used to implement encryption and decryption on re-configurable logic device 21 (preferably within a PLD 20 ) over which only the data owner has control, as shown in FIG. 38 .
  • a decryption engine 3800 using Key 1 and an encryption engine 3802 using Key 2 are implemented on a PLD 20 .
  • the re-configurable logic device 21 remains under control of the data owner and preferably (although it need not be the case) communicates with the data store of the data warehouser over a network such as the Internet to receive a stream 3806 of the data owner's encrypted data (wherein the stored data was previously encrypted using Key 1 ).
  • the decryption engine 3800 thus operates to decrypt the data stream 3806 using Key 1 .
  • the output 3804 of the decryption engine 3800 is the data owner's data in decrypted (or plain text) format. This data remains in the secure memory of the PLD 20 or the secure on-board memory. Because this secure memory is invisible and inaccessible to software which may have malware thereon, the risk of losing control over the plain text data to “hackers” is virtually eliminated.
  • the plain text data 3804 is provided to encryption engine 3802 , which encrypts data 3806 using Key 2 .
  • the output of the encryption engine 3802 is newly encrypted data 3808 that can be delivered to an authorized third party data requester. Secure delivery of data 3808 over a network such as the Internet can be thus maintained. For the authorized third party data requester to interpret data 3808 , the data owner can provide that third party with Key 2 .
  • FIGS. 39 ( a ) and ( b ) illustrate embodiments for this feature of the present invention.
  • FIG. 39 ( a ) illustrates a circuit board 3900 that could be installed in a computer server.
  • PCI-X connector 3916 serves to interface the board 3900 with the server's system bus 34 (not shown).
  • a PLD 20 such as an FPGA is implemented on board 3900 .
  • three functions are preferably implemented: a firmware socket 3908 that provides connection with the external environment, a decryption engine 3904 , and an encryption engine 3902 .
  • the FPGA preferably also communicates with on-board memory 3906 , which is connected only to the FPGA.
  • a preferred memory device for on-board memory 3906 is an SRAM or a DRAM.
  • the address space and existence of memory 3906 is visible only to the FPGA.
  • the FPGA is also preferably connected to a disk controller 3912 (employing SCSI, Fiber Channel, or the like) via a private PCI-X bus 3910 .
  • Disk connector 3914 preferably interfaces the disk controller 3912 with mass storage medium 26 (not shown) which can serve as the data warehouse.
  • Disk controller 3912 and disk connector 3914 are off-the-shelf components, well known in the art. Examples of manufacturers include Adaptec and LSI.
  • the FPGA is preferably configured as a PCI-K to PCI-X bridge that links the PCI-X connector 3916 with the internal PCI-X bus 3910 .
  • These bridging operations are performed within firmware socket 3908 , the functionality of which is known in the art.
  • Communication pathways other than PCI-X may be used, including but not limited to PCI-Express, PCI, Infiniband, and IP.
  • data streaming into the board 3900 from the mass storage medium 26 is fed into the decryption engine 3904 .
  • the plain text output of the decryption engine 3904 can be stored in on-board memory 3906 ( FIG. 39 ( a ), stored in memory internal to the FPGA ( FIG. 39 ( b ), or some combination of the two.
  • the encryption engine 3902 encrypts the plain text data that is stored in memory 3906 , internal FPGA memory, or some combination of the two, using a different key than that used to decrypt the stored data.
  • on-board memory 3906 or internal FPGA memory will depend upon a variety of considerations, including but not limited to the available FPGA resources, the volume of data to be decrypted/encrypted, the type of decryption/encryption employed, and the desired throughput performance characteristics.
  • this plain text data is not accessible to a processor accessing motherboard bus 34 because there is no direct connection between memory 3906 or internal FPGA memory and the PCI-X connector 3916 . Accordingly, memory 3906 and the internal FPGA memory are not in the address space of such a processor, meaning, by derivation, that memory 3906 and the internal FPGA memory are not accessible by any malware that may be present on that processor.
  • FIGS. 39 ( a ) and ( b ) may also optionally include a search engine (not shown) within the FPGA located between the decryption engine 3904 and encryption engine 3902 , thereby allowing the data owner to deliver targeted subsets of the stored data to the authorized third party data requester that fit within the boundaries of the third party's data request.
  • a search engine not shown
  • compression and decompression are also valuable operations that can be performed in a PLD in accordance with the techniques of the present invention. It is common to compress data prior to storage in a mass storage medium 26 (thereby conserving storage space), and then decompress that data when reading it from the mass storage medium for use by a processor. These conventional compression and decompression operations are typically performed in software.
  • a compression technique that is prevalently used is the well-known Lempel-Ziv (LZ) compression. See Ziv et al., “A Universal Algorithm for Sequential Data Compression”, IEEE Trans. Inform. Theory, IT-23(3): 337-343 (1977); Ziv et al., “Compression of Individual Sequence via Variable Rate Coding”, IEEE Trans. Inform.
  • the PLD-based architecture of the present invention supports the deployment of not only LZ compression but also other compression techniques. See Jung et al., “Efficient VLSI for Lempel-Ziv Compression in Wireless Data Communication Networks”, IEEE Trans. on VLSI Systems, 6(3): 475-483 (September 1998); Ranganathan et al., “High-speed VLSI design for Lempel-Ziv-based data compression”, IEEE Trans.
  • compression techniques other than LZ compression include, but are not limited to, various lossless compression types such as Huffman encoding, dictionary techniques, and arithmetic compression, and various known lossy compression techniques.
  • FIG. 40 illustrates this aspect of the present invention wherein a stream 4000 of compressed data is passed from the mass storage medium 26 to a re-configurable logic device 21 on which a decompression (expansion) engine 4002 and a search engine 4004 are implemented within a PLD 20 .
  • FIG. 41 illustrates a preferred embodiment for this aspect of the invention. In FIG. 41 , the FPGA 20 of board 3900 depicted in FIGS.
  • FIG. 42 illustrates a preferred implementation for a compression operation, wherein the FPGA 20 of board 3900 has a compression engine 4200 implemented thereon, thereby allowing data coming from system bus 34 to be stored in a compressed manner on mass storage medium 26 .
  • the FPGA 20 of board 3900 can also be loaded with the decompression engine 4002 , search engine 4004 , and compression engine 4200 .
  • the compression engine 4200 can be deactivated (thereby resulting in a combined decompression/search functionality) or the decompression engine 4002 and search engine 4004 can both be deactivated (thereby resulting in a compression functionality).
  • code level logic 4300 for the desired processing engines that defines both the operation of the engines and their interaction with each other is created.
  • This code preferably HDL source code
  • This code can be created using standard programming languages and techniques.
  • an HDL VHDL or Verilog can be used.
  • a synthesis tool is used to convert the HDL source code 4300 into a gate level description 4304 for the processing engines.
  • a preferred synthesis tool is the well-known Synplicity Pro software provided by synplicity, and a preferred gate level description 4304 is an EDIF netlist.
  • Synplicity Pro software provided by synplicity
  • a preferred gate level description 4304 is an EDIF netlist.
  • other synthesis tools and gate level descriptions can be used.
  • a place and route tool is used to convert the EDIF netlist 4304 into the template 4308 that is to be loaded into the FPGA 20 .
  • a preferred place and route tool is the Xilinx ISE toolset that includes functionality for mapping, timing analysis, and output generation, as is known in the art. However, other place and route tools can be used in the practice of the present invention.
  • the template 4308 is a bit configuration file that can be loaded into the FPGA 20 through the FPGA's Joint Test Access Group (JTAG) multipin interface, as is known in the art.
  • JTAG Joint Test Access Group
  • templates 4308 for different processing functionalities desired for the system can be pre-generated and stored for selective implementation on the FPGA.
  • templates for different types of compression/decompression, different types of encryption/decryption, different types of search operations, different types of data reduction operations, or different combinations of the foregoing can be pre-generated and stored by a computer system for subsequent loading into the FPGA 20 when that functionality is needed.
  • performance characteristics such as throughout and consumed chip resources can be pre-determined and associated with each processing operation. Using these associated parameters, an algorithm can be used to intelligently select which template is optimal for a particular desired functionality.
  • Such an algorithm could provide guidance as to which of the encryption engines of FIGS. 33-35 is best suited for a given application.
  • the table below presents parameters that can be used to model performance in accordance with the encryption/decryption operations of the invention. TABLE 1 Variable definitions.
  • the chip resources for an FPGA are typically measured in CLBs or slices, as is well-known. With re-configurable logic other than FPGAS, the resources might be measured in other units (e.g., chip area). In either event, the resources required will be linear in the number of rounds supported in parallel.
  • the values for the parameters Throughput and Resources can be determined in advance for each stored processing operation (or function fi) that may be implemented in a stage of a pipeline. Accordingly, a table can be created that relates each processing operation or function with its corresponding values for Throughput and Resources.
  • a control processor 32 can compute the overall throughput and resources for a set of functions as follows.
  • the control processor can then solve an optimization problem (or if desired a “near optimization” problem).
  • the optimization can be to deploy the set of options for each function that maximizes the overall throughput under the constraint that the required resources be Less than or equal to the available resources on the re-configurable logic, or the optimization can be to deploy the set of options for each function that minimizes the required resources under the constraint the that overall throughput not fall below some specified minimum threshold.
  • Techniques for solving such optimization problems or near optimization problems are well known in the art. Examples of such techniques include, but are not limited to complete enumeration, bounded search, genetic algorithms, greedy algorithms, simulated annealing, etc.
  • the use of the inventive system to process data streaming from a mass storage medium such as a disk drive system is a powerful technique for processing stored data at high speeds.
  • Very large databases typically span many disk cylinders. Accordingly, delays may be encountered when database files are written on tracks that have been placed on non-contiguous disk cylinders. These delays are associated with having to move the disk read/write head from its current position over a data cylinder to a new data cylinder where the file to be read from the disk continues. These delays increase as the distance that the head must travel increases. Therefore, for reading data that spans multiple data cylinders on the disk, the flow of the data stream from the disk will be interrupted as the head moves from cylinder to cylinder. With today's disk drives, these delays may be in the millisecond range. Thus, these head movement delays (known in the art as “seek” times) represent a potential performance bottleneck.
  • FIG. 44 ( a ) illustrates a rotatable planar magnetic medium 4450 that serves as a storage device such as a computer hard disk, wherein data is placed on the magnetic medium 4450 in discrete, circular tracks 4400 .
  • each track 4400 i wherein i may be a, b, c, . . . , is positioned at its own radius R i relative to the central origin 4406 .
  • Each track is radially separated from the next inner track and the next outer track by a track-to-track spacing T.
  • T is preferably uniform for each track-to-track radial distance. However, this need not be the case.
  • the head 4404 For a head 4404 to read or write data from track 4400 i , the head 4404 must be positioned such that it resides over a point on the disk that is R i from the origin 4406 . As the disk rotates, the track will pass under the head to allow for a read or write operation.
  • each circular track 4400 i is divided into about 150 roughly equal contiguous arcs.
  • the arcs of different tracks 4400 that span the same angle ⁇ comprise a disk sector (or wedge) 4462 , as known in the art.
  • These arcs 4460 contain several data sets 4464 (logical blocks and physical sectors) that can be altered (rewritten). Additionally, these arcs 4460 contain unalterable (fixed) magnetically written markings 4466 (such as ABCD servo bursts) that are used as a guide to place the head 4404 over the data regions so that the signal strength from the magnetic recording is maximized.
  • unalterable (fixed) magnetically written markings 4466 such as ABCD servo bursts
  • FIG. 44 ( b ) is a block diagram view of a disk drive system 4470 with a cross-sectional view of several disks 4450 residing in the drive system.
  • many drives systems 4470 utilize both sides of a disk 4450 , and may include several disks 4450 (or platters) that are concentrically placed on a rotational device 4472 such as a spindle motor.
  • a rotational device 4472 such as a spindle motor.
  • each disk surface top surface 4452 and bottom surface 4454
  • the collection of circular tracks 4400 accessed by the separate heads 4404 at a single radius R i is referred to as a “data cylinder” 4402 .
  • a band of adjacent data cylinders is called a zone.
  • the positioning system 4474 must appropriately move heads 4404 along line 4476 , typically in increments of T.
  • the circumference of the written track increases.
  • the circumference of innermost track 4400 a is 2 ⁇ R a
  • the circumference of outermost track 4400 d is 2 ⁇ R d .
  • R d is greater than R a
  • it likewise follows that the circumference of track 4400 d is greater than that of track 4400 a .
  • different zones may be defined to allow for different linear bit densities along the track, thereby yielding more data sectors around the cylinder 4402 for larger radii than those yielded by using roughly constant linear data densities.
  • the head 4404 To write data spanning one or more tracks 4400 , the head 4404 must be repositioned by the positioning system 4474 to another radius by at least the center-to-center distance of adjacent tracks 4400 .
  • This motion requires mechanical settling time (repositioning of the head 4404 ) and resynchronization time of the head 4404 to the cylinder 4402 (in time, downtrack).
  • this settling time When moving the head a relatively long distance such as T, this settling time is significant. Together, these times may take, on average, half the revolution of the cylinder 4402 , which is typically several milliseconds when moving from cylinder to cylinder.
  • this time duration is often referred to as the “seek” time, and it can be a major performance bottleneck. Due to this bottleneck, data write/read bursts are generally limited to single tracks or cylinders.
  • a technique is used to reposition the head 4404 to accommodate tracks laid out as discontiguous arcs
  • these discontiguous arcs are discontinuous circular arcs arranged in a generally helical tracking pattern on the disk 4450 , and the head positioning system uses servo patterns, such as ABCD servo bursts, already present in conventional systems to appropriately position the head.
  • This technique can provide for written bursts in excess of a track and up to an entire zone, wherein a single zone may encompass the entire disk. While other servo patterns are possible, and are not excluded from the scope of this feature of the invention, an example will be given using the conventional ABCD system for servo patterns.
  • this novel and unique positioning method aims to position the head 4404 over a discrete arc 4500 in proportion to the angular position of the head 4404 around the disk 4450 , thereby accommodating a helical topology of the discontiguous arcs' magnetic pattern on the disk 4450 .
  • each wedge 4462 spans an angle of 2 ⁇ /W.
  • W is the total number of wedges 4462 that pass the head 4404 in a single revolution of the disk.
  • the head (not shown) can be positioned at any point along the x-axis to the left of origin 4406 .
  • Each wedge 4462 can be assigned a wedge number w, wherein w can be any integer 1 through W.
  • the radial displacement of the head 4404 will be incremented an amount in proportion to the wedge number, w, by the linear ratio (w/W)*T, where T is the conventional track-to-track (or cylinder-to-cylinder) distance or some other distance.
  • data will be written on the surface of disk 4450 in a piece-wise fashion, preferably a piece-wise helical fashion defined by a plurality of discontiguous circular arcs 4500 .
  • the head 4404 will be positioned to encounter W discontiguous circular arcs 4500 , each circular arc 4500 spanning an angle of 2 ⁇ /W.
  • W is equal to 4.
  • each discontiguous arc 4500 i will possess a circumference of 2 ⁇ R i /W.
  • the radius R i for each arc 4500 i is preferably T/W greater than that of arc 4500 i ⁇ 1 and is preferably T/W less than that of arc 4500 i+1 .
  • the head 4404 will effectively move a distance equal to the conventional adjacent track-to-track distance T.
  • the plurality of discrete circular arcs 4500 define a generally helical or spiral pattern on the disk 4450 .
  • each radius R i can have its own W value.
  • the discontiguous arcs 4500 may have different circumferences and may span multiple angles from the origin.
  • Each discontiguous arc 4500 will include an ABCD servo pattern thereon like that shown in FIG. 44 ( a ) for a contiguous arc to ensure proper movement of the head 4404 from one arc 4500 to the next.
  • Conventional servo systems have sufficient bandwidth to step heads 4404 by these small amounts of T/W.
  • the read/write head 4404 is initially placed at position d 0 relative to central origin 4406 for the disk of FIG. 45 .
  • This initial position can be R 1 , the radial distance of the innermost arc 4500 1 .
  • T is the conventional track-to-track (or cylinder-to-cylinder) distance.
  • the head 4404 will have radially moved exactly one full track-to-track distance T.
  • the head 4404 will have radially moved exactly 2T.
  • FIG. 46 illustrates the process by which a disk drive system 4470 operates to read data from a disk 4450 in accordance with this feature of the preferred embodiment.
  • the system senses the portion of the disk over which the head resides. Preferably, this step is achieved at least in part by sensing a servo pattern and reading a sector ID written on the disk, as is known in the art.
  • the head is repositioned to D as each new disk wedge 4502 is encountered by the head.
  • the head position is fine-tuned using the servo pattern on the arc 4500 .
  • the data is read from the disk at step 4606 . The process then returns to step 4600 as the disk continues to spin.
  • This feature of the invention allows for the seamless and continuous operation of the head in read or write mode over an entire zone, thus permitting the reading or writing of an entire disk without incurring the delays associated with normal seek times.
  • a searching/processing system can operate more efficiently, without being stalled by seek time delays.
  • this feature of the invention need not be used in combination with the searching/processing techniques described above. That is, this technique of using a helical pattern to read and write data to and from magnetic data storage disks can be used independently of the above-described searching and processing features.
  • each file is divided into one or more segments, wherein each segment is a power of 2.
  • each file that is not sized as an even power of 2 is represented as the sum of a series of power of 2 segments.
  • this technique for segmenting a file into blocks of memory comprises: (1) if the file size is an even power of 2, requesting a block of storage space on the storage medium equal to the file size, (2) if the file size is not an even power of 2, requesting a plurality of blocks of storage space on the storage medium, each block having a size that is equal to a power of 2, and (3) if the request is accepted, storing the data file in a storage medium such as on a disk or in memory as one or more data file segments in accordance with the request.
  • the file size F can be thought of in binary terms as F equals F k . . . F 2 F 1 .
  • requesting blocks in storage comprises requesting a total number n of blocks B 1 , . . . , B n equal to a total number of bits in F equal to 1, each block B i corresponding to a different bit Fi in F equal to 1 and having a size of 2 i .
  • FIG. 47 ( a ) illustrates an example of this process for a file size F of 2500 bytes.
  • the preferred sum of powers of 2 technique results in segment sizes of 2048 bytes (2 12 ), 256 bytes (2 9 ), 128 bytes (2 8 ), 64 bytes (2 7 ) and 4 bytes (2 2 ).
  • the minimum segment size 2 m be used.
  • the minimum segment size can be 512 bytes (2 9 ) (thus m is 2).
  • FIG. 47 ( b ) illustrates a preferred implementation of this minimum segment feature, wherein the file size S is 2500 bytes. With this technique, it can be seen that the segment sizes will be 2048 bytes (212), 512 bytes (2 10 ).
  • F i in F m ⁇ 1 through F 1 is equal to 1
  • F becomes rounded up to a new value R (which can be represented in binary as R q . . . R 2 R 1 ).
  • the value of R is chosen as the minimum value greater than F for which the bits R m ⁇ 1 through R 1 are all equal to zero.
  • FIG. 48 shows the wasted space due to internal fragmentation in a buddy file system versus a usual (conventional) system and a sum of powers of 2 file system.
  • FIG. 49 compares the total number of segments, for an entire file, according to a usual file system and the sum of powers of 2 file system. When the minimum segment size is small, the sum of powers of 2 system produces significantly fewer segments than the usual mechanism.
  • FIG. 50 shows the minimum, average and maximum number of segments per file according to both file Systems. Here again, the sum of powers of 2 file system dominates and creates a low number of segments. In other words, the sum of powers of 2 file system leads to more contiguous files.
  • the sum of powers of 2 file system is a good trade off between the buddy system (where there is a lot of internal fragmentation) and the usual file system (where there is less internal fragmentation but potentially poor contiguity).
  • a defragmentation algorithm be used with the sum of powers of 2 file system to more greatly ensure contiguous space on the disk for an allocation request. If a contiguous allocation cannot be satisfied, the defragmentation algorithm tries to free space so as to satisfy the allocation request. This defragmentation algorithm does not defragment the entire disk. Instead, it incrementally defragments a portion of the disk to enable the new allocation request to be satisfied in an incremental manner.
  • a preferred defragmentation algorithm for use with the sum of powers of 2 file system is disclosed on pages 26-30 of the paper Cholleti, Sharath, “Storage Allocation in Bounded Time”, MS Thesis, Dept. of Computer Science and Engineering, Washington University, St. Louis, Mo. (December 2002), available as Washington University technical report WIJCSE-2003-2, the entire disclosure of which is incorporated herein by reference.
  • Allocate(S) if there is a free block of size S allocate the block of size S with the lowest address, A UpdateHeapManager(S, A, “allocation”) else search for a free block of size bigger than S in increasing order of size if found, select the block with the lowest address split the block recursively until there is a block of size S select the block of size S with the lowest address, A UpdateHeapManager(S, A, “allocation”) else A FindMinimallyOccupiedBlock(S) /*finds block to relocate*/ Relocate(S, A) /*relocates the sub blocks from block A*/ allocate the block with address A UpdateHeapManager(S, A, “allocation”) 3.
  • Relocate(S, A) subBlocks FindSubBlocks(S, A); for each SB ⁇ subBlocks Deallocate(SB), ⁇ SB ⁇ subBlocks 5.
  • Deallocate (extId) find address A of bock extId and size S; free the block; UpdateHeapManager(S, A, “deallocation”); 6.

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Cited By (167)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030110229A1 (en) * 2001-10-19 2003-06-12 Kulig Matthew P. System and method for controlling transmission of data packets over an information network
US20060085643A1 (en) * 2004-10-20 2006-04-20 Oracle International Corporation Key-exchange protocol using a password-derived prime
US20060167748A1 (en) * 2005-01-25 2006-07-27 Joachim Hartmann Public/private campaign management for an internet sales application
US20070195951A1 (en) * 2006-02-10 2007-08-23 Cisco Technology, Inc. Pipeline for high-throughput encrypt functions
US20080114760A1 (en) * 2000-04-07 2008-05-15 Indeck Ronald S Method and Apparatus for Approximate Matching of Image Data
US20080183688A1 (en) * 2006-08-25 2008-07-31 Chamdani Joseph I Methods and systems for hardware acceleration of database operations and queries
US20090089454A1 (en) * 2007-09-28 2009-04-02 Ramakrishna Huggahalli Network packet payload compression
US20090172329A1 (en) * 2008-01-02 2009-07-02 Arm Limited Providing secure services to a non-secure application
US20090172257A1 (en) * 2007-12-27 2009-07-02 Pliant Technology, Inc System and method for performing host initiated mass storage commands using a hierarchy of data structures
US20090172411A1 (en) * 2008-01-02 2009-07-02 Arm Limited Protecting the security of secure data sent from a central processor for processing by a further processing device
US7602785B2 (en) 2004-02-09 2009-10-13 Washington University Method and system for performing longest prefix matching for network address lookup using bloom filters
US7636703B2 (en) 2006-05-02 2009-12-22 Exegy Incorporated Method and apparatus for approximate pattern matching
US7660793B2 (en) 2006-11-13 2010-02-09 Exegy Incorporated Method and system for high performance integration, processing and searching of structured and unstructured data using coprocessors
US7702629B2 (en) 2005-12-02 2010-04-20 Exegy Incorporated Method and device for high performance regular expression pattern matching
US7711844B2 (en) 2002-08-15 2010-05-04 Washington University Of St. Louis TCP-splitter: reliable packet monitoring methods and apparatus for high speed networks
US7840482B2 (en) 2006-06-19 2010-11-23 Exegy Incorporated Method and system for high speed options pricing
US7917299B2 (en) 2005-03-03 2011-03-29 Washington University Method and apparatus for performing similarity searching on a data stream with respect to a query string
US7921046B2 (en) 2006-06-19 2011-04-05 Exegy Incorporated High speed processing of financial information using FPGA devices
US7954114B2 (en) 2006-01-26 2011-05-31 Exegy Incorporated Firmware socket module for FPGA-based pipeline processing
US7966343B2 (en) 2008-04-07 2011-06-21 Teradata Us, Inc. Accessing data in a column store database based on hardware compatible data structures
US8069102B2 (en) 2002-05-21 2011-11-29 Washington University Method and apparatus for processing financial information at hardware speeds using FPGA devices
US8095508B2 (en) 2000-04-07 2012-01-10 Washington University Intelligent data storage and processing using FPGA devices
US8326819B2 (en) 2006-11-13 2012-12-04 Exegy Incorporated Method and system for high performance data metatagging and data indexing using coprocessors
US8365041B2 (en) 2010-03-17 2013-01-29 Sandisk Enterprise Ip Llc MLC self-raid flash data protection scheme
US8374986B2 (en) 2008-05-15 2013-02-12 Exegy Incorporated Method and system for accelerated stream processing
US8379841B2 (en) 2006-03-23 2013-02-19 Exegy Incorporated Method and system for high throughput blockwise independent encryption/decryption
US8458129B2 (en) 2008-06-23 2013-06-04 Teradata Us, Inc. Methods and systems for real-time continuous updates
US8620881B2 (en) 2003-05-23 2013-12-31 Ip Reservoir, Llc Intelligent data storage and processing using FPGA devices
US8763018B2 (en) 2011-08-22 2014-06-24 Solarflare Communications, Inc. Modifying application behaviour
US8762249B2 (en) 2008-12-15 2014-06-24 Ip Reservoir, Llc Method and apparatus for high-speed processing of financial market depth data
US20140180904A1 (en) * 2012-03-27 2014-06-26 Ip Reservoir, Llc Offload Processing of Data Packets Containing Financial Market Data
US8793543B2 (en) 2011-11-07 2014-07-29 Sandisk Enterprise Ip Llc Adaptive read comparison signal generation for memory systems
US8862625B2 (en) 2008-04-07 2014-10-14 Teradata Us, Inc. Accessing data in a column store database based on hardware compatible indexing and replicated reordered columns
US8879727B2 (en) 2007-08-31 2014-11-04 Ip Reservoir, Llc Method and apparatus for hardware-accelerated encryption/decryption
US8891303B1 (en) 2014-05-30 2014-11-18 Sandisk Technologies Inc. Method and system for dynamic word line based configuration of a three-dimensional memory device
US20140359755A1 (en) * 2013-05-30 2014-12-04 Cryptography Research, Inc. Configurator for secure feature and key manager
US8909982B2 (en) 2011-06-19 2014-12-09 Sandisk Enterprise Ip Llc System and method for detecting copyback programming problems
US8910020B2 (en) 2011-06-19 2014-12-09 Sandisk Enterprise Ip Llc Intelligent bit recovery for flash memory
US8924815B2 (en) 2011-11-18 2014-12-30 Sandisk Enterprise Ip Llc Systems, methods and devices for decoding codewords having multiple parity segments
US8954822B2 (en) 2011-11-18 2015-02-10 Sandisk Enterprise Ip Llc Data encoder and decoder using memory-specific parity-check matrix
US20150046486A1 (en) * 2013-08-07 2015-02-12 International Business Machines Corporation Accelerating multiple query processing operations
US20150046428A1 (en) * 2013-08-07 2015-02-12 International Business Machines Corporation Scalable acceleration of database query operations
US8996644B2 (en) 2010-12-09 2015-03-31 Solarflare Communications, Inc. Encapsulated accelerator
US9003264B1 (en) 2012-12-31 2015-04-07 Sandisk Enterprise Ip Llc Systems, methods, and devices for multi-dimensional flash RAID data protection
US9003053B2 (en) 2011-09-22 2015-04-07 Solarflare Communications, Inc. Message acceleration
US9009576B1 (en) 2013-03-15 2015-04-14 Sandisk Enterprise Ip Llc Adaptive LLR based on syndrome weight
US9043517B1 (en) 2013-07-25 2015-05-26 Sandisk Enterprise Ip Llc Multipass programming in buffers implemented in non-volatile data storage systems
US9048876B2 (en) 2011-11-18 2015-06-02 Sandisk Enterprise Ip Llc Systems, methods and devices for multi-tiered error correction
US9047243B2 (en) 2011-12-14 2015-06-02 Ip Reservoir, Llc Method and apparatus for low latency data distribution
US9070481B1 (en) 2014-05-30 2015-06-30 Sandisk Technologies Inc. Internal current measurement for age measurements
US9092370B2 (en) 2013-12-03 2015-07-28 Sandisk Enterprise Ip Llc Power failure tolerant cryptographic erase
US9093160B1 (en) 2014-05-30 2015-07-28 Sandisk Technologies Inc. Methods and systems for staggered memory operations
US9092350B1 (en) 2013-03-15 2015-07-28 Sandisk Enterprise Ip Llc Detection and handling of unbalanced errors in interleaved codewords
US9122636B2 (en) 2013-11-27 2015-09-01 Sandisk Enterprise Ip Llc Hard power fail architecture
US9129665B2 (en) 2013-12-17 2015-09-08 Sandisk Enterprise Ip Llc Dynamic brownout adjustment in a storage device
US9136877B1 (en) 2013-03-15 2015-09-15 Sandisk Enterprise Ip Llc Syndrome layered decoding for LDPC codes
US9152555B2 (en) 2013-11-15 2015-10-06 Sandisk Enterprise IP LLC. Data management with modular erase in a data storage system
US9158349B2 (en) 2013-10-04 2015-10-13 Sandisk Enterprise Ip Llc System and method for heat dissipation
US9159437B2 (en) 2013-06-11 2015-10-13 Sandisk Enterprise IP LLC. Device and method for resolving an LM flag issue
US9170941B2 (en) 2013-04-05 2015-10-27 Sandisk Enterprises IP LLC Data hardening in a storage system
CN105138469A (zh) * 2015-08-28 2015-12-09 北京腾凌科技有限公司 一种数据读写方法以及主板
US9214965B2 (en) 2013-02-20 2015-12-15 Sandisk Enterprise Ip Llc Method and system for improving data integrity in non-volatile storage
US9236886B1 (en) 2013-03-15 2016-01-12 Sandisk Enterprise Ip Llc Universal and reconfigurable QC-LDPC encoder
US9235245B2 (en) 2013-12-04 2016-01-12 Sandisk Enterprise Ip Llc Startup performance and power isolation
US9235509B1 (en) 2013-08-26 2016-01-12 Sandisk Enterprise Ip Llc Write amplification reduction by delaying read access to data written during garbage collection
US9239751B1 (en) 2012-12-27 2016-01-19 Sandisk Enterprise Ip Llc Compressing data from multiple reads for error control management in memory systems
US9244763B1 (en) 2013-03-15 2016-01-26 Sandisk Enterprise Ip Llc System and method for updating a reading threshold voltage based on symbol transition information
US9244785B2 (en) 2013-11-13 2016-01-26 Sandisk Enterprise Ip Llc Simulated power failure and data hardening
US9250676B2 (en) 2013-11-29 2016-02-02 Sandisk Enterprise Ip Llc Power failure architecture and verification
US9258390B2 (en) 2011-07-29 2016-02-09 Solarflare Communications, Inc. Reducing network latency
US9263156B2 (en) 2013-11-07 2016-02-16 Sandisk Enterprise Ip Llc System and method for adjusting trip points within a storage device
US9280429B2 (en) 2013-11-27 2016-03-08 Sandisk Enterprise Ip Llc Power fail latching based on monitoring multiple power supply voltages in a storage device
US9300599B2 (en) 2013-05-30 2016-03-29 Solarflare Communications, Inc. Packet capture
US9298608B2 (en) 2013-10-18 2016-03-29 Sandisk Enterprise Ip Llc Biasing for wear leveling in storage systems
US9323637B2 (en) 2013-10-07 2016-04-26 Sandisk Enterprise Ip Llc Power sequencing and data hardening architecture
US9329928B2 (en) 2013-02-20 2016-05-03 Sandisk Enterprise IP LLC. Bandwidth optimization in a non-volatile memory system
US9348377B2 (en) 2014-03-14 2016-05-24 Sandisk Enterprise Ip Llc Thermal isolation techniques
US9367246B2 (en) 2013-03-15 2016-06-14 Sandisk Technologies Inc. Performance optimization of data transfer for soft information generation
US9384126B1 (en) 2013-07-25 2016-07-05 Sandisk Technologies Inc. Methods and systems to avoid false negative results in bloom filters implemented in non-volatile data storage systems
US9391841B2 (en) 2012-07-03 2016-07-12 Solarflare Communications, Inc. Fast linkup arbitration
US9391840B2 (en) 2012-05-02 2016-07-12 Solarflare Communications, Inc. Avoiding delayed data
US9390021B2 (en) 2014-03-31 2016-07-12 Sandisk Technologies Llc Efficient cache utilization in a tiered data structure
US9390814B2 (en) 2014-03-19 2016-07-12 Sandisk Technologies Llc Fault detection and prediction for data storage elements
US9417894B1 (en) 2011-06-15 2016-08-16 Ryft Systems, Inc. Methods and apparatus for a tablet computer system incorporating a reprogrammable circuit module
US9424315B2 (en) 2007-08-27 2016-08-23 Teradata Us, Inc. Methods and systems for run-time scheduling database operations that are executed in hardware
US9426124B2 (en) 2013-04-08 2016-08-23 Solarflare Communications, Inc. Locked down network interface
US9436831B2 (en) 2013-10-30 2016-09-06 Sandisk Technologies Llc Secure erase in a memory device
US9442670B2 (en) 2013-09-03 2016-09-13 Sandisk Technologies Llc Method and system for rebalancing data stored in flash memory devices
US9442662B2 (en) 2013-10-18 2016-09-13 Sandisk Technologies Llc Device and method for managing die groups
US9443601B2 (en) 2014-09-08 2016-09-13 Sandisk Technologies Llc Holdup capacitor energy harvesting
US9448876B2 (en) 2014-03-19 2016-09-20 Sandisk Technologies Llc Fault detection and prediction in storage devices
US9454448B2 (en) 2014-03-19 2016-09-27 Sandisk Technologies Llc Fault testing in storage devices
US9454420B1 (en) 2012-12-31 2016-09-27 Sandisk Technologies Llc Method and system of reading threshold voltage equalization
US9485851B2 (en) 2014-03-14 2016-11-01 Sandisk Technologies Llc Thermal tube assembly structures
US9497889B2 (en) 2014-02-27 2016-11-15 Sandisk Technologies Llc Heat dissipation for substrate assemblies
US9501398B2 (en) 2012-12-26 2016-11-22 Sandisk Technologies Llc Persistent storage device with NVRAM for staging writes
US9519319B2 (en) 2014-03-14 2016-12-13 Sandisk Technologies Llc Self-supporting thermal tube structure for electronic assemblies
US9520197B2 (en) 2013-11-22 2016-12-13 Sandisk Technologies Llc Adaptive erase of a storage device
US9519577B2 (en) 2013-09-03 2016-12-13 Sandisk Technologies Llc Method and system for migrating data between flash memory devices
US9520162B2 (en) 2013-11-27 2016-12-13 Sandisk Technologies Llc DIMM device controller supervisor
US9524235B1 (en) 2013-07-25 2016-12-20 Sandisk Technologies Llc Local hash value generation in non-volatile data storage systems
US9549457B2 (en) 2014-02-12 2017-01-17 Sandisk Technologies Llc System and method for redirecting airflow across an electronic assembly
US9582058B2 (en) 2013-11-29 2017-02-28 Sandisk Technologies Llc Power inrush management of storage devices
US9600429B2 (en) 2010-12-09 2017-03-21 Solarflare Communications, Inc. Encapsulated accelerator
US9612948B2 (en) 2012-12-27 2017-04-04 Sandisk Technologies Llc Reads and writes between a contiguous data block and noncontiguous sets of logical address blocks in a persistent storage device
US9619499B2 (en) 2013-08-07 2017-04-11 International Business Machines Corporation Hardware implementation of a tournament tree sort algorithm
US9618474B2 (en) 2014-12-18 2017-04-11 Edico Genome, Inc. Graphene FET devices, systems, and methods of using the same for sequencing nucleic acids
US9626400B2 (en) 2014-03-31 2017-04-18 Sandisk Technologies Llc Compaction of information in tiered data structure
US9626399B2 (en) 2014-03-31 2017-04-18 Sandisk Technologies Llc Conditional updates for reducing frequency of data modification operations
US9633093B2 (en) 2012-10-23 2017-04-25 Ip Reservoir, Llc Method and apparatus for accelerated format translation of data in a delimited data format
US9633097B2 (en) 2012-10-23 2017-04-25 Ip Reservoir, Llc Method and apparatus for record pivoting to accelerate processing of data fields
US9639463B1 (en) 2013-08-26 2017-05-02 Sandisk Technologies Llc Heuristic aware garbage collection scheme in storage systems
US9645749B2 (en) 2014-05-30 2017-05-09 Sandisk Technologies Llc Method and system for recharacterizing the storage density of a memory device or a portion thereof
US9652381B2 (en) 2014-06-19 2017-05-16 Sandisk Technologies Llc Sub-block garbage collection
US20170140012A1 (en) * 2015-11-18 2017-05-18 Yahoo! Inc. Method for approximate k-nearest-neighbor search on parallel hardware accelerators
US9674318B2 (en) 2010-12-09 2017-06-06 Solarflare Communications, Inc. TCP processing for devices
US9690813B2 (en) 2013-08-07 2017-06-27 International Business Machines Corporation Tunable hardware sort engine for performing composite sorting algorithms
US9697267B2 (en) 2014-04-03 2017-07-04 Sandisk Technologies Llc Methods and systems for performing efficient snapshots in tiered data structures
US9699263B1 (en) 2012-08-17 2017-07-04 Sandisk Technologies Llc. Automatic read and write acceleration of data accessed by virtual machines
US9703636B2 (en) 2014-03-01 2017-07-11 Sandisk Technologies Llc Firmware reversion trigger and control
US9703816B2 (en) 2013-11-19 2017-07-11 Sandisk Technologies Llc Method and system for forward reference logging in a persistent datastore
US9703491B2 (en) 2014-05-30 2017-07-11 Sandisk Technologies Llc Using history of unaligned writes to cache data and avoid read-modify-writes in a non-volatile storage device
US9859394B2 (en) 2014-12-18 2018-01-02 Agilome, Inc. Graphene FET devices, systems, and methods of using the same for sequencing nucleic acids
US9857328B2 (en) 2014-12-18 2018-01-02 Agilome, Inc. Chemically-sensitive field effect transistors, systems and methods for manufacturing and using the same
US9870830B1 (en) 2013-03-14 2018-01-16 Sandisk Technologies Llc Optimal multilevel sensing for reading data from a storage medium
US9912665B2 (en) 2005-04-27 2018-03-06 Solarflare Communications, Inc. Packet validation in virtual network interface architecture
US9990393B2 (en) 2012-03-27 2018-06-05 Ip Reservoir, Llc Intelligent feed switch
US10006910B2 (en) 2014-12-18 2018-06-26 Agilome, Inc. Chemically-sensitive field effect transistors, systems, and methods for manufacturing and using the same
CN108228583A (zh) * 2016-12-10 2018-06-29 南京理工大学 基于fpga的图像纹理检索系统及检索方法
US10020300B2 (en) 2014-12-18 2018-07-10 Agilome, Inc. Graphene FET devices, systems, and methods of using the same for sequencing nucleic acids
US10037568B2 (en) 2010-12-09 2018-07-31 Ip Reservoir, Llc Method and apparatus for managing orders in financial markets
US10049037B2 (en) 2013-04-05 2018-08-14 Sandisk Enterprise Ip Llc Data management in a storage system
US10114557B2 (en) 2014-05-30 2018-10-30 Sandisk Technologies Llc Identification of hot regions to enhance performance and endurance of a non-volatile storage device
WO2018200475A1 (fr) * 2017-04-24 2018-11-01 Reniac, Inc. Système et procédé visant à accélérer le compactage
US10121196B2 (en) 2012-03-27 2018-11-06 Ip Reservoir, Llc Offload processing of data packets containing financial market data
US20180337773A1 (en) * 2017-05-19 2018-11-22 Fujitsu Limited Communication device and communication method
US10146845B2 (en) 2012-10-23 2018-12-04 Ip Reservoir, Llc Method and apparatus for accelerated format translation of data in a delimited data format
US10146448B2 (en) 2014-05-30 2018-12-04 Sandisk Technologies Llc Using history of I/O sequences to trigger cached read ahead in a non-volatile storage device
US10162748B2 (en) 2014-05-30 2018-12-25 Sandisk Technologies Llc Prioritizing garbage collection and block allocation based on I/O history for logical address regions
US10229453B2 (en) 2008-01-11 2019-03-12 Ip Reservoir, Llc Method and system for low latency basket calculation
US20190147735A1 (en) * 2006-02-21 2019-05-16 Universal Electronics Inc. Codeset communication format and related methods and structures
US10372613B2 (en) 2014-05-30 2019-08-06 Sandisk Technologies Llc Using sub-region I/O history to cache repeatedly accessed sub-regions in a non-volatile storage device
US10394751B2 (en) 2013-11-06 2019-08-27 Solarflare Communications, Inc. Programmed input/output mode
US10423596B2 (en) * 2014-02-11 2019-09-24 International Business Machines Corporation Efficient caching of Huffman dictionaries
US10429342B2 (en) 2014-12-18 2019-10-01 Edico Genome Corporation Chemically-sensitive field effect transistor
US10505747B2 (en) 2012-10-16 2019-12-10 Solarflare Communications, Inc. Feed processing
US10572824B2 (en) 2003-05-23 2020-02-25 Ip Reservoir, Llc System and method for low latency multi-functional pipeline with correlation logic and selectively activated/deactivated pipelined data processing engines
US10650452B2 (en) 2012-03-27 2020-05-12 Ip Reservoir, Llc Offload processing of data packets
US10656842B2 (en) 2014-05-30 2020-05-19 Sandisk Technologies Llc Using history of I/O sizes and I/O sequences to trigger coalesced writes in a non-volatile storage device
US10656840B2 (en) 2014-05-30 2020-05-19 Sandisk Technologies Llc Real-time I/O pattern recognition to enhance performance and endurance of a storage device
US10742604B2 (en) 2013-04-08 2020-08-11 Xilinx, Inc. Locked down network interface
US10811539B2 (en) 2016-05-16 2020-10-20 Nanomedical Diagnostics, Inc. Graphene FET devices, systems, and methods of using the same for sequencing nucleic acids
US10846624B2 (en) 2016-12-22 2020-11-24 Ip Reservoir, Llc Method and apparatus for hardware-accelerated machine learning
US10866941B2 (en) 2016-03-07 2020-12-15 Hitachi, Ltd. Computer and database management method
US10873613B2 (en) 2010-12-09 2020-12-22 Xilinx, Inc. TCP processing for devices
US10902013B2 (en) 2014-04-23 2021-01-26 Ip Reservoir, Llc Method and apparatus for accelerated record layout detection
US10942943B2 (en) 2015-10-29 2021-03-09 Ip Reservoir, Llc Dynamic field data translation to support high performance stream data processing
US10956493B2 (en) * 2015-05-19 2021-03-23 Micro Focus Llc Database comparison operation to identify an object
US11023204B2 (en) 2014-12-29 2021-06-01 International Business Machines Corporation Hardware implementation of a tournament tree sort algorithm using an external memory
CN113608693A (zh) * 2021-07-26 2021-11-05 中国科学院国家空间科学中心 一种星载在轨数据的搜索排序系统和方法
CN114450676A (zh) * 2019-09-24 2022-05-06 超威半导体公司 用于生成压缩数据的具有最长匹配处理的压缩系统
US11436672B2 (en) 2012-03-27 2022-09-06 Exegy Incorporated Intelligent switch for processing financial market data
CN115827682A (zh) * 2023-02-10 2023-03-21 山东浪潮科学研究院有限公司 一种数据库查询加速引擎装置、方法及存储介质
US20240248754A1 (en) * 2023-01-20 2024-07-25 Arm Limited Reading data within a compressed data stream
CN118509509A (zh) * 2024-07-19 2024-08-16 杭州芯旗电子技术有限公司 基于fpga的七号信令解析装置及方法
US12073080B2 (en) 2021-11-16 2024-08-27 Hitachi, Ltd. System and method for improving reliability of a data storage system
US12265736B2 (en) 2020-01-27 2025-04-01 Samsung Electronics Co., Ltd. Latency and throughput centric reconfigurable storage device

Families Citing this family (83)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100455263C (zh) * 2006-04-26 2009-01-28 东软飞利浦医疗设备系统有限责任公司 一种x射线机图像处理装置
EP2092440B1 (fr) * 2006-11-13 2019-01-09 IP Reservoir, LLC Procédé et système pour une intégration, un traitement et une recherche à haute performance de données structurées et non structurées en utilisant des coprocesseurs
US8813260B2 (en) * 2006-11-20 2014-08-19 International Business Machines Corporation Self-contained device security
BRPI0921524A2 (pt) * 2008-11-10 2018-05-29 Zomojo Pty Ltd sistema de negociação automatizada aperfeiçoado
US20120324143A1 (en) 2011-06-15 2012-12-20 Data Design Corporation Methods and apparatus for data access by a reprogrammable circuit module
GB201111554D0 (en) * 2011-07-06 2011-08-24 Business Partners Ltd Search index
US9244967B2 (en) * 2011-08-01 2016-01-26 Actifio, Inc. Incremental copy performance between data stores
US8958550B2 (en) * 2011-09-13 2015-02-17 Combined Conditional Access Development & Support. LLC (CCAD) Encryption operation with real data rounds, dummy data rounds, and delay periods
US9542307B2 (en) 2012-03-02 2017-01-10 Hewlett Packard Enterprise Development Lp Shiftable memory defragmentation
US9432050B2 (en) * 2012-06-13 2016-08-30 Telefonaktiebolaget Lm Ericsson (Publ) Software upgrading in a network
US8838577B2 (en) 2012-07-24 2014-09-16 International Business Machines Corporation Accelerated row decompression
CN103020011B (zh) * 2012-12-31 2015-04-22 哈尔滨工业大学 星载可重构协处理单元
EP2994749B1 (fr) 2013-01-17 2025-03-05 Illumina, Inc. Systèmes, appareils et procédés bio-informatiques, exécutés sur une plate-forme de traitement en circuit intégré
US9792405B2 (en) 2013-01-17 2017-10-17 Edico Genome, Corp. Bioinformatics systems, apparatuses, and methods executed on an integrated circuit processing platform
US9679104B2 (en) 2013-01-17 2017-06-13 Edico Genome, Corp. Bioinformatics systems, apparatuses, and methods executed on an integrated circuit processing platform
US10068054B2 (en) 2013-01-17 2018-09-04 Edico Genome, Corp. Bioinformatics systems, apparatuses, and methods executed on an integrated circuit processing platform
US10847251B2 (en) 2013-01-17 2020-11-24 Illumina, Inc. Genomic infrastructure for on-site or cloud-based DNA and RNA processing and analysis
US10691775B2 (en) 2013-01-17 2020-06-23 Edico Genome, Corp. Bioinformatics systems, apparatuses, and methods executed on an integrated circuit processing platform
US9317718B1 (en) * 2013-03-29 2016-04-19 Secturion Systems, Inc. Security device with programmable systolic-matrix cryptographic module and programmable input/output interface
US9355279B1 (en) 2013-03-29 2016-05-31 Secturion Systems, Inc. Multi-tenancy architecture
US9374344B1 (en) 2013-03-29 2016-06-21 Secturion Systems, Inc. Secure end-to-end communication system
US9798899B1 (en) 2013-03-29 2017-10-24 Secturion Systems, Inc. Replaceable or removable physical interface input/output module
US9524399B1 (en) 2013-04-01 2016-12-20 Secturion Systems, Inc. Multi-level independent security architecture
CN103237021A (zh) * 2013-04-08 2013-08-07 浪潮集团有限公司 一种基于fpga芯片的pci-e的高速密码卡
WO2014186604A1 (fr) * 2013-05-15 2014-11-20 Edico Genome Corp. Systèmes bioinformatiques, appareils, et procédés exécutés sur une plateforme de traitement à circuits intégréss
KR101597637B1 (ko) * 2013-09-02 2016-02-29 주식회사 쏠리드 Ｆｐｇａ 이미지 다운로드시 네트워크 부하를 경감하기 위한 압축 방법
US20150113204A1 (en) * 2013-10-17 2015-04-23 National Chiao Tung University Data storage device and computing system with the same
US20150142745A1 (en) 2013-11-18 2015-05-21 Actifio, Inc. Computerized methods and apparatus for incremental database backup using change tracking
IN2013CH05962A (fr) * 2013-12-20 2015-06-26 Infotech Entpr Ltd
US9697327B2 (en) 2014-02-24 2017-07-04 Edico Genome Corporation Dynamic genome reference generation for improved NGS accuracy and reproducibility
US10552044B2 (en) 2014-03-27 2020-02-04 Hitachi, Ltd. Storage apparatus, data processing method and storage system wherein compressed data is read in parallel, said data stored in buffer by size and read from said buffer, in order of when said data is stored in said buffer
US9933976B2 (en) 2014-04-28 2018-04-03 Hitachi, Ltd. Storage apparatus and data processing method thereof, and storage system
US9647691B2 (en) 2014-10-08 2017-05-09 Nxp Usa, Inc. Apparatus and method for processing trace data streams
HK1255431A1 (zh) 2015-03-23 2019-08-16 Edico Genome Corporation 用於基因组可视化的方法和系统
US9590655B2 (en) 2015-03-27 2017-03-07 Microsoft Technology Licensing, Llc Scalable high-bandwidth architecture for lossless compression
US9794064B2 (en) 2015-09-17 2017-10-17 Secturion Systems, Inc. Client(s) to cloud or remote server secure data or file object encryption gateway
US11283774B2 (en) 2015-09-17 2022-03-22 Secturion Systems, Inc. Cloud storage using encryption gateway with certificate authority identification
US9934272B2 (en) 2015-10-22 2018-04-03 International Business Machines Corporation Processing a database query in a database system
US10708236B2 (en) * 2015-10-26 2020-07-07 Secturion Systems, Inc. Multi-independent level secure (MILS) storage encryption
CN106649136B (zh) * 2015-11-03 2022-09-23 西安中兴新软件有限责任公司 一种数据存储方法和存储装置
US10068183B1 (en) 2017-02-23 2018-09-04 Edico Genome, Corp. Bioinformatics systems, apparatuses, and methods executed on a quantum processing platform
US20170270245A1 (en) 2016-01-11 2017-09-21 Edico Genome, Corp. Bioinformatics systems, apparatuses, and methods for performing secondary and/or tertiary processing
EP3408737A4 (fr) * 2016-01-26 2019-09-11 Icat LLC Processeur avec coeur en pipeline algorithmique reconfigurable et compilateur en pipeline d'appariement algorithmique
KR20170100989A (ko) 2016-02-26 2017-09-05 에스케이하이닉스 주식회사 반도체 시스템
JP6779437B2 (ja) * 2016-06-27 2020-11-04 株式会社ｃｒｏｃｏ 情報検索システム及びそれに用いられるデータ照合装置
JP6790515B2 (ja) * 2016-07-05 2020-11-25 富士通株式会社 ソリッドステートドライブ
US10048894B2 (en) * 2016-07-12 2018-08-14 Spirent Communications, Inc. Reducing cache memory requirements for recording statistics from testing with a multiplicity of flows
US10114941B2 (en) 2016-08-24 2018-10-30 Altera Corporation Systems and methods for authenticating firmware stored on an integrated circuit
CN106326421B (zh) * 2016-08-24 2019-03-22 中国科学院上海微系统与信息技术研究所 基于索引树和数据链表的fpga并行排序方法及系统
CR20190075A (es) 2016-09-15 2019-06-05 Nuts Holdings Llc Tránsito y almacenamiento de datos de usuario encriptados
US10685048B1 (en) 2017-02-01 2020-06-16 Allscripts Software, Llc Systems and methods for Boolean-valuation-based searches
WO2018183572A1 (fr) * 2017-03-29 2018-10-04 Board Of Regents, The University Of Texas System Réduction de la quantité de données auxiliaires dans des fonctions physiques inclonables en silicium par l'intermédiaire d'une compression avec perte et sans caractérisation d'erreur pendant la production
CN107122222B (zh) * 2017-04-20 2019-02-19 深圳大普微电子科技有限公司 一种字符串的搜索系统及方法
CN107392309A (zh) * 2017-09-11 2017-11-24 东南大学—无锡集成电路技术研究所 一种基于fpga的通用定点数神经网络卷积加速器硬件结构
CN109754359B (zh) 2017-11-01 2021-12-07 腾讯科技（深圳）有限公司 一种应用于卷积神经网络的池化处理的方法及系统
CN110109954B (zh) * 2018-01-22 2023-05-26 腾讯科技（深圳）有限公司 数据处理方法、系统、电子设备及存储介质
US10585819B2 (en) 2018-03-05 2020-03-10 Samsung Electronics Co., Ltd. SSD architecture for FPGA based acceleration
US10592463B2 (en) 2018-03-05 2020-03-17 Samsung Electronics Co., Ltd. SSD architecture for FPGA based acceleration
US11379389B1 (en) * 2018-04-03 2022-07-05 Xilinx, Inc. Communicating between data processing engines using shared memory
CN110837395B (zh) * 2018-08-17 2022-03-25 北京图森智途科技有限公司 多gpu并行训练的归一化处理方法、装置和系统
US11112972B2 (en) 2018-12-05 2021-09-07 Samsung Electronics Co., Ltd. System and method for accelerated data processing in SSDs
CN109683822B (zh) * 2018-12-19 2022-03-29 深圳忆联信息系统有限公司 一种ssd soc芯片内容地址搜索控制器的方法及其系统
US11144286B2 (en) 2019-01-14 2021-10-12 Microsoft Technology Licensing, Llc Generating synchronous digital circuits from source code constructs that map to circuit implementations
US11093682B2 (en) 2019-01-14 2021-08-17 Microsoft Technology Licensing, Llc Language and compiler that generate synchronous digital circuits that maintain thread execution order
US11275568B2 (en) 2019-01-14 2022-03-15 Microsoft Technology Licensing, Llc Generating a synchronous digital circuit from a source code construct defining a function call
US11106437B2 (en) * 2019-01-14 2021-08-31 Microsoft Technology Licensing, Llc Lookup table optimization for programming languages that target synchronous digital circuits
US11113176B2 (en) 2019-01-14 2021-09-07 Microsoft Technology Licensing, Llc Generating a debugging network for a synchronous digital circuit during compilation of program source code
US11157423B2 (en) * 2019-05-02 2021-10-26 Dell Products L.P. Pipelined-data-transform-enabled data mover system
JP2022532230A (ja) 2019-05-14 2022-07-13 エクセジー インコーポレイテッド 金融市場データからの取引シグナルを低遅延で生成しかつ配信するための方法およびシステム
CN110175056B (zh) * 2019-05-30 2022-02-11 西安微电子技术研究所 一种异构平台远程动态加载多目标fpga的控制装置及控制方法
US11249651B2 (en) 2019-10-29 2022-02-15 Samsung Electronics Co., Ltd. System and method for hierarchical sort acceleration near storage
CN112835834B (zh) 2019-11-25 2024-03-19 瑞昱半导体股份有限公司 数据传输系统
CN111311479B (zh) * 2020-01-14 2023-09-29 成都智明达电子股份有限公司 一种基于fpga字符叠加的方法
KR102815744B1 (ko) * 2020-01-20 2025-06-04 삼성전자주식회사 직렬로 연결된 전자 장치들 사이에서 컴플리션을 조기에 전송하기 위한 컴퓨팅 시스템
WO2021201816A1 (fr) 2020-03-29 2021-10-07 Micron Technology, Inc. Architecture de circuit de moteur d'inférence
IL319115A (en) 2020-04-09 2025-04-01 Nuts Holdings Llc (Encrypted User Data Transit and Storage Policy): Flexible Hierarchy Object Graphs
US11861337B2 (en) 2020-08-26 2024-01-02 Micron Technology, Inc. Deep neural networks compiler for a trace-based accelerator
US12093258B2 (en) 2020-12-14 2024-09-17 Samsung Electronics Co., Ltd. Storage device adapter to accelerate database temporary table processing
US12277600B2 (en) 2021-02-16 2025-04-15 Exegy Incorporated Methods and systems for low latency automated trading
US12277236B2 (en) 2021-10-06 2025-04-15 Bank Of America Corporation System and methods for intelligent entity-wide data protection
US12431218B2 (en) 2022-03-08 2025-09-30 Illumina, Inc. Multi-pass software-accelerated genomic read mapping engine
US12254332B2 (en) * 2022-05-02 2025-03-18 Reliance Jio Infocomm Usa, Inc. Automated bot for error-free racking-stacking
US11966597B1 (en) * 2022-09-29 2024-04-23 Amazon Technologies, Inc. Multi-domain configurable data compressor/de-compressor

Citations (98)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3601808A (en) * 1968-07-18 1971-08-24 Bell Telephone Labor Inc Advanced keyword associative access memory system
US3611314A (en) * 1969-09-09 1971-10-05 Texas Instruments Inc Dynamic associative data processing system
US3729712A (en) * 1971-02-26 1973-04-24 Eastman Kodak Co Information storage and retrieval system
US3824375A (en) * 1970-08-28 1974-07-16 Financial Security Syst Inc Memory system
US3848235A (en) * 1973-10-24 1974-11-12 Ibm Scan and read control apparatus for a disk storage drive in a computer system
US3906455A (en) * 1974-03-15 1975-09-16 Boeing Computer Services Inc Associative memory device
US4081607A (en) * 1975-04-02 1978-03-28 Rockwell International Corporation Keyword detection in continuous speech using continuous asynchronous correlation
US4298898A (en) * 1979-04-19 1981-11-03 Compagnie Internationale Pour L'informatique Cii Honeywell Bull Method of and apparatus for reading data from reference zones of a memory
US4314356A (en) * 1979-10-24 1982-02-02 Bunker Ramo Corporation High-speed term searcher
US4385393A (en) * 1980-04-21 1983-05-24 L'etat Francais Represente Par Le Secretaire D'etat Adaptive prediction differential PCM-type transmission apparatus and process with shaping of the quantization noise
US4464718A (en) * 1982-07-30 1984-08-07 International Business Machines Corporation Associative file processing method and apparatus
US4550436A (en) * 1983-07-26 1985-10-29 At&T Bell Laboratories Parallel text matching methods and apparatus
US4823306A (en) * 1987-08-14 1989-04-18 International Business Machines Corporation Text search system
US4941178A (en) * 1986-04-01 1990-07-10 Gte Laboratories Incorporated Speech recognition using preclassification and spectral normalization
US5023910A (en) * 1988-04-08 1991-06-11 At&T Bell Laboratories Vector quantization in a harmonic speech coding arrangement
US5050075A (en) * 1988-10-04 1991-09-17 Bell Communications Research, Inc. High performance VLSI data filter
US5101424A (en) * 1990-09-28 1992-03-31 Northern Telecom Limited Method for generating a monitor program for monitoring text streams and executing actions when pre-defined patterns, are matched using an English to AWK language translator
US5140692A (en) * 1989-06-13 1992-08-18 Ricoh Company, Ltd. Document retrieval system using analog signal comparisons for retrieval conditions including relevant keywords
US5163131A (en) * 1989-09-08 1992-11-10 Auspex Systems, Inc. Parallel i/o network file server architecture
US5179626A (en) * 1988-04-08 1993-01-12 At&T Bell Laboratories Harmonic speech coding arrangement where a set of parameters for a continuous magnitude spectrum is determined by a speech analyzer and the parameters are used by a synthesizer to determine a spectrum which is used to determine senusoids for synthesis
US5226165A (en) * 1990-10-24 1993-07-06 International Computers Limited Database search processor for real-time adaptive searching based on request and data structure
US5243655A (en) * 1990-01-05 1993-09-07 Symbol Technologies Inc. System for encoding and decoding data in machine readable graphic form
US5249292A (en) * 1989-03-31 1993-09-28 Chiappa J Noel Data packet switch using a primary processing unit to designate one of a plurality of data stream control circuits to selectively handle the header processing of incoming packets in one data packet stream
US5255136A (en) * 1990-08-17 1993-10-19 Quantum Corporation High capacity submicro-winchester fixed disk drive
US5265065A (en) * 1991-10-08 1993-11-23 West Publishing Company Method and apparatus for information retrieval from a database by replacing domain specific stemmed phases in a natural language to create a search query
US5319776A (en) * 1990-04-19 1994-06-07 Hilgraeve Corporation In transit detection of computer virus with safeguard
US5327521A (en) * 1992-03-02 1994-07-05 The Walt Disney Company Speech transformation system
US5339411A (en) * 1990-12-21 1994-08-16 Pitney Bowes Inc. Method for managing allocation of memory space
US5347634A (en) * 1990-03-15 1994-09-13 Hewlett-Packard Company System and method for directly executing user DMA instruction from user controlled process by employing processor privileged work buffer pointers
US5371794A (en) * 1993-11-02 1994-12-06 Sun Microsystems, Inc. Method and apparatus for privacy and authentication in wireless networks
US5388259A (en) * 1992-05-15 1995-02-07 Bell Communications Research, Inc. System for accessing a database with an iterated fuzzy query notified by retrieval response
US5396253A (en) * 1990-07-25 1995-03-07 British Telecommunications Plc Speed estimation
US5418951A (en) * 1992-08-20 1995-05-23 The United States Of America As Represented By The Director Of National Security Agency Method of retrieving documents that concern the same topic
US5421028A (en) * 1991-03-15 1995-05-30 Hewlett-Packard Company Processing commands and data in a common pipeline path in a high-speed computer graphics system
US5432822A (en) * 1993-03-12 1995-07-11 Hughes Aircraft Company Error correcting decoder and decoding method employing reliability based erasure decision-making in cellular communication system
US5440723A (en) * 1993-01-19 1995-08-08 International Business Machines Corporation Automatic immune system for computers and computer networks
US5461712A (en) * 1994-04-18 1995-10-24 International Business Machines Corporation Quadrant-based two-dimensional memory manager
US5465353A (en) * 1994-04-01 1995-11-07 Ricoh Company, Ltd. Image matching and retrieval by multi-access redundant hashing
US5481735A (en) * 1992-12-28 1996-01-02 Apple Computer, Inc. Method for modifying packets that meet a particular criteria as the packets pass between two layers in a network
US5488725A (en) * 1991-10-08 1996-01-30 West Publishing Company System of document representation retrieval by successive iterated probability sampling
US5497488A (en) * 1990-06-12 1996-03-05 Hitachi, Ltd. System for parallel string search with a function-directed parallel collation of a first partition of each string followed by matching of second partitions
US5544352A (en) * 1993-06-14 1996-08-06 Libertech, Inc. Method and apparatus for indexing, searching and displaying data
US5546578A (en) * 1991-04-25 1996-08-13 Nippon Steel Corporation Data base retrieval system utilizing stored vicinity feature values
US5651125A (en) * 1993-10-29 1997-07-22 Advanced Micro Devices, Inc. High performance superscalar microprocessor including a common reorder buffer and common register file for both integer and floating point operations
US5701464A (en) * 1995-09-15 1997-12-23 Intel Corporation Parameterized bloom filters
US5721898A (en) * 1992-09-02 1998-02-24 International Business Machines Corporation Method and system for data search in a data processing system
US5740244A (en) * 1993-04-09 1998-04-14 Washington University Method and apparatus for improved fingerprinting and authenticating various magnetic media
US5740466A (en) * 1992-06-26 1998-04-14 Cirrus Logic, Inc. Flexible processor-driven SCSI controller with buffer memory and local processor memory coupled via separate buses
US5774839A (en) * 1995-09-29 1998-06-30 Rockwell International Corporation Delayed decision switched prediction multi-stage LSF vector quantization
US5774835A (en) * 1994-08-22 1998-06-30 Nec Corporation Method and apparatus of postfiltering using a first spectrum parameter of an encoded sound signal and a second spectrum parameter of a lesser degree than the first spectrum parameter
US5781772A (en) * 1989-07-12 1998-07-14 Digital Equipment Corporation Compressed prefix matching database searching
US5781921A (en) * 1996-05-06 1998-07-14 Ohmeda Inc. Method and apparatus to effect firmware upgrades using a removable memory device under software control
US5805832A (en) * 1991-07-25 1998-09-08 International Business Machines Corporation System for parametric text to text language translation
US5813000A (en) * 1994-02-15 1998-09-22 Sun Micro Systems B tree structure and method
US5819273A (en) * 1994-07-25 1998-10-06 Apple Computer, Inc. Method and apparatus for searching for information in a network and for controlling the display of searchable information on display devices in the network
US5819290A (en) * 1995-04-10 1998-10-06 Sony Corporation Data recording and management system and method for detecting data file division based on quantitative number of blocks
US5826075A (en) * 1991-10-16 1998-10-20 International Business Machines Corporation Automated programmable fireware store for a personal computer system
US5864738A (en) * 1996-03-13 1999-01-26 Cray Research, Inc. Massively parallel processing system using two data paths: one connecting router circuit to the interconnect network and the other connecting router circuit to I/O controller
US5884286A (en) * 1994-07-29 1999-03-16 Daughtery, Iii; Vergil L. Apparatus and process for executing an expirationless option transaction
US5913211A (en) * 1995-09-14 1999-06-15 Fujitsu Limited Database searching method and system using retrieval data set display screen
US5930753A (en) * 1997-03-20 1999-07-27 At&T Corp Combining frequency warping and spectral shaping in HMM based speech recognition
US5943429A (en) * 1995-01-30 1999-08-24 Telefonaktiebolaget Lm Ericsson Spectral subtraction noise suppression method
US5943421A (en) * 1995-09-11 1999-08-24 Norand Corporation Processor having compression and encryption circuitry
US5978801A (en) * 1996-11-21 1999-11-02 Sharp Kabushiki Kaisha Character and/or character-string retrieving method and storage medium for use for this method
US5991881A (en) * 1996-11-08 1999-11-23 Harris Corporation Network surveillance system
US5995963A (en) * 1996-06-27 1999-11-30 Fujitsu Limited Apparatus and method of multi-string matching based on sparse state transition list
US6006264A (en) * 1997-08-01 1999-12-21 Arrowpoint Communications, Inc. Method and system for directing a flow between a client and a server
US6023760A (en) * 1996-06-22 2000-02-08 Xerox Corporation Modifying an input string partitioned in accordance with directionality and length constraints
US6028939A (en) * 1997-01-03 2000-02-22 Redcreek Communications, Inc. Data security system and method
US6044407A (en) * 1992-11-13 2000-03-28 British Telecommunications Public Limited Company Interface for translating an information message from one protocol to another
US6061662A (en) * 1997-08-15 2000-05-09 Options Technology Company, Inc. Simulation method and system for the valuation of derivative financial instruments
US6064739A (en) * 1996-09-30 2000-05-16 Intel Corporation System and method for copy-protecting distributed video content
US6067569A (en) * 1997-07-10 2000-05-23 Microsoft Corporation Fast-forwarding and filtering of network packets in a computer system
US6070172A (en) * 1997-03-06 2000-05-30 Oracle Corporation On-line free space defragmentation of a contiguous-file file system
US6073160A (en) * 1996-12-18 2000-06-06 Xerox Corporation Document communications controller
US6105067A (en) * 1998-06-05 2000-08-15 International Business Machines Corp. Connection pool management for backend servers using common interface
US6134551A (en) * 1995-09-15 2000-10-17 Intel Corporation Method of caching digital certificate revocation lists
US6138176A (en) * 1997-11-14 2000-10-24 3Ware Disk array controller with automated processor which routes I/O data according to addresses and commands received from disk drive controllers
US6147976A (en) * 1996-06-24 2000-11-14 Cabletron Systems, Inc. Fast network layer packet filter
US6169969B1 (en) * 1998-08-07 2001-01-02 The United States Of America As Represented By The Director Of The National Security Agency Device and method for full-text large-dictionary string matching using n-gram hashing
US6173276B1 (en) * 1997-08-21 2001-01-09 Scicomp, Inc. System and method for financial instrument modeling and valuation
US6175874B1 (en) * 1997-07-03 2001-01-16 Fujitsu Limited Packet relay control method packet relay device and program memory medium
US20020103663A1 (en) * 2001-02-01 2002-08-01 John Bankier Highly available transaction failure detection and recovery for electronic commerce transactions
US20020150248A1 (en) * 2001-03-06 2002-10-17 Kovacevic Branko D. System for digital stream reception via memory buffer and method thereof
US20030169877A1 (en) * 2002-03-05 2003-09-11 Liu Fang-Cheng Pipelined engine for encryption/authentication in IPSEC
US20040117645A1 (en) * 2002-06-28 2004-06-17 Nobukatsu Okuda Information reproducing apparatus
US6765918B1 (en) * 1999-06-16 2004-07-20 Teledata Networks, Ltd. Client/server based architecture for a telecommunications network
US6772345B1 (en) * 2002-02-08 2004-08-03 Networks Associates Technology, Inc. Protocol-level malware scanner
US6804667B1 (en) * 1999-11-30 2004-10-12 Ncr Corporation Filter for checking for duplicate entries in database
US6807156B1 (en) * 2000-11-07 2004-10-19 Telefonaktiebolaget Lm Ericsson (Publ) Scalable real-time quality of service monitoring and analysis of service dependent subscriber satisfaction in IP networks
US6886103B1 (en) * 1999-10-28 2005-04-26 Lucent Technologies Inc. Method and apparatus for extending network address translation for unsupported protocols
US6931545B1 (en) * 2000-08-28 2005-08-16 Contentguard Holdings, Inc. Systems and methods for integrity certification and verification of content consumption environments
US6944168B2 (en) * 2001-05-04 2005-09-13 Slt Logic Llc System and method for providing transformation of multi-protocol packets in a data stream
US6978223B2 (en) * 2001-09-06 2005-12-20 Bbnt Solutions Llc Systems and methods for network performance measurement using packet signature collection
US6981054B1 (en) * 2000-06-06 2005-12-27 Advanced Micro Devices, Inc. Flow control arrangement in a network switch based on priority traffic
US20060059213A1 (en) * 2002-12-18 2006-03-16 Koninklijke Philips Electronics N.V. Dedicated encrypted virtual channel in a multi-channel serial communications interface
US7093023B2 (en) * 2002-05-21 2006-08-15 Washington University Methods, systems, and devices using reprogrammable hardware for high-speed processing of streaming data to find a redefinable pattern and respond thereto
US7167980B2 (en) * 2002-05-30 2007-01-23 Intel Corporation Data comparison process

Family Cites Families (466)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2046381A (en) 1930-12-10 1936-07-07 Teleregister Corp Bid and asked quotation system
US3082402A (en) 1960-05-10 1963-03-19 Scantlin Electronics Inc Securities quotation apparatus
US3296597A (en) 1963-10-28 1967-01-03 Scantlin Electronics Inc Market quotation apparatus
US3581072A (en) 1968-03-28 1971-05-25 Frederick Nymeyer Auction market computation system
US3573747A (en) 1969-02-24 1971-04-06 Institutional Networks Corp Instinet communication system for effectuating the sale or exchange of fungible properties between subscribers
US4412287A (en) 1975-05-29 1983-10-25 Braddock Iii Walter D Automated stock exchange
US4044334A (en) 1975-06-19 1977-08-23 Honeywell Information Systems, Inc. Database instruction unload
JPS5829969B2 (ja) 1977-05-23 1983-06-25 旭化成株式会社 難燃性ポリアミド成形品の製造方法
US4300193A (en) 1979-01-31 1981-11-10 Honeywell Information Systems Inc. Data processing system having data multiplex control apparatus
JPS57137978A (en) 1981-02-20 1982-08-25 Toshiba Corp Pattern detecting device
JPS58102378A (ja) 1981-12-11 1983-06-17 Sharp Corp 情報検索装置
US4903201A (en) 1983-11-03 1990-02-20 World Energy Exchange Corporation Automated futures trading exchange
US5270922A (en) 1984-06-29 1993-12-14 Merrill Lynch & Company, Inc. System for distributing, processing and displaying financial information
JPS61107596A (ja) 1984-10-31 1986-05-26 Nec Corp 連想記憶装置
US4868866A (en) 1984-12-28 1989-09-19 Mcgraw-Hill Inc. Broadcast data distribution system
US4674044A (en) 1985-01-30 1987-06-16 Merrill Lynch, Pierce, Fenner & Smith, Inc. Automated securities trading system
US4811214A (en) * 1986-11-14 1989-03-07 Princeton University Multinode reconfigurable pipeline computer
JPH0812659B2 (ja) 1986-12-05 1996-02-07 株式会社安川電機 時系列デ−タのデ−タベ−ス検索方法
US5038284A (en) 1988-02-17 1991-08-06 Kramer Robert M Method and apparatus relating to conducting trading transactions with portable trading stations
JPH0219963A (ja) 1988-07-08 1990-01-23 Hitachi Ltd 実時間状況監視方法及びシステム
JPH02136900A (ja) 1988-11-18 1990-05-25 Nec Corp 音声テキスト検索装置
JPH02224060A (ja) 1989-02-27 1990-09-06 Hitachi Ltd リアルタイム意思決定支援方式
JPH03505498A (ja) 1989-03-14 1991-11-28 シカゴ　ボード　オブ　トレード 模擬仕切売場取引システム
US5077665A (en) 1989-05-25 1991-12-31 Reuters Limited Distributed matching system
US5101353A (en) 1989-05-31 1992-03-31 Lattice Investments, Inc. Automated system for providing liquidity to securities markets
US5233539A (en) 1989-08-15 1993-08-03 Advanced Micro Devices, Inc. Programmable gate array with improved interconnect structure, input/output structure and configurable logic block
US5126936A (en) 1989-09-01 1992-06-30 Champion Securities Goal-directed financial asset management system
JPH03179863A (ja) 1989-09-04 1991-08-05 Hitachi Ltd 自動取引方法および装置
US5313560A (en) 1990-05-11 1994-05-17 Hitachi, Ltd. Method for determining a supplemental transaction changing a decided transaction to satisfy a target
JP2960533B2 (ja) 1990-11-30 1999-10-06 株式会社日立製作所 記号列検索モジュール及びそれを備えたシングルチップマイクロコンピュータ
DE4020875A1 (de) 1990-06-29 1992-01-02 Digital Equipment Int Verfahren und schaltungsanordnung zum umwandeln von analogen lesesignalen in digitale signale
US5063507A (en) 1990-09-14 1991-11-05 Plains Cotton Cooperative Association Goods database employing electronic title or documentary-type title
US5404488A (en) 1990-09-26 1995-04-04 Lotus Development Corporation Realtime data feed engine for updating an application with the most currently received data from multiple data feeds
US5258908A (en) 1990-11-02 1993-11-02 Foreign Exchange Transaction Services, Inc. Detection and prevention of duplicate trading transactions over a communications network
US5517642A (en) 1990-11-13 1996-05-14 International Business Machines, Inc. Inferencing production control computer system
US5263156A (en) 1990-12-20 1993-11-16 Bell Communications Research, Inc. Parallel, distributed optimistic concurrency control certification using hardware filtering
US5404411A (en) 1990-12-27 1995-04-04 Xerox Corporation Bitmap-image pattern matching apparatus for correcting bitmap errors in a printing system
US5301284A (en) * 1991-01-16 1994-04-05 Walker-Estes Corporation Mixed-resolution, N-dimensional object space method and apparatus
US5297032A (en) 1991-02-01 1994-03-22 Merrill Lynch, Pierce, Fenner & Smith Incorporated Securities trading workstation
JPH05101102A (ja) 1991-10-03 1993-04-23 Matsushita Electric Ind Co Ltd 検索装置
US5208491A (en) 1992-01-07 1993-05-04 Washington Research Foundation Field programmable gate array
US5375055A (en) 1992-02-03 1994-12-20 Foreign Exchange Transaction Services, Inc. Credit management for electronic brokerage system
US6985883B1 (en) 1992-02-03 2006-01-10 Ebs Dealing Resources, Inc. Credit management for electronic brokerage system
DE69331452T2 (de) 1992-06-10 2003-05-28 Cfph, L.L.C. Datenprozessor für Wertpapier mit festem Einkommen und Verfahren um diesen zu benutzen
US5684980A (en) 1992-07-29 1997-11-04 Virtual Computer Corporation FPGA virtual computer for executing a sequence of program instructions by successively reconfiguring a group of FPGA in response to those instructions
US5802290A (en) 1992-07-29 1998-09-01 Virtual Computer Corporation Computer network of distributed virtual computers which are EAC reconfigurable in response to instruction to be executed
US6173270B1 (en) 1992-09-01 2001-01-09 Merrill Lynch, Pierce, Fenner & Smith Stock option control and exercise system
KR950704751A (ko) 1992-10-16 1995-11-20 아르네 할라스 비수치 코프로세서 장치(non-numeric coprocessor)
JP2575595B2 (ja) 1992-10-20 1997-01-29 インターナショナル・ビジネス・マシーンズ・コーポレイション イメージフレームの圧縮方法及びデータ処理システム
US5361373A (en) 1992-12-11 1994-11-01 Gilson Kent L Integrated circuit computing device comprising a dynamically configurable gate array having a microprocessor and reconfigurable instruction execution means and method therefor
US6456982B1 (en) 1993-07-01 2002-09-24 Dragana N. Pilipovic Computer system for generating projected data and an application supporting a financial transaction
US5500793A (en) 1993-09-02 1996-03-19 Equitrade Computerized system for developing multi-party property equity exchange scenarios
US5497317A (en) 1993-12-28 1996-03-05 Thomson Trading Services, Inc. Device and method for improving the speed and reliability of security trade settlements
ES2141340T3 (es) 1994-03-08 2000-03-16 Excel Switching Corp Central de telecomunicaciones de redundancia mejorada.
US5809483A (en) 1994-05-13 1998-09-15 Broka; S. William Online transaction processing system for bond trading
US5987432A (en) 1994-06-29 1999-11-16 Reuters, Ltd. Fault-tolerant central ticker plant system for distributing financial market data
JPH0822392A (ja) 1994-07-11 1996-01-23 Hitachi Ltd 意志決定方法及び装置
US6263321B1 (en) 1994-07-29 2001-07-17 Economic Inventions, Llc Apparatus and process for calculating an option
US5619574A (en) 1995-02-13 1997-04-08 Eta Technologies Corporation Personal access management system
US7124302B2 (en) 1995-02-13 2006-10-17 Intertrust Technologies Corp. Systems and methods for secure transaction management and electronic rights protection
EP1515216B1 (fr) 1995-02-13 2014-09-24 Intertrust Technologies Corporation Systèmes et procédés de gestion de transactions sécurisées et de protection de droits électroniques
US5845266A (en) 1995-12-12 1998-12-01 Optimark Technologies, Inc. Crossing network utilizing satisfaction density profile with price discovery features
GB2300991B (en) 1995-05-15 1997-11-05 Andrew Macgregor Ritchie Serving signals to browsing clients
US5704060A (en) 1995-05-22 1997-12-30 Del Monte; Michael G. Text storage and retrieval system and method
US5687297A (en) 1995-06-29 1997-11-11 Xerox Corporation Multifunctional apparatus for appearance tuning and resolution reconstruction of digital images
US5886701A (en) 1995-08-04 1999-03-23 Microsoft Corporation Graphics rendering device and method for operating same
JPH0954797A (ja) 1995-08-18 1997-02-25 Nippon Telegr & Teleph Corp <Ntt> 企業網設計検索装置
US5785636A (en) * 1995-10-12 1998-07-28 Beloit Technologies, Inc. Composite roll shell
JPH09145544A (ja) 1995-11-20 1997-06-06 Ricoh Co Ltd Ｍｔｆ測定方法
US20050267836A1 (en) 1996-03-25 2005-12-01 Cfph, Llc Method and system for transacting with a trading application
JPH09269930A (ja) 1996-04-03 1997-10-14 Hitachi Ltd ネットワークシステムの防疫方法及びその装置
US5713793A (en) 1996-04-05 1998-02-03 Oris, L.L.C. Sporting event options market trading game
US5712942A (en) 1996-05-13 1998-01-27 Lucent Technologies Inc. Optical communications system having distributed intelligence
US6016483A (en) 1996-09-20 2000-01-18 Optimark Technologies, Inc. Method and apparatus for automated opening of options exchange
US6178494B1 (en) 1996-09-23 2001-01-23 Virtual Computer Corporation Modular, hybrid processor and method for producing a modular, hybrid processor
US6084584A (en) 1996-10-01 2000-07-04 Diamond Multimedia Systems, Inc. Computer system supporting portable interactive graphics display tablet and communications systems
US5963923A (en) 1996-11-12 1999-10-05 Garber; Howard B. System and method for trading having a principal market maker
US5892962A (en) * 1996-11-12 1999-04-06 Lucent Technologies Inc. FPGA-based processor
DE19651075A1 (de) 1996-12-09 1998-06-10 Pact Inf Tech Gmbh Einheit zur Verarbeitung von numerischen und logischen Operationen, zum Einsatz in Prozessoren (CPU's), Mehrrechnersystemen, Datenflußprozessoren (DFP's), digitalen Signal Prozessoren (DSP's) oder dergleichen
US5905974A (en) 1996-12-13 1999-05-18 Cantor Fitzgerald Securities Automated auction protocol processor
US5911778A (en) * 1996-12-31 1999-06-15 Sun Microsystems, Inc. Processing system security
JP2945938B2 (ja) 1997-03-11 1999-09-06 科学技術庁航空宇宙技術研究所長 ネットワーク不正解析方法及びこれを利用したネットワーク不正解析装置並びにネットワーク不正解析プログラムを記録したコンピュータ読み取り可能な記録媒体
US5873071A (en) 1997-05-15 1999-02-16 Itg Inc. Computer method and system for intermediated exchange of commodities
JPH10326287A (ja) * 1997-05-23 1998-12-08 Mitsubishi Corp デジタルコンテンツ管理システム及びデジタルコンテンツ管理装置
DE19724072C2 (de) 1997-06-07 1999-04-01 Deutsche Telekom Ag Vorrichtung zur Durchführung eines Blockchiffrierverfahrens
US6236727B1 (en) * 1997-06-24 2001-05-22 International Business Machines Corporation Apparatus, method and computer program product for protecting copyright data within a computer system
US6317795B1 (en) 1997-07-22 2001-11-13 International Business Machines Corporation Dynamic modification of multimedia content
EP1010283B1 (fr) 1997-07-24 2006-11-29 Tumbleweed Communications Corp. Filtre securitaire de courrier electronique comportant en memoire une cle de cryptage/decryptage
US6608638B1 (en) * 2000-02-07 2003-08-19 National Instruments Corporation System and method for configuring a programmable hardware instrument to perform measurement functions utilizing estimation of the hardware implentation and management of hardware resources
US6772136B2 (en) 1997-08-21 2004-08-03 Elaine Kant System and method for financial instrument modeling and using Monte Carlo simulation
US6307936B1 (en) 1997-09-16 2001-10-23 Safenet, Inc. Cryptographic key management scheme
JPH11110320A (ja) 1997-10-03 1999-04-23 Matsushita Electric Ind Co Ltd メッセージ交換装置
GB2330682A (en) * 1997-10-22 1999-04-28 Calluna Tech Ltd Password access to an encrypted drive
US6442533B1 (en) 1997-10-29 2002-08-27 William H. Hinkle Multi-processing financial transaction processing system
US6370592B1 (en) 1997-11-04 2002-04-09 Hewlett-Packard Company Network interface device which allows peripherals to utilize network transport services
US5950006A (en) 1997-11-05 1999-09-07 Control Technology Corporation Object-oriented programmable controller
US6594643B1 (en) 1997-11-14 2003-07-15 Charles C. Freeny, Jr. Automatic stock trading system
US6412000B1 (en) 1997-11-25 2002-06-25 Packeteer, Inc. Method for automatically classifying traffic in a packet communications network
US6321258B1 (en) 1997-12-11 2001-11-20 Hewlett-Packard Company Administration of networked peripherals using particular file system
US7424552B2 (en) 1997-12-17 2008-09-09 Src Computers, Inc. Switch/network adapter port incorporating shared memory resources selectively accessible by a direct execution logic element and one or more dense logic devices
US7124106B1 (en) 1997-12-17 2006-10-17 Omega Consulting, Inc. Apparatus for trading of bundled assets including bundle substitution and method therefor
US6058391A (en) 1997-12-17 2000-05-02 Mci Communications Corporation Enhanced user view/update capability for managing data from relational tables
US6339819B1 (en) 1997-12-17 2002-01-15 Src Computers, Inc. Multiprocessor with each processor element accessing operands in loaded input buffer and forwarding results to FIFO output buffer
US6147890A (en) * 1997-12-30 2000-11-14 Kawasaki Steel Corporation FPGA with embedded content-addressable memory
US6519686B2 (en) 1998-01-05 2003-02-11 Intel Corporation Information streaming in a multi-process system using shared memory
US6034538A (en) * 1998-01-21 2000-03-07 Lucent Technologies Inc. Virtual logic system for reconfigurable hardware
US6235996B1 (en) * 1998-01-28 2001-05-22 International Business Machines Corporation Interconnection structure and process module assembly and rework
US6175948B1 (en) * 1998-02-05 2001-01-16 Motorola, Inc. Method and apparatus for a waveform compiler
US5987610A (en) 1998-02-12 1999-11-16 Ameritech Corporation Computer virus screening methods and systems
US6304858B1 (en) 1998-02-13 2001-10-16 Adams, Viner And Mosler, Ltd. Method, system, and computer program product for trading interest rate swaps
KR100441171B1 (ko) 1998-02-20 2004-10-14 삼성전자주식회사 플래쉬롬과램을이용한펌웨어구현방법
US6096091A (en) * 1998-02-24 2000-08-01 Advanced Micro Devices, Inc. Dynamically reconfigurable logic networks interconnected by fall-through FIFOs for flexible pipeline processing in a system-on-a-chip
US6279113B1 (en) 1998-03-16 2001-08-21 Internet Tools, Inc. Dynamic signature inspection-based network intrusion detection
US6236980B1 (en) 1998-04-09 2001-05-22 John P Reese Magazine, online, and broadcast summary recommendation reporting system to aid in decision making
JPH11306268A (ja) 1998-04-17 1999-11-05 Sunao Shibata 半導体演算装置
US6389532B1 (en) 1998-04-20 2002-05-14 Sun Microsystems, Inc. Method and apparatus for using digital signatures to filter packets in a network
JPH11316765A (ja) 1998-05-01 1999-11-16 Nippon Steel Corp データベース検索システム及び方法、データベース登録装置、データベース検索装置、記録媒体
US6415269B1 (en) 1998-05-29 2002-07-02 Bidcatcher, L.P. Interactive remote auction bidding system
US6397259B1 (en) 1998-05-29 2002-05-28 Palm, Inc. Method, system and apparatus for packet minimized communications
US6289461B1 (en) 1998-06-09 2001-09-11 Placeware, Inc. Bi-directional process-to-process byte stream protocol
US6243753B1 (en) 1998-06-12 2001-06-05 Microsoft Corporation Method, system, and computer program product for creating a raw data channel form an integrating component to a series of kernel mode filters
US6272616B1 (en) 1998-06-17 2001-08-07 Agere Systems Guardian Corp. Method and apparatus for executing multiple instruction streams in a digital processor with multiple data paths
AU4848499A (en) 1998-07-08 2000-02-01 Broadcom Corporation Network switch utilizing packet based per head-of-line blocking prevention
US6456632B1 (en) 1998-08-27 2002-09-24 Robert T. Baum Protocol separation in packet communication
US6535868B1 (en) 1998-08-27 2003-03-18 Debra A. Galeazzi Method and apparatus for managing metadata in a database management system
US20020152060A1 (en) * 1998-08-31 2002-10-17 Tseng Ping-Sheng Inter-chip communication system
JP2000076270A (ja) 1998-08-31 2000-03-14 Canon Inc 画像検索システム及びその制御方法、画像検索装置及びその制御方法、コンピュータ可読メモリ
GB9819183D0 (en) 1998-09-04 1998-10-28 Int Computers Ltd Multiple string search method
JP2000101439A (ja) 1998-09-24 2000-04-07 Sony Corp 情報処理装置および方法、情報記録装置および方法、記録媒体、並びに提供媒体
US6226676B1 (en) 1998-10-07 2001-05-01 Nortel Networks Corporation Connection establishment and termination in a mixed protocol network
US6317728B1 (en) 1998-10-13 2001-11-13 Richard L. Kane Securities and commodities trading system
JP4763866B2 (ja) 1998-10-15 2011-08-31 インターシア ソフトウェア エルエルシー ２重再暗号化によりデジタルデータを保護する方法及び装置
US7181548B2 (en) 1998-10-30 2007-02-20 Lsi Logic Corporation Command queueing engine
WO2000031963A1 (fr) 1998-11-24 2000-06-02 Niksun, Inc. Appareil et procede de collecte et d'analyse de donnees de communications
JP3679936B2 (ja) 1998-11-27 2005-08-03 東芝ソリューション株式会社 暗復号装置及び記憶媒体
US6564263B1 (en) 1998-12-04 2003-05-13 International Business Machines Corporation Multimedia content description framework
US6624761B2 (en) 1998-12-11 2003-09-23 Realtime Data, Llc Content independent data compression method and system
US6195024B1 (en) 1998-12-11 2001-02-27 Realtime Data, Llc Content independent data compression method and system
US6625150B1 (en) 1998-12-17 2003-09-23 Watchguard Technologies, Inc. Policy engine architecture
US6499107B1 (en) 1998-12-29 2002-12-24 Cisco Technology, Inc. Method and system for adaptive network security using intelligent packet analysis
US6279140B1 (en) 1999-01-07 2001-08-21 International Business Machines Corporation Method and apparatus for checksum verification with receive packet processing
US6329996B1 (en) * 1999-01-08 2001-12-11 Silicon Graphics, Inc. Method and apparatus for synchronizing graphics pipelines
US6578147B1 (en) 1999-01-15 2003-06-10 Cisco Technology, Inc. Parallel intrusion detection sensors with load balancing for high speed networks
US6601104B1 (en) 1999-03-11 2003-07-29 Realtime Data Llc System and methods for accelerated data storage and retrieval
US6604158B1 (en) 1999-03-11 2003-08-05 Realtime Data, Llc System and methods for accelerated data storage and retrieval
US6778968B1 (en) 1999-03-17 2004-08-17 Vialogy Corp. Method and system for facilitating opportunistic transactions using auto-probes
US6839686B1 (en) 1999-03-29 2005-01-04 Dlj Long Term Investment Corporation Method and system for providing financial information and evaluating securities of a financial debt instrument
JP3673111B2 (ja) 1999-03-31 2005-07-20 株式会社東芝 文書管理方法および文書管理装置および記憶媒体
JP3526414B2 (ja) * 1999-03-31 2004-05-17 株式会社東芝 情報記録再生方法および情報記録再生装置
US6993504B1 (en) 1999-04-09 2006-01-31 Trading Technologies International, Inc. User interface for semi-fungible trading
US6336117B1 (en) 1999-04-30 2002-01-01 International Business Machines Corporation Content-indexing search system and method providing search results consistent with content filtering and blocking policies implemented in a blocking engine
US6952409B2 (en) * 1999-05-17 2005-10-04 Jolitz Lynne G Accelerator system and method
US6768992B1 (en) * 1999-05-17 2004-07-27 Lynne G. Jolitz Term addressable memory of an accelerator system and method
US6597812B1 (en) 1999-05-28 2003-07-22 Realtime Data, Llc System and method for lossless data compression and decompression
JP2001014239A (ja) 1999-06-29 2001-01-19 Hitachi Ltd 多重システム並列稼働計算機によるセキュリティシステム
US6463474B1 (en) 1999-07-02 2002-10-08 Cisco Technology, Inc. Local authentication of a client at a network device
US7002986B1 (en) 1999-07-08 2006-02-21 Nortel Networks Limited Mapping arbitrary signals into SONET
US7996296B2 (en) 1999-07-21 2011-08-09 Longitude Llc Digital options having demand-based, adjustable returns, and trading exchange therefor
US6418419B1 (en) 1999-07-23 2002-07-09 5Th Market, Inc. Automated system for conditional order transactions in securities or other items in commerce
GB2352548B (en) 1999-07-26 2001-06-06 Sun Microsystems Inc Method and apparatus for executing standard functions in a computer system
JP3551847B2 (ja) * 1999-08-02 2004-08-11 日本電気株式会社 デジタル放送の録画におけるコンテンツ保護方法
US6870837B2 (en) 1999-08-19 2005-03-22 Nokia Corporation Circuit emulation service over an internet protocol network
DE10085014T1 (de) * 1999-09-20 2003-04-30 Seagate Technology Llc Festplattensystem mit Feldprogrammierbarem Gatter-Array
US6546375B1 (en) 1999-09-21 2003-04-08 Johns Hopkins University Apparatus and method of pricing financial derivatives
US7181424B1 (en) 1999-09-23 2007-02-20 The Nasdaq Stock Market, Inc. Montage for automated market system
US6581098B1 (en) 1999-09-27 2003-06-17 Hewlett-Packard Development Company, L.P. Server providing access to a plurality of functions of a multifunction peripheral in a network
US7251629B1 (en) 1999-10-14 2007-07-31 Edge Capture, Llc Automated trading system in an electronic trading exchange
AU1606201A (en) 1999-11-12 2001-06-06 E-Brain Solutions, Llc Any-to-any component computing system
FI109319B (fi) 1999-12-03 2002-06-28 Nokia Corp Päätelaitteelle välitettävän elektronisen informaation suodattaminen
TW545023B (en) 1999-12-10 2003-08-01 Koninkl Philips Electronics Nv Synchronization of session keys
US6850906B1 (en) 1999-12-15 2005-02-01 Traderbot, Inc. Real-time financial search engine and method
GB9930145D0 (en) * 1999-12-22 2000-02-09 Kean Thomas A Method and apparatus for secure configuration of a field programmable gate array
US6870929B1 (en) 1999-12-22 2005-03-22 Juniper Networks, Inc. High throughput system for encryption and other data operations
JP2001189755A (ja) 1999-12-28 2001-07-10 Toshiba Corp パケット通信装置、パケット通信方法および記憶媒体
US7356498B2 (en) 1999-12-30 2008-04-08 Chicago Board Options Exchange, Incorporated Automated trading exchange system having integrated quote risk monitoring and integrated quote modification services
ATE364866T1 (de) 2000-01-06 2007-07-15 Ibm Verfahren und schaltungen zum schnellen auffinden des minimalen / maximalen wertes in einer menge von zahlen
US20010015753A1 (en) * 2000-01-13 2001-08-23 Myers Kenneth J. Split image stereoscopic system and method
US7184549B2 (en) 2000-01-14 2007-02-27 Mitsubishi Denki Kabushiki Kaisha Method and apparatus for encryption, method and apparatus for decryption, and computer-readable medium storing program
EP1252738A2 (fr) 2000-01-31 2002-10-30 VDG Inc. Procede de chiffrement de blocs et plans permettant une protection de la confidentialite et de l'integrite de donnees
JP3448254B2 (ja) 2000-02-02 2003-09-22 インターナショナル・ビジネス・マシーンズ・コーポレーション アクセス・チェーン追跡システム、ネットワーク・システム、方法、及び記録媒体
US20030191876A1 (en) 2000-02-03 2003-10-09 Fallon James J. Data storewidth accelerator
US20010047473A1 (en) 2000-02-03 2001-11-29 Realtime Data, Llc Systems and methods for computer initialization
US6584601B1 (en) * 2000-02-07 2003-06-24 National Instruments Corporation System and method for converting graphical programs into hardware implementations which utilize probe insertion
US6877044B2 (en) 2000-02-10 2005-04-05 Vicom Systems, Inc. Distributed storage management platform architecture
WO2001061913A2 (fr) 2000-02-18 2001-08-23 Verimatrix, Inc. Systeme de distribution de contenu en reseau
US7228289B2 (en) 2000-03-02 2007-06-05 Trading Technologies International, Inc. System and method for trading and displaying market information in an electronic trading environment
US6772132B1 (en) 2000-03-02 2004-08-03 Trading Technologies International, Inc. Click based trading with intuitive grid display of market depth
US7127424B2 (en) 2000-03-02 2006-10-24 Trading Technologies International, Inc. Click based trading with intuitive grid display of market depth and price consolidation
US20030099254A1 (en) 2000-03-03 2003-05-29 Richter Roger K. Systems and methods for interfacing asynchronous and non-asynchronous data media
US20030093347A1 (en) 2000-03-15 2003-05-15 Gray Dale F. Managing risk using macro-financial risk analysis
JP2001268071A (ja) * 2000-03-16 2001-09-28 Advanced Mobile Telecommunications Security Technology Research Lab Co Ltd 耐タンパー暗号装置
CA2403737C (fr) 2000-03-21 2012-09-25 Ted R. Rittmaster Systeme et procede de distribution d'informations dans un reseau de communications
US7103569B1 (en) 2000-03-24 2006-09-05 Groveman Lloyd A Active account management using volatility arbitrage
US7571130B2 (en) 2002-06-17 2009-08-04 Nyse Alternext Us Llc Hedging exchange traded mutual funds or other portfolio basket products
US7363277B1 (en) 2000-03-27 2008-04-22 International Business Machines Corporation Detecting copyright violation via streamed extraction and signature analysis in a method, system and program
US7099838B1 (en) 2000-03-27 2006-08-29 American Stock Exchange, Llc Hedging exchange traded mutual funds or other portfolio basket products
US7146007B1 (en) * 2000-03-29 2006-12-05 Sony Corporation Secure conditional access port interface
JP4156770B2 (ja) * 2000-03-30 2008-09-24 株式会社東芝 通信装置およびその通信方法
US6711558B1 (en) 2000-04-07 2004-03-23 Washington University Associative database scanning and information retrieval
US7353267B1 (en) 2000-04-07 2008-04-01 Netzero, Inc. Targeted network video download interface
US8095508B2 (en) 2000-04-07 2012-01-10 Washington University Intelligent data storage and processing using FPGA devices
US7139743B2 (en) 2000-04-07 2006-11-21 Washington University Associative database scanning and information retrieval using FPGA devices
US8799138B2 (en) 2000-04-10 2014-08-05 Stikine Technology, Llc Routing control for orders eligible for multiple markets
IL152235A0 (en) 2000-04-13 2003-05-29 Superderivitives Inc A method for pricing financial instruments
WO2001080558A2 (fr) 2000-04-14 2001-10-25 Solidstreaming, Inc. Systeme et procede destine au multimedia en continu
JP4332284B2 (ja) * 2000-04-20 2009-09-16 株式会社日立製作所 記録再生方法及び記録再生装置
US6601094B1 (en) 2000-04-27 2003-07-29 Hewlett-Packard Development Company, L.P. Method and system for recommending an available network protocol
DE60104308T2 (de) 2000-05-26 2005-08-04 Roke Manor Research Ltd., Romsey Rekonfigurationsverwalter
US7685052B2 (en) 2000-06-01 2010-03-23 Pipeline Financial Group, Inc. Confidential block trading system and method
JP2001357048A (ja) * 2000-06-13 2001-12-26 Hitachi Ltd ブロックソート圧縮データの検索方法、および検索に適したブロックソート圧縮法の符号化方法
US20020019812A1 (en) 2000-06-16 2002-02-14 Board Karen Eleanor System and service for receiving, customizing, and re-broadcasting high-speed financial data to users operating wireless network-capable devices
US20040064737A1 (en) 2000-06-19 2004-04-01 Milliken Walter Clark Hash-based systems and methods for detecting and preventing transmission of polymorphic network worms and viruses
US7328349B2 (en) 2001-12-14 2008-02-05 Bbn Technologies Corp. Hash-based systems and methods for detecting, preventing, and tracing network worms and viruses
US7032031B2 (en) 2000-06-23 2006-04-18 Cloudshield Technologies, Inc. Edge adapter apparatus and method
US8204082B2 (en) 2000-06-23 2012-06-19 Cloudshield Technologies, Inc. Transparent provisioning of services over a network
US7305085B2 (en) 2000-06-30 2007-12-04 Kabushiki Kaisha Toshiba Encryption apparatus and method, and decryption apparatus and method based on block encryption
US7089206B2 (en) 2000-06-30 2006-08-08 Ubs Ag Trade allocation
JP3505482B2 (ja) 2000-07-12 2004-03-08 株式会社東芝 暗号化装置、復号装置及び拡大鍵生成装置、拡大鍵生成方法並びに記録媒体
US6956951B2 (en) 2000-07-13 2005-10-18 Fujitsu Limited Extended key preparing apparatus, extended key preparing method, recording medium and computer program
US7177833B1 (en) 2000-07-18 2007-02-13 Edge Capture, Llc Automated trading system in an electronic trading exchange
US20020010825A1 (en) 2000-07-20 2002-01-24 Alex Wilson Memory resource arbitrator for multiple gate arrays
US20030028690A1 (en) 2000-07-20 2003-02-06 John Appleby-Alis System, method and article of manufacture for a reconfigurable hardware-based multimedia device
US20020100029A1 (en) 2000-07-20 2002-07-25 Matt Bowen System, method and article of manufacture for compiling and invoking C functions in hardware
US6381242B1 (en) 2000-08-29 2002-04-30 Netrake Corporation Content processor
US20020069370A1 (en) 2000-08-31 2002-06-06 Infoseer, Inc. System and method for tracking and preventing illegal distribution of proprietary material over computer networks
US6820129B1 (en) 2000-09-22 2004-11-16 Hewlett-Packard Development Company, L.P. System and method of managing network buffers
GB0023409D0 (en) 2000-09-22 2000-11-08 Integrated Silicon Systems Ltd Data encryption apparatus
JP2002108910A (ja) * 2000-09-27 2002-04-12 Nec Soft Ltd 暗号化ファイルシステム及び暗号化ファイル検索方法並びにコンピュータ可読記録媒体
US7417568B2 (en) 2000-10-03 2008-08-26 Realtime Data Llc System and method for data feed acceleration and encryption
US8692695B2 (en) 2000-10-03 2014-04-08 Realtime Data, Llc Methods for encoding and decoding data
US9143546B2 (en) 2000-10-03 2015-09-22 Realtime Data Llc System and method for data feed acceleration and encryption
US7362859B1 (en) 2000-10-06 2008-04-22 Sandia Corporation Enhancement of utilization of encryption engine
US20020072893A1 (en) 2000-10-12 2002-06-13 Alex Wilson System, method and article of manufacture for using a microprocessor emulation in a hardware application with non time-critical functions
US20020069375A1 (en) 2000-10-12 2002-06-06 Matt Bowen System, method, and article of manufacture for data transfer across clock domains
US7065475B1 (en) 2000-10-31 2006-06-20 Goldman Sachs & Co. Modeling option price dynamics
WO2002061525A2 (fr) 2000-11-02 2002-08-08 Pirus Networks Acceleration de tcp/udp
US7760737B2 (en) 2000-11-30 2010-07-20 Audiocodes, Inc. Method for reordering and reassembling data packets in a network
US6815052B2 (en) 2000-12-01 2004-11-09 P1 Diamond, Inc. Filled diamond foam material and method for forming same
US6594316B2 (en) * 2000-12-12 2003-07-15 Scientific-Atlanta, Inc. Method and apparatus for adaptive bit rate control in an asynchronized encoding system
US7142671B2 (en) 2000-12-13 2006-11-28 Broadcom Corporation Methods and apparatus for implementing a cryptography engine
US7178100B2 (en) 2000-12-15 2007-02-13 Call Charles G Methods and apparatus for storing and manipulating variable length and fixed length data elements as a sequence of fixed length integers
US7117280B2 (en) 2000-12-27 2006-10-03 Intel Corporation Network based intra-system communications architecture
WO2002054601A1 (fr) * 2000-12-29 2002-07-11 Morphics Technology, Inc. Processeur codec de voies configurable pour des communications sans fil multiples
US7757278B2 (en) 2001-01-04 2010-07-13 Safenet, Inc. Method and apparatus for transparent encryption
US20030037321A1 (en) 2001-01-29 2003-02-20 Matt Bowen System, method and article of manufacture for extensions in a programming lanauage capable of programming hardware architectures
US20030033588A1 (en) 2001-01-29 2003-02-13 John Alexander System, method and article of manufacture for using a library map to create and maintain IP cores effectively
US20020101425A1 (en) 2001-01-29 2002-08-01 Hammad Hamid System, method and article of manufacture for increased I/O capabilities in a graphics processing framework
US20030028864A1 (en) 2001-01-29 2003-02-06 Matt Bowen System, method and article of manufacture for successive compilations using incomplete parameters
US6691301B2 (en) 2001-01-29 2004-02-10 Celoxica Ltd. System, method and article of manufacture for signal constructs in a programming language capable of programming hardware architectures
US6868265B2 (en) 2001-01-29 2005-03-15 Accelerated Performance, Inc. Locator for physically locating an electronic device in a communication network
US20030023653A1 (en) 2001-01-29 2003-01-30 Andrew Dunlop System, method and article of manufacture for a single-cycle floating point library
US20030105620A1 (en) 2001-01-29 2003-06-05 Matt Bowen System, method and article of manufacture for interface constructs in a programming language capable of programming hardware architetures
US20020180742A1 (en) 2001-01-29 2002-12-05 Hammad Hamid Graphics macros for a frame buffer
US20030033594A1 (en) 2001-01-29 2003-02-13 Matt Bowen System, method and article of manufacture for parameterized expression libraries
US20030074177A1 (en) 2001-01-29 2003-04-17 Matt Bowen System, method and article of manufacture for a simulator plug-in for co-simulation purposes
US20020199173A1 (en) 2001-01-29 2002-12-26 Matt Bowen System, method and article of manufacture for a debugger capable of operating across multiple threads and lock domains
US20030046668A1 (en) 2001-01-29 2003-03-06 Matt Bowen System, method and article of manufacture for distributing IP cores
US7386046B2 (en) 2001-02-13 2008-06-10 Realtime Data Llc Bandwidth sensitive data compression and decompression
US7117370B2 (en) 2001-02-20 2006-10-03 Sal Khan System for transmitting secure data between a sender and a recipient over a computer network using a virtual envelope and method for using the same
US7212495B2 (en) * 2001-02-21 2007-05-01 Polytechnic University Signaling for reserving a communications path
US6847645B1 (en) 2001-02-22 2005-01-25 Cisco Technology, Inc. Method and apparatus for controlling packet header buffer wrap around in a forwarding engine of an intermediate network node
US20030061409A1 (en) 2001-02-23 2003-03-27 Rudusky Daryl System, method and article of manufacture for dynamic, automated product fulfillment for configuring a remotely located device
US20030055770A1 (en) 2001-02-23 2003-03-20 Rudusky Daryl System, method and article of manufacture for an auction-based system for hardware development
US20030055769A1 (en) 2001-02-23 2003-03-20 Rudusky Daryl System, method and article of manufacture for a library-based hardware configuration service
US20030055771A1 (en) 2001-02-23 2003-03-20 Rudusky Daryl System, method and article of manufacture for a reverse-auction-based system for hardware development
US20030028408A1 (en) 2001-02-23 2003-02-06 Rudusky Daryl System, method and article of manufacture for a contractor-based hardware development service
US20030033234A1 (en) 2001-02-23 2003-02-13 Rudusky Daryl System, method and article of manufacture for a hardware configuration service
US20030055658A1 (en) 2001-02-23 2003-03-20 Rudusky Daryl System, method and article of manufacture for dynamic, automated fulfillment of an order for a hardware product
US20030097481A1 (en) 2001-03-01 2003-05-22 Richter Roger K. Method and system for performing packet integrity operations using a data movement engine
US20020166063A1 (en) 2001-03-01 2002-11-07 Cyber Operations, Llc System and method for anti-network terrorism
WO2004012077A1 (fr) * 2001-03-12 2004-02-05 Mercury Computer Systems, Inc. Dispositif de traitement de donnees numeriques, cadre, et procedes pour l'execution d'applications a capacite de configuration dynamique sur des ressources accelerees
US7681032B2 (en) 2001-03-12 2010-03-16 Portauthority Technologies Inc. System and method for monitoring unauthorized transport of digital content
US20030035547A1 (en) 2001-03-27 2003-02-20 John Newton Server with multiple encryption libraries
US20030079060A1 (en) 2001-04-02 2003-04-24 Andrew Dunlop Universal download program for establishing communication with a gate array
EP1490767B1 (fr) 2001-04-05 2014-06-11 Audible Magic Corporation Detection de copyright et systeme et procede de protection
WO2002082267A1 (fr) * 2001-04-06 2002-10-17 Wind River Systems, Inc. Systeme fpga de co-traitement
US6779057B2 (en) * 2001-04-18 2004-08-17 International Business Machines Corporation Method, system, and program for indicating data transmitted to an input/output device as committed
US7325249B2 (en) 2001-04-30 2008-01-29 Aol Llc Identifying unwanted electronic messages
US6785677B1 (en) 2001-05-02 2004-08-31 Unisys Corporation Method for execution of query to search strings of characters that match pattern with a target string utilizing bit vector
US7152151B2 (en) 2002-07-18 2006-12-19 Ge Fanuc Embedded Systems, Inc. Signal processing resource for selective series processing of data in transit on communications paths in multi-processor arrangements
GB0111521D0 (en) 2001-05-11 2001-07-04 Amphion Semiconductor Ltd A component for generating data encryption/decryption apparatus
US7065482B2 (en) 2001-05-17 2006-06-20 International Business Machines Corporation Internet traffic analysis tool
US7558753B2 (en) 2001-05-30 2009-07-07 Morgan Stanley Price improvement crossing system
US6937727B2 (en) 2001-06-08 2005-08-30 Corrent Corporation Circuit and method for implementing the advanced encryption standard block cipher algorithm in a system having a plurality of channels
US7702563B2 (en) 2001-06-11 2010-04-20 Otc Online Partners Integrated electronic exchange of structured contracts with dynamic risk-based transaction permissioning
US7409714B2 (en) 2001-06-13 2008-08-05 Mcafee, Inc. Virtual intrusion detection system and method of using same
US20040218762A1 (en) 2003-04-29 2004-11-04 Eric Le Saint Universal secure messaging for cryptographic modules
US7207041B2 (en) 2001-06-28 2007-04-17 Tranzeo Wireless Technologies, Inc. Open platform architecture for shared resource access management
US20030009411A1 (en) 2001-07-03 2003-01-09 Pranil Ram Interactive grid-based graphical trading system for real time security trading
JP3851115B2 (ja) 2001-06-28 2006-11-29 富士通株式会社 暗号回路
US7149715B2 (en) 2001-06-29 2006-12-12 Goldman Sachs & Co. Method and system for simulating implied volatility surfaces for use in option pricing simulations
US20030167348A1 (en) * 2001-07-02 2003-09-04 Globespanvirata, Inc. Communications system using rings architecture
US20030069723A1 (en) * 2001-07-03 2003-04-10 Datacube, Inc. System to integrate FPGA functions into a pipeline processing environment
US6928549B2 (en) 2001-07-09 2005-08-09 International Business Machines Corporation Dynamic intrusion detection for computer systems
US7845004B2 (en) 2001-07-27 2010-11-30 International Business Machines Corporation Correlating network information and intrusion information to find the entry point of an attack upon a protected computer
US7587476B2 (en) 2001-08-07 2009-09-08 Ricoh Company, Ltd. Peripheral device with a centralized management server, and system, computer program product and method for managing peripheral devices connected to a network
US6980976B2 (en) 2001-08-13 2005-12-27 Oracle International Corp. Combined database index of unstructured and structured columns
US7542867B2 (en) * 2001-08-14 2009-06-02 National Instruments Corporation Measurement system with modular measurement modules that convey interface information
US7013232B2 (en) * 2001-08-15 2006-03-14 National Insurance Corporation Network-based system for configuring a measurement system using configuration information generated based on a user specification
US6931408B2 (en) 2001-08-17 2005-08-16 E.C. Outlook, Inc. Method of storing, maintaining and distributing computer intelligible electronic data
US7046848B1 (en) 2001-08-22 2006-05-16 Olcott Peter L Method and system for recognizing machine generated character glyphs and icons in graphic images
US7133405B2 (en) 2001-08-30 2006-11-07 International Business Machines Corporation IP datagram over multiple queue pairs
GB0121793D0 (en) 2001-09-08 2001-10-31 Amphion Semiconductor Ltd An apparatus for generating encryption/decryption keys
US6941312B1 (en) * 2001-09-10 2005-09-06 At&T Corp. Simultaneous multiple-method (SMm) compression
AU2002220130A1 (en) 2001-09-12 2003-03-24 Raqia Networks, Inc. High speed data stream pattern recognition
US7558967B2 (en) 2001-09-13 2009-07-07 Actel Corporation Encryption for a stream file in an FPGA integrated circuit
US7835966B2 (en) 2001-09-17 2010-11-16 Recognia Inc. Technical analysis formation recognition using pivot points
US7191233B2 (en) 2001-09-17 2007-03-13 Telecommunication Systems, Inc. System for automated, mid-session, user-directed, device-to-device session transfer system
US20030065943A1 (en) 2001-09-28 2003-04-03 Christoph Geis Method and apparatus for recognizing and reacting to denial of service attacks on a computerized network
TW527783B (en) 2001-10-04 2003-04-11 Ind Tech Res Inst Encryption/deciphering device capable of supporting advanced encryption standard
US20030187662A1 (en) 2001-10-04 2003-10-02 Alex Wilson System, method, and article of manufacture for a reconfigurable hardware-based audio decoder
US20030184593A1 (en) 2001-10-09 2003-10-02 Andrew Dunlop System, method and article of manufacture for a user interface for an MP3 audio player
US7801301B2 (en) 2001-10-10 2010-09-21 Stmicroelectronics S.R.L. Method and circuit for data encryption/decryption
US7181765B2 (en) 2001-10-12 2007-02-20 Motorola, Inc. Method and apparatus for providing node security in a router of a packet network
JP2003122442A (ja) * 2001-10-16 2003-04-25 Sony Corp ソフトウェア・ダウンロードシステムのための無線データ通信方法および装置
US7716330B2 (en) 2001-10-19 2010-05-11 Global Velocity, Inc. System and method for controlling transmission of data packets over an information network
WO2003036429A2 (fr) 2001-10-24 2003-05-01 Lee Theodore C Systeme automatique d'information et de negociation concernant un marche financier
US6707973B2 (en) * 2001-11-02 2004-03-16 Alcatel Buffer tube design for easy and reliable access in mid-span
US6577254B2 (en) * 2001-11-14 2003-06-10 Hewlett-Packard Development Company, L.P. Data compression/decompression system
US20030120460A1 (en) 2001-12-21 2003-06-26 Celoxica Ltd. System, method, and article of manufacture for enhanced hardware model profiling
US20030121010A1 (en) 2001-12-21 2003-06-26 Celoxica Ltd. System, method, and article of manufacture for estimating a potential performance of a codesign from an executable specification
US20030140337A1 (en) 2001-12-21 2003-07-24 Celoxica Ltd. System, method, and article of manufacture for data transfer reporting for an application
US20030117971A1 (en) 2001-12-21 2003-06-26 Celoxica Ltd. System, method, and article of manufacture for profiling an executable hardware model using calls to profiling functions
US7116736B2 (en) * 2002-01-02 2006-10-03 International Business Machines Corporation Method, system, and program for synchronization and resynchronization of a data stream
US20030130899A1 (en) 2002-01-08 2003-07-10 Bruce Ferguson System and method for historical database training of non-linear models for use in electronic commerce
US20030149869A1 (en) 2002-02-01 2003-08-07 Paul Gleichauf Method and system for securely storing and trasmitting data by applying a one-time pad
US7454603B2 (en) 2002-02-11 2008-11-18 Intel Corporation Method and system for linking firmware modules in a pre-memory execution environment
US7225188B1 (en) 2002-02-13 2007-05-29 Cisco Technology, Inc. System and method for performing regular expression matching with high parallelism
US20030172017A1 (en) 2002-03-11 2003-09-11 Vincent Feingold High performance multi-dimensional risk engines for enterprise wide market risk management
US20030198345A1 (en) 2002-04-15 2003-10-23 Van Buer Darrel J. Method and apparatus for high speed implementation of data encryption and decryption utilizing, e.g. Rijndael or its subset AES, or other encryption/decryption algorithms having similar key expansion data flow
US20040111632A1 (en) 2002-05-06 2004-06-10 Avner Halperin System and method of virus containment in computer networks
US20030217306A1 (en) 2002-05-17 2003-11-20 Harthcock Jerry D. Self-programmable microcomputer and method of remotely programming same
US7249118B2 (en) 2002-05-17 2007-07-24 Aleri, Inc. Database system and methods
US8027893B1 (en) 2002-05-20 2011-09-27 News Technologies, Llc News induced automated electronic securities transactions
US7277887B1 (en) 2002-05-20 2007-10-02 News Technologies, Llc High-speed term and phrase matching via successive complexity reduction
WO2003100622A1 (fr) 2002-05-22 2003-12-04 Procera Networks Commutateur pour reseau local
US7480253B1 (en) 2002-05-30 2009-01-20 Nortel Networks Limited Ascertaining the availability of communications between devices
US7627693B2 (en) 2002-06-11 2009-12-01 Pandya Ashish A IP storage processor and engine therefor using RDMA
US7631107B2 (en) 2002-06-11 2009-12-08 Pandya Ashish A Runtime adaptable protocol processor
US7415723B2 (en) 2002-06-11 2008-08-19 Pandya Ashish A Distributed network security system and a hardware processor therefor
US8155314B2 (en) * 2002-06-24 2012-04-10 Microsoft Corporation Systems and methods for securing video card output
US7158892B2 (en) * 2002-06-28 2007-01-02 International Business Machines Corporation Genomic messaging system
US7660761B2 (en) 2002-07-17 2010-02-09 Ubs Ag System and method for automated trading
US7478431B1 (en) 2002-08-02 2009-01-13 Symantec Corporation Heuristic detection of computer viruses
US7224185B2 (en) 2002-08-05 2007-05-29 John Campbell System of finite state machines
US7274792B2 (en) 2002-08-09 2007-09-25 Broadcom Corporation Methods and apparatus for initialization vector processing
US7711844B2 (en) 2002-08-15 2010-05-04 Washington University Of St. Louis TCP-splitter: reliable packet monitoring methods and apparatus for high speed networks
US20040034587A1 (en) 2002-08-19 2004-02-19 Amberson Matthew Gilbert System and method for calculating intra-period volatility
US8201252B2 (en) 2002-09-03 2012-06-12 Alcatel Lucent Methods and devices for providing distributed, adaptive IP filtering against distributed denial of service attacks
US7953820B2 (en) 2002-09-11 2011-05-31 Hughes Network Systems, Llc Method and system for providing enhanced performance of web browsing
EP1546930B1 (fr) * 2002-09-18 2015-10-21 IBM International Group BV Processeur de donnees en continu programmable pour appareil a base de donnees presentant plusieurs groupes d'unites de traitement
US7685121B2 (en) 2002-10-10 2010-03-23 Emulex Corporation Structure and method for maintaining ordered linked lists
US7761459B1 (en) 2002-10-15 2010-07-20 Ximpleware, Inc. Processing structured data
US7987341B2 (en) 2002-10-31 2011-07-26 Lockheed Martin Corporation Computing machine using software objects for transferring data that includes no destination information
WO2004042562A2 (fr) 2002-10-31 2004-05-21 Lockheed Martin Corporation Accelerateur pipeline conçu pour une architecture informatique amelioree, et systeme et procede associes
AU2003287320B2 (en) 2002-10-31 2010-12-02 Lockheed Martin Corporation Pipeline accelerator and related system and method
JP4154213B2 (ja) 2002-11-01 2008-09-24 富士通株式会社 パケット処理装置
US7603303B1 (en) 2002-11-26 2009-10-13 Trading Technologies International, Inc. System and method for risk management
JP2004186717A (ja) 2002-11-29 2004-07-02 Toshiba Corp 通信制御方法、サーバ機器、及びクライアント機器
US7260794B2 (en) * 2002-12-20 2007-08-21 Quickturn Design Systems, Inc. Logic multiprocessor for FPGA implementation
US6901461B2 (en) 2002-12-31 2005-05-31 Intel Corporation Hardware assisted ATA command queuing
US20040133854A1 (en) * 2003-01-08 2004-07-08 Black Karl S. Persistent document object model
US7272231B2 (en) 2003-01-27 2007-09-18 International Business Machines Corporation Encrypting data for access by multiple users
US7752117B2 (en) 2003-01-31 2010-07-06 Trading Technologies International, Inc. System and method for money management in electronic trading environment
WO2004072797A2 (fr) 2003-02-07 2004-08-26 Safenet, Inc. Systeme et procede permettant de detecter le debut d'une correspondance d'une expression reguliere
TW591532B (en) 2003-03-07 2004-06-11 Mediatek Inc Firmware structuring method and related apparatus for unifying handling of execution responses of subroutines
US7640201B2 (en) 2003-03-19 2009-12-29 General Electric Company Methods and systems for analytical-based multifactor Multiobjective portfolio risk optimization
US20040186804A1 (en) 2003-03-19 2004-09-23 Anindya Chakraborty Methods and systems for analytical-based multifactor multiobjective portfolio risk optimization
US7593880B2 (en) 2003-03-19 2009-09-22 General Electric Company Methods and systems for analytical-based multifactor multiobjective portfolio risk optimization
US7660352B2 (en) 2003-04-04 2010-02-09 Sony Corporation Apparatus and method of parallel processing an MPEG-4 data stream
US8060755B2 (en) 2003-04-18 2011-11-15 Via Technologies, Inc Apparatus and method for providing user-generated key schedule in a microprocessor cryptographic engine
US7539876B2 (en) 2003-04-18 2009-05-26 Via Technologies, Inc. Apparatus and method for generating a cryptographic key schedule in a microprocessor
US7321910B2 (en) 2003-04-18 2008-01-22 Ip-First, Llc Microprocessor apparatus and method for performing block cipher cryptographic functions
AU2004273406A1 (en) 2003-05-23 2005-03-24 Data Search Systems, Inc. Intelligent data storage and processing using FPGA devices
US7058735B2 (en) 2003-06-02 2006-06-06 Emulex Design & Manufacturing Corporation Method and apparatus for local and distributed data memory access (“DMA”) control
US7420931B2 (en) 2003-06-05 2008-09-02 Nvidia Corporation Using TCP/IP offload to accelerate packet filtering
US7685254B2 (en) 2003-06-10 2010-03-23 Pandya Ashish A Runtime adaptable search processor
US20050108518A1 (en) 2003-06-10 2005-05-19 Pandya Ashish A. Runtime adaptable security processor
US20040267657A1 (en) 2003-06-28 2004-12-30 Global Skyline Llc Method for valuing forwards, futures and options on real estate
US7788726B2 (en) 2003-07-02 2010-08-31 Check Point Software Technologies, Inc. System and methodology providing information lockbox
US7257842B2 (en) 2003-07-21 2007-08-14 Mcafee, Inc. Pre-approval of computer files during a malware detection
US20050033672A1 (en) 2003-07-22 2005-02-10 Credit-Agricole Indosuez System, method, and computer program product for managing financial risk when issuing tender options
US7756782B2 (en) 2003-07-28 2010-07-13 Trading Technologies International, Inc. System and method for improved electronic trading
US7444515B2 (en) 2003-08-14 2008-10-28 Washington University Method and apparatus for detecting predefined signatures in packet payload using Bloom filters
US7222114B1 (en) 2003-08-20 2007-05-22 Xilinx, Inc. Method and apparatus for rule-based operations
US7200837B2 (en) 2003-08-21 2007-04-03 Qst Holdings, Llc System, method and software for static and dynamic programming and configuration of an adaptive computing architecture
US7287037B2 (en) 2003-08-28 2007-10-23 International Business Machines Corporation Method and apparatus for generating service oriented state data mapping between extensible meta-data model and state data including logical abstraction
US20050080649A1 (en) 2003-10-08 2005-04-14 Alvarez Andres C. Systems and methods for automating the capture, organization, and transmission of data
US7408932B2 (en) 2003-10-20 2008-08-05 Intel Corporation Method and apparatus for two-stage packet classification using most specific filter matching and transport level sharing
US10002385B2 (en) 2003-10-28 2018-06-19 Bgc Partners, Inc. Managing the execution of trades between market makers
JP2005140823A (ja) 2003-11-04 2005-06-02 Sony Corp 情報処理装置、制御方法、プログラム、並びに記録媒体
US20050097027A1 (en) 2003-11-05 2005-05-05 Sylvan Kavanaugh Computer-implemented method and electronic system for trading
US7454418B1 (en) 2003-11-07 2008-11-18 Qiang Wang Fast signature scan
US7529703B2 (en) 2003-11-18 2009-05-05 Citigroup Global Markets, Inc. Method and system for artificial neural networks to predict price movements in the financial markets
KR20050053379A (ko) 2003-12-01 2005-06-08 삼성전자주식회사 ＡＥＳ Ｒｉｊｎｄａｅｌ(라인달) 알고리즘을 빠르게구현하는 암호/복호 장치 및 그 방법
US20050216384A1 (en) 2003-12-15 2005-09-29 Daniel Partlow System, method, and computer program for creating and valuing financial instruments linked to real estate indices
US7617291B2 (en) 2003-12-19 2009-11-10 Broadcom Corporation System and method for supporting TCP out-of-order receive data using generic buffer
US7546327B2 (en) 2003-12-22 2009-06-09 Wells Fargo Bank, N.A. Platform independent randomness accumulator for network applications
US7496108B2 (en) 2004-01-07 2009-02-24 International Business Machines Corporation Method for dynamic management of TCP reassembly buffers
US7386564B2 (en) 2004-01-15 2008-06-10 International Business Machines Corporation Generating statistics on text pattern matching predicates for access planning
US7019674B2 (en) 2004-02-05 2006-03-28 Nec Laboratories America, Inc. Content-based information retrieval architecture
US7697681B2 (en) 2004-02-06 2010-04-13 Nortel Networks Limited Parallelizable integrity-aware encryption technique
US7433355B2 (en) 2004-02-09 2008-10-07 Alcatel Lucent Filter based longest prefix match algorithm
US7602785B2 (en) 2004-02-09 2009-10-13 Washington University Method and system for performing longest prefix matching for network address lookup using bloom filters
US7469228B2 (en) 2004-02-20 2008-12-23 General Electric Company Systems and methods for efficient frontier supplementation in multi-objective portfolio analysis
US7630928B2 (en) 2004-02-20 2009-12-08 General Electric Company Systems and methods for multi-objective portfolio analysis and decision-making using visualization techniques
US8311974B2 (en) 2004-02-20 2012-11-13 Oracle International Corporation Modularized extraction, transformation, and loading for a database
US7542932B2 (en) 2004-02-20 2009-06-02 General Electric Company Systems and methods for multi-objective portfolio optimization
US8219477B2 (en) 2004-02-20 2012-07-10 General Electric Company Systems and methods for multi-objective portfolio analysis using pareto sorting evolutionary algorithms
US8126795B2 (en) 2004-02-20 2012-02-28 General Electric Company Systems and methods for initial sampling in multi-objective portfolio analysis
US20050187845A1 (en) 2004-02-20 2005-08-25 Eklund Neil Holger W. Systems and methods for multi-objective portfolio analysis using dominance filtering
US8549177B2 (en) 2004-03-02 2013-10-01 Divinetworks Ltd. Communication server, method and systems, for reducing transportation volumes over communication networks
US7711628B2 (en) 2004-03-05 2010-05-04 Cantor Index Llc System and method for offering intraday wagering in a financial market environment
US7835961B2 (en) 2004-03-05 2010-11-16 Cantor Index Llc System and method for wagering in a financial market environment
US20050197938A1 (en) 2004-03-05 2005-09-08 Cantor Index Llc System and method for determining odds for wagering in a financial market environment
US7411957B2 (en) 2004-03-26 2008-08-12 Cisco Technology, Inc. Hardware filtering support for denial-of-service attacks
US7966658B2 (en) 2004-04-08 2011-06-21 The Regents Of The University Of California Detecting public network attacks using signatures and fast content analysis
US7756033B2 (en) 2004-05-03 2010-07-13 Verizon Business Global Llc Systems and methods for managing multicast data transmissions
US7305383B1 (en) 2004-06-10 2007-12-04 Cisco Technology, Inc. Processing system using bitmap array to compress deterministic finite automation state table allowing direct indexing
US7555449B2 (en) 2004-06-18 2009-06-30 Sap Ag System and method for updating stop loss orders
US7693856B2 (en) 2004-06-25 2010-04-06 Apple Inc. Methods and systems for managing data
US7623660B1 (en) 2004-07-20 2009-11-24 Xilinx, Inc. Method and system for pipelined decryption
US8200568B2 (en) 2004-07-21 2012-06-12 Bgc Partners, Inc. System and method for managing trading orders received from market makers
US7577605B2 (en) 2004-08-04 2009-08-18 Bgc Partners, Inc. System and method for managing trading using alert messages for outlying trading orders
US7529707B2 (en) 2004-08-04 2009-05-05 Bgc Partners, Inc. System and method for managing trading using alert messages for outlying trading orders
US7660865B2 (en) 2004-08-12 2010-02-09 Microsoft Corporation Spam filtering with probabilistic secure hashes
WO2006023948A2 (fr) 2004-08-24 2006-03-02 Washington University Procedes et systemes de detection de contenu dans un materiel reconfigurable
US7428508B2 (en) 2004-09-10 2008-09-23 Chicago Mercantile Exchange System and method for hybrid spreading for risk management
US7509275B2 (en) 2004-09-10 2009-03-24 Chicago Mercantile Exchange Inc. System and method for asymmetric offsets in a risk management system
US8849711B2 (en) 2004-09-10 2014-09-30 Chicago Mercantile Exchange Inc. System and method for displaying a combined trading and risk management GUI display
US7426487B2 (en) 2004-09-10 2008-09-16 Chicago Mercantile Exchange, Inc. System and method for efficiently using collateral for risk offset
US7593877B2 (en) 2004-09-10 2009-09-22 Chicago Mercantile Exchange, Inc. System and method for hybrid spreading for flexible spread participation
US7430539B2 (en) 2004-09-10 2008-09-30 Chicago Mercantile Exchange System and method of margining fixed payoff products
JP2008512786A (ja) 2004-09-10 2008-04-24 カビウム・ネットワークス データ構造の選択的複製方法および装置
US20060143099A1 (en) 2004-09-23 2006-06-29 Daniel Partlow System, method, and computer program for creating and valuing financial insturments linked to average credit spreads
US7606267B2 (en) 2004-12-10 2009-10-20 Cisco Technology, Inc. Reducing the sizes of application layer messages in a network element
AU2006221023A1 (en) 2005-03-03 2006-09-14 Washington University Method and apparatus for performing biosequence similarity searching
US7101188B1 (en) 2005-03-30 2006-09-05 Intel Corporation Electrical edge connector adaptor
US7487327B1 (en) 2005-06-01 2009-02-03 Sun Microsystems, Inc. Processor and method for device-specific memory address translation
US7715436B1 (en) 2005-11-18 2010-05-11 Chelsio Communications, Inc. Method for UDP transmit protocol offload processing with traffic management
US7760733B1 (en) 2005-10-13 2010-07-20 Chelsio Communications, Inc. Filtering ingress packets in network interface circuitry
WO2007061857A2 (fr) 2005-11-18 2007-05-31 Chicago Mercantile Exchange Gestion des risques de cotations multiples
US7702629B2 (en) 2005-12-02 2010-04-20 Exegy Incorporated Method and device for high performance regular expression pattern matching
US7954114B2 (en) 2006-01-26 2011-05-31 Exegy Incorporated Firmware socket module for FPGA-based pipeline processing
WO2007121035A2 (fr) 2006-03-23 2007-10-25 Exegy Incorporated Procede et systeme de chiffrement/dechiffrement independant des blocs a grande capacite
US7840482B2 (en) 2006-06-19 2010-11-23 Exegy Incorporated Method and system for high speed options pricing
US7921046B2 (en) 2006-06-19 2011-04-05 Exegy Incorporated High speed processing of financial information using FPGA devices
WO2008022036A2 (fr) 2006-08-10 2008-02-21 Washington University procédé et appareil pour alignement de séquence de protéine utilisant des dispositifs FPGA
US20080189251A1 (en) * 2006-08-25 2008-08-07 Jeremy Branscome Processing elements of a hardware accelerated reconfigurable processor for accelerating database operations and queries
US8326819B2 (en) 2006-11-13 2012-12-04 Exegy Incorporated Method and system for high performance data metatagging and data indexing using coprocessors
US7660793B2 (en) 2006-11-13 2010-02-09 Exegy Incorporated Method and system for high performance integration, processing and searching of structured and unstructured data using coprocessors
US7827190B2 (en) 2006-12-08 2010-11-02 Pandya Ashish A Complex symbol evaluation for programmable intelligent search memory
US7996348B2 (en) 2006-12-08 2011-08-09 Pandya Ashish A 100GBPS security and search architecture using programmable intelligent search memory (PRISM) that comprises one or more bit interval counters
US7890692B2 (en) 2007-08-17 2011-02-15 Pandya Ashish A FSA context switch architecture for programmable intelligent search memory
WO2008073824A1 (fr) 2006-12-08 2008-06-19 Pandya Ashish A Mémoire de recherche intelligente, programmable et dynamique
US7831720B1 (en) 2007-05-17 2010-11-09 Chelsio Communications, Inc. Full offload of stateful connections, with partial connection offload
US8030888B2 (en) 2007-08-13 2011-10-04 Pandya Ravi A Wireless charging system for vehicles
WO2009029842A1 (fr) 2007-08-31 2009-03-05 Exegy Incorporated Procédé et appareil pour un chiffrement/déchiffrement accéléré par voie matérielle
US10229453B2 (en) 2008-01-11 2019-03-12 Ip Reservoir, Llc Method and system for low latency basket calculation
US8374986B2 (en) 2008-05-15 2013-02-12 Exegy Incorporated Method and system for accelerated stream processing
CA3184014A1 (fr) 2008-12-15 2010-07-08 Exegy Incorporated Procede et appareil de traitement a grande vitesse de donnees de profondeur de marche financier
US10650452B2 (en) 2012-03-27 2020-05-12 Ip Reservoir, Llc Offload processing of data packets
US20140180904A1 (en) 2012-03-27 2014-06-26 Ip Reservoir, Llc Offload Processing of Data Packets Containing Financial Market Data
US9990393B2 (en) 2012-03-27 2018-06-05 Ip Reservoir, Llc Intelligent feed switch
US11436672B2 (en) 2012-03-27 2022-09-06 Exegy Incorporated Intelligent switch for processing financial market data
US10121196B2 (en) 2012-03-27 2018-11-06 Ip Reservoir, Llc Offload processing of data packets containing financial market data

Patent Citations (99)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3601808A (en) * 1968-07-18 1971-08-24 Bell Telephone Labor Inc Advanced keyword associative access memory system
US3611314A (en) * 1969-09-09 1971-10-05 Texas Instruments Inc Dynamic associative data processing system
US3824375A (en) * 1970-08-28 1974-07-16 Financial Security Syst Inc Memory system
US3729712A (en) * 1971-02-26 1973-04-24 Eastman Kodak Co Information storage and retrieval system
US3848235A (en) * 1973-10-24 1974-11-12 Ibm Scan and read control apparatus for a disk storage drive in a computer system
US3906455A (en) * 1974-03-15 1975-09-16 Boeing Computer Services Inc Associative memory device
US4081607A (en) * 1975-04-02 1978-03-28 Rockwell International Corporation Keyword detection in continuous speech using continuous asynchronous correlation
US4298898A (en) * 1979-04-19 1981-11-03 Compagnie Internationale Pour L'informatique Cii Honeywell Bull Method of and apparatus for reading data from reference zones of a memory
US4314356A (en) * 1979-10-24 1982-02-02 Bunker Ramo Corporation High-speed term searcher
US4385393A (en) * 1980-04-21 1983-05-24 L'etat Francais Represente Par Le Secretaire D'etat Adaptive prediction differential PCM-type transmission apparatus and process with shaping of the quantization noise
US4464718A (en) * 1982-07-30 1984-08-07 International Business Machines Corporation Associative file processing method and apparatus
US4550436A (en) * 1983-07-26 1985-10-29 At&T Bell Laboratories Parallel text matching methods and apparatus
US4941178A (en) * 1986-04-01 1990-07-10 Gte Laboratories Incorporated Speech recognition using preclassification and spectral normalization
US4823306A (en) * 1987-08-14 1989-04-18 International Business Machines Corporation Text search system
US5023910A (en) * 1988-04-08 1991-06-11 At&T Bell Laboratories Vector quantization in a harmonic speech coding arrangement
US5179626A (en) * 1988-04-08 1993-01-12 At&T Bell Laboratories Harmonic speech coding arrangement where a set of parameters for a continuous magnitude spectrum is determined by a speech analyzer and the parameters are used by a synthesizer to determine a spectrum which is used to determine senusoids for synthesis
US5050075A (en) * 1988-10-04 1991-09-17 Bell Communications Research, Inc. High performance VLSI data filter
US5249292A (en) * 1989-03-31 1993-09-28 Chiappa J Noel Data packet switch using a primary processing unit to designate one of a plurality of data stream control circuits to selectively handle the header processing of incoming packets in one data packet stream
US5140692A (en) * 1989-06-13 1992-08-18 Ricoh Company, Ltd. Document retrieval system using analog signal comparisons for retrieval conditions including relevant keywords
US5781772A (en) * 1989-07-12 1998-07-14 Digital Equipment Corporation Compressed prefix matching database searching
US5163131A (en) * 1989-09-08 1992-11-10 Auspex Systems, Inc. Parallel i/o network file server architecture
US5243655A (en) * 1990-01-05 1993-09-07 Symbol Technologies Inc. System for encoding and decoding data in machine readable graphic form
US5347634A (en) * 1990-03-15 1994-09-13 Hewlett-Packard Company System and method for directly executing user DMA instruction from user controlled process by employing processor privileged work buffer pointers
US5319776A (en) * 1990-04-19 1994-06-07 Hilgraeve Corporation In transit detection of computer virus with safeguard
US5497488A (en) * 1990-06-12 1996-03-05 Hitachi, Ltd. System for parallel string search with a function-directed parallel collation of a first partition of each string followed by matching of second partitions
US5396253A (en) * 1990-07-25 1995-03-07 British Telecommunications Plc Speed estimation
US5255136A (en) * 1990-08-17 1993-10-19 Quantum Corporation High capacity submicro-winchester fixed disk drive
US5101424A (en) * 1990-09-28 1992-03-31 Northern Telecom Limited Method for generating a monitor program for monitoring text streams and executing actions when pre-defined patterns, are matched using an English to AWK language translator
US5226165A (en) * 1990-10-24 1993-07-06 International Computers Limited Database search processor for real-time adaptive searching based on request and data structure
US5339411A (en) * 1990-12-21 1994-08-16 Pitney Bowes Inc. Method for managing allocation of memory space
US5421028A (en) * 1991-03-15 1995-05-30 Hewlett-Packard Company Processing commands and data in a common pipeline path in a high-speed computer graphics system
US5546578A (en) * 1991-04-25 1996-08-13 Nippon Steel Corporation Data base retrieval system utilizing stored vicinity feature values
US5805832A (en) * 1991-07-25 1998-09-08 International Business Machines Corporation System for parametric text to text language translation
US5265065A (en) * 1991-10-08 1993-11-23 West Publishing Company Method and apparatus for information retrieval from a database by replacing domain specific stemmed phases in a natural language to create a search query
US5488725A (en) * 1991-10-08 1996-01-30 West Publishing Company System of document representation retrieval by successive iterated probability sampling
US5826075A (en) * 1991-10-16 1998-10-20 International Business Machines Corporation Automated programmable fireware store for a personal computer system
US5327521A (en) * 1992-03-02 1994-07-05 The Walt Disney Company Speech transformation system
US5388259A (en) * 1992-05-15 1995-02-07 Bell Communications Research, Inc. System for accessing a database with an iterated fuzzy query notified by retrieval response
US5740466A (en) * 1992-06-26 1998-04-14 Cirrus Logic, Inc. Flexible processor-driven SCSI controller with buffer memory and local processor memory coupled via separate buses
US5418951A (en) * 1992-08-20 1995-05-23 The United States Of America As Represented By The Director Of National Security Agency Method of retrieving documents that concern the same topic
US5721898A (en) * 1992-09-02 1998-02-24 International Business Machines Corporation Method and system for data search in a data processing system
US6044407A (en) * 1992-11-13 2000-03-28 British Telecommunications Public Limited Company Interface for translating an information message from one protocol to another
US5481735A (en) * 1992-12-28 1996-01-02 Apple Computer, Inc. Method for modifying packets that meet a particular criteria as the packets pass between two layers in a network
US5440723A (en) * 1993-01-19 1995-08-08 International Business Machines Corporation Automatic immune system for computers and computer networks
US5432822A (en) * 1993-03-12 1995-07-11 Hughes Aircraft Company Error correcting decoder and decoding method employing reliability based erasure decision-making in cellular communication system
US5740244A (en) * 1993-04-09 1998-04-14 Washington University Method and apparatus for improved fingerprinting and authenticating various magnetic media
US5544352A (en) * 1993-06-14 1996-08-06 Libertech, Inc. Method and apparatus for indexing, searching and displaying data
US5651125A (en) * 1993-10-29 1997-07-22 Advanced Micro Devices, Inc. High performance superscalar microprocessor including a common reorder buffer and common register file for both integer and floating point operations
US5371794A (en) * 1993-11-02 1994-12-06 Sun Microsystems, Inc. Method and apparatus for privacy and authentication in wireless networks
USRE36946E (en) * 1993-11-02 2000-11-07 Sun Microsystems, Inc. Method and apparatus for privacy and authentication in wireless networks
US5813000A (en) * 1994-02-15 1998-09-22 Sun Micro Systems B tree structure and method
US5465353A (en) * 1994-04-01 1995-11-07 Ricoh Company, Ltd. Image matching and retrieval by multi-access redundant hashing
US5461712A (en) * 1994-04-18 1995-10-24 International Business Machines Corporation Quadrant-based two-dimensional memory manager
US5819273A (en) * 1994-07-25 1998-10-06 Apple Computer, Inc. Method and apparatus for searching for information in a network and for controlling the display of searchable information on display devices in the network
US5884286A (en) * 1994-07-29 1999-03-16 Daughtery, Iii; Vergil L. Apparatus and process for executing an expirationless option transaction
US5774835A (en) * 1994-08-22 1998-06-30 Nec Corporation Method and apparatus of postfiltering using a first spectrum parameter of an encoded sound signal and a second spectrum parameter of a lesser degree than the first spectrum parameter
US5943429A (en) * 1995-01-30 1999-08-24 Telefonaktiebolaget Lm Ericsson Spectral subtraction noise suppression method
US5819290A (en) * 1995-04-10 1998-10-06 Sony Corporation Data recording and management system and method for detecting data file division based on quantitative number of blocks
US5943421A (en) * 1995-09-11 1999-08-24 Norand Corporation Processor having compression and encryption circuitry
US5913211A (en) * 1995-09-14 1999-06-15 Fujitsu Limited Database searching method and system using retrieval data set display screen
US5701464A (en) * 1995-09-15 1997-12-23 Intel Corporation Parameterized bloom filters
US6134551A (en) * 1995-09-15 2000-10-17 Intel Corporation Method of caching digital certificate revocation lists
US5774839A (en) * 1995-09-29 1998-06-30 Rockwell International Corporation Delayed decision switched prediction multi-stage LSF vector quantization
US5864738A (en) * 1996-03-13 1999-01-26 Cray Research, Inc. Massively parallel processing system using two data paths: one connecting router circuit to the interconnect network and the other connecting router circuit to I/O controller
US5781921A (en) * 1996-05-06 1998-07-14 Ohmeda Inc. Method and apparatus to effect firmware upgrades using a removable memory device under software control
US6023760A (en) * 1996-06-22 2000-02-08 Xerox Corporation Modifying an input string partitioned in accordance with directionality and length constraints
US6147976A (en) * 1996-06-24 2000-11-14 Cabletron Systems, Inc. Fast network layer packet filter
US5995963A (en) * 1996-06-27 1999-11-30 Fujitsu Limited Apparatus and method of multi-string matching based on sparse state transition list
US6064739A (en) * 1996-09-30 2000-05-16 Intel Corporation System and method for copy-protecting distributed video content
US5991881A (en) * 1996-11-08 1999-11-23 Harris Corporation Network surveillance system
US5978801A (en) * 1996-11-21 1999-11-02 Sharp Kabushiki Kaisha Character and/or character-string retrieving method and storage medium for use for this method
US6073160A (en) * 1996-12-18 2000-06-06 Xerox Corporation Document communications controller
US6028939A (en) * 1997-01-03 2000-02-22 Redcreek Communications, Inc. Data security system and method
US6070172A (en) * 1997-03-06 2000-05-30 Oracle Corporation On-line free space defragmentation of a contiguous-file file system
US5930753A (en) * 1997-03-20 1999-07-27 At&T Corp Combining frequency warping and spectral shaping in HMM based speech recognition
US6175874B1 (en) * 1997-07-03 2001-01-16 Fujitsu Limited Packet relay control method packet relay device and program memory medium
US6067569A (en) * 1997-07-10 2000-05-23 Microsoft Corporation Fast-forwarding and filtering of network packets in a computer system
US6006264A (en) * 1997-08-01 1999-12-21 Arrowpoint Communications, Inc. Method and system for directing a flow between a client and a server
US6061662A (en) * 1997-08-15 2000-05-09 Options Technology Company, Inc. Simulation method and system for the valuation of derivative financial instruments
US6173276B1 (en) * 1997-08-21 2001-01-09 Scicomp, Inc. System and method for financial instrument modeling and valuation
US6138176A (en) * 1997-11-14 2000-10-24 3Ware Disk array controller with automated processor which routes I/O data according to addresses and commands received from disk drive controllers
US6105067A (en) * 1998-06-05 2000-08-15 International Business Machines Corp. Connection pool management for backend servers using common interface
US6169969B1 (en) * 1998-08-07 2001-01-02 The United States Of America As Represented By The Director Of The National Security Agency Device and method for full-text large-dictionary string matching using n-gram hashing
US6765918B1 (en) * 1999-06-16 2004-07-20 Teledata Networks, Ltd. Client/server based architecture for a telecommunications network
US6886103B1 (en) * 1999-10-28 2005-04-26 Lucent Technologies Inc. Method and apparatus for extending network address translation for unsupported protocols
US6804667B1 (en) * 1999-11-30 2004-10-12 Ncr Corporation Filter for checking for duplicate entries in database
US6981054B1 (en) * 2000-06-06 2005-12-27 Advanced Micro Devices, Inc. Flow control arrangement in a network switch based on priority traffic
US6931545B1 (en) * 2000-08-28 2005-08-16 Contentguard Holdings, Inc. Systems and methods for integrity certification and verification of content consumption environments
US6807156B1 (en) * 2000-11-07 2004-10-19 Telefonaktiebolaget Lm Ericsson (Publ) Scalable real-time quality of service monitoring and analysis of service dependent subscriber satisfaction in IP networks
US20020103663A1 (en) * 2001-02-01 2002-08-01 John Bankier Highly available transaction failure detection and recovery for electronic commerce transactions
US20020150248A1 (en) * 2001-03-06 2002-10-17 Kovacevic Branko D. System for digital stream reception via memory buffer and method thereof
US6944168B2 (en) * 2001-05-04 2005-09-13 Slt Logic Llc System and method for providing transformation of multi-protocol packets in a data stream
US6978223B2 (en) * 2001-09-06 2005-12-20 Bbnt Solutions Llc Systems and methods for network performance measurement using packet signature collection
US6772345B1 (en) * 2002-02-08 2004-08-03 Networks Associates Technology, Inc. Protocol-level malware scanner
US20030169877A1 (en) * 2002-03-05 2003-09-11 Liu Fang-Cheng Pipelined engine for encryption/authentication in IPSEC
US7093023B2 (en) * 2002-05-21 2006-08-15 Washington University Methods, systems, and devices using reprogrammable hardware for high-speed processing of streaming data to find a redefinable pattern and respond thereto
US7167980B2 (en) * 2002-05-30 2007-01-23 Intel Corporation Data comparison process
US20040117645A1 (en) * 2002-06-28 2004-06-17 Nobukatsu Okuda Information reproducing apparatus
US20060059213A1 (en) * 2002-12-18 2006-03-16 Koninklijke Philips Electronics N.V. Dedicated encrypted virtual channel in a multi-channel serial communications interface

Cited By (316)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8549024B2 (en) 2000-04-07 2013-10-01 Ip Reservoir, Llc Method and apparatus for adjustable data matching
US8131697B2 (en) 2000-04-07 2012-03-06 Washington University Method and apparatus for approximate matching where programmable logic is used to process data being written to a mass storage medium and process data being read from a mass storage medium
US8095508B2 (en) 2000-04-07 2012-01-10 Washington University Intelligent data storage and processing using FPGA devices
US9020928B2 (en) 2000-04-07 2015-04-28 Ip Reservoir, Llc Method and apparatus for processing streaming data using programmable logic
US20080114760A1 (en) * 2000-04-07 2008-05-15 Indeck Ronald S Method and Apparatus for Approximate Matching of Image Data
US20080126320A1 (en) * 2000-04-07 2008-05-29 Indeck Ronald S Method and Apparatus for Approximate Matching Where Programmable Logic Is Used to Process Data Being Written to a Mass Storage Medium and Process Data Being Read from a Mass Storage Medium
US7949650B2 (en) 2000-04-07 2011-05-24 Washington University Associative database scanning and information retrieval
US7680790B2 (en) 2000-04-07 2010-03-16 Washington University Method and apparatus for approximate matching of DNA sequences
US7552107B2 (en) 2000-04-07 2009-06-23 Washington University Associative database scanning and information retrieval
US7953743B2 (en) 2000-04-07 2011-05-31 Washington University Associative database scanning and information retrieval
US20030110229A1 (en) * 2001-10-19 2003-06-12 Kulig Matthew P. System and method for controlling transmission of data packets over an information network
US7716330B2 (en) 2001-10-19 2010-05-11 Global Velocity, Inc. System and method for controlling transmission of data packets over an information network
US10909623B2 (en) 2002-05-21 2021-02-02 Ip Reservoir, Llc Method and apparatus for processing financial information at hardware speeds using FPGA devices
US8069102B2 (en) 2002-05-21 2011-11-29 Washington University Method and apparatus for processing financial information at hardware speeds using FPGA devices
US7711844B2 (en) 2002-08-15 2010-05-04 Washington University Of St. Louis TCP-splitter: reliable packet monitoring methods and apparatus for high speed networks
US11275594B2 (en) 2003-05-23 2022-03-15 Ip Reservoir, Llc Intelligent data storage and processing using FPGA devices
US10572824B2 (en) 2003-05-23 2020-02-25 Ip Reservoir, Llc System and method for low latency multi-functional pipeline with correlation logic and selectively activated/deactivated pipelined data processing engines
US8751452B2 (en) 2003-05-23 2014-06-10 Ip Reservoir, Llc Intelligent data storage and processing using FPGA devices
US8768888B2 (en) 2003-05-23 2014-07-01 Ip Reservoir, Llc Intelligent data storage and processing using FPGA devices
US9176775B2 (en) 2003-05-23 2015-11-03 Ip Reservoir, Llc Intelligent data storage and processing using FPGA devices
US10929152B2 (en) 2003-05-23 2021-02-23 Ip Reservoir, Llc Intelligent data storage and processing using FPGA devices
US10346181B2 (en) 2003-05-23 2019-07-09 Ip Reservoir, Llc Intelligent data storage and processing using FPGA devices
US8620881B2 (en) 2003-05-23 2013-12-31 Ip Reservoir, Llc Intelligent data storage and processing using FPGA devices
US10719334B2 (en) 2003-05-23 2020-07-21 Ip Reservoir, Llc Intelligent data storage and processing using FPGA devices
US9898312B2 (en) 2003-05-23 2018-02-20 Ip Reservoir, Llc Intelligent data storage and processing using FPGA devices
US7602785B2 (en) 2004-02-09 2009-10-13 Washington University Method and system for performing longest prefix matching for network address lookup using bloom filters
US20060085643A1 (en) * 2004-10-20 2006-04-20 Oracle International Corporation Key-exchange protocol using a password-derived prime
US7764795B2 (en) * 2004-10-20 2010-07-27 Oracle International Corporation Key-exchange protocol using a password-derived prime
US20060167748A1 (en) * 2005-01-25 2006-07-27 Joachim Hartmann Public/private campaign management for an internet sales application
US10580518B2 (en) 2005-03-03 2020-03-03 Washington University Method and apparatus for performing similarity searching
US8515682B2 (en) 2005-03-03 2013-08-20 Washington University Method and apparatus for performing similarity searching
US10957423B2 (en) 2005-03-03 2021-03-23 Washington University Method and apparatus for performing similarity searching
US7917299B2 (en) 2005-03-03 2011-03-29 Washington University Method and apparatus for performing similarity searching on a data stream with respect to a query string
US9547680B2 (en) 2005-03-03 2017-01-17 Washington University Method and apparatus for performing similarity searching
US10924483B2 (en) 2005-04-27 2021-02-16 Xilinx, Inc. Packet validation in virtual network interface architecture
US9912665B2 (en) 2005-04-27 2018-03-06 Solarflare Communications, Inc. Packet validation in virtual network interface architecture
US7945528B2 (en) 2005-12-02 2011-05-17 Exegy Incorporated Method and device for high performance regular expression pattern matching
US7702629B2 (en) 2005-12-02 2010-04-20 Exegy Incorporated Method and device for high performance regular expression pattern matching
US7954114B2 (en) 2006-01-26 2011-05-31 Exegy Incorporated Firmware socket module for FPGA-based pipeline processing
US8020006B2 (en) * 2006-02-10 2011-09-13 Cisco Technology, Inc. Pipeline for high-throughput encrypt functions
US20070195951A1 (en) * 2006-02-10 2007-08-23 Cisco Technology, Inc. Pipeline for high-throughput encrypt functions
US20220309910A1 (en) * 2006-02-21 2022-09-29 Universal Electronics Inc. Codeset communication format and related methods and structures
US10490064B2 (en) * 2006-02-21 2019-11-26 Universal Electronics Inc. Codeset communication format and related methods and structures
US11657703B2 (en) * 2006-02-21 2023-05-23 Universal Electronics Inc. Codeset communication format and related methods and structures
US20200051425A1 (en) * 2006-02-21 2020-02-13 Universal Electronics Inc. Codeset communication format and related methods and structures
US20190147735A1 (en) * 2006-02-21 2019-05-16 Universal Electronics Inc. Codeset communication format and related methods and structures
US11961391B2 (en) * 2006-02-21 2024-04-16 Universal Electronics Inc. Codeset communication format and related methods and structures
US8379841B2 (en) 2006-03-23 2013-02-19 Exegy Incorporated Method and system for high throughput blockwise independent encryption/decryption
US8983063B1 (en) 2006-03-23 2015-03-17 Ip Reservoir, Llc Method and system for high throughput blockwise independent encryption/decryption
US8737606B2 (en) 2006-03-23 2014-05-27 Ip Reservoir, Llc Method and system for high throughput blockwise independent encryption/decryption
US7636703B2 (en) 2006-05-02 2009-12-22 Exegy Incorporated Method and apparatus for approximate pattern matching
US10817945B2 (en) 2006-06-19 2020-10-27 Ip Reservoir, Llc System and method for routing of streaming data as between multiple compute resources
US8407122B2 (en) 2006-06-19 2013-03-26 Exegy Incorporated High speed processing of financial information using FPGA devices
US8478680B2 (en) 2006-06-19 2013-07-02 Exegy Incorporated High speed processing of financial information using FPGA devices
US7921046B2 (en) 2006-06-19 2011-04-05 Exegy Incorporated High speed processing of financial information using FPGA devices
US8595104B2 (en) 2006-06-19 2013-11-26 Ip Reservoir, Llc High speed processing of financial information using FPGA devices
US8600856B2 (en) 2006-06-19 2013-12-03 Ip Reservoir, Llc High speed processing of financial information using FPGA devices
US7840482B2 (en) 2006-06-19 2010-11-23 Exegy Incorporated Method and system for high speed options pricing
US9582831B2 (en) 2006-06-19 2017-02-28 Ip Reservoir, Llc High speed processing of financial information using FPGA devices
US8458081B2 (en) 2006-06-19 2013-06-04 Exegy Incorporated High speed processing of financial information using FPGA devices
US8626624B2 (en) 2006-06-19 2014-01-07 Ip Reservoir, Llc High speed processing of financial information using FPGA devices
US8655764B2 (en) 2006-06-19 2014-02-18 Ip Reservoir, Llc High speed processing of financial information using FPGA devices
US11182856B2 (en) 2006-06-19 2021-11-23 Exegy Incorporated System and method for routing of streaming data as between multiple compute resources
US12056767B2 (en) 2006-06-19 2024-08-06 Exegy Incorporated System and method for distributed data processing across multiple compute resources
US10504184B2 (en) 2006-06-19 2019-12-10 Ip Reservoir, Llc Fast track routing of streaming data as between multiple compute resources
US10467692B2 (en) 2006-06-19 2019-11-05 Ip Reservoir, Llc High speed processing of financial information using FPGA devices
US9672565B2 (en) 2006-06-19 2017-06-06 Ip Reservoir, Llc High speed processing of financial information using FPGA devices
US9916622B2 (en) 2006-06-19 2018-03-13 Ip Reservoir, Llc High speed processing of financial information using FPGA devices
US10360632B2 (en) 2006-06-19 2019-07-23 Ip Reservoir, Llc Fast track routing of streaming data using FPGA devices
US10169814B2 (en) 2006-06-19 2019-01-01 Ip Reservoir, Llc High speed processing of financial information using FPGA devices
US8843408B2 (en) 2006-06-19 2014-09-23 Ip Reservoir, Llc Method and system for high speed options pricing
US20080183688A1 (en) * 2006-08-25 2008-07-31 Chamdani Joseph I Methods and systems for hardware acceleration of database operations and queries
US8244718B2 (en) * 2006-08-25 2012-08-14 Teradata Us, Inc. Methods and systems for hardware acceleration of database operations and queries
US9396222B2 (en) 2006-11-13 2016-07-19 Ip Reservoir, Llc Method and system for high performance integration, processing and searching of structured and unstructured data using coprocessors
US9323794B2 (en) 2006-11-13 2016-04-26 Ip Reservoir, Llc Method and system for high performance pattern indexing
US11449538B2 (en) 2006-11-13 2022-09-20 Ip Reservoir, Llc Method and system for high performance integration, processing and searching of structured and unstructured data
US8880501B2 (en) 2006-11-13 2014-11-04 Ip Reservoir, Llc Method and system for high performance integration, processing and searching of structured and unstructured data using coprocessors
US8326819B2 (en) 2006-11-13 2012-12-04 Exegy Incorporated Method and system for high performance data metatagging and data indexing using coprocessors
US10191974B2 (en) 2006-11-13 2019-01-29 Ip Reservoir, Llc Method and system for high performance integration, processing and searching of structured and unstructured data
US7660793B2 (en) 2006-11-13 2010-02-09 Exegy Incorporated Method and system for high performance integration, processing and searching of structured and unstructured data using coprocessors
US8156101B2 (en) 2006-11-13 2012-04-10 Exegy Incorporated Method and system for high performance integration, processing and searching of structured and unstructured data using coprocessors
US9363078B2 (en) 2007-03-22 2016-06-07 Ip Reservoir, Llc Method and apparatus for hardware-accelerated encryption/decryption
US9424315B2 (en) 2007-08-27 2016-08-23 Teradata Us, Inc. Methods and systems for run-time scheduling database operations that are executed in hardware
US8879727B2 (en) 2007-08-31 2014-11-04 Ip Reservoir, Llc Method and apparatus for hardware-accelerated encryption/decryption
US20090089454A1 (en) * 2007-09-28 2009-04-02 Ramakrishna Huggahalli Network packet payload compression
US8001278B2 (en) * 2007-09-28 2011-08-16 Intel Corporation Network packet payload compression
US9483210B2 (en) 2007-12-27 2016-11-01 Sandisk Technologies Llc Flash storage controller execute loop
US9239783B2 (en) 2007-12-27 2016-01-19 Sandisk Enterprise Ip Llc Multiprocessor storage controller
US8959283B2 (en) 2007-12-27 2015-02-17 Sandisk Enterprise Ip Llc Flash storage controller execute loop
US8959282B2 (en) 2007-12-27 2015-02-17 Sandisk Enterprise Ip Llc Flash storage controller execute loop
US8775717B2 (en) 2007-12-27 2014-07-08 Sandisk Enterprise Ip Llc Storage controller for flash memory including a crossbar switch connecting a plurality of processors with a plurality of internal memories
US8762620B2 (en) 2007-12-27 2014-06-24 Sandisk Enterprise Ip Llc Multiprocessor storage controller
US8751755B2 (en) 2007-12-27 2014-06-10 Sandisk Enterprise Ip Llc Mass storage controller volatile memory containing metadata related to flash memory storage
US8386700B2 (en) 2007-12-27 2013-02-26 Sandisk Enterprise Ip Llc Flash memory controller garbage collection operations performed independently in multiple flash memory groups
US8621138B2 (en) 2007-12-27 2013-12-31 Sandisk Enterprise Ip Llc Flash storage controller execute loop
US20090172257A1 (en) * 2007-12-27 2009-07-02 Pliant Technology, Inc System and method for performing host initiated mass storage commands using a hierarchy of data structures
US8621137B2 (en) 2007-12-27 2013-12-31 Sandisk Enterprise Ip Llc Metadata rebuild in a flash memory controller following a loss of power
US8738841B2 (en) 2007-12-27 2014-05-27 Sandisk Enterprise IP LLC. Flash memory controller and system including data pipelines incorporating multiple buffers
US9448743B2 (en) 2007-12-27 2016-09-20 Sandisk Technologies Llc Mass storage controller volatile memory containing metadata related to flash memory storage
US9158677B2 (en) 2007-12-27 2015-10-13 Sandisk Enterprise Ip Llc Flash storage controller execute loop
US20090172499A1 (en) * 2007-12-27 2009-07-02 Pliant Technology, Inc. Patrol function used in flash storage controller to detect data errors
US8245101B2 (en) 2007-12-27 2012-08-14 Sandisk Enterprise Ip Llc Patrol function used in flash storage controller to detect data errors
US8533384B2 (en) 2007-12-27 2013-09-10 Sandisk Enterprise Ip Llc Flash memory controller garbage collection operations performed independently in multiple flash memory groups
WO2009086357A1 (fr) * 2007-12-27 2009-07-09 Pliant Technology, Inc. Système et procédé pour effectuer des ordres de stockage en masse initiés par hôte utilisant une hiérarchie de structures de données
US9152556B2 (en) 2007-12-27 2015-10-06 Sandisk Enterprise Ip Llc Metadata rebuild in a flash memory controller following a loss of power
US7934052B2 (en) 2007-12-27 2011-04-26 Pliant Technology, Inc. System and method for performing host initiated mass storage commands using a hierarchy of data structures
US8775824B2 (en) * 2008-01-02 2014-07-08 Arm Limited Protecting the security of secure data sent from a central processor for processing by a further processing device
US8332660B2 (en) 2008-01-02 2012-12-11 Arm Limited Providing secure services to a non-secure application
US20090172411A1 (en) * 2008-01-02 2009-07-02 Arm Limited Protecting the security of secure data sent from a central processor for processing by a further processing device
US20090172329A1 (en) * 2008-01-02 2009-07-02 Arm Limited Providing secure services to a non-secure application
US10229453B2 (en) 2008-01-11 2019-03-12 Ip Reservoir, Llc Method and system for low latency basket calculation
US8862625B2 (en) 2008-04-07 2014-10-14 Teradata Us, Inc. Accessing data in a column store database based on hardware compatible indexing and replicated reordered columns
US7966343B2 (en) 2008-04-07 2011-06-21 Teradata Us, Inc. Accessing data in a column store database based on hardware compatible data structures
US8374986B2 (en) 2008-05-15 2013-02-12 Exegy Incorporated Method and system for accelerated stream processing
US11677417B2 (en) 2008-05-15 2023-06-13 Ip Reservoir, Llc Method and system for accelerated stream processing
US10965317B2 (en) 2008-05-15 2021-03-30 Ip Reservoir, Llc Method and system for accelerated stream processing
US10411734B2 (en) 2008-05-15 2019-09-10 Ip Reservoir, Llc Method and system for accelerated stream processing
US10158377B2 (en) 2008-05-15 2018-12-18 Ip Reservoir, Llc Method and system for accelerated stream processing
US9547824B2 (en) 2008-05-15 2017-01-17 Ip Reservoir, Llc Method and apparatus for accelerated data quality checking
US8458129B2 (en) 2008-06-23 2013-06-04 Teradata Us, Inc. Methods and systems for real-time continuous updates
US8762249B2 (en) 2008-12-15 2014-06-24 Ip Reservoir, Llc Method and apparatus for high-speed processing of financial market depth data
US8768805B2 (en) 2008-12-15 2014-07-01 Ip Reservoir, Llc Method and apparatus for high-speed processing of financial market depth data
US10929930B2 (en) 2008-12-15 2021-02-23 Ip Reservoir, Llc Method and apparatus for high-speed processing of financial market depth data
US11676206B2 (en) 2008-12-15 2023-06-13 Exegy Incorporated Method and apparatus for high-speed processing of financial market depth data
US10062115B2 (en) 2008-12-15 2018-08-28 Ip Reservoir, Llc Method and apparatus for high-speed processing of financial market depth data
US12211101B2 (en) 2008-12-15 2025-01-28 Exegy Incorporated Method and apparatus for high-speed processing of financial market depth data
US8473814B2 (en) 2010-03-17 2013-06-25 Sandisk Enterprise Ip Llc MLC self-RAID flash data protection scheme
US8365041B2 (en) 2010-03-17 2013-01-29 Sandisk Enterprise Ip Llc MLC self-raid flash data protection scheme
US8484534B2 (en) 2010-03-17 2013-07-09 Sandisk Enterprise IP LLC. MLC self-RAID flash data protection scheme
US8484533B2 (en) 2010-03-17 2013-07-09 Sandisk Enterprise Ip Llc MLC self-RAID flash data protection scheme
US10572417B2 (en) 2010-12-09 2020-02-25 Xilinx, Inc. Encapsulated accelerator
US8996644B2 (en) 2010-12-09 2015-03-31 Solarflare Communications, Inc. Encapsulated accelerator
US10515037B2 (en) 2010-12-09 2019-12-24 Solarflare Communications, Inc. Encapsulated accelerator
US11397985B2 (en) 2010-12-09 2022-07-26 Exegy Incorporated Method and apparatus for managing orders in financial markets
US11132317B2 (en) 2010-12-09 2021-09-28 Xilinx, Inc. Encapsulated accelerator
US9892082B2 (en) 2010-12-09 2018-02-13 Solarflare Communications Inc. Encapsulated accelerator
US9674318B2 (en) 2010-12-09 2017-06-06 Solarflare Communications, Inc. TCP processing for devices
US9600429B2 (en) 2010-12-09 2017-03-21 Solarflare Communications, Inc. Encapsulated accelerator
US10037568B2 (en) 2010-12-09 2018-07-31 Ip Reservoir, Llc Method and apparatus for managing orders in financial markets
US11803912B2 (en) 2010-12-09 2023-10-31 Exegy Incorporated Method and apparatus for managing orders in financial markets
US10873613B2 (en) 2010-12-09 2020-12-22 Xilinx, Inc. TCP processing for devices
US11876880B2 (en) 2010-12-09 2024-01-16 Xilinx, Inc. TCP processing for devices
US11134140B2 (en) 2010-12-09 2021-09-28 Xilinx, Inc. TCP processing for devices
US9880964B2 (en) 2010-12-09 2018-01-30 Solarflare Communications, Inc. Encapsulated accelerator
US9417894B1 (en) 2011-06-15 2016-08-16 Ryft Systems, Inc. Methods and apparatus for a tablet computer system incorporating a reprogrammable circuit module
US8910020B2 (en) 2011-06-19 2014-12-09 Sandisk Enterprise Ip Llc Intelligent bit recovery for flash memory
US8909982B2 (en) 2011-06-19 2014-12-09 Sandisk Enterprise Ip Llc System and method for detecting copyback programming problems
US10469632B2 (en) 2011-07-29 2019-11-05 Solarflare Communications, Inc. Reducing network latency
US10021223B2 (en) 2011-07-29 2018-07-10 Solarflare Communications, Inc. Reducing network latency
US9456060B2 (en) 2011-07-29 2016-09-27 Solarflare Communications, Inc. Reducing network latency
US9258390B2 (en) 2011-07-29 2016-02-09 Solarflare Communications, Inc. Reducing network latency
US10425512B2 (en) 2011-07-29 2019-09-24 Solarflare Communications, Inc. Reducing network latency
US10713099B2 (en) 2011-08-22 2020-07-14 Xilinx, Inc. Modifying application behaviour
US8763018B2 (en) 2011-08-22 2014-06-24 Solarflare Communications, Inc. Modifying application behaviour
US11392429B2 (en) 2011-08-22 2022-07-19 Xilinx, Inc. Modifying application behaviour
US9003053B2 (en) 2011-09-22 2015-04-07 Solarflare Communications, Inc. Message acceleration
US9058289B2 (en) 2011-11-07 2015-06-16 Sandisk Enterprise Ip Llc Soft information generation for memory systems
US8793543B2 (en) 2011-11-07 2014-07-29 Sandisk Enterprise Ip Llc Adaptive read comparison signal generation for memory systems
US8938658B2 (en) 2011-11-07 2015-01-20 Sandisk Enterprise Ip Llc Statistical read comparison signal generation for memory systems
US9048876B2 (en) 2011-11-18 2015-06-02 Sandisk Enterprise Ip Llc Systems, methods and devices for multi-tiered error correction
US8954822B2 (en) 2011-11-18 2015-02-10 Sandisk Enterprise Ip Llc Data encoder and decoder using memory-specific parity-check matrix
US8924815B2 (en) 2011-11-18 2014-12-30 Sandisk Enterprise Ip Llc Systems, methods and devices for decoding codewords having multiple parity segments
US9047243B2 (en) 2011-12-14 2015-06-02 Ip Reservoir, Llc Method and apparatus for low latency data distribution
US12417495B2 (en) 2012-03-27 2025-09-16 Exegy Incorporated Offload processing of data packets containing financial market data
US9990393B2 (en) 2012-03-27 2018-06-05 Ip Reservoir, Llc Intelligent feed switch
US10963962B2 (en) 2012-03-27 2021-03-30 Ip Reservoir, Llc Offload processing of data packets containing financial market data
US10872078B2 (en) 2012-03-27 2020-12-22 Ip Reservoir, Llc Intelligent feed switch
US11436672B2 (en) 2012-03-27 2022-09-06 Exegy Incorporated Intelligent switch for processing financial market data
US12148032B2 (en) 2012-03-27 2024-11-19 Exegy Incorporated Intelligent packet switch
US10121196B2 (en) 2012-03-27 2018-11-06 Ip Reservoir, Llc Offload processing of data packets containing financial market data
US10650452B2 (en) 2012-03-27 2020-05-12 Ip Reservoir, Llc Offload processing of data packets
US20140180904A1 (en) * 2012-03-27 2014-06-26 Ip Reservoir, Llc Offload Processing of Data Packets Containing Financial Market Data
US9391840B2 (en) 2012-05-02 2016-07-12 Solarflare Communications, Inc. Avoiding delayed data
US9882781B2 (en) 2012-07-03 2018-01-30 Solarflare Communications, Inc. Fast linkup arbitration
US10498602B2 (en) 2012-07-03 2019-12-03 Solarflare Communications, Inc. Fast linkup arbitration
US11108633B2 (en) 2012-07-03 2021-08-31 Xilinx, Inc. Protocol selection in dependence upon conversion time
US11095515B2 (en) 2012-07-03 2021-08-17 Xilinx, Inc. Using receive timestamps to update latency estimates
US9391841B2 (en) 2012-07-03 2016-07-12 Solarflare Communications, Inc. Fast linkup arbitration
US9699263B1 (en) 2012-08-17 2017-07-04 Sandisk Technologies Llc. Automatic read and write acceleration of data accessed by virtual machines
US10505747B2 (en) 2012-10-16 2019-12-10 Solarflare Communications, Inc. Feed processing
US11374777B2 (en) 2012-10-16 2022-06-28 Xilinx, Inc. Feed processing
US10621192B2 (en) 2012-10-23 2020-04-14 IP Resevoir, LLC Method and apparatus for accelerated format translation of data in a delimited data format
US10146845B2 (en) 2012-10-23 2018-12-04 Ip Reservoir, Llc Method and apparatus for accelerated format translation of data in a delimited data format
US10102260B2 (en) 2012-10-23 2018-10-16 Ip Reservoir, Llc Method and apparatus for accelerated data translation using record layout detection
US10949442B2 (en) 2012-10-23 2021-03-16 Ip Reservoir, Llc Method and apparatus for accelerated format translation of data in a delimited data format
US9633097B2 (en) 2012-10-23 2017-04-25 Ip Reservoir, Llc Method and apparatus for record pivoting to accelerate processing of data fields
US10133802B2 (en) 2012-10-23 2018-11-20 Ip Reservoir, Llc Method and apparatus for accelerated record layout detection
US11789965B2 (en) 2012-10-23 2023-10-17 Ip Reservoir, Llc Method and apparatus for accelerated format translation of data in a delimited data format
US9633093B2 (en) 2012-10-23 2017-04-25 Ip Reservoir, Llc Method and apparatus for accelerated format translation of data in a delimited data format
US9501398B2 (en) 2012-12-26 2016-11-22 Sandisk Technologies Llc Persistent storage device with NVRAM for staging writes
US9612948B2 (en) 2012-12-27 2017-04-04 Sandisk Technologies Llc Reads and writes between a contiguous data block and noncontiguous sets of logical address blocks in a persistent storage device
US9239751B1 (en) 2012-12-27 2016-01-19 Sandisk Enterprise Ip Llc Compressing data from multiple reads for error control management in memory systems
US9003264B1 (en) 2012-12-31 2015-04-07 Sandisk Enterprise Ip Llc Systems, methods, and devices for multi-dimensional flash RAID data protection
US9454420B1 (en) 2012-12-31 2016-09-27 Sandisk Technologies Llc Method and system of reading threshold voltage equalization
US9329928B2 (en) 2013-02-20 2016-05-03 Sandisk Enterprise IP LLC. Bandwidth optimization in a non-volatile memory system
US9214965B2 (en) 2013-02-20 2015-12-15 Sandisk Enterprise Ip Llc Method and system for improving data integrity in non-volatile storage
US9870830B1 (en) 2013-03-14 2018-01-16 Sandisk Technologies Llc Optimal multilevel sensing for reading data from a storage medium
US9367246B2 (en) 2013-03-15 2016-06-14 Sandisk Technologies Inc. Performance optimization of data transfer for soft information generation
US9136877B1 (en) 2013-03-15 2015-09-15 Sandisk Enterprise Ip Llc Syndrome layered decoding for LDPC codes
US9244763B1 (en) 2013-03-15 2016-01-26 Sandisk Enterprise Ip Llc System and method for updating a reading threshold voltage based on symbol transition information
US9009576B1 (en) 2013-03-15 2015-04-14 Sandisk Enterprise Ip Llc Adaptive LLR based on syndrome weight
US9236886B1 (en) 2013-03-15 2016-01-12 Sandisk Enterprise Ip Llc Universal and reconfigurable QC-LDPC encoder
US9092350B1 (en) 2013-03-15 2015-07-28 Sandisk Enterprise Ip Llc Detection and handling of unbalanced errors in interleaved codewords
US9170941B2 (en) 2013-04-05 2015-10-27 Sandisk Enterprises IP LLC Data hardening in a storage system
US10049037B2 (en) 2013-04-05 2018-08-14 Sandisk Enterprise Ip Llc Data management in a storage system
US10999246B2 (en) 2013-04-08 2021-05-04 Xilinx, Inc. Locked down network interface
US10742604B2 (en) 2013-04-08 2020-08-11 Xilinx, Inc. Locked down network interface
US9426124B2 (en) 2013-04-08 2016-08-23 Solarflare Communications, Inc. Locked down network interface
US10212135B2 (en) 2013-04-08 2019-02-19 Solarflare Communications, Inc. Locked down network interface
US20140359755A1 (en) * 2013-05-30 2014-12-04 Cryptography Research, Inc. Configurator for secure feature and key manager
US9300599B2 (en) 2013-05-30 2016-03-29 Solarflare Communications, Inc. Packet capture
US9436848B2 (en) * 2013-05-30 2016-09-06 Cryptography Research, Inc. Configurator for secure feature and key manager
US9159437B2 (en) 2013-06-11 2015-10-13 Sandisk Enterprise IP LLC. Device and method for resolving an LM flag issue
US9524235B1 (en) 2013-07-25 2016-12-20 Sandisk Technologies Llc Local hash value generation in non-volatile data storage systems
US9384126B1 (en) 2013-07-25 2016-07-05 Sandisk Technologies Inc. Methods and systems to avoid false negative results in bloom filters implemented in non-volatile data storage systems
US9043517B1 (en) 2013-07-25 2015-05-26 Sandisk Enterprise Ip Llc Multipass programming in buffers implemented in non-volatile data storage systems
US9619499B2 (en) 2013-08-07 2017-04-11 International Business Machines Corporation Hardware implementation of a tournament tree sort algorithm
US10133774B2 (en) * 2013-08-07 2018-11-20 International Business Machines Corporation Accelerating multiple query processing operations
US20150046428A1 (en) * 2013-08-07 2015-02-12 International Business Machines Corporation Scalable acceleration of database query operations
US9619500B2 (en) 2013-08-07 2017-04-11 International Business Machines Corporation Hardware implementation of a tournament tree sort algorithm
US9830354B2 (en) * 2013-08-07 2017-11-28 International Business Machines Corporation Accelerating multiple query processing operations
US20160357817A1 (en) * 2013-08-07 2016-12-08 International Business Machines Corporation Scalable acceleration of database query operations
US9710503B2 (en) 2013-08-07 2017-07-18 International Business Machines Corporation Tunable hardware sort engine for performing composite sorting algorithms
US10169413B2 (en) * 2013-08-07 2019-01-01 International Business Machines Corporation Scalable acceleration of database query operations
US20150046486A1 (en) * 2013-08-07 2015-02-12 International Business Machines Corporation Accelerating multiple query processing operations
US9495418B2 (en) * 2013-08-07 2016-11-15 International Business Machines Corporation Scalable acceleration of database query operations
US9690813B2 (en) 2013-08-07 2017-06-27 International Business Machines Corporation Tunable hardware sort engine for performing composite sorting algorithms
US9639463B1 (en) 2013-08-26 2017-05-02 Sandisk Technologies Llc Heuristic aware garbage collection scheme in storage systems
US9235509B1 (en) 2013-08-26 2016-01-12 Sandisk Enterprise Ip Llc Write amplification reduction by delaying read access to data written during garbage collection
US9361221B1 (en) 2013-08-26 2016-06-07 Sandisk Technologies Inc. Write amplification reduction through reliable writes during garbage collection
US9519577B2 (en) 2013-09-03 2016-12-13 Sandisk Technologies Llc Method and system for migrating data between flash memory devices
US9442670B2 (en) 2013-09-03 2016-09-13 Sandisk Technologies Llc Method and system for rebalancing data stored in flash memory devices
US9158349B2 (en) 2013-10-04 2015-10-13 Sandisk Enterprise Ip Llc System and method for heat dissipation
US9323637B2 (en) 2013-10-07 2016-04-26 Sandisk Enterprise Ip Llc Power sequencing and data hardening architecture
US9298608B2 (en) 2013-10-18 2016-03-29 Sandisk Enterprise Ip Llc Biasing for wear leveling in storage systems
US9442662B2 (en) 2013-10-18 2016-09-13 Sandisk Technologies Llc Device and method for managing die groups
US9436831B2 (en) 2013-10-30 2016-09-06 Sandisk Technologies Llc Secure erase in a memory device
US11249938B2 (en) 2013-11-06 2022-02-15 Xilinx, Inc. Programmed input/output mode
US11023411B2 (en) 2013-11-06 2021-06-01 Xilinx, Inc. Programmed input/output mode
US10394751B2 (en) 2013-11-06 2019-08-27 Solarflare Communications, Inc. Programmed input/output mode
US11809367B2 (en) 2013-11-06 2023-11-07 Xilinx, Inc. Programmed input/output mode
US9263156B2 (en) 2013-11-07 2016-02-16 Sandisk Enterprise Ip Llc System and method for adjusting trip points within a storage device
US9244785B2 (en) 2013-11-13 2016-01-26 Sandisk Enterprise Ip Llc Simulated power failure and data hardening
US9152555B2 (en) 2013-11-15 2015-10-06 Sandisk Enterprise IP LLC. Data management with modular erase in a data storage system
US9703816B2 (en) 2013-11-19 2017-07-11 Sandisk Technologies Llc Method and system for forward reference logging in a persistent datastore
US9520197B2 (en) 2013-11-22 2016-12-13 Sandisk Technologies Llc Adaptive erase of a storage device
US9122636B2 (en) 2013-11-27 2015-09-01 Sandisk Enterprise Ip Llc Hard power fail architecture
US9280429B2 (en) 2013-11-27 2016-03-08 Sandisk Enterprise Ip Llc Power fail latching based on monitoring multiple power supply voltages in a storage device
US9520162B2 (en) 2013-11-27 2016-12-13 Sandisk Technologies Llc DIMM device controller supervisor
US9582058B2 (en) 2013-11-29 2017-02-28 Sandisk Technologies Llc Power inrush management of storage devices
US9250676B2 (en) 2013-11-29 2016-02-02 Sandisk Enterprise Ip Llc Power failure architecture and verification
US9092370B2 (en) 2013-12-03 2015-07-28 Sandisk Enterprise Ip Llc Power failure tolerant cryptographic erase
US9235245B2 (en) 2013-12-04 2016-01-12 Sandisk Enterprise Ip Llc Startup performance and power isolation
US9129665B2 (en) 2013-12-17 2015-09-08 Sandisk Enterprise Ip Llc Dynamic brownout adjustment in a storage device
US10423596B2 (en) * 2014-02-11 2019-09-24 International Business Machines Corporation Efficient caching of Huffman dictionaries
US9549457B2 (en) 2014-02-12 2017-01-17 Sandisk Technologies Llc System and method for redirecting airflow across an electronic assembly
US9497889B2 (en) 2014-02-27 2016-11-15 Sandisk Technologies Llc Heat dissipation for substrate assemblies
US9703636B2 (en) 2014-03-01 2017-07-11 Sandisk Technologies Llc Firmware reversion trigger and control
US9348377B2 (en) 2014-03-14 2016-05-24 Sandisk Enterprise Ip Llc Thermal isolation techniques
US9485851B2 (en) 2014-03-14 2016-11-01 Sandisk Technologies Llc Thermal tube assembly structures
US9519319B2 (en) 2014-03-14 2016-12-13 Sandisk Technologies Llc Self-supporting thermal tube structure for electronic assemblies
US9390814B2 (en) 2014-03-19 2016-07-12 Sandisk Technologies Llc Fault detection and prediction for data storage elements
US9454448B2 (en) 2014-03-19 2016-09-27 Sandisk Technologies Llc Fault testing in storage devices
US9448876B2 (en) 2014-03-19 2016-09-20 Sandisk Technologies Llc Fault detection and prediction in storage devices
US9626400B2 (en) 2014-03-31 2017-04-18 Sandisk Technologies Llc Compaction of information in tiered data structure
US9390021B2 (en) 2014-03-31 2016-07-12 Sandisk Technologies Llc Efficient cache utilization in a tiered data structure
US9626399B2 (en) 2014-03-31 2017-04-18 Sandisk Technologies Llc Conditional updates for reducing frequency of data modification operations
US9697267B2 (en) 2014-04-03 2017-07-04 Sandisk Technologies Llc Methods and systems for performing efficient snapshots in tiered data structures
US10902013B2 (en) 2014-04-23 2021-01-26 Ip Reservoir, Llc Method and apparatus for accelerated record layout detection
US9645749B2 (en) 2014-05-30 2017-05-09 Sandisk Technologies Llc Method and system for recharacterizing the storage density of a memory device or a portion thereof
US10656842B2 (en) 2014-05-30 2020-05-19 Sandisk Technologies Llc Using history of I/O sizes and I/O sequences to trigger coalesced writes in a non-volatile storage device
US10372613B2 (en) 2014-05-30 2019-08-06 Sandisk Technologies Llc Using sub-region I/O history to cache repeatedly accessed sub-regions in a non-volatile storage device
US9703491B2 (en) 2014-05-30 2017-07-11 Sandisk Technologies Llc Using history of unaligned writes to cache data and avoid read-modify-writes in a non-volatile storage device
US10162748B2 (en) 2014-05-30 2018-12-25 Sandisk Technologies Llc Prioritizing garbage collection and block allocation based on I/O history for logical address regions
US10146448B2 (en) 2014-05-30 2018-12-04 Sandisk Technologies Llc Using history of I/O sequences to trigger cached read ahead in a non-volatile storage device
US9093160B1 (en) 2014-05-30 2015-07-28 Sandisk Technologies Inc. Methods and systems for staggered memory operations
US10656840B2 (en) 2014-05-30 2020-05-19 Sandisk Technologies Llc Real-time I/O pattern recognition to enhance performance and endurance of a storage device
US9070481B1 (en) 2014-05-30 2015-06-30 Sandisk Technologies Inc. Internal current measurement for age measurements
US10114557B2 (en) 2014-05-30 2018-10-30 Sandisk Technologies Llc Identification of hot regions to enhance performance and endurance of a non-volatile storage device
US8891303B1 (en) 2014-05-30 2014-11-18 Sandisk Technologies Inc. Method and system for dynamic word line based configuration of a three-dimensional memory device
US9652381B2 (en) 2014-06-19 2017-05-16 Sandisk Technologies Llc Sub-block garbage collection
US9443601B2 (en) 2014-09-08 2016-09-13 Sandisk Technologies Llc Holdup capacitor energy harvesting
US10429342B2 (en) 2014-12-18 2019-10-01 Edico Genome Corporation Chemically-sensitive field effect transistor
US10020300B2 (en) 2014-12-18 2018-07-10 Agilome, Inc. Graphene FET devices, systems, and methods of using the same for sequencing nucleic acids
US10006910B2 (en) 2014-12-18 2018-06-26 Agilome, Inc. Chemically-sensitive field effect transistors, systems, and methods for manufacturing and using the same
US10494670B2 (en) 2014-12-18 2019-12-03 Agilome, Inc. Graphene FET devices, systems, and methods of using the same for sequencing nucleic acids
US9618474B2 (en) 2014-12-18 2017-04-11 Edico Genome, Inc. Graphene FET devices, systems, and methods of using the same for sequencing nucleic acids
US9857328B2 (en) 2014-12-18 2018-01-02 Agilome, Inc. Chemically-sensitive field effect transistors, systems and methods for manufacturing and using the same
US10607989B2 (en) 2014-12-18 2020-03-31 Nanomedical Diagnostics, Inc. Graphene FET devices, systems, and methods of using the same for sequencing nucleic acids
US10429381B2 (en) 2014-12-18 2019-10-01 Agilome, Inc. Chemically-sensitive field effect transistors, systems, and methods for manufacturing and using the same
US9859394B2 (en) 2014-12-18 2018-01-02 Agilome, Inc. Graphene FET devices, systems, and methods of using the same for sequencing nucleic acids
US11023204B2 (en) 2014-12-29 2021-06-01 International Business Machines Corporation Hardware implementation of a tournament tree sort algorithm using an external memory
US10956493B2 (en) * 2015-05-19 2021-03-23 Micro Focus Llc Database comparison operation to identify an object
CN105138469A (zh) * 2015-08-28 2015-12-09 北京腾凌科技有限公司 一种数据读写方法以及主板
US10942943B2 (en) 2015-10-29 2021-03-09 Ip Reservoir, Llc Dynamic field data translation to support high performance stream data processing
US11526531B2 (en) 2015-10-29 2022-12-13 Ip Reservoir, Llc Dynamic field data translation to support high performance stream data processing
US20170140012A1 (en) * 2015-11-18 2017-05-18 Yahoo! Inc. Method for approximate k-nearest-neighbor search on parallel hardware accelerators
US20220147878A1 (en) * 2015-11-18 2022-05-12 Verizon Patent And Licensing Inc. Method for approximate k-nearest-neighbor search on parallel hardware accelerators
US11244245B2 (en) * 2015-11-18 2022-02-08 Verizon Patent And Licensing Inc. Method for approximate k-nearest-neighbor search on parallel hardware accelerators
US11645585B2 (en) * 2015-11-18 2023-05-09 Verizon Patent And Licensing Inc. Method for approximate k-nearest-neighbor search on parallel hardware accelerators
US10510017B2 (en) * 2015-11-18 2019-12-17 Oath Inc. Method for approximate k-nearest-neighbor search on parallel hardware accelerators
US10866941B2 (en) 2016-03-07 2020-12-15 Hitachi, Ltd. Computer and database management method
US10811539B2 (en) 2016-05-16 2020-10-20 Nanomedical Diagnostics, Inc. Graphene FET devices, systems, and methods of using the same for sequencing nucleic acids
CN108228583A (zh) * 2016-12-10 2018-06-29 南京理工大学 基于fpga的图像纹理检索系统及检索方法
US11416778B2 (en) 2016-12-22 2022-08-16 Ip Reservoir, Llc Method and apparatus for hardware-accelerated machine learning
US10846624B2 (en) 2016-12-22 2020-11-24 Ip Reservoir, Llc Method and apparatus for hardware-accelerated machine learning
US11126600B2 (en) * 2017-04-24 2021-09-21 Reniac, Inc. System and method to accelerate compaction
WO2018200475A1 (fr) * 2017-04-24 2018-11-01 Reniac, Inc. Système et procédé visant à accélérer le compactage
US20180337773A1 (en) * 2017-05-19 2018-11-22 Fujitsu Limited Communication device and communication method
CN114450676A (zh) * 2019-09-24 2022-05-06 超威半导体公司 用于生成压缩数据的具有最长匹配处理的压缩系统
US12265736B2 (en) 2020-01-27 2025-04-01 Samsung Electronics Co., Ltd. Latency and throughput centric reconfigurable storage device
CN113608693A (zh) * 2021-07-26 2021-11-05 中国科学院国家空间科学中心 一种星载在轨数据的搜索排序系统和方法
US12073080B2 (en) 2021-11-16 2024-08-27 Hitachi, Ltd. System and method for improving reliability of a data storage system
US20240248754A1 (en) * 2023-01-20 2024-07-25 Arm Limited Reading data within a compressed data stream
CN115827682A (zh) * 2023-02-10 2023-03-21 山东浪潮科学研究院有限公司 一种数据库查询加速引擎装置、方法及存储介质
CN118509509A (zh) * 2024-07-19 2024-08-16 杭州芯旗电子技术有限公司 基于fpga的七号信令解析装置及方法

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US8768888B2 (en) 2014-07-01
US8751452B2 (en) 2014-06-10
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