US20020029901A1 - Micro grid array solder interconnection structure with solder columns for second level packaging joining a module and printed circuit board - Google Patents
Micro grid array solder interconnection structure with solder columns for second level packaging joining a module and printed circuit board Download PDFInfo
- Publication number
- US20020029901A1 US20020029901A1 US09/559,310 US55931000A US2002029901A1 US 20020029901 A1 US20020029901 A1 US 20020029901A1 US 55931000 A US55931000 A US 55931000A US 2002029901 A1 US2002029901 A1 US 2002029901A1
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- Prior art keywords
- solder
- connections
- mils
- diameter
- height
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 229910000679 solder Inorganic materials 0.000 title claims abstract description 50
- 238000004806 packaging method and process Methods 0.000 title description 3
- 238000000034 method Methods 0.000 claims description 15
- 239000000758 substrate Substances 0.000 claims description 7
- 239000000919 ceramic Substances 0.000 claims description 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 3
- 229910045601 alloy Inorganic materials 0.000 claims description 3
- 239000000956 alloy Substances 0.000 claims description 3
- 229920000620 organic polymer Polymers 0.000 claims 2
- 239000011805 ball Substances 0.000 description 7
- 239000000203 mixture Substances 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 229920005989 resin Polymers 0.000 description 4
- 239000011347 resin Substances 0.000 description 4
- -1 aluminum silicate Chemical class 0.000 description 3
- 229920001187 thermosetting polymer Polymers 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000011806 microball Substances 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 229920001169 thermoplastic Polymers 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical class [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229920000459 Nitrile rubber Polymers 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 239000004743 Polypropylene Substances 0.000 description 1
- YKTSYUJCYHOUJP-UHFFFAOYSA-N [O--].[Al+3].[Al+3].[O-][Si]([O-])([O-])[O-] Chemical compound [O--].[Al+3].[Al+3].[O-][Si]([O-])([O-])[O-] YKTSYUJCYHOUJP-UHFFFAOYSA-N 0.000 description 1
- 229920000122 acrylonitrile butadiene styrene Polymers 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 239000011152 fibreglass Substances 0.000 description 1
- 229920002313 fluoropolymer Polymers 0.000 description 1
- LNEPOXFFQSENCJ-UHFFFAOYSA-N haloperidol Chemical compound C1CC(O)(C=2C=CC(Cl)=CC=2)CCN1CCCC(=O)C1=CC=C(F)C=C1 LNEPOXFFQSENCJ-UHFFFAOYSA-N 0.000 description 1
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N phenol group Chemical group C1(=CC=CC=C1)O ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 1
- 229920002492 poly(sulfone) Polymers 0.000 description 1
- 229920000515 polycarbonate Polymers 0.000 description 1
- 239000004417 polycarbonate Substances 0.000 description 1
- 229920000139 polyethylene terephthalate Polymers 0.000 description 1
- 239000005020 polyethylene terephthalate Substances 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 229920000098 polyolefin Polymers 0.000 description 1
- 229920001155 polypropylene Polymers 0.000 description 1
- 239000012779 reinforcing material Substances 0.000 description 1
- 150000004760 silicates Chemical class 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical class [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000004634 thermosetting polymer Substances 0.000 description 1
- 239000004416 thermosoftening plastic Substances 0.000 description 1
Images
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
- B23K35/02—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
- B23K35/0222—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape for use in soldering, brazing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
- B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
- B23K35/24—Selection of soldering or welding materials proper
- B23K35/26—Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
- B23K35/268—Pb as the principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00013—Fully indexed content
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10954—Other details of electrical connections
- H05K2201/10992—Using different connection materials, e.g. different solders, for the same connection
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/0415—Small preforms other than balls, e.g. discs, cylinders or pillars
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Definitions
- the present invention relates to interconnection structures for joining an electronic array module to a printed circuit board or card, and more particularly to a structure for forming solder interconnection joints that exhibit reduced stress resulting from thermal mismatch of the module and the printed circuit board.
- the present invention is especially suitable in providing micro ball grid arrays ( ⁇ BGA).
- ⁇ BGA micro ball grid arrays
- the present invention is also concerned with the method for fabricating such interconnection structures.
- Micro ball grid array refers to a surface mounting packaging technique whereby the solder ball array pattern is typically less than about 0.75 mm pitch. This is contrasted to conventional ball grid array technology whereby the pitch is at least about 1.0 mm. Pitch refers to the distance measured from the center of an adjoining solder ball to the center of the next adjacent solder ball.
- solder interconnection In second level packaging of an electronic array module or chip carrier to a printed circuit board or card, the solder interconnection is rigid and cannot flex under thermal mismatch conditions. As ball to ball spacing shrinks to 0.75 mm pitch and less, the diameter of the ball must be reduced to achieve such spacing. This results in a lower stand off between the module and printed circuit board or card, resulting in less resilience to stress during expected thermal cycles due to the thermal mismatch between the module and the printed circuit board. The reliability of such a second level package interconnect is therefore jeopardized due to the loss of resilience to stress. Accordingly, ⁇ BGA has seen limited industrial applications because of reliability concerns.
- An object of the present invention is to minimize the problem from thermal mismatch between electronic array modules surface mounted on a printed circuit board or printed circuit card. According to the present invention, the reliability is significantly increased. More particularly, the present invention is concerned with a solder interconnection for forming connection between a module or chip carrier and printed circuit board or printed circuit card that comprises a plurality of solder connections arranged in a micro area grid array that joins solder wettable pads on a major surface of the module to a corresponding set of solder wettable pads of the printed circuit board or card. According to the present invention, the solder connections are column shaped with the height of each connection being at least about 1.4 times its diameter.
- the stand off distance between the module and printed circuit board or card is significantly increased. This in turn increases the resilience of the connection during stress experienced during thermal cycles due to the thermal mismatch between the module and printed circuit board or card.
- the present invention is also concerned with the method for interconnecting a module to a printed circuit board or card which comprises attaching the circuit module to the printed circuit board or card by a plurality of solder interconnections that extend from solder wettable pads on a major surface of the module to a corresponding set of solder wettable pads of the printed circuit board or card.
- the solder connections are column shaped with the height of each of the connections being at least about 1.4 times its diameter and the solder connections are arranged in a micro area grid array.
- FIGURE is a schematic diagram of a solder interconnection pursuant to the present invention.
- numeral 1 represents the electronic array module or chip carrier joined to the printed circuit board or printed circuit card 2 by the solder columns 3 .
- the columns are arranged in a micro grid array with a column pitch of 0.75 mm or less and preferably about 0.5 mm to about 0.75 mm.
- Pitch refers to the distance from the center of an adjoining column to the center of its adjacent column or columns. It is critical to the present invention that the height of each column be at least about 1.4 times its diameter and typically no greater than about 2.5 times its diameter, a preferred range being about 1.5 to about 2.5 times its diameter.
- Some typical columns according to the present invention are about 9 mils to about 13 mils in diameter, and about 12.5 mils to about 33 mils in height depending upon the diameter.
- the height for a 9 mil diameter column is typically about 12.5 to about 22.5 mils, and for a 13 mil diameter column is typically about 18 to about 33 mils.
- the diameter of the column can be about 12.5 mils with the height being at least 17.5 mils and preferably about 31 mils.
- each of the columns is approximately the same height and substantially the same diameter throughout the entire column.
- solder columns be non-collapsible at temperature used in fabricating the structures of the present invention.
- the column should be non-collapsible at temperatures of at least about 220° C.
- a typical solder composition employed is an alloy of about 90% by weight lead, and about 10% by weight tin.
- the solder is connected to a wettable contact pad (not shown) on the module and to a corresponding solder wettable contact pad (not shown) on the printed circuit board.
- the contact pads are copper.
- the modules are ceramic or organic substrates that carry integrated circuit chips as is well known in the art. Typical ceramic carriers include silicon oxides and silicates such as aluminum silicate, and aluminum oxides.
- the organic substrates can include thermoplastic and/or thermosetting resins. Many of such substrates contain the resin and a reinforcing material such as fiberglass.
- Typical thermosetting resins include FR-4 epoxy resins, phenolic based materials, BT resins and polyimides. Examples of thermoplastic polymers include polyolefins such as polypropylene, polysulfones, fluorocarbon polymers, polyethylene terephthalate, polycarbonates, nitrile rubbers and ABS polymers.
- the printed circuit boards or cards can be any of the printed circuit boards or cards well known in the art such as those from fiber reinforced epoxy resin compositions.
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mechanical Engineering (AREA)
- Combinations Of Printed Boards (AREA)
Abstract
Description
- The present invention relates to interconnection structures for joining an electronic array module to a printed circuit board or card, and more particularly to a structure for forming solder interconnection joints that exhibit reduced stress resulting from thermal mismatch of the module and the printed circuit board. The present invention is especially suitable in providing micro ball grid arrays (μBGA). The present invention is also concerned with the method for fabricating such interconnection structures.
- Micro ball grid array (μBGA) refers to a surface mounting packaging technique whereby the solder ball array pattern is typically less than about 0.75 mm pitch. This is contrasted to conventional ball grid array technology whereby the pitch is at least about 1.0 mm. Pitch refers to the distance measured from the center of an adjoining solder ball to the center of the next adjacent solder ball.
- In second level packaging of an electronic array module or chip carrier to a printed circuit board or card, the solder interconnection is rigid and cannot flex under thermal mismatch conditions. As ball to ball spacing shrinks to 0.75 mm pitch and less, the diameter of the ball must be reduced to achieve such spacing. This results in a lower stand off between the module and printed circuit board or card, resulting in less resilience to stress during expected thermal cycles due to the thermal mismatch between the module and the printed circuit board. The reliability of such a second level package interconnect is therefore jeopardized due to the loss of resilience to stress. Accordingly, μBGA has seen limited industrial applications because of reliability concerns. Reliability can be addressed by employing epoxy compositions to adhere the μBGA package to integrated circuit boards or cards in order to minimize the effects of thermal mismatch between the device and the circuit board or card. However, this is not especially satisfactory since the epoxy compositions cannot be reworked in that they are thermosetting polymer materials.
- An object of the present invention is to minimize the problem from thermal mismatch between electronic array modules surface mounted on a printed circuit board or printed circuit card. According to the present invention, the reliability is significantly increased. More particularly, the present invention is concerned with a solder interconnection for forming connection between a module or chip carrier and printed circuit board or printed circuit card that comprises a plurality of solder connections arranged in a micro area grid array that joins solder wettable pads on a major surface of the module to a corresponding set of solder wettable pads of the printed circuit board or card. According to the present invention, the solder connections are column shaped with the height of each connection being at least about 1.4 times its diameter. By employing the required column shaped interconnections specified by the present invention, the stand off distance between the module and printed circuit board or card is significantly increased. This in turn increases the resilience of the connection during stress experienced during thermal cycles due to the thermal mismatch between the module and printed circuit board or card.
- The present invention is also concerned with the method for interconnecting a module to a printed circuit board or card which comprises attaching the circuit module to the printed circuit board or card by a plurality of solder interconnections that extend from solder wettable pads on a major surface of the module to a corresponding set of solder wettable pads of the printed circuit board or card. The solder connections are column shaped with the height of each of the connections being at least about 1.4 times its diameter and the solder connections are arranged in a micro area grid array.
- Still other objects and advantages of the present invention will become readily apparent by those skilled in the art from the following detailed description, wherein it is shown and described only the preferred embodiments of the invention, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, without departing from the invention. Accordingly, the description is to be regarded as illustrative in nature and not as restrictive.
- The FIGURE is a schematic diagram of a solder interconnection pursuant to the present invention.
- To facilitate an understanding of the present invention, reference is made to the FIGURE. In the FIGURE, numeral 1 represents the electronic array module or chip carrier joined to the printed circuit board or printed
circuit card 2 by thesolder columns 3. The columns are arranged in a micro grid array with a column pitch of 0.75 mm or less and preferably about 0.5 mm to about 0.75 mm. Pitch refers to the distance from the center of an adjoining column to the center of its adjacent column or columns. It is critical to the present invention that the height of each column be at least about 1.4 times its diameter and typically no greater than about 2.5 times its diameter, a preferred range being about 1.5 to about 2.5 times its diameter. Some typical columns according to the present invention are about 9 mils to about 13 mils in diameter, and about 12.5 mils to about 33 mils in height depending upon the diameter. For example, the height for a 9 mil diameter column is typically about 12.5 to about 22.5 mils, and for a 13 mil diameter column is typically about 18 to about 33 mils. In a specific example, the diameter of the column can be about 12.5 mils with the height being at least 17.5 mils and preferably about 31 mils. In addition, according to the present invention, each of the columns is approximately the same height and substantially the same diameter throughout the entire column. - It is desirable that the solder columns be non-collapsible at temperature used in fabricating the structures of the present invention. Typically, the column should be non-collapsible at temperatures of at least about 220° C. A typical solder composition employed is an alloy of about 90% by weight lead, and about 10% by weight tin.
- The solder is connected to a wettable contact pad (not shown) on the module and to a corresponding solder wettable contact pad (not shown) on the printed circuit board. Typically, the contact pads are copper. The modules are ceramic or organic substrates that carry integrated circuit chips as is well known in the art. Typical ceramic carriers include silicon oxides and silicates such as aluminum silicate, and aluminum oxides. The organic substrates can include thermoplastic and/or thermosetting resins. Many of such substrates contain the resin and a reinforcing material such as fiberglass. Typical thermosetting resins include FR-4 epoxy resins, phenolic based materials, BT resins and polyimides. Examples of thermoplastic polymers include polyolefins such as polypropylene, polysulfones, fluorocarbon polymers, polyethylene terephthalate, polycarbonates, nitrile rubbers and ABS polymers.
- The printed circuit boards or cards can be any of the printed circuit boards or cards well known in the art such as those from fiber reinforced epoxy resin compositions.
- The foregoing description of the invention illustrates and describes the present invention. Additionally, the disclosure shows and describes only the preferred embodiments of the invention but, as mentioned above, it is to be understood that the invention is capable of use in various other combinations, modifications, and environments and is capable of changes or modifications within the scope of the inventive concept as expressed herein, commensurate with the above teachings and/or the skill or knowledge of the relevant art. The embodiments described hereinabove are further intended to explain best modes known of practicing the invention and to enable others skilled in the art to utilize the invention in such, or other, embodiments and with the various modifications required by the particular applications or uses of the invention. Accordingly, the description is not intended to limit the invention to the form disclosed herein. Also, it is intended that the appended claims be construed to include alternative embodiments.
Claims (24)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/559,310 US6380494B1 (en) | 1998-03-05 | 2000-04-27 | Micro grid array solder interconnection structure with solder columns for second level packaging joining a module and printed circuit board |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/035,538 US6059173A (en) | 1998-03-05 | 1998-03-05 | Micro grid array solder interconnection structure for second level packaging joining a module and printed circuit board |
| US09/496,431 US6340111B1 (en) | 1998-03-05 | 2000-02-02 | Micro grid array solder interconnection structure for second level packaging joining a module and a printed circuit board |
| US09/559,310 US6380494B1 (en) | 1998-03-05 | 2000-04-27 | Micro grid array solder interconnection structure with solder columns for second level packaging joining a module and printed circuit board |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US09/496,431 Division US6340111B1 (en) | 1998-03-05 | 2000-02-02 | Micro grid array solder interconnection structure for second level packaging joining a module and a printed circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| US20020029901A1 true US20020029901A1 (en) | 2002-03-14 |
| US6380494B1 US6380494B1 (en) | 2002-04-30 |
Family
ID=21883333
Family Applications (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US09/035,538 Expired - Lifetime US6059173A (en) | 1998-03-05 | 1998-03-05 | Micro grid array solder interconnection structure for second level packaging joining a module and printed circuit board |
| US09/496,431 Expired - Lifetime US6340111B1 (en) | 1998-03-05 | 2000-02-02 | Micro grid array solder interconnection structure for second level packaging joining a module and a printed circuit board |
| US09/559,310 Expired - Lifetime US6380494B1 (en) | 1998-03-05 | 2000-04-27 | Micro grid array solder interconnection structure with solder columns for second level packaging joining a module and printed circuit board |
Family Applications Before (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US09/035,538 Expired - Lifetime US6059173A (en) | 1998-03-05 | 1998-03-05 | Micro grid array solder interconnection structure for second level packaging joining a module and printed circuit board |
| US09/496,431 Expired - Lifetime US6340111B1 (en) | 1998-03-05 | 2000-02-02 | Micro grid array solder interconnection structure for second level packaging joining a module and a printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| US (3) | US6059173A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2019089935A1 (en) * | 2017-11-02 | 2019-05-09 | The Regents Of The University Of California | Power distribution within silicon interconnect fabric |
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| US6218629B1 (en) * | 1999-01-20 | 2001-04-17 | International Business Machines Corporation | Module with metal-ion matrix induced dendrites for interconnection |
| US6225206B1 (en) * | 1999-05-10 | 2001-05-01 | International Business Machines Corporation | Flip chip C4 extension structure and process |
| US6756253B1 (en) * | 1999-08-27 | 2004-06-29 | Micron Technology, Inc. | Method for fabricating a semiconductor component with external contact polymer support layer |
| US6392896B1 (en) * | 1999-12-22 | 2002-05-21 | International Business Machines Corporation | Semiconductor package containing multiple memory units |
| US6547124B2 (en) | 2001-06-14 | 2003-04-15 | Bae Systems Information And Electronic Systems Integration Inc. | Method for forming a micro column grid array (CGA) |
| US6854633B1 (en) * | 2002-02-05 | 2005-02-15 | Micron Technology, Inc. | System with polymer masking flux for fabricating external contacts on semiconductor components |
| US20070284420A1 (en) * | 2006-06-13 | 2007-12-13 | Advanpack Solutions Pte Ltd | Integrated circuit chip formed on substrate |
| US20120212920A1 (en) * | 2011-02-21 | 2012-08-23 | Lockheed Martin Corporation | Circuit card assemblies having connector-less perpendicular card-to-card interconnects |
| US8697457B1 (en) | 2011-06-22 | 2014-04-15 | Bae Systems Information And Electronic Systems Integration Inc. | Devices and methods for stacking individually tested devices to form multi-chip electronic modules |
| US8829674B2 (en) | 2013-01-02 | 2014-09-09 | International Business Machines Corporation | Stacked multi-chip package and method of making same |
| TWI651830B (en) * | 2015-02-17 | 2019-02-21 | 立昌先進科技股份有限公司 | Multifunctinal miniaturized smd electronic components and process for manufacturing the same |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3871015A (en) * | 1969-08-14 | 1975-03-11 | Ibm | Flip chip module with non-uniform connector joints |
| US4545610A (en) * | 1983-11-25 | 1985-10-08 | International Business Machines Corporation | Method for forming elongated solder connections between a semiconductor device and a supporting substrate |
| US4604644A (en) * | 1985-01-28 | 1986-08-05 | International Business Machines Corporation | Solder interconnection structure for joining semiconductor devices to substrates that have improved fatigue life, and process for making |
| US4605153A (en) * | 1985-06-17 | 1986-08-12 | Northern Telecom Limited | Shaped solder pad for reflow soldering of surface mounting cylindrical devices on a circuit board |
| DE3824008A1 (en) * | 1988-07-15 | 1990-01-25 | Contraves Ag | ELECTRONIC CIRCUIT AND METHOD FOR THE PRODUCTION THEREOF |
| US5216278A (en) * | 1990-12-04 | 1993-06-01 | Motorola, Inc. | Semiconductor device having a pad array carrier package |
| US5432358A (en) * | 1994-03-24 | 1995-07-11 | Motorola, Inc. | Integrated electro-optical package |
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-
1998
- 1998-03-05 US US09/035,538 patent/US6059173A/en not_active Expired - Lifetime
-
2000
- 2000-02-02 US US09/496,431 patent/US6340111B1/en not_active Expired - Lifetime
- 2000-04-27 US US09/559,310 patent/US6380494B1/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019089935A1 (en) * | 2017-11-02 | 2019-05-09 | The Regents Of The University Of California | Power distribution within silicon interconnect fabric |
| US11257746B2 (en) * | 2017-11-02 | 2022-02-22 | The Regents Of The University Of California | Power distribution within silicon interconnect fabric |
Also Published As
| Publication number | Publication date |
|---|---|
| US6340111B1 (en) | 2002-01-22 |
| US6059173A (en) | 2000-05-09 |
| US6380494B1 (en) | 2002-04-30 |
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