US20010016396A1

US20010016396A1 - Thin-film resistor and method of fabrication

Info

Publication number: US20010016396A1
Application number: US09/800,576
Authority: US
Inventors: Jia-Sheng Lee
Original assignee: Individual
Current assignee: United Microelectronics Corp
Priority date: 1999-06-11
Filing date: 2001-03-08
Publication date: 2001-08-23
Also published as: US6225183B1

Abstract

A thin-film resistor has: 1. a resistance layer positioned on a dielectric layer, 2. a protective layer positioned on the resistance layer and having two openings on two ends of the resistance layer, 3. an insulating layer covering the upper and side surfaces of the protective layer, the side surfaces of the resistance layer, and the surface of the dielectric layer, the protective layer having two openings above the two openings of the protective layer, 4. two plugs positioned in the two openings of the insulating layer and the protective layer for electrically connecting to the two ends of the resistance layer, and 5. two conductive layers formed on the insulting layer and positioned on the two plugs, and which are used as two electrical wires for electrically connecting to the two ends of the resistance layer.

Description

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a thin-film resistor, and more particularly, to a thin-film resistor for use on a semiconductor wafer.

2. Description of the Prior Art

There are many kinds of resistive components in the ICs of a semiconductor wafer, such as the gate conductive layer of the semiconductor wafer, doped layers as a resistance component, or thin-film resistors. The main problem with gate conductive layers and doped layers is that the resistance of both is too low. Therefore, these components, if used, must be made large to increase their resistance to sufficient levels. It is clear that the gate conductive layers and the doped layers are not suitable for use in semiconductor processes with small line-widths. Also, since gate conductive layers and doped layers comprise silicon as a conducting material, the conductivity of the resistance component easily changes with temperature variations, making the resistance of these resistive components very unstable. If a resistive component with a low conductivity and a stable resistance is required for an IC, use of a thin-film resistor is essential.

Please refer to FIG. 1 and FIG. 2. FIG. 1 and FIG. 2 are schematic diagrams of the method of forming a thin-

film resistor

18 according to the prior art. A thin-film resistor 18 of the prior art is formed on the surface of the dielectric layer 10 of a semiconductor wafer 11. First, a resistance layer 12 and a protective layer 14 are sequentially formed within a predetermined area on the surface of the dielectric layer 10. Next, a conducting layer 16 made of an aluminum alloy is formed on the surface of the dielectric layer 10 and the protective layer 14, as shown in FIG. 1. A wet etching process is then performed to remove all of the conducting layer 16 and the protective layer 14 on the resistance layer 12 except for at the two ends of the resistance layer 12. This remaining portion is used as electrical connecting wires for the two ends of the resistance layer 12. FIG. 2 illustrates the completed thin-film resistor 18.

The wet-etching process is an isotropic process, and so the amount of sideways etching is approximately equal to the amount of vertical etching. Since the thin-

film resistor

18 patterns the conducting layer 16 by wet-etching, it is essential that the resistance layer 12 and the protective layer 14 have large surface areas so that the most of the conducting layer 16 and the protective layer 14 on the surface of the resistance layer 12 can be removed. At the same time, the conducting layer 16 and the protective layer 14 at the two ends of the resistance layer 12 are maintained. Because of this, the prior art method of forming the thin-film resistor 18 can only be used in processes with a line-width of 3 μm or greater, and cannot be used in processes with smaller line widths.

SUMMARY OF THE INVENTION

It is therefore a primary objective of the present invention to provide a thin-film resistor for use in a semiconductor wafer, and a method of forming the same to solve the above-mentioned problems.

In a preferred embodiment, the present invention provides a thin-film resistor on a dielectric layer of a semiconductor wafer. A resistance layer is positioned in a predetermined area of the dielectric layer. A protective layer is positioned on the resistance layer in the predetermined area and has two openings on two ends of the resistance layer. An insulating layer is formed on the semiconductor wafer and covers the upper and side surfaces of the protective layer, the side surfaces of the resistance layer, and the surface of the dielectric layer outside of the predetermined area. The protective layer has two openings above the two openings of the protective layer. Two plugs are positioned in the two openings of the insulating layer and the protective layer for electrically connecting to the two ends of the resistance layer. Finally, two conductive layers are formed on the insulting layer and are positioned on the two plugs. The two conductive layers are used as two electric wires for electrically connecting to the two ends of the resistance layer.

It is an advantage of the present invention that the thin-film resistor of the present invention has a stable resistance and can be used in processes with smaller line-widths to reduce the overall area of the semiconductor product.

These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiment, which is illustrated in the various figures and drawings. [0010]

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 and FIG. 2 are schematic diagrams of the method of forming a thin-film resistor according to the prior art. [0011]
FIG. 3 is a cross-sectional diagram of a thin-film resistor according to the present invention. [0012]
FIG. 4 to FIG. 8 are schematic diagrams of the method of forming a thin-film resistor according to the present invention. [0013]

DETAILED DESCRIPTION OF THE INVENTION

Structure

Please refer to FIG. 3. FIG. 3 is a cross-sectional diagram of a novel thin-[0014] film resistor 40 according to the present invention. As shown in FIG. 3, the thin-film resistor 40 is formed on a inter-layer dielectric (ILD) 20, and comprises a resistance layer 24 interposed between an isolating layer 22 and a protective layer 26, thereby forming a sandwiched resistor structure. The resistance layer 24 may be formed of metal or metallic compounds, such as chromium silicon, nickel chromium, or so forth. The stacked sandwiched resistor structure has a relatively small surface area, and is fabricated and defined by conventional photolithographic and etching techniques, which are well-known methods in the art, to expose portions of the resistance layer 24 and the isolating layer 22. Notably, the protective layer 26 is positioned on the resistance layer 24 in the defined area, and comprises two wet-etched openings 28, which are formed using a dry-etched insulating layer 30 as a wet-etching mask. The wet-etched openings 28 are positioned atop the two ends of the resistance layer 24. The insulating layer 30 is formed on the semiconductor wafer by a conventional CVD (chemical vapor deposition) process and covers the exposed surfaces of the protective layer 26, the resistance layer 24, and the dielectric layer 20. The protective layer 26 may be composed of silicon nitride, silicon oxy-nitride, or so forth. The isolating layer 22 may be composed of silicon nitride or silicon dioxide.
In FIG. 3, the [0015] insulating layer 30 comprises two dry-etched openings 32 above the two wet-etched openings 28 in the protective layer 26, which are simultaneously defined with the contact holes 50 using one photomask. In the dry-etched openings 32, wet-etched openings 28 and the contact holes 50, tungsten plugs 34, which have a patterned metal alloy adhesive layer 41 underneath the plugs, are formed to fill the openings 32, 28 and the contact holes 50 by way of a conventional metal deposition process and an etch back process. The tungsten plugs 34 are used to electrically connect to the two ends of the resistance layer. Patterned conductive layers 36, which are also used as two electrical wires for electrically connecting to the two ends of the resistance layer, are formed on the insulting layer and are positioned on the plugs. The conductive layer 36 may be formed of aluminum, copper, or an aluminum-copper alloy.

Process of the Preferred Embodiment

Please refer to FIG. 4 to FIG. 8. FIG. 4 to FIG. 8 are cross-sectional diagrams illustrating the method of forming a thin-[0016] film resistor 40 according to the present invention. As noted, the thin-film resistor 40 of the present invention is formed on a dielectric layer 20 of a semiconductor wafer 21. The dielectric layer 20 may be formed of borophosphosilicate glass (BPSG), phosphosilicate glass (PSG), SiO₂, or so forth. First, as shown in FIG. 4, an isolating layer 22 of silicon nitride and a resistance layer 24 of chromium silicon are sequentially deposited on the surface of the dielectric layer 20. A protective layer 26 of silicon nitride is next formed on the resistance layer 24. A lithographic process and an anisotropic plasma dry-etching process are used to define an island consisting of a sandwiched stacked structure on the dielectric layer 20, and thus expose portions of the resistance layer 24 and the isolating layer 22. An insulating layer 30 of silicon oxide is then formed over the semiconductor wafer 21 by a CVD process to cover the exposed surfaces of the protective layer 26 and the resistance layer 24 of the island, as well as the surface of the dielectric layer 20 outside of the island.
As shown in FIG. 5, a second lithographic process and a second dry-etching process are performed on the insulating [0017] layer 30 to form two dry-etched openings 32 extending down to the surface of the protective layer 26. In the second lithographic process and dry-etching process, two contact holes 50 are formed in the insulating layer 30 and the dielectric layer 20 using the same photomask by which the openings 32 are defined. The contact holes 50 are used as a path for electrically connecting to other components on the semiconductor wafer 21.
As shown in FIG. 6, subsequently, a wet-etching process with phosphoric acid (H[0018] ₃PO₄) that does not affect the insulating layer 30, the dielectric layer 20 and, most importantly, the resistance layer 24, is then performed on the protective layer 26 through the two openings 32 of the insulating layer 30 to form two isotropically wet-etched openings 28 extending down to the resistance layer 24.
Next, as shown in FIG. 7, an [0019] adhesive layer 41 and a tungsten layer 34 are sequentially formed on the surface of the semiconductor wafer 21, the surface of the two openings 28 inside the insulating layer 30 and the protective layer 26, and on the surface of the contact holes 50. The adhesive layer 41 comprises a titanium layer, and a titanium nitride layer underlying the titanium layer. The titanium nitride layer is used as a stumbling layer for isolating the tungsten layer 34 and the titanium layer. The tungsten layer 34 inside the openings 28 serves as plugs 34, and the tungsten layer 34 inside the contact holes 50 serves as plugs 35. Then, an etch back process is performed on the surface of the semiconductor wafer 21 to remove the tungsten layer 34 from the insulating layer 30 so that the top end of each of the plugs 34, 35 is at approximately the same height as the surface of the insulating layer 30.
Finally, as shown in FIG. 8, a conducting [0020] layer 36 made of an alloy consisting mostly of aluminum is deposited on the surface of the semiconductor wafer 21. A lithographic process and a metallic etching process is then performed to remove the conducting layer 36 and the adhesive layer 41 outside a preselected area so as to form a plurality of conducting layers 36 on the surface of each of the plugs 34, 35. This completes the thin-film resistor 40 of the present invention. Because the plugs 34 in the two openings 28 can electrically connect to the two ends of the resistance layer 24, the plugs 34 and the two conducting layers 36 above the plugs 34 can be used as electric wires for the two ends of the resistance layer 24. The plugs 35 in the contact holes 50, and the conducting layers 36 above the plugs 35, can be used as electric wires to electrically connect to the other components on the semiconductor wafer 21.
As shown in FIG. 8, the thin-[0021] film resistor 40 of the present invention comprises the resistance layer 24 positioned within a predetermined area on the surface of the dielectric layer 20, the protective layer 26 with openings 28 positioned in the predetermined area on the resistance layer 24; the insulating layer 30 covering the surface and the sides of the protective layer 26, the sides of the resistance layer 24 and the surface of the dielectric layer 20 outside the predetermined area; two plugs 34 installed separately in the two openings 28 of the insulating layer 30 and the protective layer 26 and also connecting to the two ends of the resistance layer 24, and two conducting layers 36 installed on the two plugs 34 so that the two conducting layers 36 and the plugs 34 can be used as electrical wires to connect to the resistance layer 24.
In the thin-[0022] film resistor 40 of the present invention, the isolating layer 22 below the resistance layer 24 isolates out-gassing generated from the BPSG of the dielectric layer 20 to prevent the out-gassing from affecting the resistance value of the resistance layer 24. The protective layer 26 protects the underlying resistance layer 24 from plasma damage caused by subsequent dry-etching processes. Also, the two openings 28 of the protecting layer 26 are formed by wet-etching and do not affect the resistance layer 24. Consequently, the resulting resistance of the resistance layer 24 of the thin-film resistor 40 of the present invention displays superior stability over widely varying temperatures.
In the thin-[0023] film resistor 40 of the present invention, the side surfaces of the resistance layer 24 are covered by the insulating layer 30. Therefore, the metallic conducting layer 36 is able to connect to other components of the semiconductor wafer 21 without contacting the side of the resistance layer 24. This prevents short-circuiting. As a result, there are fewer restrictions on the design of the metallic conducting layer 36. Also, other than the two openings of the protective layer 26 being made by a wet-etching process, all other etching processes are anisotropic dry-etching processes. Therefore, the area of the resistance layer 24 can be very small, with only the plugs 34 and the overlying conducting layers 36 serving as electrical connecting wires of the resistance layer 24. The present invention is suitable for processes with line-widths below 0.5 μm.
Compared to the thin-[0024] film resistor 18 of the prior art, in the present invention the thin-film resistor 40 and the method for its formation, the resistance layer 24 is sandwiched between an overlying protective layer 26 and the underlying isolating layer 22. The insulating layer 30 is then deposited onto the surface of the semiconductor wafer 21, thus stabilizing the resistance of the resistance layer 24. Also, the openings 28 in the protective layer 26 are formed by wet-etching, but all other etching processes are anisotropic dry-etching processes. Therefore, the area of the resistance layer 24 can be as small as possible. The present invention method not only produces a stable resistance thin-film resistor 40, but also may be used in processing with line-widths below 0.5 μm to reduce the area of the semiconductor product.
Those skilled in the art will readily observe that numerous modifications and alterations of the device may be made while retaining the teaching of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims. [0025]

Claims

What is claimed is:

1. A thin-film resistor positioned on a dielectric layer of a semiconductor wafer, the thin-film resistor comprising:

a resistance layer positioned in a predetermined area of the dielectric layer;

a protective layer positioned on the resistance layer in the predetermined area and comprising two openings on two ends, respectively, of the resistance layer;

an insulating layer formed on the semiconductor wafer and covering the upper and side surfaces of the protective layer, the side surfaces of the resistance layer, and the surface of the dielectric layer outside the predetermined area, the insulating layer comprising two openings respectively above the two openings of the protective layer;

two plugs respectively positioned in the two openings of the insulating layer and the protective layer for electrically connecting to the two respective ends of the resistance layer; and

two conductive layers formed on the insulting layer and respectively positioned on the two plugs, the two conductive layers being used as two electrical wires for electrically connecting to the two respective ends of the resistance layer.

2. The thin-film resistor of

claim 1

wherein the resistance layer is formed of CrSi (chromium silicon), the protective layer is formed of silicon nitride by using a chemical vapor deposition method, the insulating layer is formed of silicon oxide by using a chemical vapor deposition method, and the dielectric layer is formed of borophosphosilicate glass (BPSG).

3. The thin-film resistor of

claim 2

further comprising an isolating layer positioned in the predetermined area and between the resistance layer and the dielectric layer, the isolating layer isolating out-gassing produced by the borophosphosilicate glass of the dielectric layer to prevent the out-gassing from affecting the resistance of the resistance layer.

4. The thin-film resistor of

claim 3

wherein the isolating layer is formed of silicon nitride or silicon oxide.

5. The thin-film resistor of

claim 1

wherein the plug is formed from a tungsten layer.

6. The thin-film resistor of

claim 5

further comprising the following two layers between each plug and each opening of the insulating layer and the protective layer:

a titanium layer positioned on the surface of each opening of the insulating layer and protective layer which is used as an adhesive layer; and

a titanium nitride layer positioned on the surface of the titanium layer which is used as a stumbling layer;

wherein when forming the tungsten layer, the titanium nitride layer is used to isolate the tungsten layer and the titanium layer.

7. The thin-film resistor of

claim 1

wherein the two conductive layers are formed of a metallic alloy based on aluminum (Al).