UA81208C2 - Three-dimensional device for processing information and a method for processing information - Google Patents

Abstract

The proposed three-dimensional device for processing information and a method for processing information can be used in systems for processing digital information presented on electronic, optical, magnetic, and other information carriers. The proposed device contains control elements, data input/output elements, and logic elements, which are connected according to the specified circuit. These elements are arranged in the nodes of the three-dimensional structure that is formed by three sets of buses arranged in parallel to the mutually perpendicular axes of the coordinate system. The advantage of the proposed device and the method is enhanced performance in performing information input/output and processing operations.

Description

Description of the invention

The invention relates to the field of processing digital and/or analog information in electronic, optical, 2 magnetic and other systems and relates to a spatial device for processing information, as well as a method of processing information in a spatial device for processing information.

The complexity of data processing tasks related, for example, to pattern recognition, real-time processing of multidimensional images, modeling of neural networks, etc., presents the developers of computing devices with increased requirements in terms of performance and flexibility of the structure. 70 It is about optimal adaptation of the functional structure of data processing devices to the tasks of variable data processing.

Today, devices for processing information are implemented in the form of planar (planar) systems.

Attempts to create three-dimensional integrated circuits were carried out by universities, 12 research laboratories and individual scientists since the beginning of the 70s of the last century. In addition to the use of polycrystalline silicon, the structure of which was supposed to be changed with the help of a laser beam, these works also envisaged other constructive solutions that allow placing several two-dimensional microcircuits one above the other.

Integrated microcircuits of the "programmed matrix logic" type are known, which allow creating devices for processing digital information by changing internal interconnections in matrices of "AND" elements with rigidly specified connections with "OR" elements. Integrated microcircuits of the "programmable logic matrices" type are also known, which allow creating devices for processing digital information by changing the internal interconnections in the matrices of "AND" and "OR" elements.

A variety of data processing devices are known, such as optoelectronic assemblies and neurochips/neuroprocessors

For example, RF patents Мо2158020 Мо21371921 for processing optical information streams, ferroelectric or (U) devices for data storage and processing based on other physical principles.

From (patent of the Russian Federation 2248626 IPK" C11E 11/4193, 511 5/02, publ. 20.02.2004), a multidimensional addressing structure for electronic devices containing one or more spatial elements is known. Means for ensuring the possibility of addressing in a device containing one or more spatial elements, which are memory elements, with display elements, diodes, transistors and/or switching/modulating elements create "together with the specified means part of a two-dimensional or three-dimensional matrix as part of the specified device, contains three sets of conductive lines or tape electrodes, creating an additional part of the specified cm matrix. Device for storing and/or processing data or receiving, and/or processing, and/or displaying signals "- contains the specified means and more than one matrix, and the specified matrices are made in the form of of the foot located on the base, and the device forms a three-dimensional structure depending on the functional properties of each matrix in the foot.

Thus, the three-dimensional structure of the device is formed by arranging essentially planar matrices in the form of a foot. Therefore, two-dimensional addressing of matrix elements, as well as input and output of information are carried out in it. -at

The prototype of the claimed device is a reprogrammable computer for information processing systems, known from (patent RF Mo 2146389 MPK" СО6Е15/00, date of publication 10.03.20001, which contains a control circuit, which is a processor with a reduced set of commands, the inputs/outputs of which are connected to an internal bus to which are connected the inputs/outputs of the basic computing elements, the inputs/outputs of two arrays of local static 415 memory and the inputs/outputs of the system bus controller. In this computing device, the basic computing elements of interconnected by communication lines according to the "one-to-one" principle and connected by separate communication lines to the control scheme, and the inputs/outputs of the controller of the external bus are connected to the internal bus, to the inputs/outputs of which the inputs/outputs of the high-speed receiver block are connected / transmitters, and the specified 7 block is made on high-speed asynchronous receivers/transmitters, which allow the use of electrical and optical communication lines and are intended for cascading of basic computing elements. ("c") The computer is designed to solve the task of image processing or any other information that is performed on a real-time scale. The module can be used as a basic cell to implement a multilayer neural network with variable parameters.

Basic computing elements are used to perform simple arithmetic operations, such as addition, subtraction, multiplication, and calculation of threshold functions.

The calculator is implemented on the basis of 8 user-reprogrammable ERSA logic chips. (F) The use of user-reprogrammable ERSA microcircuits allows solving different types of problems on the same board and implementing neural networks of different types and sizes.

The disadvantage of this calculator is that the device is made with the possibility of connecting basic computing elements to form a quasi-planar computing structure. Providing it with a spatial structure, which allows to expand the functional capabilities and improve the flexibility of adaptation to the performed tasks, is not provided for in the described patent.

The invention is based on the task of developing a spatial device for data processing, in which, by placing structural logical elements in the nodes of the spatial structure formed by buses oriented in 5 different directions, and forming controlled connections between the specified structural logical elements, the expansion of functionality, improvement of flexibility is achieved , speed and compactness of the data processing device.

With respect to the device, the object is solved in that in a spatial digital information processing device containing control devices, input/output devices, structural logic elements such as logic devices, groups of logic elements, logic elements or components of logic elements are interconnected and

With input/output devices by information and address buses, according to the invention structural logic elements are located in nodes of a spatial structure, each of which is formed by at least three isolated buses oriented in different directions, and each node contains controllable connecting elements connected between the buses, as well as between inputs and outputs, for example, information, control, power supply of structural logic elements, and the controlled connecting elements are made with the ability 7/0 to irreversibly or reversibly change their physical state under the influence of control signals.

In the preferred embodiment of the invention, artificial neurons are used as structural logical elements, and artificial synapses are used as controlled connecting elements.

In another preferred form of implementation of the invention, qubits are used as structural logical elements, the interaction between which is carried out by directional connections of a quantum-mechanical nature. The architecture of connections is determined 7/5 by the nature of the qubits used and the type of material structure (matrix).

In the next preferred embodiment, memory elements are used as structural logic elements.

In addition, structural logic elements can be electronic and/or optical and/or magnetic elements.

Structural logical elements and controlled connecting elements can be made non-volatile.

In addition, the task of the invention is to develop a method of processing information in a spatial device for processing information, in which, by purposefully acting on the controlled connecting elements between structural logical elements located in different spatial directions, the spatial structure of the computing device is changed in order to adapt the specified structure to the task being performed.

According to the invention, the problem is solved in the method of information processing in a spatial device for processing information, which includes input/output of the processed data and control of the calculation process itself, by the fact that, according to the invention, control signals of the physical state of the controlled connecting elements according to i) protocol, while the inputs and outputs of some logical elements are connected to the inputs and outputs of other logical elements located in different spatial directions, with the formation of a functional structure of a spatial device for processing information, adapted to the task of processing information. Thanks to the spatial structure of the data processing device, according to the proposed method, it is possible to supply arrays of input signals to any number of buses of the selected plane (planes), and remove arrays of output signals simultaneously from any number of buses of the selected plane (planes). without intermediate buffering, thus increasing the speed of input/output and processing of multidimensional information in real time. --

The invention is illustrated by the figures, which show: so

Fig. 1 Three-dimensional spatial node;

Fig. 2 Fragment of a three-dimensional spatial device for processing information, in which the products of input variables are calculated, which are necessary for calculating the sum of three variables;

Fig.3 Fragment of a three-dimensional spatial device for information processing, in which sums of products are calculated and the sum of three variables is determined; from c Fig. A4 Three-dimensional spatial device for information processing, which calculates the sum of three input logical variables. ;" The description is given on the example of the structure and functioning of one spatial node, which contains structural logical elements (corresponding to the basic computational elements of the prototype), which can be performed in

Views of individual functional components of logical elements. In the simplest case, these are, for example, diodes.

Go! The nodes of the spatial computing structure are formed by three isolated buses, which are oriented in orthogonal directions. Thanks to the controlled connecting elements, the buses can be connected to each other - through diodes according to a given protocol.

GI Figure 1 shows a three-dimensional spatial node. The node is formed by three, for example, electrically conductive busbars 1, 2, Z, isolated from each other, oriented, for example, along the axes o of a rectangular coordinate system. Between each pair of buses 1, 2, C are connected components of logical elements, for example, in the form of diodes 4, 5, 6, 7, 8, 9. Diodes are connected to the buses through controlled connecting elements (for example, keys) 10, 11 , 12, 13, 14, 15. Keys can reversibly or irreversibly change their conductive state. In a simple case, fusible links can be used as controlled connecting elements, which irreversibly change their physical conductive state as a result of "burning" during programming of the information processing device.

F) This spatial node, depending on the presence of controlled connecting elements and potentials on the buses, is capable of performing simple logical operations "AND" or "OR", that is, implementing these logical elements.

Implementation of element "I. In the initial state, keys 10, 11, 12, 13, 14, 15 are open. Input variables are supplied to buses 1 and 2, and voltage E (for example "5 V) is supplied to bus C through a resistor. Switches 11 and 13. Then a logical product of the input variables will be formed on bus Z.

Implementation of the "OR" element. In the initial state, keys 10, 11, 12, 13, 14, 15 are unlocked. Input variables are supplied to buses 1 and 2, and the "common bus" voltage (voltage 0 V) is supplied to bus C through a resistor.

Keys 10 and 14 are closed. Then a logical sum of the input variables will be formed on bus C. 65 To prove the universality of the proposed spatial device for information processing, an example of the organization of the adder of three logical variables --X1i-xX2i-X3) is offered. The truth table of the sum of three logical variables has the form hi ho jel. ooo o oo t o tro ogo poro to post po o

KENE

The function of the algebra of logic in the form of disjunctive normal form, written on the basis of the truth table, looks like

Fig. 2 shows a fragment of a three-dimensional spatial device for processing information, in which the products of the input variables x1 x2X3, x1X2 x3, X1 x2 x3, X1X2X3 are calculated according to formula (1). For simplicity, only the diodes involved are shown here; the switches themselves are also not shown. That is, only the switching result is shown in Fig. 2.

On buses 16 and 19, the variable xZ is applied by external switching to 18 and 21 - ХЗ, to 23 - Х2, to 26 - х2, to 17 s - Х1, to 20 - х1. ' x o

Formation of the product xX1X2X3 on bus 22. For this, variable X2 is applied to bus 23, xX1 to bus 20.

The X1X2 product is formed on bus 39 thanks to diodes connected in the strip direction between buses 23 and 39, 20 and 39, and the external switching of bus 39 to the voltage source E through a resistor (a two-input logic circuit element 7 is formed). Next, the product X1X2 on the bus 39 and the variable that is supplied to bus 19 is formed due to the oppositely connected diodes between buses 39 and 22, 19 and 22, and the external switching of bus 22 to the voltage source E through a resistor, the product Xx1X2 X3 (a two-input logic element "1"7 is formed) . with

Similarly, the rest of the products X1 x2X3 on bus 27, X1 x2X3 on bus 25, XIX2XZ on bus 24 are formed. --

Figure 3 shows a fragment of a three-dimensional spatial device for processing information, in which sums of products are calculated and the sum of three variables is determined.

An example of the formation of the sum X1 x2 xZ i- x1X2 x3 on bus 31. The product X1 x2 xXZ on bus 25 and the product X1 x2 XxZ on bus 22 are fed to bus 31 through diodes connected in the forward direction. To bus 31 to form the amount "

X1 x2X3 -- x1X2 x3 is also connected through a "common bus" resistor. - и и , sd- . 5 s Similarly, the amount x is formed! х2хХ3 и- Х1Х2Х3 on bus 33. And, finally, the sum (Х1 х2 х3 - х1Х2 хХ З) "with (х1 х2ХЗ и- Х1Х2ХЗ) - 5 on bus 37. p. - . . . - -

Figure 4 shows an example of a three-dimensional spatial device for processing information, which calculates the sum of three input logic variables. This figure is formed as a result of combining individual fragments in fig. 2 and so 45 of fig. 3.

The above example of the three-dimensional implementation of the invention by methods of semiconductor technologies is not exhaustive and does not limit the scope of legal protection. The production of such three-dimensional devices allows the use of modern technological methods, in particular flexonics, that is, layer-by-layer printing of three-dimensional structures.

According to the invention, structural logic elements can also be optical and/or magnetic elements. av | 20 At the same time, as buses can be used, for example, light guides or conductive tracks, and as co-functional elements - for example, micromirrors and microcoils of inductance, respectively.

When using memory elements as structural logical elements, a spatial memory device can be implemented, made with the possibility of flexible changes in its structure.

As structural logical elements, more complex than in the described implementation example can be used, 22 elements,

GF) Yes, the spatial device according to the invention is also suitable for forming spatial neural networks simulating the function of the human brain. At the same time, artificial neurons are used as structural logical elements, and artificial synapses are used as controlled connecting elements.

In the general case, the tires can be oriented along the axes of the oblique coordinate system, the number of which can be arbitrary and is limited only by the technological possibilities of implementation.

Thanks to the proposed three-dimensional structure of the information processing device, the compactness of the placement of structural logical elements and functional nodes has been achieved due to the fact that the logical elements are located in the nodes of the spatial structure and their inputs and outputs can be connected using controlled connecting elements with buses , which converge at the node and which are oriented in different directions of the volume of the device. This makes it possible to implement any number of connections between elements and functional nodes,

construction of digital circuits of arbitrary complexity. The three-dimensional structure allows the device to load, process and display information in groups (layers), to switch individual structural logical elements in different directions.

Thus, the proposed spatial device for information processing has extended functionality, increased speed and flexibility of adaptation to the performed tasks of processing complex types of information, for example, multidimensional graphic information, in real time.

Claims (8)

The formula of the invention and what ., a. Also, . 1. A spatial device for processing digital and/or analog information, containing control devices, input/output devices, groups of logical elements, connected to each other and to input/output devices by information and address buses, which is characterized by the fact that groups of logical elements are located in the nodes of the spatial structure, each of which is formed by at least three isolated buses oriented in different directions, and each node contains controlled connecting elements connected between the buses and the outputs of the logical elements, and the controlled connecting elements are made with the ability of irreversible or reversibly change their physical state under the influence of control signals. 2. The device according to claim 1, which differs in that artificial neurons are used as logical elements, and synapses are used as controlled connecting elements. Q. The device according to claim 1, which differs in that qubits are used as logic elements. 4. The device according to claim 1, which differs in that the logical elements are electronic and/or optical and/or magnetic elements. 5. The device according to claim 1, which is characterized by the fact that the logic elements and controlled connecting elements are non-volatile. high school 6. The device according to claim 1, which is characterized by the fact that each bus participates in the formation of at least two spatial nodes. at 7. A method of processing information in a spatial device for processing information according to claims 1-6, which includes input/output of the processed data and control of the calculation process itself, which is characterized by providing control signals for the physical state of the controlled connecting elements according to the protocol, while so z The inputs and outputs of some logical elements are connected to the inputs and outputs of other logical elements located in different spatial directions. at 8. The method according to claim 7, which differs in that arrays of input signals are applied to the buses of the selected planes from the spatial device in accordance with the protocol, and arrays of output signals are removed simultaneously from the buses of the selected planes in accordance with the protocol. - d) - and? (ee) - name) («c) IR e) name) 60 b5