TWM667354U - Plasma erosion resistant device structure - Google Patents

Abstract

A plasma erosion resistant component structure, in particular a component used in semiconductor process related equipment or facilities. The component structure comprises a multi-layer structure, including a substrate made of stainless steel alloy, aluminum alloy, polymer or ceramic material; a surface coating layer composed of metal oxide, fluoride or nitride, which is deposited by plasma spraying, aerosol spraying, physical vapor deposition, atomic layer deposition or plasma enhanced chemical vapor deposition technology; and a surface modification layer that further densifies the coating layer by ion bombardment using an inert gas. This multi-layer structure greatly improves the hardness, density and wear resistance of the component surface, enhances the ability to resist plasma erosion, and effectively reduces the dust generated by coating peeling. This new type not only improves the durability of the component, but also effectively reduces the particle contamination in the process, meeting the stringent requirements of advanced semiconductor manufacturing.

Description

Plasma erosion resistant device structure

The present invention generally relates to components used in semiconductor process equipment, and more particularly to solving the problem of plasma erosion resistance. More specifically, the present invention relates to the structural design and material composition of components inside the chamber to enhance durability and reduce possible contamination in advanced semiconductor processes.

In the semiconductor industry, plasma-based processes are important for various manufacturing steps, including etching, deposition, and surface modification. Plasma is applied in specialized process chambers to achieve microscopic and precise material removal and deposition to create complex semiconductor devices. Chamber internal components, such as electrodes, pads, and gas distribution plates, are continuously exposed to the reactive plasma environment. To withstand these harsh conditions, these components are traditionally made of metal (such as stainless steel) or quartz materials. However, as semiconductor devices become more complex and process capabilities continue to increase, the requirements for chamber components become more stringent, requiring surface treatment to ensure component life and process reliability. To reduce plasma-induced degradation, the industry has developed techniques for surface microstructuring or coating on cavity components. These surface modification techniques are intended to render the components resistant to plasma corrosion, thereby reducing the rate of substrate peeling and reducing the generation of particle contamination that can cause defects in the semiconductor substrate. Common surface treatment techniques include physical vapor deposition, chemical vapor deposition, and various plasma spraying methods. Despite these technological advances, problems remain. Traditional materials such as metals and quartz inherently have limited resistance to plasma attack, resulting in increased wear and ultimately peeling of the surface treatment layer. The detachment of these coatings not only destroys the integrity of the chamber components, but also introduces dust particles into the process environment, which has an adverse effect on product quality and yield. As an alternative to metal and quartz substrates, sintered ceramic materials have been widely explored due to their excellent resistance to plasma corrosion. Ceramic materials such as alumina (Al₂O₃), silicon carbide (SiC), and zirconium dioxide (ZrO₂) have better durability in plasma environments. However, sintered ceramics also have some limitations. The natural porosity of sintered ceramic substrates may absorb contaminants, thereby reducing the purity of the environment within the chamber. In addition, the sintering process often leaves adhesive residues on the ceramic surface, further reducing its corrosion resistance and affecting the performance of the cavity components. Therefore, there is an urgent need for an innovative component structure that can not only resist plasma-induced corrosion but also minimize the generation of particle contamination. The structure should have high hardness, high density and wear resistance, and have good adhesion of the protective coating to ensure the long life of the component and maintain the purity of the semiconductor process environment.

The present invention provides a plasma erosion resistant component structure designed for semiconductor process equipment. This innovative structure improves the key requirements of enhancing durability and reducing pollution in harsh plasma environments. The plasma erosion resistant component structure of the present invention includes a substrate, a coating layer coated on an upper surface of the substrate, and a surface modification layer. The substrate is used as a base layer, and its material can be metal, polymer or ceramic material. Among them, metals include stainless steel types such as SUS304 and SUS316, various aluminum alloys (such as 5000 series, 6000 series, 7000 series); polymer materials such as epoxy resin, polyvinyl chloride, etc.; ceramic materials such as alumina, aluminum nitride (AlN), silicon dioxide (SiO₂), silicon carbide (SiC), silicon nitride (SiN), zirconium dioxide (ZrO₂) and silicon (Si) ceramic substrates. In addition, the coating is directly disposed on at least one upper surface of the substrate, and the coating is intended to enhance hardness, wear resistance and corrosion resistance. Coating materials include metal oxides, fluorides and nitrides, including but not limited to titanium dioxide (TiO₂), aluminum oxide (Al₂O₃), yttrium fluoride (YF₃), gerahertz oxide (Er₂O₃), gadolinium oxide (Gd₂O₃), yttrium oxide (Y₂O₃), yttrium oxyfluoride (YOF), yttrium aluminum garnet (YAG), yttrium aluminum monoxide (YAM), erbium aluminum garnet (EAG) and mixtures thereof. The coating is deposited on one of the upper surfaces of the substrate by a deposition technique, wherein the deposition technique includes atmospheric plasma spraying (APS), suspension plasma spraying (SPS), vacuum plasma spraying (VPS), aerosol deposition (ADM), physical vapor deposition (PVD), atomic layer deposition (ALD) or plasma-enhanced chemical vapor deposition (PECVD), and the coating thickness ranges from 0.1 µm to 250 µm and the hardness ranges from 400 HV to 1500 HV. The surface modification layer is treated by ion bombardment to reduce the surface porosity by at least 50% compared to the coating. The ion bombardment process is carried out using an inert gas such as argon, krypton, xenon or radon, under the controlled conditions of 100–3000 mA current, 100–1500 V voltage, 5–500 sccm gas flow and 1.0E-1 to 1.0E-6 Torr operating pressure. The ion bombardment process enhances the plasma erosion resistance, adhesion and wear resistance of the coating, thereby effectively reducing dust generation caused by coating peeling and extending the service life of the component. The main advantages of this new technology include: Enhanced plasma corrosion resistance: The combination of high-density surface modification layer and strong surface coating provides excellent plasma corrosion resistance, ensuring continuous and stable performance of components in harsh semiconductor process environments. Reduced particle contamination: By reducing coating peeling and substrate degradation, this new technology significantly reduces the generation of dust particles, thereby improving product quality and yield in the semiconductor manufacturing process. Material diversity and flexibility: This new technology can use a variety of substrate materials and a variety of deposition technologies, providing customized options for specific application requirements and process conditions. Improved mechanical properties: The multi-layer structure provides high hardness, high density and wear resistance, which together promote the durability and reliability of the components inside the cavity. Simplified manufacturing process: The use of advanced deposition technology and ion bombardment for surface modification simplifies the production of high-purity corrosion-resistant components, overcoming the limitations of traditional sintered ceramic and metal-based components. In summary, this new product provides an innovative solution to the challenges faced by semiconductor process equipment. By combining a tough substrate with professionally designed surface coatings and surface modification layers, this new product achieves enhanced durability, reduced contamination and improved overall performance to meet the growing needs of advanced semiconductor manufacturing technologies. In order to make the above features and advantages of the new model more obvious and easy to understand, the following is a detailed description of the preferred embodiment with the attached drawings.

Please refer to FIG. 1, which shows one embodiment of the novel plasma erosion resistant component structure. The plasma erosion resistant component structure 100 (hereinafter referred to as the component structure 100) is intended to enhance the durability and performance of components inside the chamber by reducing the erosion effect caused by plasma. The plasma erosion resistant component structure 100 includes a multi-layer structure, which includes a substrate 110, a coating 120 disposed on one upper surface of the substrate, and a surface modification layer 130 disposed on the coating, which comprehensively provides excellent plasma resistant performance, reduces particle contamination and prolongs the service life of the semiconductor process chamber. The base layer of the plasma erosion resistant device structure 100 is a substrate 110, which serves as the main structural support. The substrate 110 is selected from a series of materials with good mechanical strength, thermal stability, and compatibility with semiconductor process conditions. The selection criteria of the substrate 110 material include: effective thermal conductivity to dissipate heat, mechanical strength to maintain structural integrity under operating pressure, chemical resistance to prevent degradation under reactive plasma conditions, and compatibility with subsequent coating deposition methods to ensure effective deposition of the coating 120. Applicable materials include stainless steel alloys such as SUS304 and SUS316, which are favored for their excellent corrosion resistance and mechanical properties. In addition, various aluminum alloys, including 5000 series (containing magnesium alloys), 6000 series (containing magnesium-silicon alloys), and 7000 series (containing zinc alloys), are selected for their strength, lightweight properties, and thermal conductivity. The substrate 110 may also be made of ceramic materials, such as aluminum oxide, aluminum nitride, silicon dioxide, silicon carbide, silicon nitride, zirconium dioxide, and silicon. These ceramic materials can withstand the reactive plasma environment in the semiconductor process due to their high hardness, thermal stability, and excellent chemical resistance. In addition, polymer materials such as slow-oxidizing resins and polyethylene can also be used in other special fields. The coating 120 deposited on the upper surface of the substrate 110 plays a key role in enhancing the plasma wear and corrosion resistance of the device structure 100. This coating 120 significantly improves the hardness, wear resistance and corrosion resistance of the device structure 100, thereby becoming a barrier against plasma corrosion. The coating 120 is selected from a group consisting of materials such as metal oxides, fluorides and nitrides, including but not limited to titanium dioxide, aluminum oxide, yttrium oxide, geron oxide, gadolinium oxide, yttrium aluminum garnet, yttrium aluminum oxide and geron aluminum garnet. The coating 120 is deposited on one of the surfaces of the substrate 110 by a deposition technique, including atmospheric plasma spraying, suspension plasma spraying, vacuum plasma spraying, aerosol spraying, physical vapor deposition, atomic layer deposition, or plasma enhanced chemical vapor deposition. These deposition techniques allow the thickness of the coating 120 to be precisely controlled, typically ranging from 0.1 µm to 250 µm, and a hardness ranging from 400 HV to 1500 HV. The porosity of the coating 120 is maintained between 1% and 10%, ensuring a balance between mechanical strength and minimal gas permeability. The effect of the coating 120 is further affected by various deposition parameters, which are specific to each deposition method. For example, in the case of plasma spraying, these deposition parameters include: arc current, rotation speed, carrier gas flow rate, preheating temperature and vacuum pressure. Alternatively, in the case of aerosol deposition, these deposition parameters include: powder particle size, carrier gas flow rate, deposition pressure, spray temperature and distance between the nozzle and the substrate 110. Alternatively, in the case of physical vapor deposition, these deposition parameters include: chamber temperature, evaporation rate, ion beam power and voltage, carrier gas flow rate and process pressure. The surface modification layer 130 is located above the coating 120 and is specifically designed to further enhance the resistance to plasma erosion and improve performance by increasing surface density and improving adhesion. The surface modification layer 130 is formed by densification through ion bombardment, which significantly improves the performance of the coating. During the ion bombardment process, the coating 120 is exposed to an ion stream generated by an inert gas such as argon, krypton, xenon or radon. In one embodiment, these ions are accelerated under controlled conditions of current (100 to 3000 mA), voltage (100 to 1500 V), operating pressure (1.0E-1 to 1.0E-6 Torr) and gas flow rate (5 to 500 Sccm). Through this ion bombardment process, the porosity of a portion of the coating 120 is reduced by at least 50%, thereby forming a surface modification layer 130 with enhanced plasma corrosion resistance, improved adhesion and excellent wear resistance. The hardness of the densified surface modification layer 130 ranges from 500 HV to 1500 HV, and the porosity is less than 1%, which effectively reduces the path of plasma penetration and subsequent material degradation. The thickness ratio of the surface modification layer 130 to the original coating layer 120 is, for example, in the range of 1%:99% to 50%:50%. The improvement of the interface bonding between the coating layer 120 and the surface modification layer 130 is the key to maintaining the integrity of the multi-layer component. Since the surface modification layer 130 is generated by ion bombardment of the coating layer 120, it has good adhesion, which can effectively reduce the peeling phenomenon of the coating layer and reduce the probability of dust generation. Next, please refer to FIG. 2 and FIG. 3A to FIG. 3C. FIG. 2 shows one embodiment of the manufacturing process of the novel plasma erosion resistant component structure, and FIG. 3A to FIG. 3C show schematic diagrams corresponding to some steps of FIG. 2. First, please refer to step S110 and FIG. 3A to select the material of the substrate 110 according to the specific requirements of the semiconductor process environment. In one embodiment, the substrate 110 is surface treated, including cleaning, degreasing and surface roughening, to ensure better adhesion when the coating 120 is deposited later. Next, please refer to step S120 and FIG. 3B. After the substrate 110 is selected and cleaned, the coating 120 is deposited on one of the upper surfaces of the substrate 110 by a selected deposition method (such as APS, SPS, VPS, ADM, PVD, ALD or PECVD). The parameters in the deposition process are carefully controlled to achieve a uniform coating thickness within a specified range and to impart the desired hardness and porosity characteristics. In one embodiment, step S130 curing or controlled cooling is performed. After the coating 120 is deposited, curing or controlled cooling may be required to stabilize the coating 120. Subsequently, please refer to step S140 and FIG. 3C. After the substrate 110 is prepared, the coating 120 is bombarded by ions to form a surface modification layer 130. The substrate 110 coated with the coating 120 is placed in an ion bombardment chamber equipped with an inert gas source. Under controlled conditions of current, voltage, gas flow rate and pressure, ion bombardment is performed to form a more dense surface modification layer 130 on the coating 120 to enhance the resistance to plasma erosion. The process parameters are optimized to ensure that the surface of the coating 120 is effectively densified without damaging its integrity. After the ion bombardment is completed, a post-processing step is performed in step S150, including heat treatment to release stress and further enhance the properties of the coating 120 and the surface modification layer 130. Subsequently, a strict inspection of the component structure 100 is performed in step S160 to confirm the uniformity, density, hardness and adhesion of the coating. The inspection technology is based on microscopic inspection, hardness testing and adhesion testing. In one embodiment, as shown in step S170, finishing steps such as polishing or processing can also be performed to achieve the required size and surface smoothness to ensure the installation of the component structure 100 in the semiconductor process equipment. The new component structure 100 can be implemented in a variety of different applications. For example, one embodiment uses SUS304 stainless steel as the material of the substrate 110, and forms a coating 120 with a thickness of 150 µm and made of aluminum oxide by atmospheric plasma spraying. The substrate 110 coated with the coating 120 is then bombarded with argon ions at 500 mA and 800 V to further reduce the porosity of the coating surface. In another embodiment, the substrate 110 is made of a ceramic material such as silicon carbide, and a mixed material of 70 wt% aluminum oxide (Al₂O₃) and 30 wt% titanium dioxide (TiO₂) is deposited by suspended plasma spraying to form a coating 120 with a thickness of 200 µm. The surface modification layer 130 is formed by bombardment of xenon gas at 1000 mA and 1200 V to reduce the surface porosity. In another embodiment, an aluminum alloy is used as the material of the substrate 110, and yttrium aluminum garnet is deposited by physical vapor deposition to form the coating 120. In one embodiment, a coating 120 of multiple materials can also be deposited on a substrate 110 made of silicon by atomic layer deposition. The above embodiments show how different substrate 110 materials, coating combinations, and deposition techniques can be combined to meet a variety of semiconductor process requirements. Variations in deposition methods—such as using atmospheric plasma spraying for thick coatings, aerosol spraying for thin and dense coatings, physical vapor deposition for thin and high-hardness coatings, or using atomic layer deposition/plasma enhanced chemical vapor deposition for uniform thin film deposition—make it possible to optimize according to specific application requirements. The novel plasma erosion resistant component structure 100 has significant advantages over conventional chamber internal components. First, the multi-layer structure can effectively resist the erosion caused by plasma, thereby maintaining the structural integrity and reducing the need for frequent component replacement. This durability is due to the high-density surface modification layer 130, which provides excellent protection in harsh plasma environments. In addition, the strong adhesion between the coating 120 and the surface modification layer 130 can effectively reduce the shedding of coating particles, thereby reducing particle contamination in the semiconductor process environment. The plasma erosion resistant device structure 100 is applicable to a wide range of semiconductor process equipment, such as plasma etching chambers, chemical vapor deposition (CVD) and physical vapor deposition (PVD) chambers, plasma enhanced lithography systems, and ion implantation equipment. That is, devices exposed to high-energy ion beams and reactive plasma environments can benefit from the enhanced erosion resistance and reduced particle generation characteristics provided by the present invention. Although the present invention has been disclosed as above with the preferred embodiment, it is not intended to limit the present invention. Anyone with common knowledge in the relevant technical field can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined in the attached patent application.

100: Anti-plasma corrosion device structure (device structure) 110: Substrate 120: Coating 130: Surface modification layer S110~S170: Flow chart steps

FIG. 1 shows one embodiment of the plasma erosion resistant component structure of the present invention. FIG. 2 shows one embodiment of the manufacturing process of the plasma erosion resistant component structure of the present invention. FIG. 3A to FIG. 3C show schematic diagrams corresponding to some steps of FIG. 2.

100: Anti-plasma corrosion component structure (component structure)

110: Base material

120: coating

130: Surface modification layer

Claims (7)

A plasma erosion resistant component structure includes: a substrate; a coating disposed on a surface of the substrate; and a surface modification layer disposed on the coating, wherein the porosity of the surface modification layer is less than the porosity of the coating, thereby enhancing the plasma erosion resistance of the component. The plasma erosion resistant component structure as described in claim 1, wherein the coating is deposited by at least one of the following deposition methods: atmospheric plasma spraying, suspension plasma spraying, vacuum plasma spraying, aerosol spraying, physical vapor deposition, atomic layer deposition, or plasma enhanced chemical vapor deposition. The plasma erosion resistant component structure as described in claim 1, wherein the material of the substrate is metal, polymer or ceramic material. A plasma erosion resistant component structure as described in claim 1, wherein the surface modification layer is formed by ion bombardment on the upper surface of the coating layer to reduce its porosity. A plasma erosion resistant component structure as described in claim 2, wherein the porosity of the surface modification layer is reduced by at least 50% compared to the porosity of the coating layer. The plasma erosion resistant component structure as described in claim 2, wherein the thickness ratio of the surface modification layer to the coating layer is in the following range: 1:1~1:99. The plasma erosion resistant device structure as described in claim 4, wherein the surface modification layer uses at least one inert gas selected from argon, krypton, xenon or radon during the ion bombardment.

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