TWM453961U - Microchip circuit architecture - Google Patents
Microchip circuit architecture Download PDFInfo
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- TWM453961U TWM453961U TW102201705U TW102201705U TWM453961U TW M453961 U TWM453961 U TW M453961U TW 102201705 U TW102201705 U TW 102201705U TW 102201705 U TW102201705 U TW 102201705U TW M453961 U TWM453961 U TW M453961U
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- 238000004891 communication Methods 0.000 claims description 14
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- 238000012552 review Methods 0.000 description 5
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- 238000004519 manufacturing process Methods 0.000 description 2
- 230000007123 defense Effects 0.000 description 1
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Description
本創作係有關於一種微晶片電路架構,尤指一種將兩種以上的通訊模組整合在一起,並利用一加密晶片來避免程式碼外洩的情況,並採用系統級封裝(System In Package,SIP)的技術以形成一積體電路,來達到無線通訊產品降低成本及縮小體積的目的。This creation is about a microchip circuit architecture, especially one that integrates two or more communication modules and uses an encrypted chip to avoid code leakage. It uses a system-in-package (System In Package, SIP) technology to form an integrated circuit to achieve wireless communication products to reduce costs and reduce the size.
無線通訊技術在現今的生活無所不在,舉凡國防通訊科技、行動電話通訊、無線網路、射頻辨識系統(RFID)及高速公路之無線電子收費技術(ETC),皆為無線通訊所應用的層面。正因如此,我們必須購買許多的電子產品來使用這些無線技術,而單一的電子產品幾乎只能適用一個規格的無線通信技術,因此每個人身上幾乎都必須攜帶多種無線電子產品,方可利用多種的無線技術,而缺點即為攜帶多種電子產品而不夠簡便。Wireless communication technology is ubiquitous in today's life. The defense communication technology, mobile phone communication, wireless network, radio frequency identification system (RFID) and highway wireless electronic charging technology (ETC) are all applied to wireless communication. Because of this, we have to buy a lot of electronic products to use these wireless technologies, and a single electronic product can only use one specification of wireless communication technology, so almost everyone must carry a variety of wireless electronic products, in order to use a variety of The wireless technology, and the disadvantage is that it is not easy to carry a variety of electronic products.
本創作的主要目的為一種微晶片電路架構,其係提供一種將兩種以上的通訊模組整合在一起,並利用一加密晶片來避免程式碼外洩的情況,並採用系統級封裝(System In Package,SIP)的技術以形成一積體電路,來達到無線通訊產品降低成本及縮小體積的目的。The main purpose of this creation is a microchip circuit architecture, which provides a system-level package (System In) that integrates two or more communication modules and uses an encrypted chip to avoid code leakage. Package, SIP) technology to form an integrated circuit to achieve wireless communication products to reduce costs and reduce the size.
為達上述目的,本發明為一種微晶片電路架構,其係包括: 一第一射頻模組,用以感測一電子通行繳費系統之射頻信 號;一第二射頻模組,用以感測一射頻辨識裝置之射頻信號;一微控制單元,與該第一、二射頻模組連接,並對二者做運算及處理;一加密單元,用以該微控制單元的運算結果進行加密動作。To achieve the above object, the present invention is a microchip circuit architecture including: a first RF module for sensing an RF signal of an electronic toll payment system a second RF module for sensing a radio frequency signal of a radio frequency identification device; a micro control unit connected to the first and second radio frequency modules, and performing operations and processing on the two; an encryption unit, The encryption operation is performed by the operation result of the micro control unit.
較佳者,該第一射頻模組係符合ISO14443A/B的通信規格標準。Preferably, the first radio frequency module conforms to the communication specification standard of ISO14443A/B.
較佳者,該第一射頻模組之工作頻率係為5.8GHz或900MHz。Preferably, the operating frequency of the first RF module is 5.8 GHz or 900 MHz.
較佳者,該第二射頻模組可應用於金融消費扣款、運輸消費扣款之用途。Preferably, the second RF module can be used for the purpose of deduction of financial consumption and deduction of transportation consumption.
較佳者,該第二射頻模組之工作頻率係為13.56MHz。Preferably, the operating frequency of the second RF module is 13.56 MHz.
較佳者,該第一射頻模組、該第二射頻模組、該微控制單元及該加密單元係為利用一系統封裝技術形成一積體電路。Preferably, the first radio frequency module, the second radio frequency module, the micro control unit and the encryption unit form an integrated circuit by using a system packaging technology.
較佳者,該第一射頻模組、該第二射頻模組、該微控制單元及該加密單元係為晶粒所構成。Preferably, the first RF module, the second RF module, the micro control unit and the encryption unit are formed by a die.
較佳者,更包括一電源模組,用以提供該第一射頻模組、該第二射頻模組、該微控制單元及該加密單元之所需電力。Preferably, the method further includes a power module for providing power required by the first RF module, the second RF module, the micro control unit, and the encryption unit.
為進一步對本創作有更深入的說明,乃藉由以下圖示、圖號說明及創作詳細說明,冀能對 貴審查委員於審查工作有所助益。In order to further explain this creation, the following illustrations, illustrations and detailed descriptions of the creations can help your review team in the review process.
為使 貴審查委員能對本創作之特徵、目的及功能有更進一步的認知與瞭解,下文特將本創作之裝置的相關細部結構以及設計的理念原由進行說明,以使得 審查委員可以了解本創作之特點,詳細說明陳述如下:請參閱圖1所示,係為本創作之微晶片電路架構之功能方塊實施例圖,該微晶片1係包括:一第一射頻模組11,用以感測一電子通行繳費系統(Electronic Toll Collection System,ETC)之射頻信號,而該電子通行繳費系統即為第一無線讀取裝置2;一第二射頻模組12,用以感測一射頻辨識(Radio Frequency Identification,RFID)裝置之射頻信號,該射頻辨識裝置即為第二無線讀取裝置3;一微控制單元13,與該第一、二射頻模組(11、12)連接,並對二者做運算及處理;一加密單元14,用以該微控制單元13的運算結果進行加密動作;一電源模組15,用以提供該第一射頻模組11、該第二射頻模組12、該微控制單元13及該加密單元14之所需電力。該第一射頻模組11、該第二射頻模組12、該微控制單元13及該加密單元14係為利用一系統級封裝(System In Package,SIP)技術形成一積體電路,且皆為係為晶粒(Die)所構成。In order to enable your review committee to have a better understanding and understanding of the features, purposes and functions of this creation, the following is a detailed description of the detailed structure of the device and the concept of the design, so that the reviewer can understand the creation. The detailed description is as follows: Please refer to FIG. 1 , which is a functional block diagram of the microchip circuit architecture of the present invention. The microchip 1 includes a first RF module 11 for sensing a The radio frequency signal of the Electronic Toll Collection System (ETC), which is the first wireless reading device 2; a second RF module 12 for sensing a radio frequency identification (Radio Frequency) Identification, RFID) RF signal of the device, the RFID device is the second wireless reading device 3; a micro control unit 13 is connected to the first and second RF modules (11, 12), and An encryption unit 14 for performing an encryption operation on the operation result of the micro control unit 13; a power module 15 for providing the first RF module 11, the first The required power of the radio frequency module 12, the micro control unit 13, and the encryption unit 14. The first radio frequency module 11, the second radio frequency module 12, the micro control unit 13 and the encryption unit 14 form an integrated circuit by using a system in package (SIP) technology, and both are It is made up of die.
上述該第一射頻模組11係符合ISO14443A/B的通信規格標準;該第一射頻模組之工作頻率係為5.8GHz或900MHz。The first RF module 11 is in compliance with the communication specification standard of ISO14443A/B; the operating frequency of the first RF module is 5.8 GHz or 900 MHz.
上述第二射頻模組12可應用於金融消費扣款、運輸消費扣款之用途,例如:信用卡之無線感應扣款或搭乘捷運之無線感應扣款;該第二射頻模組之工作頻率係為13.56MHz。The second RF module 12 can be applied to the debit of financial consumption and the deduction of transportation consumption, for example, a wireless sensor deduction of a credit card or a wireless sensor deduction of a MRT; the operating frequency of the second radio frequency module is It is 13.56MHz.
藉由上述圖1之揭露,即可瞭解本創作為為一種微晶片電路架構,其係提供一種將兩種以上的通訊模組整合在一起,並 利用一加密晶片來避免程式碼外洩的情況,並採用系統級封裝(System In Package,SIP)的技術以形成一積體電路,來達到無線通訊產品降低成本及縮小體積的目的,如此亦可改進習知無線電子產品僅能感測單一無線信號之不便,而本創作於商業市場上亦具有極大的商機,而使無線模組小巧化及具有保密的功能,故提出專利申請以尋求專利權之保護。By the above disclosure of FIG. 1, it can be understood that the present invention is a microchip circuit architecture, which provides a method of integrating two or more communication modules, and Using an encrypted chip to avoid the leakage of code, and using System In Package (SIP) technology to form an integrated circuit to achieve wireless communication products to reduce costs and reduce the size, so Improving the wireless electronic products can only sense the inconvenience of a single wireless signal, and this creation has great business opportunities in the commercial market, and the wireless module is compact and has a secret function, so a patent application is filed to seek patent rights. Protection.
唯以上所述者,僅為本創作之較佳實施例,當不能以之限制本創作範圍。即大凡依本創作申請專利範圍所做之均等變化及修飾,仍將不失本創作之要義所在,亦不脫離本創作之精神和範圍,故都應視為本創作的進一步實施狀況。The above is only the preferred embodiment of the present invention, and the scope of the present invention cannot be limited. That is to say, the equal changes and modifications made by Dafan in accordance with the scope of application for patent creation will not lose the essence of this creation, nor will it deviate from the spirit and scope of this creation, so it should be regarded as the further implementation of this creation.
綜合上述,本創作之組合元件少且製造容易,因此生產製造以及組裝之成本相當低,已經足以滿足業界之需求,進而提高該產業之競爭力,誠已符合新型專利法所規定申請創作所需具備之要件,故爰依法呈提新型專利之申請,謹請 貴審查委員允撥時間惠予審視,並賜准專利為禱。In summary, the combination of this creation is small and easy to manufacture, so the cost of manufacturing and assembly is quite low, which is enough to meet the needs of the industry, thereby improving the competitiveness of the industry. It has met the requirements of the new patent law. If you have the necessary requirements, you should submit an application for a new type of patent in accordance with the law. Please ask your review committee to allow time for review and grant the patent as a prayer.
1‧‧‧微晶片1‧‧‧microchip
11‧‧‧第一射頻模組11‧‧‧First RF Module
12‧‧‧第二射頻模組12‧‧‧Second RF Module
13‧‧‧微控制單元13‧‧‧Micro Control Unit
14‧‧‧加密單元14‧‧‧Encryption unit
15‧‧‧電源模組15‧‧‧Power Module
2‧‧‧第一無線讀取裝置2‧‧‧First wireless reading device
3‧‧‧第二無線讀取裝置3‧‧‧Second wireless reading device
圖1係為本創作之微晶片電路架構之功能方塊實施例圖。1 is a functional block diagram of a microchip circuit architecture of the present invention.
1‧‧‧微晶片1‧‧‧microchip
11‧‧‧第一射頻模組11‧‧‧First RF Module
12‧‧‧第二射頻模組12‧‧‧Second RF Module
13‧‧‧微控制單元13‧‧‧Micro Control Unit
14‧‧‧加密單元14‧‧‧Encryption unit
15‧‧‧電源模組15‧‧‧Power Module
2‧‧‧第一無線讀取裝置2‧‧‧First wireless reading device
3‧‧‧第二無線讀取裝置3‧‧‧Second wireless reading device
Claims (8)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW102201705U TWM453961U (en) | 2013-01-25 | 2013-01-25 | Microchip circuit architecture |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW102201705U TWM453961U (en) | 2013-01-25 | 2013-01-25 | Microchip circuit architecture |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TWM453961U true TWM453961U (en) | 2013-05-21 |
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ID=49080339
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW102201705U TWM453961U (en) | 2013-01-25 | 2013-01-25 | Microchip circuit architecture |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TWM453961U (en) |
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2013
- 2013-01-25 TW TW102201705U patent/TWM453961U/en not_active IP Right Cessation
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