TWI886037B - Power supply device for suppressing electromagnetic interference - Google Patents

Abstract

A power supply device for suppressing EMI (Electromagnetic Interference) includes a filter and absorption circuit, a bridge rectifier, a boost inductor, a sense resistor, a power switch element, a first output stage circuit, a switch circuit, a transformer, a resonant capacitor, a second output stage circuit, and a detection and control circuit. The detection and control circuit can control the filter and absorption circuit to operate in either a pure filter mode or a surge absorption mode according to a voltage difference across the sense resistor.

Description

Power supply for suppressing electromagnetic interference

The present invention relates to a power supply, and more particularly to a power supply capable of suppressing electromagnetic interference.

Power supplies are indispensable components in the field of laptop computers. However, if the electromagnetic interference (EMI) of the power supply is too severe, it is easy to cause the overall operating performance of the related laptop to decline. In view of this, it is necessary to propose a new solution to overcome the difficulties faced by previous technologies.

In a preferred embodiment, the present invention provides a power supply for suppressing electromagnetic interference, comprising: a filtering and absorbing circuit, generating a first filtering potential and a second filtering potential according to a first input potential and a second input potential; a bridge rectifier, generating a rectified potential according to the first filtering potential and the second filtering potential; a boost inductor, receiving the rectified potential; a sensing inductor; The invention relates to a power converter comprising a first output stage circuit, a second output stage circuit and a second output stage circuit. The first output stage circuit comprises a first output stage circuit and a second output stage circuit. The first output stage circuit comprises a first output stage circuit and a second output stage circuit. The first output stage circuit comprises a first output stage circuit and a second output stage circuit. The first output stage circuit comprises a first output stage circuit and a second output stage circuit. The first output stage circuit comprises a first output stage circuit and a second output stage circuit. The first output stage circuit comprises a first output stage circuit and a second output stage circuit. The first output stage circuit comprises a first output stage circuit and a second output stage circuit. A switching potential; a transformer, including a main coil, a first secondary coil, and a second secondary coil, wherein the transformer has a leakage inductor and an excitation inductor built therein, and the main coil receives the switching potential via the leakage inductor; a resonant capacitor coupled to the excitation inductor; a second output stage circuit coupled to the first secondary coil and the second secondary coil, and generates an output potential; and a detection and control circuit to generate the first driving potential, the second driving potential, and the third driving potential, wherein the detection and control circuit further generates a control potential according to a duty cycle of the first driving potential, the potential difference, and the output potential; wherein the filtering and absorption circuit further operates in a pure filtering mode or a surge absorption mode according to the control potential.

In some embodiments, the filtering and absorbing circuit includes: a first capacitor having a first end and a second end, wherein the first end of the first capacitor is coupled to a first input node to receive the first input potential, and the second end of the first capacitor is coupled to a second input node to receive the second input potential; a first inductor having a first end and a second end, wherein the first end of the first inductor is coupled to the first input node, and the first inductor The second end of the inductor is coupled to a first control node to output the first filter potential; a second inductor having a first end and a second end, wherein the first end of the second inductor is coupled to the first input node, and the second end of the second inductor is coupled to the first control node; a third inductor having a first end and a second end, wherein the first end of the third inductor is coupled to the second input node, and the second end of the third inductor is coupled to a second control node. a control node to output the second filter potential; a fourth inductor having a first end and a second end, wherein the first end of the fourth inductor is coupled to the second input node, and the second end of the fourth inductor is coupled to the second control node; a first transistor having a control end, a first end, and a second end, wherein the control end of the first transistor is used to receive the control potential, the first end of the first transistor is coupled to a first node, and the first transistor The second end of the crystal is coupled to the first input node; a first absorber having a first end and a second end, wherein the first end of the first absorber is coupled to the first node, and the second end of the first absorber is coupled to the first control node; a second transistor having a control end, a first end, and a second end, wherein the control end of the second transistor is used to receive the control potential, the first end of the second transistor is coupled to a second node, and the The second end of the second transistor is coupled to the second input node; a second absorber having a first end and a second end, wherein the first end of the second absorber is coupled to the second node, and the second end of the second absorber is coupled to the second control node; a second capacitor having a first end and a second end, wherein the first end of the second capacitor is coupled to the first control node, and the second end of the second capacitor is coupled to the second control node; a third a capacitor having a first terminal and a second terminal, wherein the first terminal of the third capacitor is coupled to the first control node, and the second terminal of the third capacitor is coupled to a ground potential; a fourth capacitor having a first terminal and a second terminal, wherein the first terminal of the fourth capacitor is coupled to the second control node, and the second terminal of the fourth capacitor is coupled to the ground potential; a first Zener diode having an anode and a cathode, wherein the first Zener diode The anode is coupled to a third node, and the cathode of the first Zener diode is coupled to the first control node; a third transistor has a control terminal, a first terminal, and a second terminal, wherein the control terminal of the third transistor is used to receive the control potential, the first terminal of the third transistor is coupled to the ground potential, and the second terminal of the third transistor is coupled to the third node; a second Zener diode has an anode and a cathode, wherein the second Zener diode The anode of the electrode is coupled to a fourth node, and the cathode of the second Zener diode is coupled to the second control node; and a fourth transistor has a control end, a first end, and a second end, wherein the control end of the fourth transistor is used to receive the control potential, the first end of the fourth transistor is coupled to the ground potential, and the second end of the fourth transistor is coupled to the fourth node; wherein the second inductor and the third inductor are coupled to each other.

In some embodiments, the bridge rectifier includes: a first diode having an anode and a cathode, wherein the anode of the first diode is coupled to the first control node to receive the first filter potential, and the cathode of the first diode is coupled to a fifth node to output the rectified potential; a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to the second control node to receive the second filter potential, and the cathode of the second diode is coupled to the fifth node; a third diode having an anode and a cathode, wherein the anode of the third diode is coupled to the ground potential, and the cathode of the third diode is coupled to the ground potential. The cathode of the body is coupled to the first control node; and a fourth diode having an anode and a cathode, wherein the anode of the fourth diode is coupled to the ground potential, and the cathode of the fourth diode is coupled to the second control node; wherein the boost inductor has a first end and a second end, the first end of the boost inductor is coupled to the fifth node to receive the rectified potential, and the second end of the boost inductor is coupled to a sixth node; wherein the sensing resistor has a first end and a second end, the first end of the sensing resistor is coupled to the sixth node, and the second end of the sensing resistor is coupled to a seventh node.

In some embodiments, the power switch includes: a fifth transistor having a control end, a first end, and a second end, wherein the control end of the first transistor is used to receive the first driving potential, the first end of the fifth transistor is coupled to the ground potential, and the second end of the fifth transistor is coupled to the seventh node.

In some embodiments, the first output stage circuit includes: a fifth diode having an anode and a cathode, wherein the anode of the fifth diode is coupled to the seventh node, and the cathode of the fifth diode is coupled to an eighth node to output the intermediate potential; and a fifth capacitor having a first end and a second end, wherein the first end of the fifth capacitor is coupled to the eighth node, and the second end of the fifth capacitor is coupled to the ground potential.

In some embodiments, the switching circuit includes: a sixth transistor having a control end, a first end, and a second end, wherein the control end of the sixth transistor is used to receive the second driving potential, the first end of the sixth transistor is coupled to a ninth node to output the switching potential, and the second end of the sixth transistor is coupled to the eighth node to receive the intermediate potential; and a seventh transistor having a control end, a first end, and a second end, wherein the control end of the seventh transistor is used to receive the third driving potential, the first end of the seventh transistor is coupled to the ground potential, and the second end of the seventh transistor is coupled to the ninth node.

In some embodiments, the leakage inductor has a first end and a second end, the first end of the leakage inductor is coupled to the ninth node to receive the switching potential, the second end of the leakage inductor is coupled to a tenth node, the main coil has a first end and a second end, the first end of the main coil is coupled to the tenth node, the second end of the main coil is coupled to an eleventh node, the excitation inductor has a first end and a second end, the first end of the excitation inductor is coupled to the tenth node, the second end of the excitation inductor is coupled to the eleventh node. The resonant capacitor has a first end and a second end, the first end of the resonant capacitor is coupled to the eleventh node, the second end of the resonant capacitor is coupled to the ground potential, the first secondary coil has a first end and a second end, the first end of the first secondary coil is coupled to a twelfth node, the second end of the first secondary coil is coupled to a common node, the second secondary coil has a first end and a second end, the first end of the second secondary coil is coupled to the common node, and the second end of the second secondary coil is coupled to a thirteenth node.

In some embodiments, the second output stage circuit includes: a sixth diode having an anode and a cathode, wherein the anode of the sixth diode is coupled to the twelfth node, and the cathode of the sixth diode is coupled to an output node to output the output potential; a seventh diode having an anode and a cathode, wherein the anode of the seventh diode is coupled to the thirteenth node, and the cathode of the seventh diode is coupled to the output node; and a sixth capacitor having a first end and a second end, wherein the first end of the sixth capacitor is coupled to the output node, and the second end of the sixth capacitor is coupled to the common node.

In some embodiments, the detection and control circuit includes: an averaging circuit that calculates an average value of the potential difference across the sensing resistor to generate an average potential; and a comparator having a positive input terminal, a negative input terminal, and an output terminal, wherein the positive input terminal of the comparator is used to receive a reference potential, the negative input terminal of the comparator is used to receive the average potential, and the output terminal of the comparator is used to output a comparison potential.

In some embodiments, the detection and control circuit further includes: a microcontroller, generating the reference potential, the first drive potential, the second drive potential, and the third drive potential, wherein the microcontroller further generates a first indication potential and a second indication potential according to the comparison potential and the duty cycle of the first drive potential; and an AND gate, having a first input terminal, a second input terminal, a third input terminal, and an output terminal, wherein the first input terminal of the AND gate is used to receive the output potential. The second input terminal of the AND gate is used to receive the first indication potential, the third input terminal of the AND gate is used to receive the second indication potential, and the output terminal of the AND gate is used to output a logic potential; wherein the microcontroller further generates the control potential according to the logic potential; wherein if the control potential has a low logic level, the filter and absorption circuit will operate in the pure filtering mode; wherein if the control potential has a high logic level, the filter and absorption circuit will operate in the surge absorption mode.

In order to make the purpose, features and advantages of the present invention more clearly understood, specific embodiments of the present invention are specifically listed below and described in detail with reference to the accompanying drawings.

Certain terms are used in the specification and patent application to refer to specific components. Those skilled in the art should understand that hardware manufacturers may use different terms to refer to the same component. This specification and patent application do not use differences in names as a way to distinguish components, but use differences in the functions of components as the criterion for distinction. The words "include" and "including" mentioned throughout the specification and patent application are open terms and should be interpreted as "including but not limited to". The word "substantially" means that within an acceptable error range, those skilled in the art can solve the technical problem within a certain error range and achieve the basic technical effect. In addition, the word "coupled" in this specification includes any direct and indirect electrical connection means. Therefore, if a first device is described herein as being coupled to a second device, it means that the first device may be directly electrically connected to the second device, or may be indirectly electrically connected to the second device via other devices or connection means.

FIG. 1 is a schematic diagram showing a power supply 100 according to an embodiment of the present invention. For example, the power supply 100 can be applied to a desktop computer, a laptop computer, or an all-in-one computer. As shown in FIG. 1 , the power supply 100 includes: a filtering and absorbing circuit 110, a bridge rectifier 120, a boost inductor LU, a sensing resistor RS, a power switch 130, a first output stage circuit 140, a switching circuit 150, a transformer 160, a resonant capacitor CR, a second output stage circuit 170, and a detection and control circuit 180. It should be noted that, although not shown in FIG. 1 , the power supply 100 may further include other components, such as a voltage regulator and/or a negative feedback circuit.

The filter and absorption circuit 110 can generate a first filter potential VF1 and a second filter potential VF2 according to a first input potential VIN1 and a second input potential VIN2, wherein an AC voltage with any frequency and any amplitude can be formed between the first input potential VIN1 and the second input potential VIN2. For example, the frequency of the AC voltage can be about 50 Hz or 60 Hz, and the RMS value of the AC voltage can be about between 90 V and 264 V, but is not limited thereto. The bridge rectifier 120 can generate a rectified potential VR according to the first filter potential VF1 and the second filter potential VF2. The boost inductor LU can receive the rectified potential VR. The sensing resistor RS is coupled to the boost inductor LU, wherein a potential difference ΔV may be across the sensing resistor RS. The power switch 130 may selectively couple the sensing resistor RS to a ground potential VSS (eg, 0V) according to a first driving potential VG1. For example, if the first driving potential VG1 has a high logic level (i.e., logic "1"), the power switch 130 can couple the sensing resistor RS to the ground potential VSS (i.e., the power switch 130 can be similar to a short circuit path); conversely, if the first driving potential VG1 has a low logic level (i.e., logic "0"), the power switch 130 will not couple the sensing resistor RS to the ground potential VSS (i.e., the power switch 130 can be similar to an open circuit path). The first output stage circuit 140 is coupled to the sensing resistor RS and can generate an intermediate potential VE. The switching circuit 150 can generate the switching potential VW according to the intermediate potential VE, a second driving potential VG2, and a third driving potential VG3.

The transformer 160 includes a main coil 161, a first secondary coil 162, and a second secondary coil 163. The transformer 160 may further have a built-in leakage inductor LR and an excitation inductor LM, wherein the leakage inductor LR, the excitation inductor LM, and the main coil 161 may all be located on the same side of the transformer 160, and the first secondary coil 162 and the second secondary coil 163 may all be located on the opposite side of the transformer 160. The main coil 161 may receive a switching potential VW via the leakage inductor LR, and the first secondary coil 162 and the second secondary coil 163 may operate in response to the switching potential VW. The resonant capacitor CR is coupled to the excitation inductor LM. For example, the leakage inductor LR, the magnetizing inductor LM, and the resonant capacitor CR can together form a resonant tank of the power supply 100. The second output stage circuit 170 is coupled to the first sub-coil 162 and the second sub-coil 163, and can generate an output potential VOUT. For example, the output potential VOUT can be a DC potential, and its potential level can be between 18V and 22V, but is not limited thereto.

The detection and control circuit 180 can generate a first driving potential VG1, a second driving potential VG2, and a third driving potential VG3. In addition, the detection and control circuit 180 can also generate a control potential VC according to a duty cycle DT of the first driving potential VG1, the potential difference ΔV, and the output potential VOUT. It should be noted that the filtering and absorption circuit 110 operates in a pure filtering mode MD1 or a surge absorption mode MD2 according to the control potential VC. In the pure filtering mode MD1, the filtering and absorption circuit 110 only has the function of filtering. In the surge absorption mode MD2, in addition to the filtering function, the filtering and absorbing circuit 110 can also quickly eliminate the surge energy from the outside, such as lightning energy, but it is not limited to this. According to actual measurement results, the addition of the filtering and absorbing circuit 110 helps to significantly reduce the electromagnetic interference (EMI) related to the power supply 100.

The following embodiments will introduce the detailed structure and operation of the power supply 100. It must be understood that these drawings and descriptions are only examples and are not intended to limit the scope of the present invention.

FIG. 2 is a circuit diagram of a power supply 200 according to an embodiment of the present invention. In the embodiment of FIG. 2, the power supply 200 has a first input node NIN1, a second input node NIN2, and an output node NOUT, and includes: a filtering and absorbing circuit 210, a bridge rectifier 220, a boost inductor LU, a sensing resistor RS, a power switch 230, a first output stage circuit 240, a switching circuit 250, a transformer 260, a resonant capacitor CR, a second output stage circuit 270, and a detection and control circuit 280. The first input node NIN1 and the second input node NIN2 of the power supply 200 can respectively receive a first input potential VIN1 and a second input potential VIN2 from an external input power source (not shown), and the output node NOUT of the power supply 200 can be used to output an output potential VOUT to a system end, such as a laptop computer (not shown).

FIG. 3 is a circuit diagram of a filter and absorption circuit 210 according to an embodiment of the present invention. In the embodiment of FIG. 3, the filter and absorption circuit 210 includes: a first absorber 212, a second absorber 214, a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a first Zener diode DZ1, a second Zener diode DZ2, a first inductor L1, a second inductor L2, a third inductor L3, a fourth inductor L4, a first capacitor C1, a second capacitor C2, a third capacitor C3, and a fourth capacitor C4. For example, the first transistor M1, the second transistor M2, the third transistor M3, and the fourth transistor M4 may each be an N-type Metal-Oxide-Semiconductor Field-Effect Transistor (NMOSFET).

The first capacitor C1 has a first end and a second end, wherein the first end of the first capacitor C1 is coupled to the first input node NIN1, and the second end of the first capacitor C1 is coupled to the second input node NIN2. The first inductor L1 has a first end and a second end, wherein the first end of the first inductor L1 is coupled to the first input node NIN1, and the second end of the first inductor L1 is coupled to a first control node NC1 to output a first filtering potential VF1. The second inductor L2 has a first end and a second end, wherein the first end of the second inductor L2 is coupled to the first input node NIN1, and the second end of the second inductor L2 is coupled to the first control node NC1. The third inductor L3 has a first end and a second end, wherein the first end of the third inductor L3 is coupled to the second input node NIN2, and the second end of the third inductor L3 is coupled to a second control node NC2 to output a second filter potential VF2. The fourth inductor L4 has a first end and a second end, wherein the first end of the fourth inductor L4 is coupled to the second input node NIN2, and the second end of the fourth inductor L4 is coupled to the second control node NC2. In some embodiments, the second inductor L2 and the third inductor L3 are coupled to each other. For example, the second inductor L2 and the third inductor L3 can be two different coils adjacent to each other, but are not limited thereto. The second capacitor C2 has a first terminal and a second terminal, wherein the first terminal of the second capacitor C2 is coupled to the first control node NC1, and the second terminal of the second capacitor C2 is coupled to the second control node NC2. The third capacitor C3 has a first terminal and a second terminal, wherein the first terminal of the third capacitor C3 is coupled to the first control node NC1, and the second terminal of the third capacitor C3 is coupled to a ground potential VGS. The fourth capacitor C4 has a first terminal and a second terminal, wherein the first terminal of the fourth capacitor C4 is coupled to the second control node NC2, and the second terminal of the fourth capacitor C4 is coupled to the ground potential VGS. It must be understood that the ground potential VGS may refer to a system ground point, for example: a ground path coupled to the earth. In other embodiments, the ground potential VGS may also be replaced by another ground potential, which may serve as a leakage path.

The first transistor M1 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain), wherein the control terminal of the first transistor M1 is used to receive a control potential VC, the first terminal of the first transistor M1 is coupled to a first node N1, and the second terminal of the first transistor M1 is coupled to the first input node NIN1. The first absorber 212 has a first terminal and a second terminal, wherein the first terminal of the first absorber 212 is coupled to the first node N1, and the second terminal of the first absorber 212 is coupled to the first control node NC1. The second transistor M2 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain), wherein the control terminal of the second transistor M2 is used to receive the control potential VC, the first terminal of the second transistor M2 is coupled to a second node N2, and the second terminal of the second transistor M2 is coupled to the second input node NIN2. The second absorber 214 has a first terminal and a second terminal, wherein the first terminal of the second absorber 214 is coupled to the second node N2, and the second terminal of the second absorber 214 is coupled to the second control node NC2. The first Zener diode DZ1 has an anode and a cathode, wherein the anode of the first Zener diode DZ1 is coupled to a third node N3, and the cathode of the first Zener diode DZ1 is coupled to the first control node NC1. The third transistor M3 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain), wherein the control terminal of the third transistor M3 is used to receive the control potential VC, the first terminal of the third transistor M3 is coupled to the ground potential VGS, and the second terminal of the third transistor M3 is coupled to the third node N3. The second Zener diode DZ2 has an anode and a cathode, wherein the anode of the second Zener diode DZ2 is coupled to a fourth node N4, and the cathode of the second Zener diode DZ2 is coupled to the second control node NC2. The fourth transistor M4 has a control terminal (e.g., a gate), a first terminal (e.g., a source), and a second terminal (e.g., a drain), wherein the control terminal of the fourth transistor M4 is used to receive the control potential VC, the first terminal of the fourth transistor M4 is coupled to the ground potential VGS, and the second terminal of the fourth transistor M4 is coupled to the fourth node N4.

In some embodiments, the filter and absorption circuit 210 can be operated in a pure filtering mode MD1 or a surge absorption mode MD2 according to the control potential VC. For example, if the control potential VC has a low logic level, the filter and absorption circuit 210 can be operated in the pure filtering mode MD1, wherein the first absorber 212 and the second absorber 214 can be disabled. On the contrary, if the control potential VC has a high logic level, the filter and absorption circuit 210 can be operated in the surge absorption mode MD2, wherein the first absorber 212 and the second absorber 214 can be enabled, thereby quickly eliminating the surge energy from the outside. According to actual measurement results, even if some surge energy is accidentally applied to the power supply 200, it can be almost completely consumed by the filtering and absorption circuit 210, so that the normal operation of the power supply 200 will not be negatively affected too much.

The bridge rectifier 220 includes a first diode D1, a second diode D2, a third diode D3, and a fourth diode D4. The first diode D1 has an anode and a cathode, wherein the anode of the first diode D1 is coupled to the first control node NC1 to receive the first filter potential VF1, and the cathode of the first diode D1 is coupled to a fifth node N5 to output a rectified potential VR. The second diode D2 has an anode and a cathode, wherein the anode of the second diode D2 is coupled to the second control node NC2 to receive the second filter potential VF2, and the cathode of the second diode D2 is coupled to the fifth node N5. The third diode D3 has an anode and a cathode, wherein the anode of the third diode D3 is coupled to a ground potential VSS (e.g., 0V), and the cathode of the third diode D3 is coupled to the first control node NC1. The fourth diode D4 has an anode and a cathode, wherein the anode of the fourth diode D4 is coupled to the ground potential VSS, and the cathode of the fourth diode D4 is coupled to the second control node NC2.

The boost inductor LU has a first terminal and a second terminal, wherein the first terminal of the boost inductor LU is coupled to the fifth node N5 to receive the rectified potential VR, and the second terminal of the boost inductor LU is coupled to a sixth node N6.

The sensing resistor RS has a first terminal and a second terminal, wherein the first terminal of the sensing resistor RS is coupled to the sixth node N6, and the second terminal of the sensing resistor RS is coupled to a seventh node N7. In some embodiments, the sensing resistor RS has a relatively small resistance value (e.g., less than or equal to 3Ω), wherein a potential difference ΔV is across the sensing resistor RS.

The power switch 230 includes a fifth transistor M5. For example, the fifth transistor M5 may be an N-type metal oxide semi-conductor field effect transistor. The fifth transistor M5 has a control end (e.g., a gate), a first end (e.g., a source), and a second end (e.g., a drain), wherein the control end of the fifth transistor M5 is used to receive a first driving potential VG1, the first end of the fifth transistor M5 is coupled to the ground potential VSS, and the second end of the fifth transistor M5 is coupled to the seventh node N7.

The first output stage circuit 240 includes a fifth diode D5 and a fifth capacitor C5. The fifth diode D5 has an anode and a cathode, wherein the anode of the fifth diode D5 is coupled to the seventh node N7, and the cathode of the fifth diode D5 is coupled to an eighth node N8 to output an intermediate potential VE. The fifth capacitor C5 has a first terminal and a second terminal, wherein the first terminal of the fifth capacitor C5 is coupled to the eighth node N8, and the second terminal of the fifth capacitor C5 is coupled to the ground potential VSS.

The switching circuit 250 includes a sixth transistor M6 and a seventh transistor M7. For example, the sixth transistor M6 and the seventh transistor M7 can each be an N-type metal oxide semi-conductor field effect transistor. The sixth transistor M6 has a control end (e.g., a gate), a first end (e.g., a source), and a second end (e.g., a drain), wherein the control end of the sixth transistor M6 is used to receive a second driving potential VG2, the first end of the sixth transistor M6 is coupled to a ninth node N9 to output a switching potential VW, and the second end of the sixth transistor M6 is coupled to the eighth node N8 to receive the intermediate potential VE. The seventh transistor M7 has a control end (e.g., a gate), a first end (e.g., a source), and a second end (e.g., a drain), wherein the control end of the seventh transistor M7 is used to receive a third driving potential VG3, the first end of the seventh transistor M7 is coupled to the ground potential VSS, and the second end of the seventh transistor M7 is coupled to the ninth node N9.

The transformer 260 includes a main coil 261, a first secondary coil 262, and a second secondary coil 263, wherein the transformer 260 further has a built-in leakage inductor LR and an excitation inductor LM. The leakage inductor LR and the excitation inductor LM can be inherent components generated when the transformer 260 is manufactured, and they are not external independent components. The leakage inductor LR, the main coil 261, and the excitation inductor LM can all be located on the same side of the transformer 260 (for example: the primary side), and the first secondary coil 262 and the second secondary coil 263 can both be located on the opposite side of the transformer 260 (for example: the secondary side, which can be isolated from the primary side). The leakage inductor LR has a first end and a second end, wherein the first end of the leakage inductor LR is coupled to the ninth node N9 to receive the switching potential VW, and the second end of the leakage inductor LR is coupled to a tenth node N10. The main coil 261 has a first end and a second end, wherein the first end of the main coil 261 is coupled to the tenth node N10, and the second end of the main coil 261 is coupled to an eleventh node N11. The excitation inductor LM has a first end and a second end, wherein the first end of the excitation inductor LM is coupled to the tenth node N10, and the second end of the excitation inductor LM is coupled to the eleventh node N11. The resonant capacitor CR has a first end and a second end, wherein the first end of the resonant capacitor CR is coupled to the eleventh node N11, and the second end of the resonant capacitor CR is coupled to the ground potential VSS. For example, the leakage inductor LR, the excitation inductor LM, and the resonant capacitor CR can together form a resonant slot of the power supply 200. The first sub-coil 262 has a first end and a second end, wherein the first end of the first sub-coil 262 is coupled to a twelfth node N12, and the second end of the first sub-coil 262 is coupled to a common node NCM. For example, the common node NCM can provide a common potential, which can be regarded as another ground potential and can be the same as or different from the aforementioned earth potential VGS and ground potential VSS. The second sub-coil 263 has a first end and a second end, wherein the first end of the second sub-coil 263 is coupled to the common node NCM, and the second end of the second sub-coil 263 is coupled to a thirteenth node N13.

The second output stage circuit 270 includes a sixth diode D6, a seventh diode D7, and a sixth capacitor C6. The sixth diode D6 has an anode and a cathode, wherein the anode of the sixth diode D6 is coupled to the twelfth node N12, and the cathode of the sixth diode D6 is coupled to the output node NOUT. The seventh diode D7 has an anode and a cathode, wherein the anode of the seventh diode D7 is coupled to the thirteenth node N13, and the cathode of the seventh diode D7 is coupled to the output node NOUT. The sixth capacitor C6 has a first terminal and a second terminal, wherein the first terminal of the sixth capacitor C6 is coupled to the output node NOUT, and the second terminal of the sixth capacitor C6 is coupled to the common node NCM.

The detection and control circuit 280 includes an averaging circuit 282, a comparator 284, a microcontroller unit (MCU) 286, and an AND gate 288, and its functions and operation methods can be described in the following embodiments.

The averaging circuit 282 is coupled to the first terminal and the second terminal of the sensing resistor RS respectively to calculate an average value of the potential difference ΔV and generate an average potential VA. For example, the average potential VA may represent an average level of the potential difference ΔV within a given period of time, but is not limited thereto.

The comparator 284 has a positive input terminal, a negative input terminal, and an output terminal, wherein the positive input terminal of the comparator 284 is used to receive a reference potential VK, the negative input terminal of the comparator 284 is used to receive the average potential VA, and the output terminal of the comparator 284 is used to output a comparison potential VB. For example, if the average potential VA is lower than or equal to the reference potential VK, the comparator 284 will be able to output a comparison potential VB with a high logic level; conversely, if the average potential VA is higher than the reference potential VK, the comparator 284 will be able to output a comparison potential VB with a low logic level.

The microcontroller 286 can generate a reference potential VK, a first drive potential VG1, a second drive potential VG2, and a third drive potential VG3. The reference potential VK can have a fixed level (e.g., 1V or 2V). The first drive potential VG1, the second drive potential VG2, and the third drive potential VG3 can all be pulse width modulation (PWM) potentials. In addition, the second drive potential VG2 and the third drive potential VG3 can also have complementary logic levels.

In some embodiments, the microcontroller 286 may also generate a first indication potential VT1 according to the comparison potential VB. For example, if the comparison potential VB has a high logic level, the microcontroller 286 may also output a first indication potential VT1 having a high logic level. Conversely, if the comparison potential VB has a low logic level, the microcontroller 286 may also output a first indication potential VT1 having a low logic level.

In some embodiments, the microcontroller 286 may also generate a second indication potential VT2 according to a duty cycle DT of the first driving potential VG1. In detail, the microcontroller 286 may compare the duty cycle DT of the first driving potential VG1 with a critical value TH. For example, if the duty cycle DT of the first driving potential VG1 is less than or equal to the critical value TH, the microcontroller 286 may output a second indication potential VT2 with a high logic level. On the contrary, if the duty cycle DT of the first driving potential VG1 is greater than the critical value TH, the microcontroller 286 may output a second indication potential VT2 with a low logic level. The aforementioned critical value TH may be between 30% and 40%, for example, 36%, but is not limited thereto.

The AND gate 288 has a first input terminal, a second input terminal, a third input terminal, and an output terminal, wherein the first input terminal of the AND gate 288 is used to receive the output potential VOUT, the second input terminal of the AND gate 288 is used to receive the first indication potential VT1, the third input terminal of the AND gate 288 is used to receive the second indication potential VT2, and the output terminal of the AND gate 288 is used to output a logic potential VL. For example, if the output potential VOUT, the first indication potential VT1, and the second indication potential VT2 are all high logic levels, the AND gate 288 will be able to output a logic potential VL with a high logic level; conversely, if any one of the output potential VOUT, the first indication potential VT1, and the second indication potential VT2 is a low logic level, the AND gate 288 will be able to output a logic potential VL with a low logic level.

In some embodiments, the microcontroller 286 may continuously monitor the state of the logic potential VL, and may generate the control potential VC according to the logic potential VL. For example, if the logic potential VL has a low logic level, the microcontroller 286 may also output the control potential VC with a low logic level to the filtering and absorbing circuit 210; conversely, if the logic potential VL has a high logic level, the microcontroller 286 may also output the control potential VC with a high logic level to the filtering and absorbing circuit 210.

FIG. 4 is a potential waveform diagram of a power supply 200 according to an embodiment of the present invention, wherein the horizontal axis represents time (s) and the vertical axis represents potential level (V). As shown in FIG. 4, at a first time point T1, the first indication potential VT1 switches from a low logic level to a high logic level, wherein the first indication potential VT1 with a high logic level generally represents that an inductor current flowing through the boost inductor LU is relatively low. Then, at a second time point T2, the second indication potential VT2 also switches from a low logic level to a high logic level, wherein the second indication potential VT2 with a high logic level generally represents that the duty cycle DT of the first driving potential VG1 is relatively small. In addition, when the power supply 200 operates normally, its output potential VOUT is usually maintained at a high logic level. It must be understood that after the second time point T2, the control potential VC will switch from a low logic level to a high logic level, so that the filter and absorption circuit 210 first leaves the pure filter mode MD1 and then enters the surge absorption mode MD2. In summary, under the premise that the operating power of the power supply 200 itself is relatively small, its tolerance to surge energy is generally low, so the application of the surge absorption mode MD2 will help to significantly eliminate electromagnetic interference related to the power supply 200.

The present invention proposes a novel power supply having filtering and absorption circuits that can operate in different modes. According to actual measurement results, the electromagnetic interference associated with the power supply using the above-mentioned design can be effectively suppressed, so it is very suitable for application in various types of devices.

It is worth noting that the potential, current, resistance, inductance, capacitance, and other component parameters described above are not limiting conditions of the present invention. Designers can adjust these settings according to different needs. The power supply of the present invention is not limited to the states shown in Figures 1-4. The present invention may only include any one or more features of any one or more embodiments of Figures 1-4. In other words, not all of the features shown in the diagrams need to be implemented in the power supply of the present invention at the same time. Although the embodiments of the present invention use metal oxide semi-conductor field effect transistors as an example, the present invention is not limited to this. People skilled in the art can use other types of transistors, such as junction field effect transistors, or fin field effect transistors, etc., without affecting the effects of the present invention.

Ordinal numbers in this specification and the scope of the patent application, such as "first", "second", "third", etc., have no sequential relationship with each other, and are only used to mark and distinguish two different components with the same name.

Although the present invention is disclosed as above with the preferred embodiments, it is not intended to limit the scope of the present invention. Anyone skilled in the art can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the attached patent application.

100,200: Power supply 110,210: Filtering and absorption circuit 120,220: Bridge rectifier 130,230: Power switch 140,240: First output stage circuit 150,250: Switching circuit 160,260: Transformer 161,261: Main coil 162,262: First secondary coil 163,263: Second secondary coil 170,270: Second output stage circuit 180,280: Detection and control circuit 212: First absorber 214: Second absorber 282: Averaging circuit 284: Comparator 286: Microcontroller 288: AND gate C1: First capacitor C2: Second capacitor C3: Third capacitor C4: Fourth capacitor C5: Fifth capacitor C6: Sixth capacitor CR: Resonance capacitor D1: First diode D2: Second diode D3: Third diode D4: Fourth diode D5: Fifth diode D6: Sixth diode D7: Seventh diode DT: Duty cycle DZ1: First Zener diode DZ2: Second Zener diode L1: First inductor L2: Second inductor L3: Third inductor L4: Fourth inductor LM: Magnetizing inductor LR: Leakage inductor LU: Boost inductor M1: First transistor M2: Second transistor M3: Third transistor M4: fourth transistor M5: fifth transistor M6: sixth transistor M7: seventh transistor MD1: pure filter mode MD2: surge absorption mode N1: first node N2: second node N3: third node N4: fourth node N5: fifth node N6: sixth node N7: seventh node N8: eighth node N9: ninth node N10: tenth node N11: eleventh node N12: twelfth node N13: thirteenth node NC1: first control node NC2: second control node NCM: common node NIN1: first input node NIN2: second input node NOUT: output node RS: sense resistor T1: first time point T2: second time point TH: critical value VA: average potential VB: Comparison potential VC: Control potential VE: Intermediate potential VF1: First filter potential VF2: Second filter potential VK: Reference potential VG1: First drive potential VG2: Second drive potential VG3: Third drive potential VGS: Earth potential VIN1: First input potential VIN2: Second input potential VL: Logic level VOUT: Output potential VR: Rectification potential VSS: Ground potential VT1: First indication potential VT2: Second indication potential VW: Switching potential ΔV: Potential difference

FIG. 1 is a schematic diagram showing a power supply according to an embodiment of the present invention. FIG. 2 is a circuit diagram showing a power supply according to an embodiment of the present invention. FIG. 3 is a circuit diagram showing a filter and absorption circuit according to an embodiment of the present invention. FIG. 4 is a potential waveform diagram showing a power supply according to an embodiment of the present invention.

100: Power supply

110: Filtering and absorption circuit

120: Bridge rectifier

130: Power switch

140: First output stage circuit

150: Switching circuit

160: Transformer

161: Main coil

162: First coil

163: Second coil

170: Second output stage circuit

180: Detection and control circuit

CR: Resonance capacitor

DT: Working cycle

LM: Magnetizing inductor

LR: Leakage Inductor

LU: Boost Inductor

MD1: Pure filter mode

MD2: Surge absorption mode

RS: Sensing resistor

VC: control potential

VE: intermediate potential

VF1: First filter potential

VF2: Second filter potential

VG1: first driving potential

VG2: Second driving potential

VG3: The third driving potential

VIN1: first input potential

VIN2: Second input potential

VOUT: output voltage

VR: Rectification potential

VSS: ground potential

VW: Switching potential

△V: potential difference

Claims (10)

A power supply for suppressing electromagnetic interference, comprising: A filtering and absorbing circuit, generating a first filtering potential and a second filtering potential according to a first input potential and a second input potential; A bridge rectifier, generating a rectified potential according to the first filtering potential and the second filtering potential; A boost inductor, receiving the rectified potential; A sensing resistor, coupled to the boost inductor, wherein a potential difference is across the sensing resistor; A power switch, selectively coupling the sensing resistor to a ground potential according to a first driving potential; A first output stage circuit, coupled to the sensing resistor, and generating an intermediate potential; A switching circuit generates a switching potential according to the intermediate potential, a second driving potential, and a third driving potential; A transformer, including a main coil, a first secondary coil, and a second secondary coil, wherein the transformer has a built-in leakage inductor and an excitation inductor, and the main coil receives the switching potential through the leakage inductor; A resonant capacitor coupled to the excitation inductor; A second output stage circuit coupled to the first secondary coil and the second secondary coil, and generates an output potential; and A detection and control circuit generates the first driving potential, the second driving potential, and the third driving potential, wherein the detection and control circuit further generates a control potential according to a duty cycle of the first driving potential, the potential difference, and the output potential; wherein the filtering and absorption circuit further operates in a pure filtering mode or a surge absorption mode according to the control potential. A power supply as described in claim 1, wherein the filtering and absorption circuit comprises: A first capacitor having a first end and a second end, wherein the first end of the first capacitor is coupled to a first input node to receive the first input potential, and the second end of the first capacitor is coupled to a second input node to receive the second input potential; A first inductor having a first end and a second end, wherein the first end of the first inductor is coupled to the first input node, and the second end of the first inductor is coupled to a first control node to output the first filtering potential; A second inductor having a first end and a second end, wherein the first end of the second inductor is coupled to the first input node, and the second end of the second inductor is coupled to the first control node; A third inductor having a first end and a second end, wherein the first end of the third inductor is coupled to the second input node, and the second end of the third inductor is coupled to a second control node to output the second filter potential; A fourth inductor having a first end and a second end, wherein the first end of the fourth inductor is coupled to the second input node, and the second end of the fourth inductor is coupled to the second control node; A first transistor having a control end, a first end, and a second end, wherein the control end of the first transistor is used to receive the control potential, the first end of the first transistor is coupled to a first node, and the second end of the first transistor is coupled to the first input node; A first absorber having a first end and a second end, wherein the first end of the first absorber is coupled to the first node, and the second end of the first absorber is coupled to the first control node; A second transistor having a control end, a first end, and a second end, wherein the control end of the second transistor is used to receive the control potential, the first end of the second transistor is coupled to a second node, and the second end of the second transistor is coupled to the second input node; A second absorber having a first end and a second end, wherein the first end of the second absorber is coupled to the second node, and the second end of the second absorber is coupled to the second control node; A second capacitor having a first end and a second end, wherein the first end of the second capacitor is coupled to the first control node, and the second end of the second capacitor is coupled to the second control node; A third capacitor having a first end and a second end, wherein the first end of the third capacitor is coupled to the first control node, and the second end of the third capacitor is coupled to a ground potential; A fourth capacitor having a first end and a second end, wherein the first end of the fourth capacitor is coupled to the second control node, and the second end of the fourth capacitor is coupled to the ground potential; A first Zener diode having an anode and a cathode, wherein the anode of the first Zener diode is coupled to a third node, and the cathode of the first Zener diode is coupled to the first control node; A third transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the third transistor is used to receive the control potential, the first terminal of the third transistor is coupled to the earth potential, and the second terminal of the third transistor is coupled to the third node; A second Zener diode having an anode and a cathode, wherein the anode of the second Zener diode is coupled to a fourth node, and the cathode of the second Zener diode is coupled to the second control node; and A fourth transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the fourth transistor is used to receive the control potential, the first terminal of the fourth transistor is coupled to the earth potential, and the second terminal of the fourth transistor is coupled to the fourth node; The second inductor and the third inductor are coupled to each other. A power supply as described in claim 2, wherein the bridge rectifier comprises: a first diode having an anode and a cathode, wherein the anode of the first diode is coupled to the first control node to receive the first filter potential, and the cathode of the first diode is coupled to a fifth node to output the rectified potential; a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to the second control node to receive the second filter potential, and the cathode of the second diode is coupled to the fifth node; a third diode having an anode and a cathode, wherein the anode of the third diode is coupled to the ground potential, and the cathode of the third diode is coupled to the first control node; and a fourth diode having an anode and a cathode, wherein the anode of the fourth diode is coupled to the ground potential, and the cathode of the fourth diode is coupled to the second control node; wherein the boost inductor has a first end and a second end, the first end of the boost inductor is coupled to the fifth node to receive the rectified potential, and the second end of the boost inductor is coupled to a sixth node; The sensing resistor has a first end and a second end, the first end of the sensing resistor is coupled to the sixth node, and the second end of the sensing resistor is coupled to a seventh node. A power supply as described in claim 3, wherein the power switch comprises: A fifth transistor having a control end, a first end, and a second end, wherein the control end of the first transistor is used to receive the first driving potential, the first end of the fifth transistor is coupled to the ground potential, and the second end of the fifth transistor is coupled to the seventh node. A power supply as described in claim 3, wherein the first output stage circuit comprises: a fifth diode having an anode and a cathode, wherein the anode of the fifth diode is coupled to the seventh node, and the cathode of the fifth diode is coupled to an eighth node to output the intermediate potential; and a fifth capacitor having a first end and a second end, wherein the first end of the fifth capacitor is coupled to the eighth node, and the second end of the fifth capacitor is coupled to the ground potential. A power supply as described in claim 5, wherein the switching circuit comprises: a sixth transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the sixth transistor is used to receive the second driving potential, the first terminal of the sixth transistor is coupled to a ninth node to output the switching potential, and the second terminal of the sixth transistor is coupled to the eighth node to receive the intermediate potential; and a seventh transistor having a control terminal, a first terminal, and a second terminal, wherein the control terminal of the seventh transistor is used to receive the third driving potential, the first terminal of the seventh transistor is coupled to the ground potential, and the second terminal of the seventh transistor is coupled to the ninth node. A power supply as described in claim 6, wherein the leakage inductor has a first end and a second end, the first end of the leakage inductor is coupled to the ninth node to receive the switching potential, the second end of the leakage inductor is coupled to a tenth node, the main coil has a first end and a second end, the first end of the main coil is coupled to the tenth node, the second end of the main coil is coupled to an eleventh node, the excitation inductor has a first end and a second end, the first end of the excitation inductor is coupled to the tenth node, the second end of the excitation inductor is coupled to the eleventh node, the resonant capacitor having a first end and a second end, the first end of the resonant capacitor being coupled to the eleventh node, the second end of the resonant capacitor being coupled to the ground potential, the first secondary coil having a first end and a second end, the first end of the first secondary coil being coupled to a twelfth node, the second end of the first secondary coil being coupled to a common node, the second secondary coil having a first end and a second end, the first end of the second secondary coil being coupled to the common node, and the second end of the second secondary coil being coupled to a thirteenth node. A power supply as described in claim 7, wherein the second output stage circuit comprises: a sixth diode having an anode and a cathode, wherein the anode of the sixth diode is coupled to the twelfth node, and the cathode of the sixth diode is coupled to an output node to output the output potential; a seventh diode having an anode and a cathode, wherein the anode of the seventh diode is coupled to the thirteenth node, and the cathode of the seventh diode is coupled to the output node; and a sixth capacitor having a first end and a second end, wherein the first end of the sixth capacitor is coupled to the output node, and the second end of the sixth capacitor is coupled to the common node. A power supply as claimed in claim 1, wherein the detection and control circuit comprises: an averaging circuit that calculates an average value of the potential difference across the sensing resistor to generate an average potential; and a comparator having a positive input terminal, a negative input terminal, and an output terminal, wherein the positive input terminal of the comparator is used to receive a reference potential, the negative input terminal of the comparator is used to receive the average potential, and the output terminal of the comparator is used to output a comparison potential. The power supply as described in claim 9, wherein the detection and control circuit further comprises: a microcontroller, generating the reference potential, the first drive potential, the second drive potential, and the third drive potential, wherein the microcontroller further generates a first indication potential and a second indication potential according to the comparison potential and the working cycle of the first drive potential; and an AND gate, having a first input terminal, a second input terminal, a third input terminal, and an output terminal, wherein the first input terminal of the AND gate is used to receive the output potential, the second input terminal of the AND gate is used to receive the first indication potential, the third input terminal of the AND gate is used to receive the second indication potential, and the output terminal of the AND gate is used to output a logic potential; The microcontroller further generates the control potential according to the logic potential; If the control potential has a low logic level, the filter and absorption circuit will operate in the pure filtering mode; If the control potential has a high logic level, the filter and absorption circuit will operate in the surge absorption mode.

Images