TWI865244B - Cascade display driver circuit, display and information processing device - Google Patents

Abstract

A cascade display driver circuit is used to drive a display panel, comprising: at least two driver chips, each of which has a power supply input terminal for receiving a DC supply voltage and multiple differential input ports for receiving multiple sets of differential data signals; and a control circuit having a DC voltage source and at least two signal sources, wherein the DC voltage source is used to provide the DC supply voltage, and the at least two signal sources are used to provide the sets of differential data signals of the at least two driver chips; wherein the positive and negative polarities of the sets of differential data signals received by a first chip of the at least two driver chips are opposite to the positive and negative polarities of the sets of differential data signals received by a second chip of the at least two driver chips.

Description

Cascade display driver circuit, display and information processing device

The present invention relates to a display driver circuit, and more particularly to a display cascade driver circuit comprising a plurality of driver chips.

Please refer to FIG1 , which shows a block diagram of a conventional cascade display driver circuit. As shown in FIG1 , a cascade display driver circuit 10 is used to drive a display panel 20 , and has two driver chips 11 , a connection circuit 12 and a control circuit 13 .

Each driver chip 11 has a power input terminal for receiving a DC supply voltage V _DD and n differential input ports for receiving n sets of differential data signals, wherein one driver chip 11 receives a differential data signal V _DIFF [1:n], and another driver chip 11 receives a differential data signal V _DIFF [n+1:2n], where n is an integer greater than 1.

The connection circuit 12 is connected between the second driver chip 11 and the control circuit 13 to transmit the DC supply voltage V _DD and the sets of differential data signals V _DIFF [1:n] and V _DIFF [n+1:2n] for driving the second driver chip 11.

The control circuit 13 has a DC voltage source and two signal sources. The DC voltage source is used to provide a DC supply voltage V _DD , and the two signal sources are used to provide the sets of differential data signals V _DIFF [1:n] and V _DIFF [n+1:2n].

During operation, the sets of differential data signals V _DIFF [1:n] and V _DIFF [n+1:2n] will synchronously drive the two driver chips 11, that is, the input currents I ₁ and I ₂ of the power supply input terminals of the two driver chips 11 will change in phase, causing the total current I = I ₁ + I ₂ to generate obvious ripples, thereby generating electromagnetic interference to the outside.

To solve the above problem, one solution is to set a large-capacitance voltage regulator capacitor on the control circuit 13; another solution is to perform clock spread spectrum operation or data encoding processing on the sets of differential data signals.

However, setting a large-value voltage regulator capacitor will increase the cost; and clock spread spectrum operation or data encoding processing will increase the complexity and power consumption of the overall circuit.

In order to solve the above problems, a novel cascade display driver circuit architecture is urgently needed in the art.

One object of the present invention is to provide a cascade display driver circuit that can minimize the ripple of the current flowing through the power supply wire by making the positive and negative polarities of the differential data signals received by two driver chips opposite, thereby minimizing the electromagnetic interference of the cascade display driver circuit to the outside.

Another object of the present invention is to provide a display device which can minimize its external electromagnetic interference through the aforementioned cascade display driving circuit.

Another object of the present invention is to provide an information processing device which can minimize its external electromagnetic interference through the aforementioned display.

To achieve the above-mentioned purpose, a cascade display driver circuit is proposed for driving a display panel, and it has: At least two driver chips, each of which has a power supply input terminal for receiving a DC supply voltage and a plurality of differential input ports for receiving a plurality of differential data signals; and A control circuit, having a DC voltage source and at least two signal sources, the DC voltage source is used to provide the DC supply voltage, and the at least two signal sources are used to provide the differential data signals of the at least two driver chips; Wherein, the positive and negative polarities of the differential data signals received by a first chip of the at least two driver chips are opposite to the positive and negative polarities of the differential data signals received by a second chip of the at least two driver chips.

In one embodiment, the cascade display driver circuit further has a connecting circuit connected between the display panel and the control circuit to transmit the DC supply voltage and the sets of differential data signals for driving the at least two driver chips.

In one embodiment, the plurality of signal transmission paths of the connection circuit are arranged so that the positive and negative polarities of the sets of differential data signals received by the first chip are opposite to the positive and negative polarities of the sets of differential data signals received by the second chip.

In one embodiment, the sets of differential data signals are transmitted according to a LVDS specification.

To achieve the above-mentioned purpose, the present invention further proposes a display having a display panel and a cascade display driver circuit for driving the display panel, wherein the cascade display driver circuit has: At least two driver chips, each of which has a power supply input terminal for receiving a DC supply voltage and a plurality of differential input ports for receiving a plurality of differential data signals; and A control circuit having a DC voltage source and at least two signal sources, the DC voltage source is used to provide the DC supply voltage, and the at least two signal sources are used to provide the differential data signals of the at least two driver chips; Wherein, the positive and negative polarities of the sets of differential data signals received by a first chip among the at least two driver chips are opposite to the positive and negative polarities of the sets of differential data signals received by a second chip among the at least two driver chips.

In one embodiment, the cascade display driver circuit further has a connection circuit connected between the display panel and the control circuit to transmit the DC supply voltage and the sets of differential data signals for driving the at least two driver chips.

In one embodiment, the plurality of signal transmission paths of the connection circuit are arranged so that the positive and negative polarities of the sets of differential data signals received by the first chip are opposite to the positive and negative polarities of the sets of differential data signals received by the second chip.

In one embodiment, the sets of differential data signals are transmitted according to a LVDS specification.

To achieve the above-mentioned object, the present invention further proposes an information processing device, which has a central processing unit and a display as mentioned above, wherein the central processing unit is used to communicate with the display.

In a possible embodiment, the information processing device may be a portable computer, a car computer or a smart phone.

In order to enable the Review Committee to further understand the structure, features, purpose, and advantages of the present invention, the following are attached with drawings and detailed descriptions of preferred specific embodiments.

Please refer to FIG2 , which shows a block diagram of an embodiment of the display of the present invention. As shown in FIG2 , a display 100 includes a cascade display driver circuit 110 and a display panel 120 , wherein the cascade display driver circuit 110 is used to drive the display panel 120 and has two driver chips 111 , a connection circuit 112 and a control circuit 113 .

Each driver chip 111 has a power input terminal for receiving a DC supply voltage V _DD and n differential input ports for receiving n sets of differential data signals, wherein one driver chip 111 receives a differential data signal V _DIFF [1:n], and another driver chip 111 receives a differential data signal IV _DIFF [1:n], where n is an integer greater than 1.

The connection circuit 112 is connected between the second driver chip 111 and the control circuit 113 to transmit the DC supply voltage V _DD and the groups of differential data signals V _DIFF [1:n] and IV _DIFF [1:n] for driving the second driver chip 111, wherein an inverting processing circuit 1121 is used to invert the n groups of differential data signals V _DIFF [n+1:2n] to generate IV _DIFF [1:n], and the inverting processing circuit 1121 can be to reverse the positive and negative wirings of the groups of differential data signals V _DIFF [n+1:2n] or use an inverting circuit to process the groups of differential data signals V _DIFF [n+1:2n], so that IV _DIFF [1:n] and V _DIFF [1:n] are equal. The positive and negative polarities of [n+1:2n] are opposite.

The control circuit 113 has a DC voltage source and two signal sources. The DC voltage source is used to provide a DC supply voltage V _DD , and the two signal sources are used to provide the sets of differential data signals V _DIFF [1:n] and V _DIFF [n+1:2n], wherein the sets of differential data signals V _DIFF [1:n] and V _DIFF [n+1:2n] are transmitted according to an LVDS (low voltage differential signaling) standard.

During operation, the sets of differential data signals V _DIFF [1:n] and V _DIFF [n+1:2n] will synchronously drive the two driver chips 111; and after the sets of differential data signals V _DIFF [n+1:2n] are inverted to generate IV _DIFF [1:n], the input currents I ₁ and I ₂ of the power supply input terminals of the two driver chips 111 will change in opposite phases, resulting in the ripple of the total current I = I ₁ + I ₂ being minimized, thereby minimizing the electromagnetic interference generated to the outside. Please refer to FIG. 3 for the operating waveform.

In addition, according to the above description, the present invention further proposes an information processing device. Please refer to FIG. 4, which shows a block diagram of an embodiment of the information processing device of the present invention. As shown in FIG. 4, an information processing device 200 has a central processing unit 210 and a display 220, wherein the central processing unit 210 is used to communicate with the display 220, and the display 220 is implemented by the display 100. In addition, the information processing device 200 can be a portable computer, a car computer or a smart phone.

According to the above design, the present invention has the following advantages: (1) The cascaded display driver circuit of the present invention can minimize the ripple of the current flowing through the power supply wire by making the positive and negative polarities of the differential data signals received by the two driver chips opposite, thereby minimizing the electromagnetic interference of the cascaded display driver circuit to the outside; (2) The display of the present invention can minimize its electromagnetic interference to the outside through the aforementioned cascaded display driver circuit; and (3) The information processing device of the present invention can minimize its electromagnetic interference to the outside through the aforementioned display.

The invention disclosed in this case is a preferred embodiment. Any partial changes or modifications that are derived from the technical concept of this case and are easily inferred by people familiar with the art do not deviate from the scope of the patent rights of this case.

In summary, this case shows that it is very different from the known technology in terms of purpose, means and effect, and it is the first invention that is practical and indeed meets the patent requirements for invention. We sincerely request the review committee to examine this carefully and grant a patent as soon as possible to benefit the society. This is our utmost prayer.

10: Cascade display driver circuit

11: Driver chip

12: Connecting circuit

13: Control circuit

20: Display Panel

100: Display

110: Cascade display driver circuit

111:Drive chip

112: Connection circuit

1121: Inversion processing circuit

113: Control circuit

120: Display panel

200: Information processing device

210: Central Processing Unit

220:Display

FIG. 1 is a block diagram of a conventional cascade display driver circuit; FIG. 2 is a block diagram of an embodiment of a display of the present invention; FIG. 3 is a working waveform diagram of the cascade display driver circuit of the display of FIG. 2; and FIG. 4 is a block diagram of an embodiment of an information processing device of the present invention.

100: Display

110: Cascade display driver circuit

111:Drive chip

112: Connection circuit

1121: Inversion processing circuit

113: Control circuit

120: Display panel

Claims (8)

A cascade display driver circuit for driving a display panel comprises: at least two driver chips, each of which has a power supply input terminal for receiving a DC supply voltage and a plurality of differential input ports for receiving a plurality of differential data signals; a control circuit having a DC voltage source and at least two signal sources, the DC voltage source being used to provide the DC supply voltage, and the at least two signal sources being used to provide the plurality of differential data signals of the at least two driver chips. The invention relates to a device for displaying a plurality of differential data signals; and a connecting circuit connected between the display panel and the control circuit to transmit the DC supply voltage and the plurality of differential data signals for driving the at least two drive chips; wherein the positive and negative polarities of the plurality of differential data signals received by a first chip of the at least two drive chips are opposite to the positive and negative polarities of the plurality of differential data signals received by a second chip of the at least two drive chips. A cascaded display driver circuit as described in claim 1, wherein the multiple signal transmission paths of the connecting circuit are arranged so that the positive and negative polarities of the sets of differential data signals received by the first chip are opposite to the positive and negative polarities of the sets of differential data signals received by the second chip. A cascaded display driver circuit as described in claim 1, wherein the sets of differential data signals are transmitted according to an LVDS specification. A display having a display panel and a cascade display driver circuit for driving the display panel, wherein the cascade display driver circuit has: at least two driver chips, each of which has a power supply input terminal for receiving a DC supply voltage and a plurality of differential input ports for receiving a plurality of differential data signals; a control circuit having a DC voltage source and at least two signal sources, wherein the DC voltage source is used to provide the DC supply voltage, and the at least two signal sources are used to provide The groups of differential data signals of the at least two driver chips; and a connecting circuit connected between the display panel and the control circuit to transmit the DC supply voltage and drive the groups of differential data signals of the at least two driver chips; wherein the positive and negative polarities of the groups of differential data signals received by a first chip of the at least two driver chips are opposite to the positive and negative polarities of the groups of differential data signals received by a second chip of the at least two driver chips. A display as described in claim 4, wherein the multiple signal transmission paths of the connecting circuit are arranged so that the positive and negative polarities of the sets of differential data signals received by the first chip are opposite to the positive and negative polarities of the sets of differential data signals received by the second chip. A display as described in claim 4, wherein the sets of differential data signals are transmitted according to an LVDS specification. An information processing device having a central processing unit and a display as described in any one of claims 4 to 6, wherein the central processing unit is used to communicate with the display. The information processing device as described in claim 7 is selected from the group consisting of a portable computer, a car computer and a smart phone.

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