TWI863133B - Circuit board and method of fabricating coil module - Google Patents

Abstract

A circuit board and a method of fabricating a coil module are provided. The method includes forming an opening within an insulating layer and a first metal layer, in which the first metal layer is over the insulating layer; filling a conducting filling material into the opening to form a via pad in the opening; disposing a first patterning mask over the first metal layer, in which the first patterning mask exposes a portion of the first metal layer and the via pad; deposing a metal material on the exposed portion of the first metal layer and the via pad to form a first coil layer; removing the first patterning mask; repeating the above steps to form multiple first coil layers; and electrically connecting the multiple first coil layers.

Description

Manufacturing method of circuit board and coil module

The present invention relates to a method for manufacturing a circuit board and a coil module, and in particular to a method for manufacturing a circuit board and a coil module with multiple stacked coil layers.

With the demand for functionalization of electronic technology, coil modules based on Lorentz force have been widely used in products such as camera lenses, microphones and motors. The coil modules (generated by Lorentz force) respectively enable the lens in the camera device to move to achieve optical image stabilization (OIS) and auto focus (AF) functions, the microphone to make sounds, and the motor to operate.

In recent years, as electronic products continue to move towards miniaturization, it is also necessary to develop high-performance and small-sized coil modules.

One aspect of the present invention is to provide a method for manufacturing a coil module, which utilizes a conductive filling material to form a through-hole pad embedded in an insulating layer to enhance the conduction effect between coil layers.

Another aspect of the present invention is to provide a circuit board comprising coil units stacked and electrically connected to each other.

According to one aspect of the present invention, a method for manufacturing a coil module is provided. The method includes forming at least one opening in an insulating layer and a first metal layer, wherein the first metal layer is on the insulating layer; filling a conductive filling material in the at least one opening to form at least one through-hole pad in the opening; setting a first patterned mask on the first metal layer, wherein the first patterned mask exposes a portion of the first metal layer and the through-hole pad; depositing a metal material on the exposed portion of the first metal layer and the through-hole pad to form a first coil layer; removing the first patterned mask; repeating the above steps to form a plurality of the first coil layers; and electrically connecting the plurality of the first coil layers.

According to an embodiment of the present invention, the at least one via pad includes two via pads, and the two via pads are respectively formed at two ends of the first coil layer.

According to an embodiment of the present invention, the second metal layer is disposed under the insulating layer, and the insulating layer is located between the first metal layer and the second metal layer. The manufacturing method further includes symmetrically disposing a second patterned mask on the second metal layer when disposing the first patterned mask on the first metal layer, wherein the second patterned mask exposes a portion of the second metal layer and the through-hole liner; and depositing the metal material on the exposed portion of the second metal layer and the through-hole liner to form a second coil layer.

According to one embodiment of the present invention, the first metal layer has a thickness not greater than 1 μm.

According to an embodiment of the present invention, after the step of removing the first patterned mask, the manufacturing method further includes performing a micro-etching operation to remove a portion of the first metal layer and expose a portion of the insulating layer.

According to an embodiment of the present invention, before filling the conductive filling material, the manufacturing method further comprises laminating a polymer material layer under the insulating layer; and after forming the through hole liner, removing the polymer material layer.

According to an embodiment of the present invention, the conductive filling material includes copper paste, silver paste, nanosilver or conductive polymer.

According to another aspect of the present invention, a circuit board is provided, which includes a plurality of coil units stacked and electrically connected to each other. Each coil unit includes an insulating layer, a coil layer disposed on the insulating layer, and at least one via pad, wherein the via pad is disposed at one end of the coil layer and is covered by the coil layer, the via pad is buried in the insulating layer, and an interface is formed between the via pad and the coil layer.

According to an embodiment of the present invention, the through-hole pad of at least one of the coil units includes a first through-hole pad and a second through-hole pad, and the first through-hole pad and the second through-hole pad are respectively connected to two ends of the coil layer.

According to one embodiment of the present invention, the plurality of coil units include a first coil unit, a second coil unit and a third coil unit. The second coil unit is disposed above the first coil unit, and the first through-hole pad of the second coil unit is electrically connected to the first coil unit; and the third coil unit is disposed above the second coil unit, and the second through-hole pad of the second coil unit is electrically connected to the third coil unit.

According to one embodiment of the present invention, the interface includes an intermetallic compound (IMC).

The manufacturing method of the coil module of the present invention is applied to fill the opening in the insulating layer with a conductive filling material to form a via pad, and then deposit a metal material on the via pad to form a first coil layer covering the via pad, which helps to improve the conduction effect between the coil layers.

The present invention provides many different embodiments or examples to implement different features of the invention. The specific examples of components and configurations described below are intended to simplify the present invention. These are of course only examples and are not intended to be limiting. For example, a description of a first feature formed on or above a second feature includes embodiments in which the first feature and the second feature are in direct contact, and also includes embodiments in which other features are formed between the first feature and the second feature, so that the first feature and the second feature are not in direct contact. In addition, the present invention repeats component symbols and/or letters in various specific examples. The purpose of this repetition is to simplify and clarify the description and does not indicate a relationship between the various discussed embodiments and/or configurations.

Furthermore, spatially relative terms, such as "beneath," "below," "lower," "above," "upper," etc., are used to facilitate description of the relationship of a part or feature to other parts or features depicted in the drawings. Spatially relative terms include different orientations of the component when in use or operation in addition to the orientation depicted in the drawings. The device may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatially relative descriptions used in the present invention may be interpreted in this manner.

As used in the present invention, "around", "about", "approximately" or "substantially" generally means within 20%, within 10%, or within 5% of the stated value or range.

In order to form finer circuits, a thinner metal layer must be provided on the insulating layer. However, if the metal layer is too thin, it may be etched during the process of forming the conductive through hole, thereby affecting the production of the circuit. Therefore, the present invention provides a method for manufacturing a coil module, which fills the opening in the insulating layer with a conductive filling material to form a via pad, so that the metal layer will not be etched. Then, a metal material is deposited on the via pad to form a first coil layer covering the via pad, which is more helpful to improve the conduction effect between the coil layers.

1A to 1E are cross-sectional views of some steps of a method for manufacturing a coil module according to some embodiments of the present invention. First, referring to FIG. 1A , an insulating layer 110 is provided, and a first metal layer 112 and a second metal layer 114 are respectively disposed on an upper surface 110A and a lower surface 110B of the insulating layer 110. In other words, the insulating layer 110 is between the first metal layer 112 and the second metal layer 114.

In some embodiments, the first metal layer 112 and the second metal layer 114 have a thickness of no greater than 3 μm, preferably no greater than 1 μm. If the first metal layer 112 and the second metal layer 114 are too thick (e.g., greater than 3 μm), it is not conducive to the subsequent formation of finer circuits. In some embodiments, the first metal layer 112 and the second metal layer 114 include copper, and the insulating layer 110 can be a flexible film layer made of a polymer material, so the insulating layer 110, the first metal layer 112, and the second metal layer 114 can be a flexible copper clad laminate (FCCL).

Then, referring to FIG. 1A , an opening O1 is formed, wherein the opening O1 extends through the first metal layer 112, the insulating layer 110, and the second metal layer 114. In some embodiments, the opening O1 may be formed by laser drilling. In some embodiments, the aperture of the opening O1 is about 20 μm to about 2000 μm.

Referring to FIG. 1B , after the opening O1 is formed, a polymer material layer 120 is bonded under the second metal layer 114 to facilitate the subsequent filling step. In some embodiments, the polymer material layer 120 includes polyethylene terephthalate (PET), polyimide (PI) or other suitable materials. Then, a conductive filling material is filled into the opening O1 (refer to FIG. 1A ) to form a via liner 130. In some embodiments, the conductive filling material includes copper paste, silver paste, nanosilver or conductive polymer. Since the via pad 130 needs to be used as a plated conductive layer, in some specific examples, the volume resistivity of the conductive filling material (i.e., the via pad 130) is less than 1000 μΩ-cm. In some embodiments, the method of filling the conductive filling material includes but is not limited to printing, inkjet printing, or dispensing.

After forming the via pad 130, the polymer material layer 120 may be removed. It should be understood that the via pad 130 shown in FIG. 1B protrudes from the first metal layer 112. Depending on the filling depth, in other embodiments, the via pad 130 may be flush with the first metal layer 112, or the via pad 130 may be recessed and lower than the first metal layer 112. Regardless of the shape of the via pad 130 or the relative depth between the via pad 130 and the first metal layer 112, the inter-layer conduction effect will not be affected.

Referring to FIG. 1C , after removing the polymer material layer 120 (refer to FIG. 1B ), a dry film 142 is formed on the first metal layer 112 and the via liner 130, and a dry film 144 is formed on the second metal layer 114 and the via liner 130. Then, referring to FIG. 1D , the steps of patterning the dry film 142 and the dry film 144 are symmetrically performed above and below the insulating layer 110 to form a first patterned mask 143 and a second patterned mask 145, respectively, that is, removing a portion 142A of the dry film 142 and a portion 144A of the dry film 144. The first patterned mask 143 and the second patterned mask 145 are used to partially cover the first metal layer 112 and the second metal layer 114 respectively, so as to expose a portion of the first metal layer 112, the via liner 130 and a portion of the second metal layer 114.

Referring to FIG. 1D , metal material is deposited on the portions of the first metal layer 112 and the second metal layer 114 that are not covered by the first patterned mask 143 and the second patterned mask 145 to form a first coil layer 152 and a second coil layer 154, respectively. In some embodiments, the metal material may be deposited by electroplating. The first coil layer 152 and the second coil layer 154 must be higher than the via pad 130. In some embodiments, the thickness of the first coil layer 152 and the second coil layer 154 is about 5 μm to about 100 μm.

Referring to FIG. 1E , the first patterned mask 143 and the second patterned mask 145 are removed, and then a baking operation is performed, that is, the first coil layer 152 and the second coil layer 154 and the via pad 130 are baked. After the baking operation, due to the properties of the materials, distinct interfaces are formed between the first coil layer 152 and the second coil layer 154 and the via pad 130. The interfaces can be observed using an electron microscope.

In some embodiments, the interface forms an intermetallic compound (IMC) 160 and an intermetallic compound 165, which can effectively enhance the interlayer bonding strength due to the combined effect of the alloy and the polymer. Then, a micro-etching operation can be performed to remove a portion of the first metal layer 112 and a portion of the second metal layer 114 under the first patterned mask 143 and the second patterned mask 145, thereby exposing a portion of the insulating layer 110.

Since the first metal layer 112 and the first coil layer 152 are both part of the circuit, they can be collectively referred to as the coil layer 172; similarly, the second metal layer 114 and the second coil layer 155 can be collectively referred to as the coil layer 174. In some embodiments, two via pads can be embedded in one insulating layer 110, and the two via pads are respectively disposed at two ends of the first coil layer 152.

Then, the steps of FIG. 1A to FIG. 1E may be repeated to form a plurality of first coil layers and/or second coil layers on the first coil layer 152 and/or the second coil layer 154, and the first coil layers and/or the second coil layers may be electrically connected to each other using the via pad 130. It should be understood that the steps of FIG. 1A to FIG. 1E are described by forming a plurality of coil layers, such as the first coil layer 152 and the second coil layer 154, at the same time, but it is also possible to select to form only a single coil layer, i.e., the first coil layer 152 or the second coil layer 154, and the present invention is not limited thereto.

The method of forming a via pad by filling a conductive filling material is beneficial to increasing the cross-sectional area of the via pad, reducing the volume of the cavity or avoiding the formation of the cavity, thereby reducing the resistance and meeting the demand of electronic products with larger current.

The present invention provides a circuit board, which includes a plurality of coil units stacked on each other, and two adjacent coil units are electrically connected to each other. Each coil unit includes an insulating layer (e.g., insulating layer 110), a coil layer on the insulating layer (e.g., first coil layer 152 and/or second coil layer 154), and a via pad (e.g., via pad 130). The via pad is disposed at one end of the coil layer and is covered by the coil layer, i.e., buried in the insulating layer, as described above.

Please refer to FIG. 2 , which is a simplified three-dimensional schematic diagram of a portion of a coil module 200 of a circuit board according to some embodiments of the present invention. FIG. 2 only shows three coil units of the coil module 200 , but the coil module 200 may include more coil units. It should be noted that the insulating layer of each coil unit is omitted in FIG. 2 , wherein a coil unit shown in FIG. 2 may include an insulating layer and at least one coil layer (such as the above-mentioned first coil layer 152 ) located on the insulating layer. For example, at least one coil unit may have only a first coil layer 152 but not any second coil layer 154. The coil module 200 includes a first coil unit 210 , a second coil unit 230 and a third coil unit 250 . The second coil unit 230 is disposed above the first coil unit 210 , and the third coil unit 250 is disposed above the second coil unit 230 .

The second coil unit 230 includes a first via pad 235 disposed at an inner end 232A of the coil layer 232 and a second via pad 238 disposed at an outer end 232B of the coil layer 232. The first via pad 235 of the second coil unit 230 is electrically connected to the first coil unit 210. In some embodiments, the first via pad 235 is electrically connected to the inner end 212A of the coil layer 212 of the first coil unit 210. Furthermore, the second via pad 238 of the second coil unit 230 is electrically connected to the third coil unit 250. In some embodiments, the second via pad 238 is electrically connected to the outer side 252B of the coil layer 252 of the third coil unit 250. It should be understood that the dotted line in FIG. 2 represents the electrical connection between the via pad (e.g., the first via pad 235) and the coil unit (e.g., the first coil unit 210 and the second coil unit 230).

Please refer to FIG. 3, which shows a three-dimensional view of a portion of a coil module 300 of a circuit board according to other embodiments of the present invention. FIG. 3 only shows two coil units of the coil module 300, but the coil module 300 may include more coil units. It should be noted that the insulating layer of each coil unit is omitted in FIG. 3. The second coil unit 330 is disposed above the first coil unit 310, and an insulating layer (not shown) is included between the first coil unit 310 and the second coil unit 330.

The first coil unit 310 includes a first coil layer 312 above an insulating layer (not shown), a second coil layer 314 below the insulating layer, and a first via pad 316 between the first coil layer 312 and the second coil layer 314. The first via pad 316 is disposed at an inner end 312A of the first coil layer 312 and an inner end 314A of the second coil layer 314. Similarly, the second coil unit 330 includes a first coil layer 332 above an insulating layer (not shown), a second coil layer 334 below the insulating layer, and a first via pad 336 between the first coil layer 332 and the second coil layer 334.

The first coil unit 310 further includes a second via pad 318 disposed at an outer end 312B of the first coil layer 312. The first coil unit 310 is electrically connected to the second coil unit 330 using the second via pad 318. In some embodiments, the second via pad 318 is electrically connected to an outer end 334B of a second coil layer 334 of the second coil unit 330. If another coil unit is disposed above the second coil unit 330, the second coil unit 330 can be electrically connected to the coil unit above (not shown) using the second via pad 338. Similar to FIG. 2 , the dotted lines in FIG. 3 represent electrical connections between a via pad (eg, the second via pad 318 ) and a coil unit (eg, the first coil unit 310 and the second coil unit 330 ).

Since the present invention forms a through-hole pad by filling a conductive filling material, the need for alignment can be reduced, so it is easier to form a multi-layer stacked coil unit. In some embodiments, the coil module may include 6 to 10 layers of coil units. Therefore, the needs of related electronic components for miniaturization and low energy consumption can be met.

As described above, the present invention provides a method for manufacturing a circuit board and a coil module, which utilizes a conductive filling material to fill an opening in an insulating layer, thereby eliminating the need to etch a metal layer on the insulating layer and forming a via pad buried in the insulating layer. Furthermore, a coil layer is formed on the via pad, and the interface between the via pad and the coil layer includes an intermetallic compound, which is beneficial to improving the conduction effect between the layers.

Although the present invention has been disclosed as above with several embodiments, they are not intended to limit the present invention. Anyone with ordinary knowledge in the technical field to which the present invention belongs can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be defined by the scope of the attached patent application.

110: Insulation layer 110A: Upper surface 110B: Lower surface 112: First metal layer 114: Second metal layer 120: Polymer material layer 130: Via pad 142,144: Dry film 142A,144A: Partial 143: First patterned mask 145: Second patterned mask 152: First coil layer 154: Second coil layer 160,165: Intermetallic compound 172,174: Coil layer 200: Coil module 210: First coil unit 212: Coil layer 212A: Inner end 230: Second coil unit 232: coil layer 232A: inner end 232B: outer end 235: first through hole pad 238: second through hole pad 250: third coil unit 252: coil layer 252B: outer end 300: coil module 310: first coil unit 312: first coil layer 312A: inner end 312B: outer end 314: second coil layer 314A: inner end 316: first through hole pad 318: second through hole pad 330: second coil unit 332: first coil layer 334: Second coil layer 334B: Outer end 336: First through hole pad 338: Second through hole pad O1: Opening

The present invention can be better understood by reading the following detailed description in conjunction with the accompanying drawings. It should be noted that, as is standard practice in the industry, many features are not drawn to scale. In fact, for the sake of clarity of discussion, the dimensions of many features can be arbitrarily scaled. [Figure 1A] to [Figure 1E] illustrate cross-sectional views of some steps of a method for manufacturing a coil module according to some embodiments of the present invention. [Figure 2] illustrates a simplified three-dimensional schematic diagram of a portion of a coil module of a circuit board according to some embodiments of the present invention. [Figure 3] illustrates a simplified three-dimensional schematic diagram of a portion of a coil module of a circuit board according to other embodiments of the present invention.

Domestic storage information (please note in the order of storage institution, date, and number) None Foreign storage information (please note in the order of storage country, institution, date, and number) None

110: Insulation layer

112: First metal layer

114: Second metal layer

130: Through hole liner

152: First coil layer

154: Second coil layer

160,165: Intermetallic compounds

172,174: Coil layer

Claims (10)

A method for manufacturing a coil module comprises: forming at least one opening in an insulating layer and a first metal layer, wherein the first metal layer is on the insulating layer; filling a conductive filling material in the at least one opening to form at least one through-hole pad in the at least one opening; setting a first patterned mask on the first metal layer, wherein the first patterned mask exposes a portion of the first metal layer and the through-hole pad; depositing a metal material on the exposed portion of the first metal layer and the through-hole pad to form a first coil layer; removing the first patterned mask; baking the first coil layer and the through-hole pad to form an intermetallic compound (IMC) at the interface between the first coil layer and the through-hole pad. compound, IMC); repeat the above steps to form multiple first coil layers; and electrically connect multiple first coil layers. A method for manufacturing a coil module as described in claim 1, wherein the at least one through-hole pad comprises two through-hole pads, and the two through-hole pads are respectively formed at two ends of the first coil layer. The manufacturing method of the coil module as described in claim 1, wherein a second metal layer is disposed under the insulating layer, and the insulating layer is located between the first metal layer and the second metal layer, and the manufacturing method further comprises: when the first patterned mask is disposed on the first metal layer, a second patterned mask is symmetrically disposed on the second metal layer, wherein the second patterned mask exposes a portion of the second metal layer and the through-hole liner; and depositing the metal material on the exposed portion of the second metal layer and the through-hole liner to form a second coil layer. A method for manufacturing a coil module as described in claim 1, wherein the first metal layer has a thickness not greater than 1 μm. The method for manufacturing a coil module as described in claim 3, wherein after the step of removing the first patterned mask, it further comprises: performing a micro-etching operation to remove a portion of the first metal layer and the second metal layer and expose a portion of the insulating layer. The method for manufacturing a coil module as described in claim 1, wherein before filling the conductive filling material, it further comprises: bonding a polymer material layer under the insulating layer; and after forming the through hole liner, removing the polymer material layer. The method for manufacturing a coil module as described in claim 1, wherein the conductive filling material comprises copper paste, silver slurry, nanosilver or conductive polymer. A circuit board comprises: a plurality of coil units stacked and electrically connected to each other, wherein each of the plurality of coil units comprises: an insulating layer; a coil layer disposed on the insulating layer; and at least one via pad disposed at one end of the coil layer and covered by the coil layer, wherein the via pad is buried in the insulating layer, and there is an interface between the via pad and the coil layer, wherein the interface comprises an intermetallic compound. A circuit board as described in claim 8, wherein the through-hole pad of at least one of the coil units includes a first through-hole pad and a second through-hole pad, and the first through-hole pad and the second through-hole pad are respectively connected to two ends of the coil layer. A circuit board as described in claim 9, wherein the plurality of coil units include a first coil unit, a second coil unit and a third coil unit, wherein the second coil unit is disposed above the first coil unit, and the first through-hole pad of the second coil unit is electrically connected to the first coil unit; and the third coil unit is disposed above the second coil unit, wherein the second through-hole pad of the second coil unit is electrically connected to the third coil unit.

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