TWI727651B - Multilayer circuit board - Google Patents
Multilayer circuit board Download PDFInfo
- Publication number
- TWI727651B TWI727651B TW109104046A TW109104046A TWI727651B TW I727651 B TWI727651 B TW I727651B TW 109104046 A TW109104046 A TW 109104046A TW 109104046 A TW109104046 A TW 109104046A TW I727651 B TWI727651 B TW I727651B
- Authority
- TW
- Taiwan
- Prior art keywords
- circuit layer
- circuit
- pad
- layer
- conductive structure
- Prior art date
Links
- 239000002184 metal Substances 0.000 claims description 22
- 229910052751 metal Inorganic materials 0.000 claims description 22
- 239000000463 material Substances 0.000 claims description 15
- 238000013461 design Methods 0.000 description 8
- 238000000034 method Methods 0.000 description 8
- 238000005553 drilling Methods 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 239000000654 additive Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 239000003365 glass fiber Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 239000011265 semifinished product Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
- H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
本發明是有關一種多層線路板,尤其是一種具有傾斜式導電結構的多層線路板。The invention relates to a multilayer circuit board, in particular to a multilayer circuit board with an inclined conductive structure.
目前有些電子設備朝向增加輸出功率的發展趨勢來提升效能。以網路伺服器為例,為了滿足目前的網路傳輸需求,現有網路伺服器的輸出功率越做越大,以至於網路伺服器內的主機板電路設計也需要改變來提升效能與穩定度。然而,用於容置主機板的機殼,其所具有的容置空間有限,以至於主機板的面積與形狀不好變動。其次,現有改變主機板電路設計的做法通常是直接改變主機板內的多層線路層的佈線(layout),即改變各層線路層的走線(trace)與接墊兩者的數量、分布位置及形狀。因此,整個主機板的電路設計有可能會須要重新設計,以至於原來的電路設計會整個被捨棄,從而需要花費較多的研發時間與成本。At present, some electronic devices are heading toward the development trend of increasing output power to improve performance. Take the network server as an example. In order to meet the current network transmission requirements, the output power of the existing network server is increasing, so that the motherboard circuit design in the network server also needs to be changed to improve performance and stability. degree. However, the housing for accommodating the motherboard has limited accommodating space, so that the area and shape of the motherboard are not easy to change. Secondly, the existing method of changing the circuit design of the motherboard is usually to directly change the layout of the multilayer circuit layer in the motherboard, that is, to change the number, distribution position and shape of the traces and pads of each layer of the circuit layer. . Therefore, the circuit design of the entire motherboard may need to be redesigned, so that the original circuit design will be discarded entirely, which requires a lot of research and development time and cost.
本發明提供一種多層線路板,其利用傾斜式導電結構來電性連接兩層互相隔開的線路層。The invention provides a multilayer circuit board, which uses an inclined conductive structure to electrically connect two circuit layers separated from each other.
本發明所提供的多層線路板包括第一線路層、第二線路層、線路結構與傾斜式導電結構。第一線路層在第一參考平面延伸,並包括第一接墊。第二線路層在第二參考平面延伸,並包括第二接墊。線路結構位於第一線路層及第二線路層之間,並包括至少一內層線路層,其中第一參考平面與第二參考平面彼此平行。傾斜式導電結構連接第一接墊與第二接墊,並穿過線路結構,其中傾斜式導電結構的軸心不垂直於第一參考平面。The multilayer circuit board provided by the present invention includes a first circuit layer, a second circuit layer, a circuit structure and an inclined conductive structure. The first circuit layer extends on the first reference plane and includes a first pad. The second circuit layer extends on the second reference plane and includes a second pad. The circuit structure is located between the first circuit layer and the second circuit layer, and includes at least one inner circuit layer, wherein the first reference plane and the second reference plane are parallel to each other. The inclined conductive structure connects the first pad and the second pad and passes through the circuit structure, wherein the axis of the inclined conductive structure is not perpendicular to the first reference plane.
在本發明的一實施例中,上述之第一接墊與第二接墊完全不重疊。In an embodiment of the present invention, the above-mentioned first pad and the second pad do not overlap at all.
在本發明的一實施例中,上述之傾斜式導電結構與內層線路層電性隔絕。In an embodiment of the present invention, the above-mentioned inclined conductive structure is electrically isolated from the inner circuit layer.
在本發明的一實施例中,上述之傾斜式導電結構傾斜式導電結構包括金屬筒。In an embodiment of the present invention, the above-mentioned inclined conductive structure The inclined conductive structure includes a metal cylinder.
在本發明的一實施例中,上述之傾斜式導電結構還包括填充材料,而金屬筒具有通孔,填充材料充滿通孔。In an embodiment of the present invention, the above-mentioned inclined conductive structure further includes a filling material, and the metal barrel has a through hole, and the filling material fills the through hole.
在本發明的一實施例中,上述之傾斜式導電結構在橫切面上具有介於8密耳至17密耳的外徑,而橫切面平行於第一參考平面。In an embodiment of the present invention, the above-mentioned inclined conductive structure has an outer diameter ranging from 8 mils to 17 mils on a cross section, and the cross section is parallel to the first reference plane.
在本發明的一實施例中,上述之傾斜式導電結構的數量為多個。In an embodiment of the present invention, the number of the above-mentioned inclined conductive structures is multiple.
在本發明的一實施例中,上述之線路結構包括多個內層線路層。In an embodiment of the present invention, the above-mentioned circuit structure includes a plurality of inner circuit layers.
在本發明的一實施例中,上述之線路結構包括多個絕緣層。In an embodiment of the present invention, the above-mentioned circuit structure includes a plurality of insulating layers.
基於所述,本發明的多層線路板包括三層以上的線路層(例如第一與第二線路層以及至少一層內層線路層)以及至少一個傾斜式導電結構,其中傾斜式導電結構連接其中兩層線路層,並穿過另一層線路層。利用上述傾斜式導電結構,可以增加線路板在電路設計方面的靈活性與彈性,以使本發明有機會可以在不變動多層線路板的面積與形狀以及不大幅變動這些線路層佈線的前提下,設計出可以滿足現有電子設備需求的多層線路板。Based on the foregoing, the multilayer circuit board of the present invention includes more than three circuit layers (for example, the first and second circuit layers and at least one inner circuit layer) and at least one inclined conductive structure, wherein the inclined conductive structure connects two of them. Layer circuit layer, and through another layer of circuit layer. Using the above-mentioned inclined conductive structure can increase the flexibility and flexibility of circuit design of the circuit board, so that the present invention has the opportunity to not change the area and shape of the multilayer circuit board and the premise of not greatly changing the wiring of these circuit layers. Design a multilayer circuit board that can meet the needs of existing electronic equipment.
為讓本發明上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式,作詳細說明如下。In order to make the above-mentioned features and advantages of the present invention more comprehensible and understandable, the following specific examples are given in conjunction with the accompanying drawings, which are described in detail as follows.
請參考圖1,圖1是根據本發明之一實施例之多層線路板的剖面示意圖。多層線路板10包括第一線路層11與第二線路層12。第一線路層11在第一參考平面P1延伸,而第二線路層12在第二參考平面P2延伸,其中第一參考平面P1與第二參考平面P2彼此平行。詳細而言,第一參考平面P1與第二參考平面P2為彼此互相平行的兩面虛擬平面,而第一線路層11與第二線路層12大致上是分別沿著第一參考平面P1與第二參考平面P2而延伸,所以第一線路層11與第二線路層12是實質上彼此平行。詳細而言,在多層線路板10能正常運作的前提下,上述「實質上彼此平行」包含第一線路層11與第二線路層12之間的些許不平行,即第一線路層11與第二線路層12之間的距離可以有些許的不均勻,而第一線路層11與第二線路層12兩者可以具有些許不均勻的厚度。Please refer to FIG. 1, which is a schematic cross-sectional view of a multilayer circuit board according to an embodiment of the present invention. The
多層線路板10還包括線路結構13。線路結構13位於第一線路層11及第二線路層12之間,並包括至少一層內層線路層130。以圖1為例,線路結構13包括一層內層線路層130,而多層線路板10為具有三層線路層的線路板,但在其他實施例中,線路結構13所包括的內層線路層130的數量可以是多層,即多層線路板10可以是超過三層線路層的線路板。另外,在圖1所示的實施例中,第一線路層11與第二線路層12可以是外層線路層,而內層線路層130可為多層線路板10的中間線路層,但在其他實施例中,第一線路層11與第二線路層12至少一者也可以是內層線路層,而內層線路層130可以不是中間線路層。所以,圖1不限定第一線路層11與第二線路層12一定是外層線路層,內層線路層130一定是中間線路層。此外,內層線路層130可以用來傳輸訊號,像是數位訊號。例如,內層線路層130可具有高速訊號線,其可以是PCIE(PCI Express)訊號線。或者,內層線路層130也可以是接地平面(ground plane)。The
線路結構13還包括多個絕緣層131(圖1繪示兩層),其中內層線路層130夾置在這些絕緣層131之間。各個絕緣層131可用玻纖布(prepreg or core)來製成,所以絕緣層131的構成材料可包括樹脂與玻璃纖維。另外,在本實施例中,內層線路層130可以利用導電通孔、盲孔或埋孔(皆未繪示)來電性連接其他線路層,例如第一線路層11與第二線路層12其中至少一層,以使內層線路層130能與其他線路層(例如第一線路層11或第二線路層12)彼此電性導通。當然,內層線路層130也可以不電性連接其他線路層。例如,當內層線路層130為接地平面時,內層線路層130可以不電性連接第一線路層11與第二線路層12。The
多層線路板10還包括至少一個傾斜式導電結構14。第一線路層11包括第一接墊110,而第二線路層12包括第二接墊120,其中傾斜式導電結構14連接第一接墊110與第二接墊120,並且穿過線路結構13,以使第一線路層11與第二線路層12能利用傾斜式導電結構14來彼此電性連接,讓電流能在第一線路層11與第二線路層12之間傳遞。此外,在圖1所示的實施例中,傾斜式導電結構14可以與內層線路層130電性隔絕,即傾斜式導電結構14不直接與內層線路層130電性連接及電性導通。如此,部分或全部電訊號能經由傾斜式導電結構14在第一線路層11及第二線路層12之間傳遞,但不會進入至內層線路層130。The
在本實施例中,第一接墊110與第二接墊120兩者是用來連接傾斜式導電結構14,但可不供電子元件裝設(mounted),即電子元件不直接焊接於第一接墊110與第二接墊120。不過,第一線路層11與第二線路層12各自可以還包括多條走線(trace,未繪示),其中各條走線可連接於第一接墊110與第二接墊120兩者其中一者以及其他有裝設電子元件的接墊。利用這些走線,第一接墊110與第二接墊120至少一者可電性連接至有裝設電子元件的接墊,以使第一接墊110及/或第二接墊120能電性連接此電子元件,其中上述電子元件可以是被動元件或主動元件,例如電感、電阻或處理器(例如微處理器或中央處理器)。In this embodiment, both the
此外,須說明的是,在其他實施例中,第一接墊110與第二接墊120也可以供電子元件裝設。或者,第一線路層11與第二線路層12各自可以還包括一片面積較大的金屬層,例如面積較大的銅箔,而電子元件可以裝設於此金屬層上,其中上述金屬層連接第一接墊110或第二接墊120。如此,利用此金屬層,第一接墊110與第二接墊120至少一者也能電性連接電子元件。In addition, it should be noted that in other embodiments, the
傾斜式導電結構14相對第一線路層11與第二線路層12傾斜。也就是說,傾斜式導電結構14的軸心X不垂直於第一參考平面P1,當然也不垂直於第二參考平面P2。詳細來說,在圖1的實施例中,第一接墊110與第二接墊120兩者的中心線(未繪示)明顯沒有與第一參考平面P1及第二參考平面P2兩者的法線(即垂直線)共線,而傾斜式導電結構14的軸心X也不與第一參考平面P1及第二參考平面P2兩者的法線共線。因此,傾斜式導電結構14會相對第一線路層11與第二線路層12傾斜。此外,傾斜式導電結構14在橫切面上具有介於8密耳(mil)至17密耳的外徑R,其中上述橫切面與圖1中代表外徑R的雙箭頭橫線平行,而從圖1來看,上述橫切面平行於第一參考平面P1。The inclined
傾斜式導電結構14可包括金屬筒141,而金屬筒141具有通孔(未標示)。傾斜式導電結構14連接第一接墊110及第二接墊120。詳言之,第一接墊110具有第一開口111,第二接墊120則具有第二開口121,其中第一開口111、第二開口121與上述之金屬筒141的通孔彼此連通。此外,金屬筒141還具有內壁,而第一開口111與第二開口121也分別具有內壁,且第一開口111的內壁與第二開口121的內壁分別和金屬筒141的內壁切齊。傾斜式導電結構14還包括填充材料142,而填充材料142充滿上述通孔,其中填充材料142例如為油墨、錫膏、銅膏或環氧樹脂等,所以填充材料142可以是導體或絕緣體,但本發明不以這些材料為限。在金屬筒141的通孔被填充材料142充滿之後,通孔內不易形成由氣體(例如空氣)所構成的空腔(cavity),以使多層線路板10在進入高溫環境時,不會發生爆板的情形,其中前述高溫環境例如是由迴焊爐或是進行用於惡化試驗的高溫爐所提供。The inclined
多層線路板10可以用加成法、減成法、半加成法或疊合法來製成,而傾斜式導電結構14也可以用鑽孔與電鍍通孔製程來製成,其中前述鑽孔可採用雷射鑽孔或機械鑽孔,而電鍍通孔製程(Plating Through Hole,PTH)可形成金屬筒141。此外,在圖1所示的實施例中,傾斜式導電結構14包括中空的金屬筒141,但在其他實施例中,傾斜式導電結構14也可以是填滿通孔的實心金屬柱。例如,傾斜式導電結構14可以是利用電鍍而形成的實心金屬柱。所以,傾斜式導電結構14可不包括填充材料142,而圖1所示的傾斜式導電結構14只是本發明的其中一個例子,並不用以限定本發明。The
請參考圖2,圖2是根據本發明另一實施例之多層線路板的剖面示意圖。與前述實施例相似,本實施例中的多層線路板20也包括傾斜式導電結構,其製作方法可相同於傾斜式導電結構14的製作方法。在本實施例中,多層線路板20包括多個傾斜式導電結構24a與24b,而且多層線路板20具有超過三層線路層。多層線路板20還包括第一線路層21、第二線路層22及線路結構23,其中線路結構23位於第一線路層21與第二線路層22之間。線路結構23包括多個內層線路層232至235與多個絕緣層131,而內層線路層232至235其中一者夾置在相鄰兩層絕緣層131之間。Please refer to FIG. 2, which is a schematic cross-sectional view of a multilayer circuit board according to another embodiment of the present invention. Similar to the foregoing embodiment, the
相同於前述實施例,第一線路層21在第一參考平面P1延伸,而第二線路層22在第二參考平面P2延伸,其中第一參考平面P1與第二參考平面P2彼此平行。其次,從圖2來看,傾斜式導電結構24a與24b各自包括金屬筒(未標示),所以傾斜式導電結構24a與24b在第一接墊210a、210b與第二接墊220a、220b上形成兩個開口(未標示),其中填充材料142皆填滿這些金屬筒的通孔。Same as the foregoing embodiment, the
在本實施例中,多層線路板20可以是網路伺服器內的主機板,其中第一線路層21與第二線路層22可用於供電或傳輸電訊號給電子元件,其例如是微處理器或中央處理器,而上述電子元件可以裝設於第一線路層21,即第一線路層21可供一個或多個電子元件裝設。例如,可裝設兩個中央處理器於第一線路層21。內層線路層232可具有接地平面,而內層線路層233可具有傳遞高速訊號的多條走線。必須說明的是,雖然本實施例的多層線路板20可為網路伺服器內的主機板,但在其他實施例中,多層線路板20也可為其他電子設備的主機板,例如是筆記型電腦、桌上型電腦、智慧手機、平板電腦或工業電腦內的主機板。In this embodiment, the
第一線路層21包括兩個第一接墊210a與210b,而第二線路層22也包括兩個第二接墊220a與220b。傾斜式導電結構24a連接第一接墊210a與第二接墊220a,而傾斜式導電結構24b連接第一接墊210b與第二接墊220b,其中傾斜式導電結構24a與24b皆穿過線路結構23。如此,第一線路層21與第二線路層22能利用傾斜式導電結構24a與24b來彼此電性連接,以使第二線路層22能將電力或電訊號經由傾斜式導電結構24a與24b至少一者以及第一線路層21傳遞至電子元件。例如,在第二接墊220a與220b電性連接外部電源之後,傾斜式導電結構24a與24b能分別傳遞電力至裝設於第一線路層21的兩個中央處理器,以使網路伺服器正常運作。此外,在圖2實施例中,傾斜式導電結構24b可以更連接於部分內層線路層233,因此以上傾斜式導電結構不限定只能連接兩層線路層。The
在圖2所示的實施例中,第一接墊210a與第二接墊220a完全不重疊,而第一接墊210b與第二接墊220b也是完全不重疊。也就是說,第一接墊210a、210b以及第二接墊220a、220b沿著第一參考平面P1的法線,在第一參考平面P1上的投影區域彼此不重疊。從圖2來看,第一接墊210a與210b的正下方以及第二接墊220a與220b的正上方皆存有部分內層線路層233至235。換句話說,第一接墊210a、210b以及第二接墊220a、220b與部分內層線路層233至235重疊。In the embodiment shown in FIG. 2, the
其次,第二線路層22還包括導電層221。雖然導電層221與第一接墊210a重疊,但第二接墊220a與220b皆與導電層221電性隔絕,以至於當第二接墊220a與220b電性連接外部電源時,導電層221不會電性連接外部電源。因此,如果傾斜式導電結構24a沒連接第二接墊220a,反而連接正下方的導電層221的話,多層線路板20的運作會發生異常,甚至無法運作。Secondly, the
雖然第一接墊210a、210b以及第二接墊220a、220b皆與部分內層線路層233至235重疊,且導電層221與第一接墊210a重疊,但傾斜式導電結構24a與24b能避開內層線路層233至235以及導電層221,並且直接電性連接第一接墊210a與第二接墊220a,以及直接電性連接第一接墊210b與第二接墊220b。如此,基本上在不變動第一接墊210a、210b與第二接墊220a、220b四者位置以及內層線路層233至235佈線的前提下,傾斜式導電結構24a與24b能實現第一接墊210a與第二接墊220a之間的電性連接以及第一接墊210b與第二接墊220b之間的電性連接。因此,利用上述傾斜式導電結構24a與24b,可以增加網路伺服器主機板在電路設計方面的靈活性與彈性,以幫助目前網路伺服器滿足輸出功率越來越大的趨勢,以及促使網路伺服器的效能與穩定度提升,從而有助於降低網路伺服器的成本。Although the
特別說明的是,在圖2所示的實施例中,多層線路板20具有六層線路層,其中第一線路層21與第二線路層22可以是外層線路層,但在其他實施例中,多層線路板20可以是半成品,而後續可利用加成法、減成法、半加成法或疊合法在第一線路層21與第二線路層22其中一者上增加至少一層線路層,以使傾斜式導電結構24a與24b不僅可為通孔(如圖2所示),而且也可以是盲孔或埋孔。Specifically, in the embodiment shown in FIG. 2, the
雖然圖2中的傾斜式導電結構24a與24b都是連接第一線路層21與第二線路層22,但在其他實施例中,傾斜式導電結構24a與24b兩者兩端所連接的線路層可以不同。例如,傾斜式導電結構24a連接第一線路層21與第二線路層22,而傾斜式導電結構24b可連接第一線路層21與內層線路層234,但不連接第二線路層22,也不穿過內層線路層235。換句話說,對其他未繪示實施例中的多層線路板20而言,內層線路層234可作為連接傾斜式導電結構24b的第二線路層,而內層線路層232與233可作為被傾斜式導電結構24b穿過的線路結構。由此可知,在本發明至少一實施例中,多層線路板可包括至少四層線路層與多個傾斜式導電結構,其中各個傾斜式導電結構兩端連接兩層線路層,並穿過至少一層線路層,而這些傾斜式導電結構的同一上端或下端所連接的線路層可以不是同一層。Although the inclined
綜上所述,本發明的多層線路板包括三層以上的線路層(例如第一與第二線路層以及至少一層內層線路層)以及至少一個傾斜式導電結構,其中傾斜式導電結構連接其中兩層線路層,並穿過另一層線路層。利用上述傾斜式導電結構,可以增加線路板在電路設計方面的靈活性與彈性,以使本發明有機會可以在不變動多層線路板的面積、形狀以及不大幅變動這些線路層佈線的前提下,改變多層線路板的電路來滿足現有電子設備的需求。例如,幫助目前網路伺服器滿足輸出功率越來越大的趨勢以及促使網路伺服器的效能與穩定度提升。In summary, the multilayer circuit board of the present invention includes more than three circuit layers (for example, the first and second circuit layers and at least one inner circuit layer) and at least one inclined conductive structure, wherein the inclined conductive structure is connected therein Two circuit layers, and pass through another circuit layer. Using the above-mentioned inclined conductive structure can increase the flexibility and flexibility of the circuit design of the circuit board, so that the present invention has the opportunity to not change the area and shape of the multilayer circuit board and the premise of not greatly changing the wiring of these circuit layers. Change the circuit of the multilayer circuit board to meet the needs of existing electronic equipment. For example, it helps the current network server to meet the trend of increasing output power and promotes the performance and stability of the network server.
雖然本發明已以實施例揭露如上,然其並非用以限定本發明,本發明所屬技術領域中具有通常知識者,在不脫離本發明精神和範圍內,當可作些許更動與潤飾,因此本發明保護範圍當視後附的申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Those with ordinary knowledge in the technical field of the present invention can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of invention protection shall be subject to the scope of the attached patent application.
10、20:多層線路板
11、21:第一線路層
P1:第一參考平面
110、210a、210b:第一接墊
111:第一開口
12、22:第二線路層
P2:第二參考平面
120、220a、220b:第二接墊
121:第二開口
221:導電層
13、23:線路結構
130、232~235:內層線路層
131:絕緣層
14、24a、24b:傾斜式導電結構
141:金屬筒
142:填充材料
X:軸心
R:外徑
10, 20:
圖1是根據本發明之一實施例之多層線路板的剖面示意圖。 圖2是根據本發明另一實施例之多層線路板的剖面示意圖。 FIG. 1 is a schematic cross-sectional view of a multilayer circuit board according to an embodiment of the present invention. 2 is a schematic cross-sectional view of a multilayer circuit board according to another embodiment of the invention.
10:多層線路板 10: Multilayer circuit board
11:第一線路層 11: The first circuit layer
P1:第一參考平面 P1: the first reference plane
110:第一接墊 110: first pad
111:第一開口 111: The first opening
12:第二線路層 12: The second circuit layer
P2:第二參考平面 P2: Second reference plane
120:第二接墊 120: second pad
121:第二開口 121: second opening
13:線路結構 13: Line structure
130:內層線路層 130: inner circuit layer
131:絕緣層 131: Insulation layer
14:傾斜式導電結構 14: Inclined conductive structure
141:金屬筒 141: Metal cylinder
142:填充材料 142: Filling Material
X:軸心 X: axis
R:外徑 R: outer diameter
Claims (9)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW109104046A TWI727651B (en) | 2020-02-10 | 2020-02-10 | Multilayer circuit board |
| CN202010091741.0A CN113260144A (en) | 2020-02-10 | 2020-02-13 | Multilayer circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW109104046A TWI727651B (en) | 2020-02-10 | 2020-02-10 | Multilayer circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TWI727651B true TWI727651B (en) | 2021-05-11 |
| TW202131771A TW202131771A (en) | 2021-08-16 |
Family
ID=77036263
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW109104046A TWI727651B (en) | 2020-02-10 | 2020-02-10 | Multilayer circuit board |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN113260144A (en) |
| TW (1) | TWI727651B (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200901846A (en) * | 2007-06-25 | 2009-01-01 | Phoenix Prec Technology Corp | Circuit board structure and method thereof |
| TW201720255A (en) * | 2015-10-29 | 2017-06-01 | 碁鼎科技秦皇島有限公司 | A method for manufacturing a printed circuit board and a circuit board using this method |
| US20180332700A1 (en) * | 2017-05-09 | 2018-11-15 | Unimicron Technology Corp. | Circuit board stacked structure and method for forming the same |
| TW201940023A (en) * | 2018-03-06 | 2019-10-01 | 和碩聯合科技股份有限公司 | Circuit board circuit arrangement method and circuit board circuit structure |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE59301849D1 (en) * | 1992-06-15 | 1996-04-18 | Heinze Dyconex Patente | Process for the production of substrates with bushings |
| EP2493273A4 (en) * | 2009-10-23 | 2013-10-16 | Fujikura Ltd | STRUCTURE AND METHOD FOR MOUNTING DEVICE |
| TW201146120A (en) * | 2010-06-09 | 2011-12-16 | Flexium Interconnect Inc | Printed circuit board including cross pipe type conducting hole and processing apparatus thereof |
| JP6809511B2 (en) * | 2018-07-06 | 2021-01-06 | 大日本印刷株式会社 | Through Silicon Via Substrates and Semiconductor Devices |
-
2020
- 2020-02-10 TW TW109104046A patent/TWI727651B/en not_active IP Right Cessation
- 2020-02-13 CN CN202010091741.0A patent/CN113260144A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200901846A (en) * | 2007-06-25 | 2009-01-01 | Phoenix Prec Technology Corp | Circuit board structure and method thereof |
| TW201720255A (en) * | 2015-10-29 | 2017-06-01 | 碁鼎科技秦皇島有限公司 | A method for manufacturing a printed circuit board and a circuit board using this method |
| US20180332700A1 (en) * | 2017-05-09 | 2018-11-15 | Unimicron Technology Corp. | Circuit board stacked structure and method for forming the same |
| TW201940023A (en) * | 2018-03-06 | 2019-10-01 | 和碩聯合科技股份有限公司 | Circuit board circuit arrangement method and circuit board circuit structure |
Also Published As
| Publication number | Publication date |
|---|---|
| TW202131771A (en) | 2021-08-16 |
| CN113260144A (en) | 2021-08-13 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6236572B1 (en) | Controlled impedance bus and method for a computer system | |
| US20120247825A1 (en) | Printed circuit board | |
| KR101298280B1 (en) | Embedded printed circuit board and manufacturing method thereof | |
| CN105101685B (en) | The preparation method and multi-layer PCB of a kind of multi-layer PCB | |
| US7601919B2 (en) | Printed circuit boards for high-speed communication | |
| TWI488553B (en) | Circuit board and manufacturing method thereof | |
| US11690173B2 (en) | Circuit board structure | |
| US11445599B2 (en) | Printed circuit boards with non-functional features | |
| TWI727651B (en) | Multilayer circuit board | |
| CN107231744A (en) | Circuit board | |
| US20120152607A1 (en) | Printed circuit board | |
| CN110021831A (en) | Microwave vertical transition connection structure and microwave device | |
| CN105228378A (en) | A kind of circuit board and impedance method for measurement thereof | |
| CN116156744A (en) | A printed circuit board, communication equipment | |
| CN113068306A (en) | PCB and PCB mounting method | |
| US10470308B1 (en) | Printed circuit board assembly and electronic device using the same | |
| WO2024140509A1 (en) | Circuit board and electronic device | |
| CN116567917A (en) | Circuit Boards and Electronics | |
| CN105376962A (en) | Method for improving circuit board structure | |
| CN116321685A (en) | Metal Substrates and Power Devices | |
| JP6146071B2 (en) | Printed circuit board, printed circuit board unit, and printed circuit board manufacturing method | |
| JP2013115110A (en) | Printed wiring board of step structure | |
| US20250194012A1 (en) | Printed wiring board, electronic module, electronic equipment and video displaying apparatus | |
| WO2021052327A1 (en) | Circuit board | |
| CN111836453A (en) | A PCB board jumper structure of an antenna system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |