TWI708337B - Electronic package and manufacturing method thereof and cooling part - Google Patents
Electronic package and manufacturing method thereof and cooling part Download PDFInfo
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- TWI708337B TWI708337B TW108110299A TW108110299A TWI708337B TW I708337 B TWI708337 B TW I708337B TW 108110299 A TW108110299 A TW 108110299A TW 108110299 A TW108110299 A TW 108110299A TW I708337 B TWI708337 B TW I708337B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
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Abstract
Description
本發明係有關一種封裝結構,尤指一種具散熱件之電子封裝件及其製法。 The invention relates to a packaging structure, in particular to an electronic packaging with a heat sink and its manufacturing method.
隨著電子產品在功能及處理速度之需求的提升,作為電子產品之核心組件的半導體晶片需具有更高密度之電子元件(Electronic Components)及電子電路(Electronic Circuits),故半導體晶片在運作時將隨之產生更大量的熱能。再者,由於傳統包覆該半導體晶片之封裝膠體係為一種導熱係數僅0.8Wm-1k-1之不良傳熱材質(即熱量之逸散效率不佳),因而若不能有效逸散半導體晶片所產生之熱量,將會造成半導體晶片之損害與產品信賴性問題。 With the increase in the function and processing speed of electronic products, the semiconductor chip as the core component of the electronic product needs to have higher density of electronic components (Electronic Components) and electronic circuits (Electronic Circuits), so the semiconductor chip will A larger amount of heat energy is generated subsequently. Furthermore, since the traditional encapsulant system for coating the semiconductor chip is a poor heat transfer material with a thermal conductivity of only 0.8Wm-1k-1 (that is, the heat dissipation efficiency is poor), if the semiconductor chip cannot be effectively dissipated The heat generated will cause damage to semiconductor chips and product reliability issues.
因此,為了迅速將熱能散逸至外部,業界通常在半導體封裝件中配置散熱片(Heat Sink或Heat Spreader),該散熱片通常藉由散熱膠,如導熱介面材(Thermal Interface Material,簡稱TIM),結合至晶片背面,以藉散熱膠與散熱片逸散出半導體晶片所產生之熱量,再者,通常令散熱片之頂面外露出封裝膠體或直接外露於大氣中,俾取得較佳之散熱效果。 Therefore, in order to quickly dissipate heat to the outside, the industry usually configures a heat sink (Heat Sink or Heat Spreader) in a semiconductor package. The heat sink is usually made of heat-dissipating glue, such as Thermal Interface Material (TIM). It is bonded to the back of the chip to dissipate the heat generated by the semiconductor chip through the heat sink and the heat sink. Moreover, the top surface of the heat sink is usually exposed to the packaging compound or directly exposed to the atmosphere to achieve better heat dissipation.
如第1圖所示,習知半導體封裝件1之製法係先將一半導體晶片11以其作用面11a利用覆晶接合方式(即透過導電凸塊110與底膠111)設於一封裝基板10上,再將一散熱件13以其頂片130藉由TIM層12(其包含銲錫層與助焊劑)回銲結合於該半導體晶片11之非作用面11b上,且該散熱件13之支撐腳131透過黏著層14架設於該封裝基板10上。接著,進行封裝壓模作業,以供封裝膠體(圖略)包覆該半導體晶片11及散熱件13,並使該散熱件13之頂片130外露出封裝膠體。
As shown in Figure 1, the conventional method for manufacturing a semiconductor package 1 is to first place a
於運作時,該半導體晶片11所產生之熱能係經由該非作用面11b、TIM層12而傳導至該散熱件13之頂片130以散熱至該半導體封裝件1之外部。
During operation, the heat generated by the
惟,習知半導體封裝件1中,該散熱件13之頂片130係為平整表面,致使其散熱面積有限,導致散熱效果受限,難以滿足該半導體封裝件1之高散熱需求。
However, in the conventional semiconductor package 1, the
再者,習知半導體封裝件1之製程中,通常將該黏著層14加熱上膠於該封裝基板10上後,就直接黏貼該散熱件13之支撐腳131,待該黏著層14冷卻後產生黏著力,使該封裝基板10及散熱件13相黏固,惟該黏著層14於加熱過程中容易產生氣泡,造成該黏著層14之結構強度不佳,容易導致該散熱件13脫落。
Furthermore, in the manufacturing process of the conventional semiconductor package 1, usually after the
又,當面臨半導體封裝件1之厚度薄化,且面積增大需求時,該散熱件13與TIM層12之間因為熱膨脹係數差異(CTE Mismatch)導致變形的情況(即翹曲程度)更加明顯,而當變形量過大時,該散熱件13之頂片130與該TIM層12(或與該半導體晶片11)之間容易發生脫層,不僅造成導熱效果
下降,且會造成該半導體封裝件1外觀上的不良,甚而嚴重影響產品之信賴性。
In addition, when faced with the need to thin the thickness of the semiconductor package 1 and increase the area, the deformation (ie, the degree of warpage) between the
因此,如何克服上述習知技術之種種問題,實已成為目前業界亟待克服之難題。 Therefore, how to overcome the above-mentioned problems of the conventional technology has actually become a problem that the industry urgently needs to overcome.
鑑於上述習知技術之種種缺失,本發明提供一種電子封裝件,係包括:一承載件;至少一電子元件,係設於該承載件上;以及一散熱件,係包含有散熱體與設於該散熱體上之支撐腳,該散熱體係藉由導熱介面層結合至該電子元件,且該支撐腳係結合於該承載件上以支撐該散熱體,其中,該散熱體係形成有凹凸結構,其具有複數凸部與位於兩該凸部之間的凹部。 In view of the various deficiencies of the above-mentioned conventional technologies, the present invention provides an electronic package, which includes: a carrier; at least one electronic component disposed on the carrier; and a heat sink including a heat sink and The support leg on the heat sink, the heat dissipation system is coupled to the electronic component through a thermal interface layer, and the support leg is coupled to the carrier to support the heat sink, wherein the heat dissipation system is formed with a concave-convex structure, which It has a plurality of convex parts and a concave part located between the two convex parts.
本發明亦提供一種電子封裝件之製法,係包括:提供一散熱件,其包含有散熱體與設於該散熱體上之支撐腳,其中,該散熱體係形成有凹凸結構,其具有複數凸部與位於兩該凸部之間的凹部;以及將該散熱件以其支撐腳結合於該承載件上,且該承載件上係佈設有至少一電子元件,並使該散熱體藉由導熱介面層結合至該電子元件。 The present invention also provides a manufacturing method of an electronic package, which includes: providing a heat sink, which includes a heat sink and a supporting leg provided on the heat sink, wherein the heat sink system is formed with a concave-convex structure having a plurality of convex portions And the concave portion located between the two convex portions; and the heat sink is combined with the supporting leg on the carrier, and at least one electronic component is arranged on the carrier, and the heat sink is provided with a thermal interface layer Bonded to the electronic component.
前述之製法中,復包括藉由一定位裝置控制該電子封裝件之厚度。 In the aforementioned manufacturing method, the thickness of the electronic package is controlled by a positioning device.
前述之製法中,復包括於將該散熱件結合於該承載件上時,進行抽氣作業。 In the foregoing manufacturing method, the air extraction operation is performed when the heat sink is combined with the carrier.
前述之電子封裝件及其製法中,該凸部係為山脊狀,該凸部之底側係具有相對之第一側邊與第二側邊,且該第一側邊的寬度係不同於該第二側邊的寬度。例如,該些凸部之第一側邊與第二側邊係交錯排列。 In the aforementioned electronic package and its manufacturing method, the convex portion is ridge-shaped, the bottom side of the convex portion has opposite first and second sides, and the width of the first side is different from that of the The width of the second side. For example, the first side and the second side of the protrusions are arranged in a staggered manner.
前述之電子封裝件及其製法中,該散熱體係定義有相鄰接之第一區段與第二區段,該第一區段係形成有該凹凸結構,且該第二區段係形成有位於該支撐腳與該凹凸結構間的牆結構。例如,該牆結構係藉由結合材結合該電子元件,且該結合材復延伸至該凹凸結構上,使該結合材係接觸該導熱介面層。或者,該散熱體之第二區段、該承載件、該電子元件與該支撐腳係形成一空氣空間,且該凹部係形成有氣室,以令該氣室之氣壓係小於該空氣空間之氣壓。 In the aforementioned electronic package and its manufacturing method, the heat dissipation system defines a first section and a second section adjacent to each other, the first section is formed with the concave-convex structure, and the second section is formed with A wall structure located between the supporting foot and the concave-convex structure. For example, the wall structure is combined with the electronic component by a bonding material, and the bonding material is extended to the concave-convex structure so that the bonding material contacts the thermally conductive interface layer. Alternatively, the second section of the heat sink, the carrier, the electronic component, and the supporting leg form an air space, and the recess is formed with an air chamber, so that the air pressure of the air chamber is less than that of the air space Air pressure.
前述之電子封裝件及其製法中,該導熱介面層與該凹部之間形成有氣室。 In the aforementioned electronic package and its manufacturing method, an air chamber is formed between the thermally conductive interface layer and the recess.
前述之電子封裝件及其製法中,該導熱介面層之形體係互補該凹凸結構之形體。 In the aforementioned electronic package and its manufacturing method, the shape system of the thermal interface layer complements the shape of the concave-convex structure.
前述之電子封裝件及其製法中,該散熱體係定義有相鄰接之第一區段與第二區段,該第一區段係形成有該凹凸結構,且該第二區段係藉由該導熱介面層結合該電子元件與該承載件。 In the aforementioned electronic package and its manufacturing method, the heat dissipation system is defined with a first section and a second section adjacent to each other, the first section is formed with the concave-convex structure, and the second section is formed by The thermal interface layer combines the electronic component and the carrier.
前述之電子封裝件及其製法中,該散熱體之至少一表面之粗糙度係大於1.5微米,以形成該凹凸結構。 In the aforementioned electronic package and its manufacturing method, the roughness of at least one surface of the heat sink is greater than 1.5 μm to form the uneven structure.
前述之電子封裝件及其製法中,該凹凸結構之凸部係為凸條或凸塊。 In the aforementioned electronic package and its manufacturing method, the convex portion of the concave-convex structure is a convex strip or a bump.
前述之電子封裝件及其製法中,該凹凸結構之凹部係為溝槽或凹穴。 In the aforementioned electronic package and its manufacturing method, the concave portion of the concave-convex structure is a groove or a cavity.
本發明更提供一種散熱件,係包括:一散熱體,其中,該散熱體係形成有凹凸結構,其具有複數凸部與位於兩該凸部之間的凹部;以及至少一支撐腳,係立設於該散熱體上。 The present invention further provides a heat dissipating element, comprising: a heat dissipating body, wherein the heat dissipating system is formed with a concave-convex structure, which has a plurality of convex portions and a concave portion located between the two convex portions; and at least one supporting leg, which is arranged vertically On the heat sink.
前述之散熱件中,該凸部係為山脊狀。例如,該凸部之底側係具有相對之第一側邊與第二側邊,且該第一側邊的寬度係小於第二側邊的寬度。進一步,該複數凸部之第一側邊與第二側邊係交錯排列。 In the aforementioned heat sink, the convex portion is ridge-shaped. For example, the bottom side of the convex portion has a first side and a second side opposite to each other, and the width of the first side is smaller than the width of the second side. Further, the first side and the second side of the plurality of convex portions are arranged in a staggered manner.
前述之散熱件中,該散熱體係定義有相鄰接之第一區段與第二區段,該第一區段係形成有該凹凸結構,且該第二區段係形成有位於該支撐腳與該凹凸結構間的牆結構。 In the aforementioned heat dissipation element, the heat dissipation system is defined with a first section and a second section adjacent to each other, the first section is formed with the concave-convex structure, and the second section is formed with the supporting leg The wall structure between the uneven structure.
前述之散熱件中,該散熱體之至少一表面之粗糙度係大於1.5微米,以形成該凹凸結構。 In the aforementioned heat sink, the roughness of at least one surface of the heat sink is greater than 1.5 micrometers to form the uneven structure.
前述之散熱件中,該凹凸結構之凸部係為凸條或凸塊。 In the aforementioned heat sink, the convex portion of the concave-convex structure is a convex strip or a bump.
前述之散熱件中,該凹凸結構之凹部係為溝槽或凹穴。 In the aforementioned heat sink, the concave portion of the concave-convex structure is a groove or a cavity.
由上可知,本發明之電子封裝件及其製法與散熱件,主要藉由該散熱件具有凹凸結構之設計,以增加該散熱體之散熱面積,故相較於習知技術,本發明之散熱件具有更好的散熱效果,以滿足該電子封裝件之高散熱需求。 It can be seen from the above that the electronic package and its manufacturing method and heat sink of the present invention mainly use the design of the heat sink with a concave-convex structure to increase the heat dissipation area of the heat sink. Therefore, compared with the conventional technology, the heat sink of the present invention The device has better heat dissipation effect to meet the high heat dissipation requirement of the electronic package.
再者,本發明藉由該抽氣裝置進行抽氣作業,以於加熱過程中,不易形成氣泡於該結合材中,故相較於習知技術,本發明之結合材之結構強度更好,因而該散熱件不會脫落。 Furthermore, the present invention uses the air extraction device to perform the air extraction operation so that air bubbles are not easily formed in the bonding material during the heating process. Therefore, compared with the prior art, the bonding material of the present invention has better structural strength. Therefore, the heat sink will not fall off.
又,本發明藉由該凸部之交錯排列,以有效分散熱應力,致能避免熱應力集中於該散熱體之其中一側,故本發明之製法能有效控制該散熱體之變形量(翹曲量),因而能防止該散熱體與該導熱介面層之間發生脫層之問題。 In addition, the present invention uses the staggered arrangement of the protrusions to effectively disperse the thermal stress, so as to prevent the thermal stress from being concentrated on one side of the heat sink. Therefore, the manufacturing method of the present invention can effectively control the deformation (warping) of the heat sink. Curvature), thus preventing the problem of delamination between the heat sink and the thermal interface layer.
另外,本發明藉由該氣室之設計,以產生吸附力,故能增強該散熱件接合於該承載件之固定效果。 In addition, the present invention uses the design of the air chamber to generate the adsorption force, so that the fixing effect of the heat dissipating element to the supporting element can be enhanced.
1‧‧‧半導體封裝件 1‧‧‧Semiconductor package
10‧‧‧封裝基板 10‧‧‧Packaging substrate
11‧‧‧半導體晶片 11‧‧‧Semiconductor chip
11a‧‧‧作用面 11a‧‧‧working surface
11b‧‧‧非作用面 11b‧‧‧Inactive surface
110‧‧‧導電凸塊 110‧‧‧Conductive bump
111‧‧‧底膠 111‧‧‧ Primer
12‧‧‧TIM層 12‧‧‧TIM layer
13‧‧‧散熱件 13‧‧‧Radiator
130‧‧‧頂片 130‧‧‧Top Film
131‧‧‧支撐腳 131‧‧‧Support feet
14‧‧‧黏著層 14‧‧‧Adhesive layer
2‧‧‧電子封裝件 2‧‧‧Electronic package
2a‧‧‧散熱件 2a‧‧‧Radiator
20‧‧‧散熱體 20‧‧‧Radiator
20a‧‧‧第一區段 20a‧‧‧Section 1
20b‧‧‧第二區段 20b‧‧‧Second section
200,500a,500b,500c,601a,602a,603a,604a,605a,606a,607a,601b,602b,603b,604b,601c,602c,603c,604c‧‧‧凹凸結構 200,500a,500b,500c,601a,602a,603a,604a,605a,606a,607a,601b,602b,603b,604b,601c,602c,603c,604c‧‧‧Concave-convex structure
201,201’,201”‧‧‧凸部 201,201’,201”‧‧‧Protrusion
201a‧‧‧第一側邊 201a‧‧‧First side
201b‧‧‧第二側邊 201b‧‧‧Second side
202,202’‧‧‧凹部 202,202’‧‧‧Recess
203‧‧‧牆結構 203‧‧‧Wall structure
21‧‧‧支撐腳 21‧‧‧Support feet
210‧‧‧凹穴 210‧‧‧Cave
22‧‧‧導熱介面層 22‧‧‧Thermal Interface Layer
23,23’,43a,43b,43c,43d‧‧‧結合材 23,23’,43a,43b,43c,43d‧‧‧binding material
24‧‧‧承載件 24‧‧‧Carrier
24a‧‧‧置晶側 24a‧‧‧Crystal side
24b‧‧‧植球側 24b‧‧‧Ball planting side
25‧‧‧電子元件 25‧‧‧Electronic components
26‧‧‧導電元件 26‧‧‧Conductive element
27‧‧‧金層 27‧‧‧Gold layer
3‧‧‧定位裝置 3‧‧‧Positioning device
30‧‧‧彈性元件 30‧‧‧Elastic element
31‧‧‧第一壓板 31‧‧‧First pressure plate
310‧‧‧第一定位部 310‧‧‧First positioning part
32‧‧‧第二壓板 32‧‧‧Second pressure plate
320‧‧‧第二定位部 320‧‧‧Second positioning part
33‧‧‧帶動件 33‧‧‧Drive
4‧‧‧抽氣裝置 4‧‧‧Air extraction device
4a‧‧‧外罩 4a‧‧‧Cover
40‧‧‧氣管 40‧‧‧Trachea
41‧‧‧排氣管 41‧‧‧Exhaust pipe
5‧‧‧加熱裝置 5‧‧‧Heating device
A‧‧‧氣室 A‧‧‧Air Chamber
B‧‧‧底側 B‧‧‧Bottom side
C‧‧‧部位 C‧‧‧Location
D‧‧‧寬度 D‧‧‧Width
e‧‧‧凹面 e‧‧‧Concave
H‧‧‧距離 H‧‧‧Distance
h‧‧‧厚度總和 h‧‧‧total thickness
h1‧‧‧厚度 h1‧‧‧Thickness
h2‧‧‧厚度 h2‧‧‧Thickness
P‧‧‧間隔空間 P‧‧‧Interval
R‧‧‧尖端 R‧‧‧tip
r‧‧‧尖端 r‧‧‧tip
S,S’‧‧‧空氣空間 S,S’‧‧‧Air Space
t‧‧‧間距 t‧‧‧Pitch
W‧‧‧寬度 W‧‧‧Width
w1‧‧‧寬度 w1‧‧‧Width
w2‧‧‧寬度 w2‧‧‧Width
X‧‧‧箭頭方向 X‧‧‧Arrow direction
第1圖係為習知半導體封裝件之剖視示意圖。 Figure 1 is a schematic cross-sectional view of a conventional semiconductor package.
第2A至2D圖係為本發明之電子封裝件之製法之剖視示意圖。 2A to 2D are schematic cross-sectional views of the manufacturing method of the electronic package of the present invention.
第2A’圖係為第2A圖之局部立體示意圖。 Figure 2A' is a partial perspective view of Figure 2A.
第2A”圖係為第2A’圖之局部放大圖。 Figure 2A" is a partial enlarged view of Figure 2A'.
第2C’圖係為應用於第2C圖之製程設備配置示意圖。 Figure 2C' is a schematic diagram of the process equipment configuration applied to Figure 2C.
第2D’圖係為第2D圖之局部立體示意圖。 Figure 2D' is a partial perspective view of Figure 2D.
第2E圖係為第2D之製法之另一實施例之局部示意圖。 Figure 2E is a partial schematic diagram of another embodiment of the 2D manufacturing method.
第3圖係為本發明之電子封裝件之剖視示意圖。 Figure 3 is a schematic cross-sectional view of the electronic package of the present invention.
第3A圖係為第3圖之a-a剖線之剖面示意圖。 Figure 3A is a schematic cross-sectional view taken along the line a-a in Figure 3.
第3B圖係為第3圖之b-b剖線之剖面示意圖。 Figure 3B is a schematic cross-sectional view taken along line b-b in Figure 3.
第3C圖係為第3圖之c-c剖線之剖面示意圖。 Figure 3C is a schematic cross-sectional view taken along line c-c in Figure 3.
第3D圖係為第3圖之d-d剖線之剖面示意圖。 Figure 3D is a schematic cross-sectional view taken along line d-d in Figure 3.
第4A至4E圖係為第3圖之其它不同實施例的局部剖視圖。 Figures 4A to 4E are partial cross-sectional views of other different embodiments of Figure 3.
第5A至5C圖係為本發明之凹凸結構之其它不同實施例的局部立體圖。 5A to 5C are partial perspective views of other different embodiments of the concave-convex structure of the present invention.
第6A-1至6A-7圖係為本發明之凹凸結構之其它不同實施例的局部立體圖。 Figures 6A-1 to 6A-7 are partial perspective views of other different embodiments of the concave-convex structure of the present invention.
第6B-1至6B-4圖係為本發明之凹凸結構之其它不同實施例的局部立體圖。 Figures 6B-1 to 6B-4 are partial perspective views of other different embodiments of the concave-convex structure of the present invention.
第6C-1至6C-4圖係為本發明之凹凸結構之其它不同實施例的局部立體圖。 6C-1 to 6C-4 are partial perspective views of other different embodiments of the concave-convex structure of the present invention.
第7圖係為本發明之凹凸結構之另一實施例的局部立體圖。 Figure 7 is a partial perspective view of another embodiment of the concave-convex structure of the present invention.
以下藉由特定的具體實施例說明本發明之實施方式,熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。 The following specific examples illustrate the implementation of the present invention. Those familiar with the art can easily understand the other advantages and effects of the present invention from the contents disclosed in this specification.
須知,本說明書所附圖式所繪示之結構、比例、大小等,均僅用以配合說明書所揭示之內容,以供熟悉此技藝之人士之瞭解與閱讀,並非用以限定本發明可實施之限定條件,故不具技術上之實質意義,任何結構之修飾、比例關係之改變或大小之調整,在不影響本發明所能產生之功效及所能達成之目的下,均應仍落在本發明所揭示之技術內容得能涵蓋之範圍內。同時,本說明書中所引用之如「上」、「第一」、「第二」及「一」等之用語,亦僅為便於敘述之明瞭,而非用以限定本發明可實施之 範圍,其相對關係之改變或調整,在無實質變更技術內容下,當亦視為本發明可實施之範疇。 It should be noted that the structures, proportions, sizes, etc. shown in the drawings in this manual are only used to match the contents disclosed in the manual for the understanding and reading of those familiar with the art, and are not intended to limit the implementation of the present invention Therefore, it does not have any technical significance. Any structural modification, proportional relationship change, or size adjustment should still fall within the scope of the present invention without affecting the effects and objectives that can be achieved. The technical content disclosed by the invention can be covered. At the same time, the terms such as "on", "first", "second" and "one" cited in this manual are only for ease of description and are not used to limit the implementation of the present invention. The change or adjustment of the scope and the relative relationship shall also be regarded as the scope within which the present invention can be implemented without substantially changing the technical content.
第2A至2D圖係為本發明之電子封裝件2之製法之剖面示意圖。
2A to 2D are schematic cross-sectional views of the manufacturing method of the
如第2A及2A’圖所示,提供一散熱件2a,其包含有一散熱體20與至少一設於該散熱體20上之支撐腳21,其中,該散熱體20表面係形成有凹凸結構200,其具有複數凸部201,201’,201”與位於該複數凸部201,201’之間的複數凹部202,202’,且部分該凸部201,201’係為山脊狀(該凹部202係為山溝狀),而部分該凸部201”係為鰭片狀或矩形片狀,以對應形成不同形體之凹部202,202’。接著,形成一導熱介面層22於該散熱體20上。
As shown in Figures 2A and 2A', a
於本實施例中,該散熱體20係定義有相鄰接之第一區段20a與第二區段20b,其中,該第一區段20a係形成有該凹凸結構200,該第二區段20b係形成有該支撐腳21及至少一位於該支撐腳21與該凹凸結構200之間的牆結構203,且於該支撐腳21與該牆結構203之間形成有凹穴210,其中,該牆結構203之高度係大於該凸部201,201’,201”之高度,以令相鄰之牆結構203與凸部201”之間形成階梯狀。
In this embodiment, the
再者,該凹部202,202’之最小寬度D係小於1mm,且該些山脊狀凸部201,201’之頂側係為尖端R,其寬度W係小於3mm(如第2A”圖所示),而該些山脊狀凸部201,201’之底側B係具有相對之第一側邊(短側邊)201a與第二側邊(長側邊)201b,該第一側邊201a的寬度w1係小於第二側
邊201b的寬度w2。例如,該底側B係呈錐形面(如第2A’圖所示之第2A圖之第一區段20a之其中一部位C之形體)。
Furthermore, the minimum width D of the
又,該些山脊狀凸部201,201’之至少兩者係基於該底側B之第一側邊201a與第二側邊201b呈反向排列,即以其中一山脊狀凸部201之短側邊(第一側邊201a)鄰接另一山脊狀凸部201’之長側邊(第二側邊201b)之方式所呈現之交錯排列,如第2A’圖所示。
In addition, at least two of the ridge-shaped
另外,該導熱介面層22係為TIM,如低溫熔融之熱傳導材料,其可由固態金屬或液態金屬(如銲錫材料)形成,且將其填入該凹部202,202’中。
In addition, the thermally
如第2B圖所示,形成結合材23,23’於片狀凸部201”與該支撐腳21上,且提供一置晶側24a佈設有至少一電子元件25之承載件24。
As shown in FIG. 2B,
於本實施例中,該承載件24例如為具有核心層與線路結構之封裝基板(substrate)或無核心層(coreless)之線路結構,其係於介電材上形成線路層,如扇出(fan out)型重佈線路層(redistribution layer,簡稱RDL)。應可理解地,該承載件24亦可為其它可供承載如晶片等電子元件之承載結構,例如導線架(leadframe)或矽中介板(silicon interposer),並不限於上述。
In this embodiment, the
再者,該電子元件25係為主動元件、被動元件或其二者組合等,其中,該主動元件係例如為半導體晶片,且該被動元件係例如為電阻、電容及電感。例如,該電子元件25係以覆晶方式或打線方式電性連接該承載件24之線路層。然而,有關該電子元件25電性連接該承載件24之方式不限於上述。
Furthermore, the
又,該結合材23,23’係為膠材、黏著材或金屬材,且其不同於該導熱介面層22之材質。
In addition, the
如第2C圖所示,將該散熱件2a以其支撐腳21藉由該結合材23’結合於該承載件24之置晶側24a上,且使該牆結構203與片狀凸部201”藉由該結合材23結合該電子元件25,並令該散熱體20藉由該導熱介面層22結合該電子元件25。
As shown in Figure 2C, the
於本實施例中,於部分凹部202’中未填滿有該導熱介面層22,以於該凹部202’中形成一氣室A。例如,該氣室A之容積係大於或等於該導熱介面層22於一預定溫度(如260℃)下的膨脹量。例如,本發明之製法之過程中,溫度係於25℃至240℃之間升降,故該氣室A之容積需高於該導熱介面層22於240℃的膨脹量,否則該導熱介面層22會填滿該凹部202’而使該氣室A消失。
In this embodiment, part of the recess 202' is not filled with the
再者,如第2C’圖所示,該散熱件2a與該承載件24之接合製程可藉由一定位裝置3及一抽氣裝置4進行。例如,該散熱件2a可藉由該定位裝置3壓合於該承載件24與該電子裝置25上,且於壓合動作前,可先藉由該抽氣裝置4進行抽氣作業(如進行抽真空作業,其真空值約為1~10-7mm Hg)。
Furthermore, as shown in FIG. 2C', the joining process of the
具體地,於壓合過程中,該定位裝置3係藉由帶動件33連接第一壓板31以下壓移動該第一壓板31,且藉由如彈簧之彈性元件30緩衝該第一壓板31相對第二壓板32之位移,使該第一壓板31之第一定位部310與該第二壓板32之第二定位部320相抵靠,以控制該第一壓板31與第二壓板32之間的距離H,此時,設於該第一壓板31上之承載件24與設於該第二壓板
32上之散熱件2a會相對定位,藉此控制該支撐腳21之結合材23’之厚度h1與該導熱介面層22之厚度h2,即該距離H等於該承載件24、該結合材23’與該散熱件2a之三者之厚度總和h,且經由壓合作業後,該牆結構203與部分凸部201”之處的結合材23可接觸該導熱介面層22,且該散熱體20之第二區段20b、該承載件24、該電子元件25與該支撐腳21會形成一空氣空間S。
Specifically, during the pressing process, the
另一方面,當該承載件24與該散熱件2a相互定位之過程中,先以該抽氣裝置4之外罩4a封蓋該定位裝置3,再將該抽氣裝置4之至少一氣管40插入該承載件24與該散熱件2a之間,且將排氣管41連通該外罩4a內部,以進行抽氣作業,藉此形成該氣室A,且抽取該電子裝置25與該散熱件2a之間的間隔空間P(如第2B圖所示)的氣體,使該電子裝置25與該凹凸結構200之間的氣壓值可低於1大氣壓。具體地,於壓合作業後,該氣室A之氣壓不同於(如小於)該空氣空間S之氣壓,例如,該氣室A之氣壓值係約為1~10-7mmHg,且該空氣空間S之氣壓值係約為大於760mmHg(即1大氣壓),以產生壓力差所致之吸附力,使該散熱件2a與該承載件24之間可進一步藉由空氣吸附方式相互結合,藉此增加該散熱件2a與該承載件24之間的結合力。
On the other hand, when the
應可理解地,該抽氣裝置4與該定位裝置3可相互配合(即一邊下壓該第一壓板31,一邊抽取該電子裝置25與該凹凸結構200之間的氣體),故該抽氣裝置4可提供氣源至該定位裝置3之帶動件33,使該帶動件33能以吸附方式連接該第一壓板31。
It should be understood that the
又,於進行抽氣作業(抽取氧氣及揮發性溶劑)後,再以加熱裝置5經由該第二壓板32進行加熱作業,使該導熱介面層22的燒結能更均勻牢固,而不會形成氣泡於該導熱介面層22中,因而不僅可增加黏著性,且
可有效降低該導熱介面層22之熱阻抗而增加熱傳導率,並於加熱過程中,該結合材23,23’的溶劑容易朝外(如箭頭方向X)揮發,因而也不會形成氣泡於該結合材23,23’中。
In addition, after the air extraction operation (extraction of oxygen and volatile solvents) is performed, the
另一方面,由於該電子裝置25與該凹凸結構200之間的氣壓於合壓作業後係低於1大氣壓,故該加熱裝置5所提供之熱能與氣流於該間隔空間P處不會產生熱對流作用,因而該加熱裝置5能均勻提供熱能予該導熱介面層22,以避免該導熱介面層22於燒結時之溫度不均之問題。
On the other hand, since the air pressure between the
應可理解地,該加熱裝置5、抽氣裝置4與定位裝置3可整合於一機台上,故能達到自動化設備之需求。
It should be understood that the
如第2D圖所示,形成複數導電元件26於該承載件24之植球側24b上。
As shown in FIG. 2D, a plurality of
於本實施例中,該導電元件26係為如銅塊之金屬塊、銲錫凸塊或具有銅核心的錫球等。應可理解地,有關該導電元件之種類繁多,並不限於上述。
In this embodiment, the
再者,該電子元件25與該散熱體20之山脊狀凸部201,201’之尖端R的間距t係至多1mm,且該導熱介面層22之形體係互補該凹凸結構200之形體(如第2D’圖所示之山脈形體),使該導熱介面層22亦形成具有尖端r之山脊部,且該導熱介面層22之尖端r(或該山脊狀凸部201,201’之尖端R)係朝一側傾斜,如第3C或3D圖所示之剖面示意圖。
Furthermore, the distance t between the
又,位於階梯狀之處的結合材23係呈L形體,以增加該結合材23之接合效果,且藉由其內外兩側之壓力差(該氣室A之氣壓小於該空氣空間S之氣壓),即吸附力,以進一步增加該散熱件2a接合於該承載件24之
固定效果。應可理解地,於一實施例中,該片狀凸部201”之頂側可形成有凹面e,如第2E圖所示之V形,以增加該結合材23之接觸面積,使該結合材23接合效果更好。同理地,該牆結構203之端面亦可為凹面(如第4D圖所示)、或該支撐腳21之端面亦可為凹面(圖未示)。
In addition, the
另外,為了提升導熱介面層22(TIM)與電子元件25之間的接著強度,可於該電子元件25之表面上覆金(即所謂之Coating Gold On Chip Back)。具體地,如第2E圖所示,於該電子元件25之表面與該散熱體20之表面上形成一金層27,且進一步配合助焊劑(flux),以利於該導熱介面層22接著於該金層27上。
In addition, in order to improve the bonding strength between the thermally conductive interface layer 22 (TIM) and the
請參閱第3及3A至3D圖所示之本發明之製法所形成之電子封裝件2之不同方向剖面示意圖,本發明主要藉由該散熱件2a具有凹凸結構200之設計,以增加該散熱體20之散熱面積,故相較於習知技術,本發明之散熱件2a具有更好的散熱效果,以滿足該電子封裝件2之高散熱需求。進一步,該導熱介面層22之形體係互補該凹凸結構200之形體,使該導熱介面層22的尖端r因體積(或熱容量)較小而較容易熱飽和,故該導熱介面層22之尖端r之處的熱量容易傳遞至該散熱體20(如該凸部201,201’之底側B或該凹部202底端),且因該散熱體20的熱容量較大,故可快速將熱能排至外部環境。
Please refer to Figures 3 and 3A to 3D of the cross-sectional schematic diagrams of the
再者,本發明之製法藉由先以該抽氣裝置4進行抽氣作業,再進行加熱作業,以於加熱過程中,該結合材23,23’的溶劑容易朝外揮發,因而不易形成氣泡於該結合材23,23’與該導熱介面層22中,故相較於
習知技術,本發明之結合材23,23’與該導熱介面層22之結構強度更好,因而該散熱件2a不會脫落。
Furthermore, in the manufacturing method of the present invention, the
又,本發明之製法藉由該凸部201,201’之長短邊側交錯排列,以有效分散熱應力,致能避免熱應力集中於該凸部201,201’之底側B之其中一側邊,故本發明之製法能有效控制該散熱體20之變形量(翹曲量),因而能防止該散熱體20與該導熱介面層22之間發生脫層之問題,致使不僅能提升導熱效果,且不會影響該電子封裝件2之外觀。換言之,若相鄰之凸部201,201’之底側B以長側邊對齊長側邊之方式排列,則該散熱體20之變形量容易過大。
In addition, the manufacturing method of the present invention uses the staggered arrangement of the long and short sides of the
另外,本發明之製法藉由該氣室A之氣壓小於該空氣空間S之氣壓之設計,以產生吸附力,故能增強該散熱件2a接合於該承載件24之固定效果。
In addition, the manufacturing method of the present invention uses a design that the air pressure of the air chamber A is lower than the air pressure of the air space S to generate adsorption force, so that the fixing effect of the
於其它實施例中,該結合材23可依需求增減佈設範圍,如第4A圖所示之結合材43a延伸至該凹部202’處、如第4B圖所示之結合材43b未接觸該凸部201”、如第4C圖所示之結合材43c延伸至該空氣空間S中而改變該空氣空間S’之範圍(或向外超出該牆結構203之垂直投影範圍)、或如第4D圖所示之結合材43d僅位於該牆結構203之垂直投影範圍內。
In other embodiments, the
於其它實施例中,該第一區段20a之凹凸結構可依散熱需求作設計。如第5A圖所示,該第一區段20a呈矩形體,再粗糙化該矩形體表面,使其表面粗糙度Ra大於1.5微米(um),以形成凹凸結構500a。如第5B圖所示,該第一區段20a係呈梯形體,再粗糙化該梯形體之斜面,使其表面粗糙度Ra>1.5um,以形成凹凸結構500b。如第5C圖所示,該
第一區段20a係呈矩形體,再凹凸化該矩形體表面,使其表面形成不規則狀,俾供作為凹凸結構500c。
In other embodiments, the concave-convex structure of the
除了粗糙化製程外,亦可採用條塊方式設計凹凸結構。如第6A-1、6A-2、6A-3、6A-4、6A-5、6A-6及6A-7圖所示,該第一區段20a係呈矩形體,再於散熱面上形成至少一(如半圓管狀、矩形、三角形、彎曲狀、梯形狀或其它形狀)溝槽,以形成(如矩形、波浪狀、三角片形、彎曲狀、三角柱或其它形狀)凸條,俾供作為凹凸結構601a,602a,603a,604a,605a,606a,607a。亦如第6B-1、6B-2、6B-3或6B-4圖所示,該第一區段20a係呈矩形體,再於散熱面上形成至少一(如圓柱狀、半球狀、錐狀、矩形或其它形狀)凸塊,以形成凹凸結構601b,602b,603b,604b。亦如第6C-1、6C-2、6C-3或6C-4圖所示,該第一區段20a係呈矩形體,再於散熱面上形成至少一(如圓孔狀、半球孔狀、錐孔狀、矩形孔狀或其它形狀)凹穴,以形成凹凸結構601c,602c,603c,604c。
In addition to the roughening process, the uneven structure can also be designed in a strip method. As shown in Figures 6A-1, 6A-2, 6A-3, 6A-4, 6A-5, 6A-6, and 6A-7, the
應可理解地,該凹凸結構亦可將粗糙化製程及條塊方式相互配合應用,如第7圖所示。 It should be understood that the concave-convex structure can also be used in conjunction with the roughening process and the strip method, as shown in FIG. 7.
本發明復提供一種電子封裝件2,係包括:一承載件24、一設於該承載件24上之電子元件25以及一結合該電子元件25之散熱件2a。
The present invention further provides an
所述之散熱件2a係包含有一散熱體20與至少一設於該散熱體20上之支撐腳21,該散熱體20係藉由導熱介面層22結合該電子元件25,且該支撐腳21係結合於該承載件24上以支撐該散熱體20,其中,該散熱體20係形成有凹凸結構200,其具有複數凸部201,201’,201”與位於該凸部201,201’,201”之間的凹部202,202’。
The
於一實施例中,部分該凸部201,201’係為山脊狀,其底側B係具有相對之第一側邊201a與第二側邊201b,且該第一側邊(短邊側)201a的寬度w1係小於該第二側邊(長邊側)201b的寬度w2。例如,該些凸部201,201’長短邊側係交錯排列。
In one embodiment, part of the
於一實施例中,該導熱介面層22之形體係互補該凹凸結構200之形體。
In one embodiment, the shape system of the
於一實施例中,該導熱介面層22未填滿該凹部202’,以於該凹部201”中形成氣室A。
In one embodiment, the thermally
於一實施例中,該散熱體20係定義有相鄰接之第一區段20a與第二區段20b,該第一區段20a係形成有該凹凸結構200,且該第二區段20b係具有位於該支撐腳21與該凹凸結構200之間的牆結構203。
In one embodiment, the
例如,該牆結構203係藉由結合材23結合該電子元件25,且該支撐腳21亦藉由結合材23’結合該承載件24。進一步,該結合材23復延伸至該凹凸結構200之凸部201”上,使該結合材23接觸該導熱介面層22。
For example, the
另一方面,該散熱體20之第二區段20b(含該牆結構203及結合材23)、該承載件24、該電子元件25與該支撐腳21(含結合材23’)係形成一空氣空間S,以令該氣室A之氣壓小於該空氣空間S之氣壓。
On the other hand, the
於其它實施例中,如第4E圖所示,該散熱體20之第二區段20b亦可不形成該牆結構203,使該第二區段20b藉由該導熱介面層22結合該電子元件25與該承載件24,且該空氣空間S可填滿該導熱介面層22(即沒有空氣空間S)而未填滿該氣室A。
In other embodiments, as shown in FIG. 4E, the
應可理解地,如第4A至4E圖所示,該電子元件25周圍係可依需求形成有覆晶製程用之底膠45。
It should be understood that, as shown in FIGS. 4A to 4E, a
於一實施例中,該散熱體20之至少一表面之粗糙度係大於1.5微米,以形成該凹凸結構500a,500b,500c。
In one embodiment, the roughness of at least one surface of the
於一實施例中,該凹凸結構601a,602a,603a,604a,605a,606a,607a,601b,602b,603b,604b之凸部係為凸條或凸塊。
In one embodiment, the convex portions of the concave-
於一實施例中,該凹凸結構601a,602a,603a,604a,605a,606a,607a,601c,602c,603c,604c之凹部係為溝槽或凹穴。
In one embodiment, the concave portions of the concave-
綜上所述,本發明之電子封裝件及其製法,係藉由該散熱件具有凹凸結構之設計,以增加該散熱體之散熱面積,故本發明之散熱件具有更好的散熱效果,以滿足該電子封裝件之高散熱需求。 In summary, the electronic package of the present invention and its manufacturing method are designed with a concave-convex structure of the heat sink to increase the heat dissipation area of the heat sink. Therefore, the heat sink of the present invention has a better heat dissipation effect. Meet the high heat dissipation requirements of the electronic package.
再者,本發明藉由抽氣作業,以避免形成氣泡於該結合材中,故本發明之結合材之結合效果更好。 Furthermore, the present invention uses air extraction to avoid the formation of bubbles in the bonding material, so the bonding material of the present invention has a better bonding effect.
又,本發明之散熱件係藉由該凸部之交錯排列,以有效分散熱應力,故能防止該散熱體發生應力集中而過度翹曲之問題。 In addition, the heat sink of the present invention effectively disperses the thermal stress through the staggered arrangement of the protrusions, so that the heat sink can prevent stress concentration and excessive warping of the heat sink.
另外,本發明藉由該氣室之設計,使其產生吸附力,以提升該散熱件之固定效果。 In addition, the present invention uses the design of the air chamber to generate adsorption force to improve the fixing effect of the heat sink.
上述實施例係用以例示性說明本發明之原理及其功效,而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下,對上述實施例進行修改。因此本發明之權利保護範圍,應如後述之申請專利範圍所列。 The above-mentioned embodiments are used to exemplify the principles and effects of the present invention, but not to limit the present invention. Anyone who is familiar with the art can modify the above-mentioned embodiments without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the rights of the present invention should be listed in the scope of patent application described later.
2‧‧‧電子封裝件 2‧‧‧Electronic package
2a‧‧‧散熱件 2a‧‧‧Radiator
20‧‧‧散熱體 20‧‧‧Radiator
200‧‧‧凹凸結構 200‧‧‧Concave-convex structure
201,201’,201”‧‧‧凸部 201,201’,201”‧‧‧Protrusion
202,202’‧‧‧凹部 202,202’‧‧‧Recess
203‧‧‧牆結構 203‧‧‧Wall structure
21‧‧‧支撐腳 21‧‧‧Support feet
22‧‧‧導熱介面層 22‧‧‧Thermal Interface Layer
23,23’‧‧‧結合材 23,23’‧‧‧Combined material
24‧‧‧承載件 24‧‧‧Carrier
25‧‧‧電子元件 25‧‧‧Electronic components
26‧‧‧導電元件 26‧‧‧Conductive element
A‧‧‧氣室 A‧‧‧Air Chamber
S‧‧‧空氣空間 S‧‧‧Air Space
Claims (42)
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| CN201910298397.XA CN111211059B (en) | 2018-11-22 | 2019-04-15 | Electronic package and its manufacturing method and heat sink |
| US16/533,716 US10950520B2 (en) | 2018-11-22 | 2019-08-06 | Electronic package, method for fabricating the same, and heat dissipator |
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| TW200516736A (en) * | 2003-11-05 | 2005-05-16 | Siliconware Precision Industries Co Ltd | Semiconductor package with heat sink |
| CN101752327A (en) * | 2008-12-01 | 2010-06-23 | 矽品精密工业股份有限公司 | Semiconductor package with heat dissipation structure |
| TW201234542A (en) * | 2010-11-17 | 2012-08-16 | Samsung Electronics Co Ltd | Semiconductor package and method of forming the same |
| TW201607086A (en) * | 2014-08-08 | 2016-02-16 | Univ Chang Gung | High heat dissipation LED package module |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200516736A (en) * | 2003-11-05 | 2005-05-16 | Siliconware Precision Industries Co Ltd | Semiconductor package with heat sink |
| CN101752327A (en) * | 2008-12-01 | 2010-06-23 | 矽品精密工业股份有限公司 | Semiconductor package with heat dissipation structure |
| TW201234542A (en) * | 2010-11-17 | 2012-08-16 | Samsung Electronics Co Ltd | Semiconductor package and method of forming the same |
| TW201607086A (en) * | 2014-08-08 | 2016-02-16 | Univ Chang Gung | High heat dissipation LED package module |
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