TWI773285B - Filter capacitor discharge circuit, conversion circuit and operation method for discharging filter capacitor - Google Patents

Abstract

A filter capacitor discharge circuit includes a high-voltage terminal, a signal preparation circuit, a low-pass filter, a proximity detector, a timer, and a switch unit. The signal preparation circuit receives a detection signal corresponding to an AC voltage from the high-voltage terminal, and generates a voltage signal according to the detection signal. The low-pass filter provides a filtered signal based on the voltage signal. The proximity detector checks whether a voltage difference between the voltage signal and the filtered signal is less than a predetermined value. When the voltage difference is less than the predetermined value, the timer mesuares time and increases a timing result. When the timing result indicates a predetermined time has elapsed, the switch unit is turned on and a filter capacitor is discharged through the switch unit. When the voltage difference is not less than the predetermined value, the timing result is resetted as 0.

Description

Filter capacitor discharge circuit, conversion circuit and operation for discharging filter capacitor method

The present invention relates to a discharge circuit, a conversion circuit and a discharge operation method, in particular to a filter capacitor discharge circuit, a conversion circuit and an operation method for discharging the filter capacitor for discharging an EMI filter capacitor.

Due to the importance attached to the quality of the input voltage (ie AC voltage) received by the conversion circuit in today's electronic products, an EMI (Electromagnetic Interference) filter is usually used at the front end of the conversion circuit to reduce electromagnetic interference. Among them, the EMI filter usually includes a capacitor coupled to the input end of the conversion circuit, which is usually called a filter capacitor or an X capacitor. When the plug at the input end of the conversion circuit is removed from the socket and the AC voltage input is interrupted, the voltage across the filter capacitor is not released, causing it to remain high voltage continuously. If the high voltage is not consumed by the internal resistance for a long time, it will continue to be charged, which will lead to the fear of electric shock when the user touches the plug of the conversion circuit, causing a safety risk.

How to design a filter capacitor discharge circuit, a conversion circuit and an operation method for discharging the filter capacitor, so as to discharge the filter capacitor when the plug of the conversion circuit is unplugged and the AC voltage input is interrupted without affecting the operation of the conversion circuit The work efficiency of the project is a major subject that the creator of this case intends to study.

The invention provides a filter capacitor discharge circuit, which includes a high-voltage terminal, a low-pass filter, a range detector, a timing unit and a switch unit. The high voltage terminal is coupled to the filter capacitor of the input terminal, and the input terminal receives the AC voltage. The signal preparation circuit is coupled to the high voltage terminal and used for generating a voltage signal representing the alternating voltage. The low-pass filter provides a filtered signal according to the voltage signal. The range detector compares the voltage signal and the filter signal to check whether the voltage distance between the voltage signal and the filter signal is less than a preset value. When the voltage distance is less than the preset value, the timing unit performs timing to accumulate a timing result. When the timing result exceeds a predetermined number of times or a predetermined time, the timing unit turns on the switch unit and discharges the filter capacitor through the switch unit.

The present invention provides a conversion circuit, comprising: a filter capacitor, a detection circuit and a filter capacitor discharge circuit. The filter capacitor receives the AC voltage from the input terminal, the detection circuit detects the AC voltage and provides a detection signal, and the filter capacitor discharge circuit receives the detection signal through the high voltage terminal.

The present invention provides an operation method for discharging a filter capacitor. The filter capacitor is coupled to the input end of the conversion circuit to receive the AC voltage. The operation method of the present invention includes the following steps: First, a voltage signal representing the AC voltage is provided according to the AC voltage. Then, the voltage signal is low-pass filtered to generate a filtered signal. Then, check whether the voltage distance between the voltage signal and the filter signal is smaller than the preset value. when the voltage When the distance is less than the preset value, the timing is performed and the timing results are accumulated. Finally, when the timing result exceeds a predetermined number of times or a predetermined time, the filter capacitor discharge circuit discharges the filter capacitor.

The main purpose and effect of the present invention is to use the filter capacitor discharge circuit to check whether the voltage distance between the voltage signal corresponding to the AC voltage and the filter signal corresponding to the AC voltage is less than The preset value is used to determine whether to turn on the switch unit, so as to discharge the energy remaining in the filter capacitor within a predetermined time after the AC voltage input is interrupted, so as to comply with safety regulations and avoid the risk of electric shock.

In order to further understand the technology, means and effect adopted by the present invention to achieve the predetermined purpose, please refer to the following detailed description and accompanying drawings of the present invention. For specific understanding, however, the accompanying drawings are only provided for reference and description, and are not intended to limit the present invention.

100: Conversion circuit

100-1: Input terminal

C: filter capacitor

10: Detection circuit

D1: first diode

D2: Second diode

R: resistance

20: Conversion unit

22: Rectifier circuit

Q: Power switch

30: Control unit

32: Filter capacitor discharge circuit

32-1: High voltage side

322: Signal preparation circuit

324: low pass filter

326, 326': range detector

3262, 3262': range generation circuit

AU: addition unit

SU: Subtraction Unit

3264: Comparison Circuit

OP1: first comparison unit

OP2: Second comparison unit

LG: Logic Unit

328: Timing Unit

330: Switch unit

332: High voltage start NMOS transistor

200: load

Vac: AC voltage

Vdc: DC voltage

Vo: output voltage

Vu, Vu': upper limit voltage

Vl, Vl': lower limit voltage

V1: The first reference voltage

V2: The second reference voltage

Ss: detect signal

Sv: voltage signal

Sf: filter signal

Se: enable signal

Sc: control signal

CLK: Clock signal

S1: The first comparison signal

S2: The second comparison signal

X: Voltage distance

t0, t1, t2: time

(S100)~(S300): Steps

1 is a circuit block diagram of a conversion circuit with a filter capacitor discharge circuit of the present invention; FIG. 2 is a circuit block diagram of the filter capacitor discharge circuit of the present invention; FIG. 3A is a circuit block diagram of a first embodiment of a range detector of the present invention; 3B is a schematic diagram of the waveform of the first embodiment of the range detector of the present invention with AC voltage; FIG. 3C is a schematic diagram of the waveform of the first embodiment of the range detector of the present invention when the AC voltage is removed; FIG. 4A is a schematic diagram of the waveform The circuit block diagram of the second embodiment of the inventive range detector; 4B is a schematic diagram of the waveform of the second embodiment of the range detector of the present invention with AC voltage; FIG. 4C is a schematic diagram of the waveform of the second embodiment of the range detector of the present invention when the AC voltage is removed; FIG. 5A is a schematic diagram of the waveform FIG. 5B is a flowchart of the first embodiment of the range detection operation method of the present invention; and FIG. 5C is a flowchart of the second embodiment of the range detection operation method of the present invention.

The technical content and detailed description of the present invention are described as follows in conjunction with the drawings: Please refer to FIG. 1 , which is a circuit block diagram of a conversion circuit with a filter capacitor discharge circuit of the present invention. The input terminal 100 - 1 of the conversion circuit 100 receives the AC voltage Vac, and converts the AC voltage Vac into an output voltage Vo to supply power to the load 200 . The conversion circuit 100 includes a filter capacitor C, a detection circuit 10 , a conversion unit 20 and a control unit 30 . The filter capacitor C is coupled to the input terminal 100-1 and filters the AC voltage Vac. The detection circuit 10 detects the AC voltage Vac, and provides the detection signal Ss to the control unit 30 according to the AC voltage Vac. The control unit 30 controls the conversion unit 20 to convert the AC voltage Vac into the output voltage Vo, and controls the discharge of the filter capacitor C according to the received detection signal Ss (represented by a dotted line).

Further, the control unit 30 includes a filter capacitor discharge circuit 32 . The filter capacitor discharge circuit 32 receives the detection signal Ss through the high voltage terminal 32-1, and determines whether to discharge the filter capacitor C according to the detection signal Ss. When the filter capacitor discharge circuit 32 determines that the AC voltage Vac exists according to the detection signal Ss, the filter capacitor discharge circuit 32 does not discharge the filter capacitor C to maintain the stable operation of the conversion circuit 100 . When the filter capacitor discharge circuit 32 determines that the AC voltage Vac does not exist according to the detection signal Ss When (for example, but not limited to, the plug is unplugged), the filter capacitor discharge circuit 32 discharges the filter capacitor C to discharge the energy remaining in the filter capacitor C to comply with safety regulations and avoid the risk of electric shock to personnel.

Referring back to FIG. 1 , the detection circuit 10 includes a first diode D1 , a second diode D2 and a resistor R. The first diode D1 and the second diode D2 rectify the AC voltage Vac into a continuous half-sine wave detection signal Ss, and the resistor R limits the current on the path of the detection circuit 10 to avoid flowing through the high voltage terminal 32 The current of -1 is too large and the control unit 30 is damaged. It is worth mentioning that in an embodiment of the present invention, the structure of the detection circuit 10 is not limited, such as a detection circuit (such as a full-scale detection circuit that can rectify the AC voltage Vac into a continuous or discontinuous half-sine wave detection signal Ss) bridge rectification structure), all should be included in the scope of this embodiment.

The conversion unit 20 is a flyback converter as an example. The conversion unit 20 converts the AC voltage Vac to the DC voltage Vdc through the rectifier circuit 22, and the control unit 30 controls the switching of the power switch Q (ie the main switch of the flyback converter) to convert the DC voltage Vdc to the output voltage Vo. However, in an embodiment of the present invention, the conversion unit 20 is not limited to a flyback converter, as long as a conversion device having a DC power conversion function should be included in the scope of this embodiment. In an embodiment of the present invention, the power supply method to the control unit 30 and the feedback detection and control method of the control unit 30 to the conversion unit 20 can be techniques well known to those skilled in the art, and will not be described here. Repeat.

Please refer to FIG. 2 for a circuit block diagram of the filter capacitor discharge circuit of the present invention, and refer to FIG. 1 for further reference. The filter capacitor discharge circuit 32 includes a high voltage terminal 32 - 1 , a signal preparation circuit 322 , a low pass filter 324 , a range detector 326 , a timing unit 328 , a switch unit 330 and a HV startup NMOS transistor 332 . The main function of the switch unit 330 is to discharge the filter capacitor C, so its coupling position only needs to be able to discharge the filter capacitor C (represented by a dotted line). Figure 2 is just an example When the switch unit 330 is turned on, the NMOS transistor 332 and the detection circuit 10 can be activated by high voltage to discharge the filter capacitor C, but the coupling position of the switch unit 330 and the filter capacitor C is for example but not limited to this. In another embodiment, the switching unit 330 may directly discharge the filter capacitor C.

The signal preparation circuit 322 receives the detection signal Ss through the high voltage terminal 32-1, and generates a voltage signal Sv representing the AC voltage Vac according to the detection signal Ss. The signal preparation circuit 322 is, for example, but not limited to, a step-down circuit, which mainly converts the received high-voltage detection signal Ss into a low-voltage voltage signal Sv that the control unit 30 can withstand. The signal preparation circuit 322 can be a voltage divider circuit formed by external resistors of the control unit 30 , or a voltage divider or step-down circuit formed by integrated circuit elements (including but not limited to resistors, transistors, etc.) inside the control unit 30 . circuit.

The low-pass filter 324 receives the voltage signal Sv, and provides the filtered signal Sf according to the voltage signal Sv. The low-pass filter 324 may be a first-order, second-order or third-order low-pass filter, and the higher the order filter, the more ideal the corresponding filtering effect.

The range detector 326 receives the voltage signal Sv and the filtering signal Sf, compares the voltage signal Sv and the filtering signal Sf, and provides an enabling signal Se to the timing unit 328 according to the comparison result. Specifically, the range detector 326 is used to check whether the voltage distance between the voltage signal Sv and the filtering signal Sf is smaller than a predetermined value. When the voltage distance between the voltage signal Sv and the filtering signal Sf is smaller than the predetermined value, it means that the voltage value of the voltage signal Sv is close to the voltage value of the filtering signal Sf. The reason may be that the voltage value of the AC voltage Vac is rising or falling, or the plug has been removed. When the voltage value of the AC voltage Vac is rising or falling, the time when the voltage distance between the voltage signal Sv and the filter signal Sf is smaller than the preset value is usually shorter, and when the plug is removed, the voltage distance between the voltage signal Sv and the filter signal Sf The time less than the preset value is usually longer. Therefore, this feature can be used to determine whether the plug is removed to determine whether to discharge the filter capacitor C.

The timing unit 328 receives the enable signal Se and the clock signal CLK, and provides the control signal Sc to the switch unit 330 according to the enable signal Se and the clock signal CLK. When the voltage distance between the voltage signal Sv and the filtering signal Sf is smaller than the preset value (as obtained from the enable signal Se), the timing unit 328 counts according to the clock signal CLK to generate the number of pulses, and determines whether to control the switch according to the number of pulses Cell 330 is turned on. For example, when the number of pulses is greater than or equal to a predetermined number of times, it means that the plug is removed. At this time, the timing unit 328 controls the switch unit 330 to turn on through the control signal Sc, so that the energy remaining in the filter capacitor C is discharged through the turn-on of the switch unit 330 . In another embodiment, the timing unit 328 is triggered by the enable signal Se to gradually increase a ramp signal, and when the ramp signal is higher than a predetermined value, it is determined that the timing result has exceeded the predetermined time, and also That is, the plug has been removed, and the switch unit 330 is turned on to discharge the filter capacitor C.

The predetermined time, the predetermined number of times or the predetermined value can be preset for the filter capacitor discharge circuit 32 and can be adjusted according to actual needs. In one embodiment, the predetermined time is on the order of hundreds of microseconds (us).

Please refer to FIG. 3A , which is a circuit block diagram of the range detector according to the first embodiment of the present invention, and refer to FIGS. 1 to 2 in combination. The range detector 326 includes a range generation circuit 3262 and a comparison circuit 3264 . The range generating circuit 3262 receives the filter signal Sf, and generates an upper limit voltage Vu corresponding to the upper limit of the voltage distance and a lower limit voltage V1 corresponding to the lower limit of the voltage distance according to the filter signal Sf. The comparison circuit 3264 is used for checking whether the voltage signal Sv falls between the upper limit voltage Vu and the lower limit voltage V1, and provides the enable signal Se to the timing unit 328 according to the checking result. When the voltage signal Sv falls between the upper limit voltage Vu and the lower limit voltage Vl, it means that the voltage distance between the voltage signal Sv and the filter signal Sf is smaller than the preset value (the voltage difference between the upper limit voltage Vu and the lower limit voltage Vl represents the voltage distance).

Specifically, the range generating circuit 3262 includes an addition unit AU and a subtraction unit SU, and the addition unit AU and the subtraction unit SU are coupled between the low-pass filter 324 and the comparison circuit 3264 . add The method unit AU is used for adding the first reference voltage V1 to the filtered signal Sf to generate the upper limit voltage Vu, and the subtraction unit SU is used for subtracting the second reference voltage V2 from the filtered signal Sf to generate the lower limit voltage V1. The voltage values of the first reference voltage V1 and the second reference voltage V2 may be the same or different. In practice, the voltage distance can be adjusted by adjusting the voltage values of the first reference voltage V1 and the second reference voltage V2.

The comparison circuit 3264 includes a first comparison unit OP1, a second comparison unit OP2 and a logic unit LG. The first comparison unit OP1 compares the upper limit voltage Vu with the voltage signal Sv to provide a first comparison signal S1. The second comparison unit OP2 compares the lower limit voltage V1 with the voltage signal Sv to provide a second comparison signal S2. The logic unit LG can be an AND gate (AND), and provides the enable signal Se to the timing unit 328 according to the first comparison signal S1 and the second comparison signal S2.

When both the first comparison signal S1 and the second comparison signal S2 are at the first level, it means that the voltage distance between the voltage signal Sv and the filtering signal Sf is smaller than the preset value, and the comparison circuit 3264 uses the enable signal Se to notify the timing unit 328 The timing is performed so that the timing unit 328 counts the clock signal CLK. It is worth mentioning that, in an embodiment of the present invention, the first comparison unit OP1 and the second comparison unit OP2 are comparators, but not limited thereto. In other words, as long as a comparison unit that can compare two input signals to generate a comparison result correspondingly (eg, but not limited to, a comparison unit formed by a voltage divider circuit) should be included in the scope of this embodiment. In addition, in an embodiment of the present invention, the logic unit LG is not limited to only using an AND gate (AND). Any logic unit LG (such as, but not limited to, NAND) that can convert the level of the output signal according to the conversion of the two input signals to the same level should be included in the scope of the present embodiment.

Please refer to FIG. 3B is a schematic diagram of the waveform of the first embodiment of the range detector of the present invention with AC voltage, and FIG. 3C is the waveform of the first embodiment of the range detector of the present invention when the AC voltage is removed Schematic diagram of the shape, refer to FIGS. 1-3A in combination, and refer to FIGS. 3A-3C repeatedly. The high-voltage terminal 32-1 receives the continuous half-sine wave detection signal Ss, and the signal preparation circuit 322 steps it down to a voltage signal Sv. The low-pass filter 324 filters the voltage signal Sv to generate a filter signal Sf, and the range generation circuit 3262 generates an upper limit corresponding to the voltage distance X (ie, the upper limit voltage Vu) according to the filter signal Sf and the first reference voltage V1, and according to the filter signal Sf and the second reference voltage V2 generate a lower limit corresponding to the voltage distance X (ie, the lower limit voltage V1). In FIG. 3B , when the voltage value of the voltage signal Sv is rising or falling, it falls between the upper limit voltage Vu and the lower limit voltage Vl for a short period of time, so that the voltage distance X between the voltage signal Sv and the filtering signal Sf is smaller than the preset value. At this time, the logic unit LG notifies the timing unit 328 to perform timing accordingly, so that the timing unit 328 counts the clock signal CLK. Since the voltage value of the voltage signal Sv is rising or falling when the AC voltage Vac is present, the time for the voltage value to fall between the upper limit voltage Vu and the lower limit voltage V1 is relatively short, so the number of pulses accumulated by the timing unit 328 It is not more than or equal to a predetermined number of times (or the accumulated time is not more than or equal to a predetermined time). Therefore, in this situation, the control signal Sc provided by the timing unit 328 keeps the switch unit 330 closed and disconnected, and the filter capacitor C will not be discharged.

In FIG. 3C, the plug is removed at time t1. At this time, the AC voltage Vac is cut off, so that the voltage signal Sv interrupts the change of the half-sine wave and maintains a slowly decreasing constant value (the constant value is the energy remaining in the filter capacitor C). At this time, since the half-sine wave change of the voltage signal Sv is interrupted, the voltage value of the voltage signal Sv (ie, the filtered signal Sf) filtered by the low-pass filter 324 begins to approach the voltage signal Sv maintained at a constant value. Therefore, the voltage value of the voltage signal Sv is made to enter between the upper limit voltage Vu and the lower limit voltage V1 (ie, the range of the upper limit voltage Vu and the lower limit voltage V1 is close to the voltage value of the voltage signal Sv), so that the voltage distance X is smaller than the preset value. For the convenience of illustration, this embodiment shows that when the plug is removed (time t1), the voltage signal Sv happens to be between the upper limit voltage Vu and the lower limit voltage V1. At time t1, the logic unit LG notifies the timing unit 328 to perform timing, so that the timing unit 328 can detect the clock signal CLK is counted, and since the voltage signal Sv is generally maintained at a constant value, the voltage distance X is always smaller than the preset value, so the timing unit 328 continues to count the clock signal CLK. At time t2, the timing unit 328 determines that the number of pulses is greater than or equal to a predetermined number of times or when the time counted by the timing unit 328 is greater than or equal to a predetermined time (ie (time t1 to time t2)), the timing unit 328 controls the switch with the control signal Sc The unit 330 is turned on to discharge the energy remaining in the filter capacitor C.

Please refer to FIG. 4A , which is a circuit block diagram of the range detector according to the second embodiment of the present invention, and refer to FIGS. 1 to 2 in combination. The range detector 326' of FIG. 4A is the same as and similar to the range detector 326 of FIG. 3A, which can be omitted from the previous teachings. The difference between FIG. 4A and FIG. 3A is that the filtering signal Sf and the voltage signal Sv are just interchanged. Briefly, the range detector 326 in FIG. 3A uses the filtered signal Sf as a reference to generate the upper limit voltage Vu and the lower limit voltage Vl, and then checks whether the voltage signal Sv is between the upper limit voltage Vu and the lower limit voltage Vl. The range detector 326' in FIG. 4A is based on the voltage signal Sv to generate the upper limit voltage Vu' and the lower limit voltage Vl', and then checks whether the filtered signal Sf is between the upper limit voltage Vu' and the lower limit voltage Vl'.

The addition unit AU is used to add the first reference voltage V1 to the voltage signal Sv to generate the upper limit voltage Vu', and the subtraction unit SU is used to subtract the second reference voltage V2 from the voltage signal Sv to generate the lower limit voltage V1'. The first comparison unit OP1 receives the upper limit voltage Vu' and the filter signal Sf, and compares the upper limit voltage Vu' with the filter signal Sf to provide a first comparison signal S1. The second comparison unit OP2 receives the lower limit voltage V1' and the filter signal Sf, and compares the lower limit voltage V1' with the filter signal Sf to provide a second comparison signal S2. It is worth mentioning that the circuits and control methods not mentioned in FIG. 4A are the same as those in FIG. 3A , and will not be repeated here.

Please refer to FIG. 4B is a schematic diagram of the waveform of the second embodiment of the range detector of the present invention with AC voltage, and FIG. 4C is the waveform of the second embodiment of the range detector of the present invention when the AC voltage is removed Schematic diagram of the shape, refer to FIGS. 1-4A in combination, and refer to FIGS. 4A-4C repeatedly. The range generating circuit 3262' generates an upper limit voltage Vu' corresponding to the upper limit of the voltage distance X (ie the first reference voltage V1) and a lower limit voltage V1' corresponding to the lower limit of the voltage distance X (ie the second reference voltage V2) according to the voltage signal Sv. In FIG. 4B , when the voltage value of the filter signal Sf is rising or falling, it will fall between the upper limit voltage Vu' and the lower limit voltage Vl' for a short period of time, so that the voltage distance X between the voltage signal Sv and the filter signal Sf is smaller than the preset value value. When the AC voltage Vac is present and the voltage value of the filter signal Sf is rising or falling, the time for the voltage value to fall between the upper limit voltage Vu' and the lower limit voltage V1' is relatively short, so the pulses accumulated by the timing unit 328 The number of waves is not greater than or equal to a predetermined number (or the accumulated time is not greater than or equal to a predetermined time). Therefore, in this situation, the control signal Sc provided by the timing unit 328 does not turn on the switch unit 330, so that the energy remaining in the filter capacitor C is discharged.

In FIG. 4C, the plug is removed at time t1. At this time, the AC voltage Vac is cut off, so that the voltage signal Sv interrupts the change of the half-sine wave and maintains a slowly decreasing constant value (the constant value is the energy remaining in the filter capacitor C). At this time, since the half-sine wave variation of the voltage signal Sv is interrupted, the upper limit voltage Vu' and the lower limit voltage Vl' generated according to the voltage signal Sv are also maintained at constant values. At this time, the voltage value of the voltage signal Sv (ie, the filtered signal Sf) filtered by the low-pass filter 324 gradually approaches the voltage signal Sv maintained at a constant value. Therefore, the voltage value of the voltage signal Sv is made to enter between the upper limit voltage Vu' and the lower limit voltage Vl' (that is, the voltage value of the filter signal Sf is close to the range of the upper limit voltage Vu' and the lower limit voltage Vl'), resulting in the voltage distance X being smaller than the predetermined set value. For convenience of illustration, this embodiment shows that when the plug is removed (time t1), the filtered signal Sf happens to be between the upper limit voltage Vu' and the lower limit voltage V1'. It is worth mentioning that the waveforms and control methods not mentioned in FIGS. 4B and 4C are the same as those in FIGS. 3B and 3C , and will not be repeated here.

Please refer to FIG. 5A for a flowchart of an operation method for discharging the filter capacitor according to the present invention, and refer to FIGS. 1 to 4C in combination. The flowchart shown in FIG. 5A is mainly for the operation method of discharging the filter capacitor C of the input end 100-1 of the conversion circuit 100 when the AC voltage Vac is cut off. The operation method includes providing a representative according to the AC voltage Vac. The voltage signal Sv of the AC voltage Vac ( S100 ). The detection circuit 10 detects the AC voltage Vac to obtain a detection signal Ss representing the AC voltage Vac, and the signal preparation circuit 322 processes (steps down) the detection signal Ss to obtain a voltage signal Sv. Then, the voltage signal Sv is low-pass filtered to generate the filtered signal Sf (S120). The low-pass filter 324 receives the voltage signal Sv, and provides the filtering signal Sf according to the voltage signal Sv. Then, it is checked whether the voltage distance between the voltage signal and the filter signal is less than a predetermined value (S140). The range detector 326 checks whether the voltage distance X between the voltage signal Sv and the filtering signal Sf is less than a predetermined value, and provides an enabling signal Se to the timing unit 328 according to the result. When the voltage distance X between the voltage signal Sv and the filtering signal Sf is greater than or equal to the preset value, the enable signal Se causes the timing unit 328 to reset (reset) the timing result (S300), and returns to step (S140). It is worth mentioning that, in an embodiment of the present invention, the timing result can be reset at any time point after the voltage distance X is greater than or equal to a predetermined value (as shown in FIGS. 3C and 4C ). For example, but not limited to, any time point in the time period between time tA~tB, tC~tD, and t0~t1 may be used.

When the voltage distance X between the voltage signal Sv and the filtering signal Sf is smaller than the predetermined value, it means that the voltage value of the voltage signal Sv is close to the voltage value of the filtering signal Sf. The reason may be that the voltage value of the AC voltage Vac is rising or falling, or the plug has been removed. At this time, the enable signal Se causes the timing unit 328 to count according to the clock signal CLK to generate the number of pulses, and to perform timing to accumulate the timing results generated by the previous loop ( S160 ). Then, it is judged whether the timing result exceeds a predetermined number of times or a predetermined time (S180). When the timing result does not exceed the predetermined number of times or the predetermined time, the voltage value representing the AC voltage Vac may be rising or falling, so return to step ( S140 ) to check again whether the voltage distance X is less than the preset value. When the timing result exceeds a predetermined time (for example, the number of pulse waves exceeds a predetermined number of times, or the duration of receiving a plurality of pulse waves exceeds a predetermined time), it means that the plug is removed, and the timing unit 328 controls the switch unit 330 to turn on through the control signal Sc. , discharge the filter capacitor C (S200).

Please refer to FIG. 5B for a flow chart of the first embodiment of the range detection operation method of the present invention, please refer to FIG. 5C for the flow chart of the second embodiment of the range detection operation method of the present invention, and refer to FIGS. 1 to 5A . In FIG. 5B, step (S140) includes steps (S200), (S220) and S(240). The addition unit AU adds the first reference voltage V1 to the filtered signal Sf to generate the upper limit voltage Vu, and the subtraction unit SU subtracts the second reference voltage V2 from the filtered signal Sf to generate the lower limit voltage V1 (S200). The first comparison unit OP1 compares the upper limit voltage Vu with the voltage signal Sv to provide a first comparison signal S1, and the second comparison unit OP2 compares the lower limit voltage V1 with the voltage signal Sv to provide a second comparison signal S2 (S220). The logic unit LG receives the first comparison signal S1 and the second comparison signal S2 to check whether the voltage signal Sv falls between the upper limit voltage Vu and the lower limit voltage V1, and provides an enable signal Se( S240). When both the first comparison signal S1 and the second comparison signal S2 are at the first level, it means that the voltage distance between the voltage signal Sv and the filtering signal Sf is less than the preset value, and the enable signal Se is used to notify the timing unit 328 to perform timing. The timing unit 328 is made to count the clock signal CLK.

In FIG. 5C, step (S140) includes steps (S300), (S320) and S(340). The addition unit AU adds the first reference voltage V1 to the voltage signal Sv to generate the upper limit voltage Vu', and the subtraction unit SU subtracts the second reference voltage V2 from the voltage signal Sv to generate the lower limit voltage V1' (S300). The first comparison unit OP1 compares the upper limit voltage Vu' with the filter signal Sf to provide a first comparison signal S1, and the second comparison unit OP2 compares the lower limit voltage V1' with the filter signal Sf to provide a second comparison signal S2 (S320). The step ( S340 ) is the same as or similar to the step ( S240 ) in FIG. 5B , which can be understood according to the previous teaching and will not be repeated.

The detailed descriptions and drawings of the embodiments are provided, but the features of the present invention are not limited thereto, and are not intended to limit the present invention. The spirit of the scope and the embodiments of similar changes should all be included in the scope of the present invention, and any changes or modifications that can be easily conceived by anyone familiar with the art in the field of the present invention can be covered by the following patent scope of the present case .

32: Filter capacitor discharge circuit

32-1: High voltage side

322: Signal preparation circuit

324: low pass filter

326: Range Detector

328: Timing Unit

330: Switch unit

332: High voltage start NMOS transistor

Ss: detect signal

Sv: voltage signal

Sf: filter signal

Se: enable signal

Sc: control signal

CLK: Clock signal

Claims (17)

A filter capacitor discharge circuit, comprising: a high voltage terminal coupled to a filter capacitor of an input terminal, the input terminal receiving an AC voltage; a signal preparation circuit coupled to the high voltage terminal for generating a voltage representing the AC voltage signal; a low-pass filter, according to the voltage signal, provides a filter signal; a range detector, compares the voltage signal and the filter signal, to check whether the voltage distance between the voltage signal and the filter signal is less than a predetermined Setting value, the range detector includes: a range generating circuit for generating an upper limit voltage and a lower limit voltage according to the filtering signal; and a comparison circuit for checking whether the voltage signal falls between the upper limit voltage and the lower limit voltage , and provide a consistent enable signal according to the inspection result; a timing unit that receives the enable signal, and when the voltage distance is less than the preset value, performs timing to accumulate a timing result; and a switch unit, when the timing As a result, when a predetermined time is exceeded, the timing unit turns on the switch unit to discharge the filter capacitor through the switch unit. The filter capacitor discharge circuit according to claim 1, wherein the timing unit generates a pulse number according to the count of a clock signal, and when the pulse number is greater than or equal to a predetermined number of times, the timing unit determines that the timing result exceeds For the predetermined time, the switch unit is turned on. The filter capacitor discharge circuit as claimed in claim 2, wherein the range generating circuit comprises: an addition unit, which adds the filtered signal to the first reference voltage to generate the upper limit voltage; and a subtraction unit, which subtracts the filtered signal from the upper limit voltage. The lower limit voltage is generated by removing a second reference voltage. The filter capacitor discharge circuit as claimed in claim 2, wherein the comparison circuit comprises: a first comparison unit for providing the first comparison signal by comparing the upper limit voltage with the voltage signal; a second comparison unit for providing the second comparison signal by comparing the lower limit voltage with the voltage signal; and a logic unit for providing the second comparison signal according to The first comparison signal and the second comparison signal provide the enable signal. A filter capacitor discharge circuit, comprising: a high voltage terminal coupled to a filter capacitor of an input terminal, the input terminal receiving an AC voltage; a signal preparation circuit coupled to the high voltage terminal for generating a voltage representing the AC voltage signal; a low-pass filter, according to the voltage signal, provides a filter signal; a range detector, compares the voltage signal and the filter signal, to check whether the voltage distance between the voltage signal and the filter signal is less than a predetermined Setting value, the range detector includes: a range generating circuit, which generates an upper limit voltage and a lower limit voltage according to the voltage signal; and a comparison circuit, which checks whether the filter signal falls between the upper limit voltage and the lower limit voltage , and provide a consistent enable signal according to the inspection result; a timing unit, which receives the enable signal, and when the voltage distance is less than the preset value, performs timing to accumulate a timing result; and a switch unit, when the timing When the result exceeds a predetermined time, the timing unit turns on the switch unit, and discharges the filter capacitor through the switch unit. The filter capacitor discharge circuit as claimed in claim 5, wherein the range generating circuit comprises: an addition unit, which adds a first reference voltage to the voltage signal to generate the upper limit voltage; and a subtraction unit, which subtracts the voltage signal from the voltage signal. The lower limit voltage is generated by removing a second reference voltage. The filter capacitor discharge circuit according to claim 5, wherein the comparison circuit comprises: a first comparison unit, which compares the upper limit voltage with the filter signal to provide the first comparison signal; a second comparison unit for providing the second comparison signal by comparing the lower limit voltage with the filtering signal; and a logic unit for providing the enable signal representing the inspection result according to the first comparison signal and the second comparison signal. The filter capacitor discharge circuit according to claim 5, wherein the timing unit generates a pulse number according to the count of a clock signal, and when the pulse number is greater than or equal to a predetermined number of times, the timing unit determines that the timing result exceeds For the predetermined time, the switch unit is turned on. A filter capacitor discharge circuit, comprising: a high voltage terminal coupled to a filter capacitor of an input terminal, the input terminal receiving an AC voltage; a signal preparation circuit coupled to the high voltage terminal for generating a voltage representing the AC voltage signal; a low-pass filter, according to the voltage signal, provides a filter signal; a range detector, compares the voltage signal and the filter signal, to check whether the voltage distance between the voltage signal and the filter signal is less than a predetermined set value; a timing unit, when the voltage distance is less than the preset value, performs timing to accumulate a timing result; and a switch unit, when the timing result exceeds a predetermined time, the timing unit turns on the switch unit , let the filter capacitor discharge through the switch unit; and wherein, the range detector generates an upper limit voltage and a lower limit voltage, and generates the preset value according to the difference between the upper limit voltage and the lower limit voltage; when the timing result is not When the predetermined time is exceeded and the voltage distance is from less than the preset value to greater than or equal to the preset value, the timing result is reset. A conversion circuit, comprising: a filter capacitor, receiving an AC voltage from an input end; a detection circuit, detecting the AC voltage and providing a detection signal; and The filter capacitor discharge circuit as claimed in claim 1, 5 or 9 receives the detection signal through the high voltage terminal. An operation method for discharging a filter capacitor, the filter capacitor is coupled to an input terminal to receive an AC voltage, the operation method includes the following steps: providing a voltage signal representing the AC voltage according to the AC voltage; low-pass filtering the voltage signal to generate a filter signal; check whether a voltage distance between the voltage signal and the filter signal is less than a preset value; when the voltage distance is less than the preset value, perform timing to accumulate a timing result; When the timing result exceeds a predetermined time, discharge the filter capacitor; generate an upper limit voltage and a lower limit voltage according to the filter signal; and check whether the voltage signal falls between the upper limit voltage and the lower limit voltage, and according to The result of the check provides a consistent signal of whether timing is in progress. The operation method of claim 11, wherein the step of the timing result exceeding the predetermined time comprises: generating a pulse number according to a clock signal count, and when the pulse number is greater than or equal to a predetermined number of times, the filter capacitor discharge. The operation method of claim 12, further comprising: adding the first reference voltage to the filtered signal to generate the upper limit voltage, and subtracting a second reference voltage from the filtered signal to generate the lower limit voltage; comparing the The upper limit voltage and the voltage signal provide the first comparison signal, and the lower limit voltage and the voltage signal are compared to provide the second comparison signal; and the enable signal is provided according to the first comparison signal and the second comparison signal . An operation method for discharging a filter capacitor, the filter capacitor is coupled to an input terminal to receive an AC voltage, the operation method includes the following steps: providing a voltage signal representing the AC voltage according to the AC voltage; low-pass filtering the voltage signal to generate a filter signal; check whether a voltage distance between the voltage signal and the filter signal is less than a preset value; when the voltage distance is less than the preset value, perform timing to accumulate a timing result; When the timing result exceeds a predetermined time, discharge the filter capacitor; generate an upper limit voltage and a lower limit voltage according to the voltage signal; and check whether the filter signal falls between the upper limit voltage and the lower limit voltage, and according to the The result of the check provides a consistent signal of whether timing is in progress. The operation method of claim 14, further comprising: adding the first reference voltage to the voltage signal to generate the upper limit voltage, and subtracting a second reference voltage from the voltage signal to generate the lower limit voltage; comparing the upper limit voltage The first comparison signal is provided with the filtering signal, and the second comparison signal is provided by comparing the lower limit voltage with the filtering signal; and the enabling signal is provided according to the first comparison signal and the second comparison signal. The operation method of claim 14, wherein the step of the timing result exceeding the predetermined time comprises: generating a pulse number according to a clock signal count, and when the pulse number is greater than or equal to a predetermined number of times, the filter capacitor discharge. An operation method for discharging a filter capacitor, the filter capacitor is coupled to an input terminal to receive an AC voltage, and the operation method includes the following steps: A voltage signal representing the AC voltage is provided according to the AC voltage; the voltage signal is low-pass filtered to generate a filtered signal; an upper limit voltage and a lower limit voltage are generated, and a difference is generated according to the difference between the upper limit voltage and the lower limit voltage default value; check whether a voltage distance between the voltage signal and the filter signal is less than the default value; when the voltage distance is less than the default value, perform timing to accumulate a timing result; when the timing result exceeds a When the predetermined time is reached, the filter capacitor is discharged; and when the timing result does not exceed the predetermined time, and the voltage distance is from less than the predetermined value to greater than or equal to the predetermined value, the timing result is reset.

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