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TWI689059B - Electronic package and method of manufacture - Google Patents

Electronic package and method of manufacture Download PDF

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Publication number
TWI689059B
TWI689059B TW106146510A TW106146510A TWI689059B TW I689059 B TWI689059 B TW I689059B TW 106146510 A TW106146510 A TW 106146510A TW 106146510 A TW106146510 A TW 106146510A TW I689059 B TWI689059 B TW I689059B
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Taiwan
Prior art keywords
surface layer
layer
sensing
packaging structure
electronic component
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TW106146510A
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Chinese (zh)
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TW201931537A (en
Inventor
張書齊
蕭憲隆
蕭錦池
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矽品精密工業股份有限公司
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Priority to TW106146510A priority Critical patent/TWI689059B/en
Priority to CN201810021381.XA priority patent/CN109994431A/en
Publication of TW201931537A publication Critical patent/TW201931537A/en
Application granted granted Critical
Publication of TWI689059B publication Critical patent/TWI689059B/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135—Double encapsulation or coating and encapsulation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12—Fingerprints or palmprints
    • G06V40/13—Sensors therefor
    • G06V40/1306—Sensors therefor non-optical, e.g. ultrasonic or capacitive sensing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293—Organic, e.g. plastic
    • H01L23/295—Organic, e.g. plastic containing a filler
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Human Computer Interaction (AREA)
  • Multimedia (AREA)
  • Theoretical Computer Science (AREA)
  • Packaging Frangible Articles (AREA)
  • Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)

Abstract

The invention provides an electronic package comprising an encapsulating layer, an electronic element embedded in the encapsulating layer, a plurality of conductors disposed through the encapsulating layer, a circuit layer disposed on the encapsulating layer and electrically connected to the conductors, thereby reducing manufacturing complexity by disposing the conductors through the encapsulating layer to save costs. The invention further provides a method for manufacturing the electronic package as described above.

Description

封裝結構 Package structure

本發明係有關一種封裝結構，尤指一種可應用於指紋感測器之封裝結構。 The invention relates to a packaging structure, in particular to a packaging structure applicable to a fingerprint sensor.

隨著消費者對於隱私的注重程度提升，諸多高階電子產品皆已裝載使用者辨識系統，例如，手機、平板電腦、個人電腦、電子鎖等，以增加電子產品中資料的安全性，因此辨識系統的研發與設計隨著消費者需求，而成為電子產業主要發展方向之一。 As consumers pay more attention to privacy, many high-end electronic products have been equipped with user identification systems, such as mobile phones, tablets, personal computers, electronic locks, etc., to increase the security of data in electronic products, so identification systems Along with consumer demand, R&D and design have become one of the main development directions of the electronics industry.

於生物辨識系統中，依據辨識標的之不同可概括分為辨識生物的生理特徵(如指紋、瞳孔、人臉、聲紋)辨識與行為特徵(如簽名、語音)等類型的生物辨識系統，其中，辨識生理特徵的生物辨識系統具有單一性、防偽程度高與便利等優點，且此技術已逐漸成熟而廣泛地應用於個人之身分辨識與確認，因此廣為消費者所接受。 In the biometric identification system, it can be divided into biometric identification systems based on the identification of biological characteristics (such as fingerprints, pupils, faces, voiceprints) and behavioral characteristics (such as signatures, voices), etc. The biological identification system for identifying physiological characteristics has the advantages of unity, high degree of anti-counterfeiting and convenience, and this technology has gradually matured and is widely used in personal identification and confirmation of individuals, so it is widely accepted by consumers.

現有指紋辨識裝置中，依據指紋的掃描方式分為掃描指紋圖案的光學式指紋辨識裝置及偵測指紋紋路中的微量電荷的電容式指紋辨識裝置。 Existing fingerprint recognition devices are divided into optical fingerprint recognition devices that scan fingerprint patterns and capacitive fingerprint recognition devices that detect trace charges in fingerprint lines according to the scanning method of the fingerprint.

目前電容式指紋感測器係符合薄型化與微小型化，因 而廣泛應用於電子產品上。如第1圖所示，習知電容式指紋感測器(fingerprint sensor)之封裝結構1係於一基板10上設置一具有感測面11a之感測晶片11，再以封裝膠體12包覆該感測晶片11並外露出該感測面11a，之後於該感測面11a與該封裝膠體12上設置一傳感層13。藉此，使用者可藉由觸滑(swipe)該傳感層13而令該感測晶片11之感測面11a感測指紋。 At present, capacitive fingerprint sensors are in line with thinness and miniaturization. It is widely used in electronic products. As shown in FIG. 1, the conventional capacitive fingerprint sensor packaging structure 1 is provided with a sensing chip 11 having a sensing surface 11 a on a substrate 10, and then the encapsulant 12 covers the The sensing chip 11 exposes the sensing surface 11a, and then a sensing layer 13 is provided on the sensing surface 11a and the encapsulant 12. Thereby, the user can make the sensing surface 11a of the sensing chip 11 sense the fingerprint by swipe the sensing layer 13.

惟，習知封裝結構1中，於設置該傳感層13前之運送過程中，該感測晶片11係外露於環境中，因而容易受到環境氣體、環境液體或手指上的汗水與酸鹼性等的影響，致使該感測晶片11(甚至該感測面11a)發生表面侵蝕及產生靜電等問題，造成採用該封裝結構1之電容式指紋感測器的耐用性不佳，且使用壽命大幅降低。 However, in the conventional packaging structure 1, during the transportation process before the sensing layer 13 is provided, the sensing chip 11 is exposed to the environment, so it is susceptible to environmental gas, environmental liquid or sweat and acid and alkali on the finger Such effects cause surface erosion and static electricity generation on the sensing chip 11 (even the sensing surface 11a), resulting in poor durability and large service life of the capacitive fingerprint sensor using the package structure 1 reduce.

再者，雖可於該感測晶片11上設置一藍寶石基板，以避免發生表面侵蝕及產生靜電等問題，但會大幅提高製作成本。 Furthermore, although a sapphire substrate can be provided on the sensing chip 11 to avoid surface erosion and static electricity, the manufacturing cost will be greatly increased.

因此，如何克服上述習知技術的種種問題，實已成目前亟欲解決的課題。 Therefore, how to overcome the various problems of the above-mentioned conventional technologies has become an urgent issue to be solved at present.

鑒於上述習知技術之缺失，本發明係提供一種封裝結構，係包括：承載件；電子元件，係具有相對之感測面與非感測面，並以該非感測面結合至該承載件上；封裝層，係形成於該承載件上以包覆該電子元件，且令該感測面外露出該封裝層；以及表面層，係覆蓋該電子元件，並包含 有聚合物與導電物。 In view of the lack of the above-mentioned conventional technology, the present invention provides a packaging structure including: a carrier; an electronic component having opposite sensing surfaces and a non-sensing surface, and the non-sensing surface is coupled to the carrier An encapsulation layer is formed on the carrier to cover the electronic component and expose the encapsulation layer to the sensing surface; and a surface layer covers the electronic component and includes There are polymers and conductive materials.

前述之封裝結構中，該電子元件係電性連接該承載件。 In the aforementioned packaging structure, the electronic component is electrically connected to the carrier.

前述之封裝結構中，該聚合物係為環氧樹脂。 In the aforementioned packaging structure, the polymer is an epoxy resin.

前述之封裝結構中，該導電物係為碳黑材料，如碳顆粒，且該碳黑材料佔據該表面層的含量比例低於5%。進一步地，該碳黑材料佔據該表面層的含量比例可調整該表面層之顏色深淺程度或調整該表面層的電阻值。或者，該碳黑材料的導電性亦可用以調整該表面層的電阻值。 In the aforementioned packaging structure, the conductive material is a carbon black material, such as carbon particles, and the content of the carbon black material occupying the surface layer is less than 5%. Further, the content ratio of the carbon black material to the surface layer can adjust the color depth of the surface layer or adjust the resistance value of the surface layer. Alternatively, the conductivity of the carbon black material can also be used to adjust the resistance value of the surface layer.

前述之封裝結構中，該表面層的導電物、該電子元件及該承載件係構成一用以排除靜電的導電通路。 In the aforementioned packaging structure, the conductive material of the surface layer, the electronic component and the carrier constitute a conductive path for removing static electricity.

前述之封裝結構中，復包括設於該表面層上之傳感層。 In the aforementioned packaging structure, the sensor layer is provided on the surface layer.

由上可知，本發明之封裝結構，主要藉由該包含有聚合物與導電物之表面層之設計取代習知藍寶石基板之使用，以降低製作成本，且使該電子元件於設置該傳感層13前不會外露於環境中，故相較於習知技術，本發明不僅能保護該電子元件而避免發生表面侵蝕及產生靜電等問題，且能避免該電子元件因靜電而造成燒毀之問題，因而能提升該封裝結構的耐用性，且能大幅增加使用壽命。 It can be seen from the above that the packaging structure of the present invention mainly replaces the use of the conventional sapphire substrate by the design of the surface layer including the polymer and the conductive material, so as to reduce the manufacturing cost and enable the electronic device to be provided with the sensing layer It will not be exposed to the environment before 13, so compared with the conventional technology, the present invention can not only protect the electronic component from surface erosion and static electricity, but also prevent the electronic component from burning down due to static electricity. Therefore, the durability of the packaging structure can be improved, and the service life can be greatly increased.

1,2,3‧‧‧封裝結構 1,2,3‧‧‧Package structure

10‧‧‧基板 10‧‧‧ substrate

11‧‧‧感測晶片 11‧‧‧sensing chip

11a,21a‧‧‧感測面 11a, 21a‧‧‧sensing surface

12‧‧‧封裝膠體 12‧‧‧Packing colloid

13,23‧‧‧傳感層 13,23‧‧‧sensing layer

20‧‧‧承載件 20‧‧‧Carrier

200‧‧‧接地線路 200‧‧‧Ground line

21‧‧‧電子元件 21‧‧‧Electronic components

21b‧‧‧非感測面 21b‧‧‧non-sensing surface

210,310‧‧‧電極墊 210,310‧‧‧electrode pad

211‧‧‧導電凸塊 211‧‧‧conductive bump

22‧‧‧封裝層 22‧‧‧Encapsulation layer

22a‧‧‧第一表面 22a‧‧‧First surface

22b‧‧‧第二表面 22b‧‧‧Second surface

24‧‧‧表面層 24‧‧‧Surface layer

24a‧‧‧聚合物 24a‧‧‧polymer

24b‧‧‧導電物 24b‧‧‧Conductor

29‧‧‧底膠 29‧‧‧ Primer

311‧‧‧銲線 311‧‧‧Wire

第1圖係為習知封裝結構之剖面示意圖；第2圖係為本發明之封裝結構之剖面示意圖；以及第3圖係為第2圖之另一實施例之剖面示意圖。 Figure 1 is a schematic cross-sectional view of a conventional packaging structure; Figure 2 is a schematic cross-sectional view of the packaging structure of the present invention; and Figure 3 is a schematic cross-sectional view of another embodiment of Figure 2.

以下係藉由特定的具體實例說明本發明之實施方式，熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點與功效。本發明亦可藉由其他不同的具體實例加以施行或應用，本說明書中的各項細節亦可基於不同觀點與應用，在不悖離本發明之精神下進行各種修飾與變更。 The following is a description of the embodiments of the present invention by specific specific examples. Those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied by other different specific examples. Various details in this specification can also be based on different viewpoints and applications, and various modifications and changes can be made without departing from the spirit of the present invention.

須知，本說明書所附圖式所繪示之結構、比例、大小等，均僅用以配合說明書所揭示之內容，以供熟悉此技藝之人士之瞭解與閱讀，並非用以限定本創作可實施之限定條件，故不具技術上之實質意義，任何結構之修飾、比例關係之改變或大小之調整，在不影響本創作所能產生之功效及所能達成之目的下，均應仍落在本創作所揭示之技術內容得能涵蓋之範圍內。本說明書中所引用之如「上」、「第一」、「第二」及「一」等之用語，亦僅為便於敘述之明瞭，而非用以限定本創作可實施之範圍，其相對關係之改變或調整，在無實質變更技術內容下，當亦視為本創作可實施之範疇。 It should be noted that the structure, ratio, size, etc. shown in the drawings of this specification are only used to match the contents disclosed in the specification, for those who are familiar with this skill to understand and read, not to limit the creation of this creation. The limited conditions, so it does not have the technical significance, any modification of structure, change of proportional relationship or adjustment of size, should not fall within the original without affecting the effect and the purpose of this creation. The technical content revealed by the creation must be within the scope. The terms such as "upper", "first", "second", and "one" cited in this manual are also only for the convenience of description, not to limit the scope of this creation, and their relative Changes or adjustments in the relationship, without substantial changes in the technical content, should also be regarded as the scope of this creation.

請參閱第2圖，係為本發明之封裝結構2之剖面示意圖。如第2圖所示，所述之封裝結構2係包括一承載件20、一電子元件21、一封裝層22、一傳感層23以及一表面層24。 Please refer to FIG. 2, which is a schematic cross-sectional view of the package structure 2 of the present invention. As shown in FIG. 2, the packaging structure 2 includes a carrier 20, an electronic component 21, a packaging layer 22, a sensing layer 23 and a surface layer 24.

所述之承載件20係為具有核心層或無核心層(coreless)之線路結構，例如封裝基板(substrate)，其具 有線路層，如包含接地線路200，其型態為扇出(fan out)型重佈線路層(redistribution layer，簡稱RDL)。應可理解地，該承載件20亦可為其它承載晶片之型式，如導線架(leadframe)、如晶圓(wafer)或矽中介板(silicon interposer)之半導體板、或其它具有金屬佈線(routing)之載板，並不限於上述。 The carrier 20 is a circuit structure with a core layer or a coreless layer, such as a package substrate, which has There is a circuit layer, for example, including the grounding circuit 200, and its type is a fan out redistribution layer (RDL). It should be understood that the carrier 20 may also be other types of carrier chips, such as a leadframe, a semiconductor board such as a wafer or silicon interposer, or other metal routing (routing) ) Is not limited to the above.

所述之電子元件21係具有相對之感測面21a與非感測面21b，且該電子元件21以其非感測面21b結合該承載件20。 The electronic component 21 has a sensing surface 21a and a non-sensing surface 21b opposite to each other, and the electronic component 21 is coupled to the carrier 20 with its non-sensing surface 21b.

於本實施例中，該電子元件21係為感測晶片，例如，一種用以偵測生物體電荷變化、溫度差、壓力等的感測晶片，更佳為指紋辨識晶片，該指紋辨識晶片係為能藉由該感測面21a所接收的電容差進行生物辨識。 In this embodiment, the electronic component 21 is a sensing chip, for example, a sensing chip for detecting changes in biological charge, temperature difference, pressure, etc., preferably a fingerprint identification chip, which is a fingerprint identification chip In order to be able to perform biometric identification by the capacitance difference received by the sensing surface 21a.

再者，該電子元件21之電極墊210係配置於該非感測面21b上，使電子元件21藉由該電極墊210及複數導電凸塊211以覆晶方式電性連接該承載件20之線路層，再以底膠29包覆該些導電凸塊211。或者，於其它實施例中，如第3圖所示，該電子元件21之電極墊310可配置於該感測面21a上，使該電極墊310藉由銲線311以打線方式電性連接該承載件20之線路層。因此，對於該電子元件21電性連接該承載件20之方式並無特別限制。 Furthermore, the electrode pad 210 of the electronic component 21 is disposed on the non-sensing surface 21b, so that the electronic component 21 is electrically connected to the circuit of the carrier 20 through the flip chip method through the electrode pad 210 and the plurality of conductive bumps 211 Layer, and then coat the conductive bumps 211 with primer 29. Alternatively, in other embodiments, as shown in FIG. 3, the electrode pad 310 of the electronic component 21 may be disposed on the sensing surface 21a, so that the electrode pad 310 is electrically connected to the electrode pad by a bonding wire 311 The circuit layer of the carrier 20. Therefore, there is no particular limitation on the manner in which the electronic component 21 is electrically connected to the carrier 20.

所述之封裝層22係形成於該承載件20上以包覆該電子元件21，使該電子元件21嵌埋於該封裝層22中，且令該感測面21a外露出該封裝層22。另外，可省略前述之底 膠29，直接以該封裝層22包覆該些導電凸塊211。 The encapsulation layer 22 is formed on the carrier 20 to cover the electronic component 21, so that the electronic component 21 is embedded in the encapsulation layer 22, and the encapsulation layer 22 is exposed outside the sensing surface 21a. In addition, the aforementioned bottom can be omitted The glue 29 directly covers the conductive bumps 211 with the encapsulation layer 22.

於本實施例中，該封裝層22係具有相對之第一表面22a及第二表面22b，該封裝層22以其第二表面22b結合至該承載件20上，且令該感測面21a外露於該封裝層22之第一表面22a。 In this embodiment, the encapsulation layer 22 has opposing first and second surfaces 22a and 22b. The encapsulation layer 22 is bonded to the carrier 20 with its second surface 22b and exposes the sensing surface 21a On the first surface 22a of the encapsulation layer 22.

再者，形成該封裝層22之材質係為聚醯亞胺(polyimide，簡稱PI)、乾膜(dry film)、環氧樹脂(epoxy)或封裝材(molding compound)，但不限於上述。 Furthermore, the material forming the encapsulation layer 22 is polyimide (PI), dry film, dry film, epoxy, or molding compound, but it is not limited to the above.

又，形成該封裝層22之方法係以壓合(laminating)方式或如模壓成型(compression molding)、轉注成型(transfer molding)等鑄模成型(molding)方式所完成。 In addition, the method of forming the encapsulation layer 22 is completed by a laminating method or a molding method such as compression molding, transfer molding, or the like.

所述之表面層24係形成於該封裝層22之第一表面22a上且覆蓋該電子元件21之感測面21a，且該表面層24係包含聚合物24a與導電物24b。 The surface layer 24 is formed on the first surface 22a of the encapsulation layer 22 and covers the sensing surface 21a of the electronic device 21, and the surface layer 24 includes a polymer 24a and a conductive material 24b.

於本實施例中，該聚合物24a係為環氧樹脂，且該導電物24b係為碳黑材料，其中，該碳黑材料係為碳顆粒，例如，該碳黑材料佔據該表面層24的含量比例係低於5%。 In this embodiment, the polymer 24a is an epoxy resin, and the conductive material 24b is a carbon black material, wherein the carbon black material is carbon particles, for example, the carbon black material occupies the surface layer 24 The content ratio is less than 5%.

再者，將該碳黑材料添加於該環氧樹酯中，可使該表面層24之顏色呈黑色，故藉由控制該碳黑材料的比例可調整該表面層24之黑色程度，如深黑色、淺黑色或灰色等。 Furthermore, adding the carbon black material to the epoxy resin can make the color of the surface layer 24 black, so by controlling the ratio of the carbon black material, the black degree of the surface layer 24 can be adjusted, such as deep Black, light black or gray.

又，藉由控制該碳黑材料的含量比例或導電性(如提高其電阻等)，可調整該表面層24的電阻值，故該表面層24的導電物24b(碳黑材料)、相關該電子元件21的導電元件(如電極墊210,310與該導電凸塊211或銲線311等) 及該承載件20的接地線路200可構成一用以排除靜電的導電通路。 Moreover, by controlling the content ratio or conductivity of the carbon black material (such as increasing its resistance, etc.), the resistance value of the surface layer 24 can be adjusted. Therefore, the conductive material 24b (carbon black material) of the surface layer 24 Conductive elements of the electronic component 21 (such as electrode pads 210, 310 and the conductive bumps 211 or bonding wires 311, etc.) And the grounding line 200 of the carrier 20 can form a conductive path for removing static electricity.

此外，可將該導電物24b(碳黑材料)佔據該表面層24的含量比例調降至5%以下，使該表面層24之電阻上升至大於或等於1011歐姆(≧1011Ω)，以提高該表面層24之抗靜電力，如可抗大於30千伏(>30KV)之電壓，故能避免該電子元件21因靜電而造成燒毀之問題。 In addition, the proportion of the conductive material 24b (carbon black material) occupying the surface layer 24 can be adjusted down to less than 5%, so that the resistance of the surface layer 24 rises to be greater than or equal to 10 11 ohms (≧10 11 Ω), In order to improve the antistatic force of the surface layer 24, for example, it can resist voltages greater than 30 kilovolts (>30KV), so that the problem of burning of the electronic component 21 due to static electricity can be avoided.

所述之傳感層23係設於該表面層24上。於本實施例中，該傳感層23係作為傳感或保護用，其材質係為玻璃或其它適當的高分子材料。 The sensing layer 23 is arranged on the surface layer 24. In this embodiment, the sensing layer 23 is used for sensing or protection, and its material is glass or other suitable polymer materials.

於該封裝結構2之運作中，藉由手指作用(按壓)該傳感層23而令該表面層24與該感測面21a感測指紋之相關訊號。 In the operation of the packaging structure 2, the surface layer 24 and the sensing surface 21a sense the fingerprint-related signals by the finger acting (pressing) the sensing layer 23.

綜上所述，本發明之封裝結構2,3中，係藉由該表面層24形成於該感測面21a上(或於該電子元件21與該傳感層23之間形成該表面層24)，且該表面層24包含聚合物24a與導電物24b，相較於習知，將可大幅降低製作成本，且使該電子元件21於設置該傳感層23前之運送過程中不會外露於環境中，故相較於習知技術，該封裝結構2,3不僅能保護該電子元件21而使其不受到環境氣體、環境液體或手指上的汗水與酸鹼性等的影響以避免該電子元件21(甚至該感測面21a)發生表面侵蝕及產生靜電等問題，且能避免該電子元件21因靜電而造成燒毀之問題，因而能提升採用該封裝結構2之電容式感測器的耐用性，且能大 幅增加使用壽命。 In summary, in the packaging structures 2 and 3 of the present invention, the surface layer 24 is formed on the sensing surface 21a (or the surface layer 24 is formed between the electronic component 21 and the sensing layer 23 ), and the surface layer 24 includes a polymer 24a and a conductive object 24b, compared with the prior art, it can greatly reduce the manufacturing cost, and the electronic component 21 is not exposed during the transportation process before the sensor layer 23 is provided In the environment, compared with the conventional technology, the packaging structure 2, 3 can not only protect the electronic component 21 from the environmental gas, environmental liquid or sweat on the finger and acid and alkali to avoid the impact The electronic component 21 (even the sensing surface 21a) has problems such as surface erosion and static electricity generation, and can prevent the electronic component 21 from being burned due to static electricity, thereby improving the capacity of the capacitive sensor using the packaging structure 2 Durability, and can be large Increase the service life.

上述實施例僅例示性說明本發明之原理及其功效，而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下，對上述實施例進行修飾與改變。因此，本發明之權利保護範圍，應如後述之申請專利範圍所列。 The above-mentioned embodiments merely exemplify the principles and effects of the present invention, and are not intended to limit the present invention. Anyone who is familiar with this skill can modify and change the above embodiments without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the rights of the present invention should be as listed in the scope of patent application mentioned later.

2‧‧‧封裝結構 2‧‧‧Packaging structure

20‧‧‧承載件 20‧‧‧Carrier

200‧‧‧接地線路 200‧‧‧Ground line

21‧‧‧電子元件 21‧‧‧Electronic components

21a‧‧‧感測面 21a‧‧‧sensing surface

21b‧‧‧非感測面 21b‧‧‧non-sensing surface

210‧‧‧電極墊 210‧‧‧electrode pad

211‧‧‧導電凸塊 211‧‧‧conductive bump

22‧‧‧封裝層 22‧‧‧Encapsulation layer

22a‧‧‧第一表面 22a‧‧‧First surface

22b‧‧‧第二表面 22b‧‧‧Second surface

23‧‧‧傳感層 23‧‧‧sensing layer

24‧‧‧表面層 24‧‧‧Surface layer

24a‧‧‧聚合物 24a‧‧‧polymer

24b‧‧‧導電物 24b‧‧‧Conductor

29‧‧‧底膠 29‧‧‧ Primer

Claims (9)

一種封裝結構，係包括：承載件；電子元件，係具有相對之感測面與非感測面，並以該非感測面結合至該承載件上，且該電子元件藉由複數導電元件電性連接該承載件；封裝層，係形成於該承載件上以包覆該電子元件，且令該感測面外露出該封裝層；以及表面層，係覆蓋該電子元件，並包含有聚合物與導電物，且該表面層之構成與該封裝層之構成不同，其中，該表面層未接觸該複數導電元件，且該導電物係為碳黑材料。 A packaging structure includes: a carrier; an electronic component having opposing sensing and non-sensing surfaces, and the non-sensing surface is coupled to the carrier, and the electronic component is electrically Connected to the carrier; an encapsulation layer formed on the carrier to cover the electronic component and expose the encapsulation layer to the sensing surface; and a surface layer covering the electronic component and containing a polymer and Conductive material, and the composition of the surface layer is different from the composition of the encapsulation layer, wherein the surface layer does not contact the plurality of conductive elements, and the conductive material is carbon black material. 如申請專利範圍第1項所述之封裝結構，其中，該聚合物係為環氧樹脂。 The encapsulation structure as described in item 1 of the patent application scope, wherein the polymer is an epoxy resin. 如申請專利範圍第1項所述之封裝結構，其中，該碳黑材料係為碳顆粒。 The packaging structure as described in item 1 of the patent application scope, wherein the carbon black material is carbon particles. 如申請專利範圍第1項所述之封裝結構，其中，該碳黑材料佔據該表面層的含量比例係低於5%。 The packaging structure as described in item 1 of the patent application scope, wherein the content ratio of the carbon black material occupying the surface layer is less than 5%. 如申請專利範圍第1項所述之封裝結構，其中，該碳黑材料佔據該表面層的含量比例係用以調整該表面層之顏色深淺程度。 The packaging structure as described in item 1 of the patent application scope, wherein the content ratio of the carbon black material occupying the surface layer is used to adjust the color depth of the surface layer. 如申請專利範圍第1項所述之封裝結構，其中，該碳黑材料佔據該表面層的含量比例係用以調整該表面層的電阻值。 The packaging structure as described in item 1 of the patent application scope, wherein the content ratio of the carbon black material occupying the surface layer is used to adjust the resistance value of the surface layer. 如申請專利範圍第1項所述之封裝結構，其中，該碳黑材料的導電性係用以調整該表面層的電阻值。 The packaging structure as described in item 1 of the patent application scope, wherein the conductivity of the carbon black material is used to adjust the resistance value of the surface layer. 如申請專利範圍第1項所述之封裝結構，其中，該表面層的導電物、該電子元件及該承載件係構成一用以排除靜電的導電通路。 The packaging structure as described in item 1 of the patent application scope, wherein the conductive material of the surface layer, the electronic component and the carrier constitute a conductive path for removing static electricity. 如申請專利範圍第1項所述之封裝結構，復包括設於該表面層上之傳感層。 The packaging structure as described in item 1 of the scope of the patent application includes a sensing layer provided on the surface layer.
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