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TWI669035B - Printed circuit board and method for manufacturing the same - Google Patents

Printed circuit board and method for manufacturing the same Download PDF

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Publication number
TWI669035B
TWI669035B TW107124864A TW107124864A TWI669035B TW I669035 B TWI669035 B TW I669035B TW 107124864 A TW107124864 A TW 107124864A TW 107124864 A TW107124864 A TW 107124864A TW I669035 B TWI669035 B TW I669035B
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Taiwan
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conductive
layer
circuit
conductive line
resistive element
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TW107124864A
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Chinese (zh)
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TW202007243A (en
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胡先欽
沈芾雲
何明展
莊毅強
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大陸商鵬鼎控股(深圳)股份有限公司
大陸商宏啟勝精密電子(秦皇島)有限公司
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Publication of TW202007243A publication Critical patent/TW202007243A/en

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Abstract

一種電路板,該電路板包括一第一電路基板、一第二電路基板及至少一電阻元件;該第一電路基板包括至少一第一導電線路層,該第一導電線路層包括至少一第一導電線路,該第二電路基板包括至少一第二導電線路層,該第二導電線路層包括至少一第二導電線路,該電阻元件形成在該第一導電線路層及該第二導電線路層之間,該電阻元件的一端與該第一導電線路相貼合且電性連接,另一端與該第二導電線路相貼合且電性連接。本發明還提供一種該電路板的製作方法。 A circuit board comprising a first circuit substrate, a second circuit substrate and at least one resistive component; the first circuit substrate comprises at least one first conductive circuit layer, the first conductive circuit layer comprising at least one first a conductive circuit, the second circuit substrate includes at least one second conductive circuit layer, the second conductive circuit layer includes at least one second conductive line, and the resistive element is formed on the first conductive circuit layer and the second conductive circuit layer One end of the resistive element is bonded to the first conductive line and electrically connected, and the other end is in contact with and electrically connected to the second conductive line. The invention also provides a method of fabricating the circuit board.

Description

電路板及電路板的製作方法 Circuit board and circuit board manufacturing method

本發明涉及電路板製作領域,尤其涉及一種含有電阻元件的電路板及電路板的製作方法。 The present invention relates to the field of circuit board manufacturing, and in particular, to a circuit board including a resistor element and a method of manufacturing the circuit board.

隨著電阻元件向微型化發展,內埋技術應運而生。其具有如下優勢:封裝面積消減與低耗電化、提升信號品質及降低電磁干擾雜訊與高頻電源安定化。 With the development of resistive components to miniaturization, embedded technology has emerged. It has the following advantages: reduced package area and low power consumption, improved signal quality, and reduced electromagnetic interference noise and high frequency power supply stabilization.

內埋技術中常用的內埋被動組件主要有:電感元件、電容元件及電阻元件。 Buried passive components commonly used in embedded technology mainly include: inductor components, capacitor components, and resistor components.

例如,內埋電阻元件的通常做法是:先將電阻元件內埋在同一導電線路層內,再增層,制程複雜;且電阻元件的材料多使用NiCr,NiP等合金層,但是這些材料通常被材料商控制,導致內埋有電阻元件的電路板的製作成本較高。 For example, the common method of embedding a resistive element is to first embed the resistive element in the same conductive circuit layer and then add layers, and the process is complicated; and the material of the resistive element is mostly an alloy layer such as NiCr or NiP, but these materials are usually Controlled by the material supplier, the circuit board in which the resistive element is embedded is expensive to manufacture.

有鑑於此,本發明提供一種成本低的電路板及電路板的製作方法。 In view of this, the present invention provides a low cost circuit board and a method of fabricating the same.

一種電路板,該電路板包括一第一電路基板、一第二電路基板及至少一電阻元件;該第一電路基板包括至少一第一導電線路層,該第一導電線 路層包括至少一第一導電線路,該第二電路基板包括至少一第二導電線路層,該第二導電線路層包括至少一第二導電線路,該電阻元件形成在該第一導電線路層及該第二導電線路層之間,該電阻元件的一端與該第一導電線路相貼合且電性連接,另一端與該第二導電線路相貼合且電性連接。 a circuit board comprising a first circuit substrate, a second circuit substrate and at least one resistive element; the first circuit substrate comprising at least one first conductive circuit layer, the first conductive line The circuit layer includes at least one first conductive circuit, the second circuit substrate includes at least one second conductive circuit layer, the second conductive circuit layer includes at least one second conductive circuit, and the resistive element is formed on the first conductive circuit layer and Between the second conductive circuit layers, one end of the resistive element is in contact with and electrically connected to the first conductive line, and the other end is in contact with and electrically connected to the second conductive line.

進一步地,該第一導電線路包括一垂直於該第一電路基板延伸方向的第一側面,該第二導電線路包括一垂直於該第二電路基板延伸方向的第二側面,該電阻元件分別與該第一側面及該第二側面相貼合且電性連接。 Further, the first conductive line includes a first side perpendicular to the extending direction of the first circuit substrate, and the second conductive line includes a second side perpendicular to the extending direction of the second circuit substrate, and the resistive elements are respectively The first side surface and the second side surface are in close contact with each other and electrically connected.

進一步地,該第一導電線路還包括一與該第一側面垂直相連的第一表面,該第二導電線路還包括一與該第二側面垂直相連的第二表面,該電阻元件與該第一表面及該第二表面中的至少一個相貼合且電性連接。 Further, the first conductive line further includes a first surface vertically connected to the first side, the second conductive line further includes a second surface perpendicularly connected to the second side, the resistive element and the first At least one of the surface and the second surface is in conformity and electrically connected.

進一步地,該電阻元件的至少一與該第一側面相背的表面與該第一導電線路層的第一導電線路之間形成有第一間隙,該電阻元件的至少一與該第二側面相背的表面與該第二導電線路層的第二導電線路之間形成有第二間隙;該第一電路基板及該第二電路基板藉由一膠層黏合在一起,該膠層迭設在該第一導電線路層和第二導電線路層之間且填充於該第一間隙及該第二間隙內。 Further, a first gap is formed between at least one surface of the resistive element opposite to the first side surface and the first conductive line of the first conductive circuit layer, and at least one of the resistive elements is opposite to the second side surface Forming a second gap between the surface of the back and the second conductive line of the second conductive circuit layer; the first circuit substrate and the second circuit substrate are bonded together by a glue layer, and the glue layer is stacked on the Between the first conductive circuit layer and the second conductive circuit layer and filled in the first gap and the second gap.

進一步地,該電阻元件由一種電阻材料製成,該電阻材料為一種熱固化膠體,該電阻材料主要由樹脂、硬化劑、觸媒及導電填料組成,在該電阻材料中,該樹脂所佔的重量百分比為19.5~35%,該硬化劑所佔的重量百分比為10~17%,該觸媒所佔的重量百分比為0~1%,該導電填料所佔的重量百分比為46~69%,該樹脂由環氧樹脂、二聚酸改性聚酯及聚丙二醇二縮水甘油基醚中的一種或多種組成。 Further, the resistive element is made of a resistive material, which is a thermosetting colloid, which is mainly composed of a resin, a hardener, a catalyst, and a conductive filler, in which the resin occupies The weight percentage is 19.5~35%, the hardener accounts for 10~17%, the catalyst accounts for 0~1%, and the conductive filler accounts for 46~69%. The resin is composed of one or more of an epoxy resin, a dimer acid-modified polyester, and a polypropylene glycol diglycidyl ether.

進一步地,該膠體中還含有添加劑,該添加劑所佔的重量百分比為0.2~2%。 Further, the colloid further contains an additive, and the additive accounts for 0.2 to 2% by weight.

一種電路板的製作方法,其包括如下步驟:提供一第一電路基板中間體及一第二電路基板中間體;該第一電路基板中間體包括一第一導電線路層,該第一導電線路層包括至少一第一導電線路;該第二電路基板中間體包括一第二導電線路層,該第二導電線路層包括至少一第二導電線路;提供一膠層, 並將該膠層壓合在該第二導電線路層上,該膠層包括一第一通槽;提供一電阻材料並將該電阻材料印刷在該第一通槽內,使得該電阻材料與該第二導電線路相貼合且電性連接;及將該第一電路基板中間體壓合在該第二電路基板中間體上,並使得該電阻材料與該第一導電線路相貼合且電性連接。 A method for manufacturing a circuit board, comprising the steps of: providing a first circuit substrate intermediate body and a second circuit substrate intermediate; the first circuit substrate intermediate body comprises a first conductive circuit layer, the first conductive circuit layer Including at least one first conductive line; the second circuit substrate intermediate body includes a second conductive circuit layer, the second conductive circuit layer includes at least one second conductive line; providing a glue layer, Laminating the glue on the second conductive circuit layer, the adhesive layer includes a first through groove; providing a resistive material and printing the resistive material in the first through groove, so that the resistive material and the The second conductive line is bonded and electrically connected; and the first circuit substrate intermediate is pressed onto the second circuit substrate intermediate body, and the resistive material is adhered to the first conductive line and electrically connection.

進一步地,該第一導電線路包括一垂直於該第一電路基板延伸方向的第一側面,該第二導電線路包括一垂直於該第二電路基板延伸方向的第二側面,該電阻元件分別與該第一側面及該第二側面相貼合且電性連接。 Further, the first conductive line includes a first side perpendicular to the extending direction of the first circuit substrate, and the second conductive line includes a second side perpendicular to the extending direction of the second circuit substrate, and the resistive elements are respectively The first side surface and the second side surface are in close contact with each other and electrically connected.

進一步地,該第一導電線路還包括一與該第一側面垂直相連的第一表面,該第二導電線路還包括一與該第二側面垂直相連的第二表面,該電阻元件與該第一表面及該第二表面中的至少一個相貼合且電性連接。 Further, the first conductive line further includes a first surface vertically connected to the first side, the second conductive line further includes a second surface perpendicularly connected to the second side, the resistive element and the first At least one of the surface and the second surface is in conformity and electrically connected.

進一步地,該電阻元件的至少一與該第一側面相背的表面與該第一導電線路層的第一導電線路之間形成有第一間隙,該電阻元件的至少一與該第二側面相背的表面與該第二導電線路層的第二導電線路之間形成有第二間隙;該膠層填充於該第一間隙及該第二間隙內。 Further, a first gap is formed between at least one surface of the resistive element opposite to the first side surface and the first conductive line of the first conductive circuit layer, and at least one of the resistive elements is opposite to the second side surface A second gap is formed between the surface of the back and the second conductive line of the second conductive circuit layer; the glue layer is filled in the first gap and the second gap.

與現有技術相比,本發明提供的製作電阻元件的電阻材料的製作成本低。另外,本發明提供的電路板及製作方法,採用上述電阻材料作為該電阻元件的製作材料,可以藉由印刷的方式將電阻元件形成兩個電路基板中間體中間,並在增層的過程中固化成型,可以簡化制程。 Compared with the prior art, the resistor material for manufacturing a resistor element provided by the present invention has a low manufacturing cost. In addition, the circuit board and the manufacturing method of the present invention use the above-mentioned resistive material as a material for manufacturing the resistive element, and the resistive element can be formed into the middle of the two circuit substrate intermediates by printing, and solidified in the process of layering. Forming can simplify the process.

100,200‧‧‧電路板 100,200‧‧‧ circuit board

10‧‧‧第一覆銅基板 10‧‧‧First copper-clad substrate

11‧‧‧第一基材層 11‧‧‧First substrate layer

12‧‧‧第一銅箔層 12‧‧‧First copper foil layer

13‧‧‧第二銅箔層 13‧‧‧Second copper foil layer

14‧‧‧第一導電線路層 14‧‧‧First conductive circuit layer

141‧‧‧第一導電線路 141‧‧‧First conductive line

1411‧‧‧第一表面 1411‧‧‧ first surface

1412‧‧‧第一側面 1412‧‧‧ first side

148‧‧‧第一間隙 148‧‧‧First gap

20‧‧‧第二覆銅基板 20‧‧‧second copper-clad substrate

21‧‧‧第二基材層 21‧‧‧Second substrate layer

22‧‧‧第三銅箔層 22‧‧‧ Third copper foil layer

23‧‧‧第四銅箔層 23‧‧‧fourth copper foil layer

24‧‧‧第二導電線路層 24‧‧‧Second conductive circuit layer

241‧‧‧第二導電線路 241‧‧‧Second conductive line

2411‧‧‧第二表面 2411‧‧‧ second surface

2412‧‧‧第二側面 2412‧‧‧ second side

248‧‧‧第二間隙 248‧‧‧Second gap

30‧‧‧電阻材料 30‧‧‧Resistive materials

31‧‧‧電阻元件 31‧‧‧Resistive components

40‧‧‧膠片 40‧‧‧ Film

41‧‧‧膠層 41‧‧‧ glue layer

414‧‧‧第一通槽 414‧‧‧ first through slot

60‧‧‧導電通孔 60‧‧‧ conductive through holes

16‧‧‧第三導電線路層 16‧‧‧ Third conductive circuit layer

17‧‧‧第一防焊層 17‧‧‧First solder mask

26‧‧‧第四導電線路層 26‧‧‧fourth conductive layer

27‧‧‧第二防焊層 27‧‧‧Second solder mask

70‧‧‧第一電路基板 70‧‧‧First circuit board

71‧‧‧第一電路基板中間體 71‧‧‧First circuit substrate intermediate

80‧‧‧第二電路基板 80‧‧‧Second circuit substrate

81‧‧‧第二電路基板中間體 81‧‧‧Second circuit substrate intermediate

圖1是本發明第一實施例提供的電路板的剖視圖。 1 is a cross-sectional view of a circuit board according to a first embodiment of the present invention.

圖2是本發明第一實施例提供的第一電路基板中間體、一膠層及一第二電路基板中間體的剖視圖。 2 is a cross-sectional view showing a first circuit substrate intermediate body, a glue layer, and a second circuit substrate intermediate body according to the first embodiment of the present invention.

圖3是本發明提供的一第一覆銅基板的剖視圖。 3 is a cross-sectional view of a first copper clad substrate provided by the present invention.

圖4是將圖3所示的第一覆銅基板的一個銅箔層製作形成第一導電線路層,形成圖2所示的第一電路基板中間體的剖視圖。 4 is a cross-sectional view showing the formation of a first conductive wiring layer by forming one copper foil layer of the first copper-clad substrate shown in FIG. 3 to form the first circuit substrate intermediate body shown in FIG. 2.

圖5是本發明第一實施例提供的第二覆銅基板的剖視圖。 Figure 5 is a cross-sectional view showing a second copper clad substrate according to a first embodiment of the present invention.

圖6是將圖5所示的第二覆銅基板的一個銅箔層製作形成第二導電線路層,進而得到圖2所示的第二電路基板中間體的剖視圖。 Fig. 6 is a cross-sectional view showing the second conductive substrate layer formed by forming one copper foil layer of the second copper-clad substrate shown in Fig. 5, and further obtaining the second circuit substrate intermediate body shown in Fig. 2;

圖7是本發明第一實施例提供的膠片的剖視圖。 Figure 7 is a cross-sectional view of a film according to a first embodiment of the present invention.

圖8是將圖7所示的膠片製作形成圖2所示的膠層的剖視圖。 Figure 8 is a cross-sectional view showing the film shown in Figure 7 formed into the adhesive layer shown in Figure 2 .

圖9是將圖2所示的膠層壓合在圖6所示的第二導電線路層上,並提供一製作電阻的膠體,將膠體形成在該第一電路基板中間體和該第二電路基板中間體之間的剖視圖。 9 is a laminate of the adhesive shown in FIG. 2 on the second conductive wiring layer shown in FIG. 6, and provides a colloid for forming a resistor, and the colloid is formed on the first circuit substrate intermediate body and the second circuit. A cross-sectional view between the substrate intermediates.

圖10是將圖2中的該第一電路基板中間體形成在該第二電路基板中間體上並加熱加壓後的剖視圖。 FIG. 10 is a cross-sectional view showing the first circuit substrate intermediate body of FIG. 2 formed on the second circuit substrate intermediate body and heated and pressurized.

圖11是在圖10所示的該第一電路基板中間體及該第二電路基板中間體上形成導電通孔後的剖視圖。 11 is a cross-sectional view showing a conductive via hole formed on the first circuit substrate intermediate body and the second circuit substrate intermediate body shown in FIG.

圖12是將圖3所示的第二銅箔層及圖5所示的第四銅箔層分別製作形成第三導電線路層及第四導電線路層後的剖視圖。 Fig. 12 is a cross-sectional view showing the second copper wiring layer shown in Fig. 3 and the fourth copper foil layer shown in Fig. 5, respectively, forming a third conductive wiring layer and a fourth conductive wiring layer.

圖13是本發明第二實施例提供的一種電路板的剖視圖。 Figure 13 is a cross-sectional view showing a circuit board according to a second embodiment of the present invention.

為能進一步闡述本發明達成預定發明目的所採取的技術手段及功效,以下結合附圖1-13及較佳實施方式,對本發明提供的電路板及其製作方法的具體實施方式、結構、特徵及其功效,作出如下詳細說明。 The specific embodiments, structures, and features of the circuit board and the manufacturing method thereof provided by the present invention are described below in conjunction with FIGS. 1-13 and preferred embodiments in order to further explain the technical means and functions of the present invention. Its efficacy, as detailed below.

請參閱圖1,本發明第一實施例提供一種含有電阻元件31的電路板100。該電路板100包括一第一電路基板70、一第二電路基板80、一電阻元件31及一膠層41。該第一電路基板70及該第二電路基板80藉由該膠層41黏結在一起,該電阻元件31位於該第一電路基板70及該第二電路基板80之間。 Referring to FIG. 1, a first embodiment of the present invention provides a circuit board 100 including a resistive element 31. The circuit board 100 includes a first circuit substrate 70, a second circuit substrate 80, a resistive element 31, and a glue layer 41. The first circuit substrate 70 and the second circuit substrate 80 are bonded together by the adhesive layer 41 , and the resistive element 31 is located between the first circuit substrate 70 and the second circuit substrate 80 .

該第一電路基板70包括一絕緣的第一基材層11、形成在該第一基材層11的相背兩表面上的第一導電線路層14和第三導電線路層16及形成在該第三導電線路層16的遠離該第一基材層11的表面上的第一防焊層17。 The first circuit substrate 70 includes an insulating first substrate layer 11 , a first conductive wiring layer 14 and a third conductive wiring layer 16 formed on opposite surfaces of the first substrate layer 11 and formed thereon. The first solder resist layer 17 on the surface of the third conductive wiring layer 16 away from the first substrate layer 11.

該第一基材層11的材質通常可選用聚醯亞胺(polyimide,PI)、聚對苯二甲酸乙二醇酯(Polyethylene Terephthalate,PET)或聚萘二甲酸乙二醇酯(Polyethylene Naphthalate,PEN)、聚乙烯(polyethylene,PE)、特氟龍(Teflon)、 液晶高分子聚合物(liquid crystal polymer,LCP)、聚氯乙烯(polyvinyl chloride polymer,PVC)等等可撓性材料中的一種。也可以為樹脂板、陶瓷板等硬性支撐材料中的一種。 The material of the first substrate layer 11 is usually selected from polyimide (PI), polyethylene terephthalate (PET) or polyethylene naphthalate (Polyethylene Naphthalate). PEN), polyethylene (PE), Teflon, One of flexible materials such as liquid crystal polymer (LCP), polyvinyl chloride polymer (PVC), and the like. It may also be one of a hard supporting material such as a resin plate or a ceramic plate.

該第一導電線路層14包括至少一條第一導電線路141。每條該第一導電線路141包括一與該第一電路基板70延伸方向平行的第一表面1411及與該第一表面1411垂直相連的第一側面1412。該第一表面1411遠離該第一基材層11。 The first conductive circuit layer 14 includes at least one first conductive line 141. Each of the first conductive lines 141 includes a first surface 1411 parallel to the extending direction of the first circuit substrate 70 and a first side surface 1412 perpendicularly connected to the first surface 1411. The first surface 1411 is away from the first substrate layer 11.

該第二電路基板80包括一絕緣的第二基材層21、形成在該第二基材層21的相背兩表面上的第二導電線路層24和第四導電線路層26及形成在該第四導電線路層26的遠離該第二基材層21的表面上的第二防焊層27。該第二導電線路層24與該第一導電線路層14相對。 The second circuit substrate 80 includes an insulating second substrate layer 21, second conductive wiring layers 24 and fourth conductive wiring layers 26 formed on opposite surfaces of the second substrate layer 21, and formed thereon. The second solder resist layer 27 of the fourth conductive wiring layer 26 is away from the surface of the second substrate layer 21. The second conductive wiring layer 24 is opposite to the first conductive wiring layer 14.

該第二基材層21的材質通常可選用聚醯亞胺(polyimide,PI)、聚對苯二甲酸乙二醇酯(Polyethylene Terephthalate,PET)或聚萘二甲酸乙二醇酯(Polyethylene Naphthalate,PEN)、聚乙烯(polyethylene,PE)、特氟龍(Teflon)、液晶高分子聚合物(liquid crystal polymer,LCP)、聚氯乙烯(polyvinyl chloride polymer,PVC)等等可撓性材料中的一種。也可以為樹脂板、陶瓷板等硬性支撐材料中的一種。 The material of the second substrate layer 21 is generally selected from polyimide (PI), polyethylene terephthalate (PET) or polyethylene naphthalate (Polyethylene Naphthalate). One of flexible materials such as PEN), polyethylene (PE), Teflon, liquid crystal polymer (LCP), polyvinyl chloride polymer (PVC), and the like. . It may also be one of a hard supporting material such as a resin plate or a ceramic plate.

該第二導電線路層24包括至少一條第二導電線路241。每條該第二導電線路241包括一與該第二電路基板80延伸方向平行的第二表面2411及一與該第二表面2411垂直相連的第二側面2412。該第二表面2411遠離該第二基材層21。 The second conductive circuit layer 24 includes at least one second conductive line 241. Each of the second conductive lines 241 includes a second surface 2411 parallel to the extending direction of the second circuit substrate 80 and a second side surface 2412 perpendicularly connected to the second surface 2411. The second surface 2411 is away from the second substrate layer 21.

該電阻元件31由電阻材料30經加熱加壓固化成型而得。 The resistive element 31 is obtained by heat-pressurizing and molding the resistive material 30.

該電阻材料30為一種熱固化膠體,該電阻材料30主要由樹脂、硬化劑、觸媒、導電填料及添加劑攪拌混合而成。 The resistive material 30 is a thermosetting colloid, and the resistive material 30 is mainly composed of a resin, a hardener, a catalyst, a conductive filler and an additive.

在該電阻材料30中,該樹脂所佔的重量百分比為19.5~35%,該硬化劑所佔的重量百分比為10~17%,該觸媒所佔的重量百分比為0~1%,該導電填料所佔的重量百分比為46~69%,該添加劑所佔的重量百分比為0.2~2%。 In the resistive material 30, the resin accounts for 19.5-35% by weight, the hardener accounts for 10-17% by weight, and the catalyst accounts for 0~1% by weight. The filler accounts for 46 to 69% by weight, and the additive accounts for 0.2 to 2% by weight.

該樹脂可以為單一樹脂,也可以為多種樹脂的混合物。 The resin may be a single resin or a mixture of a plurality of resins.

在本實施例中,該樹脂包括環氧樹脂、二聚酸改性聚酯及聚丙二醇二縮水甘油基醚。其中,該環氧樹脂的結構式為: ;該聚丙二醇二縮水甘油基醚的結構式 為:In this embodiment, the resin includes an epoxy resin, a dimer acid-modified polyester, and a polypropylene glycol diglycidyl ether. Wherein, the structural formula of the epoxy resin is: The structural formula of the polypropylene glycol diglycidyl ether is: .

該硬化劑可以為脂肪胺固化劑、聚醯胺固化劑、脂環胺固化劑等常規硬化劑。在本實施例中,該硬化劑為聚醯胺固化劑。 The hardener may be a conventional hardener such as a fatty amine curing agent, a polyamide curing agent, or an alicyclic amine curing agent. In this embodiment, the hardener is a polyamine curing agent.

該觸媒可以為咪唑類物質。在本實施例中,該觸媒優選為2-十一 烷基咪唑,該2-十一烷基咪唑的化學式為The catalyst may be an imidazole. In this embodiment, the catalyst is preferably 2-undecylimidazole, and the chemical formula of the 2-undecylimidazole is .

該導電填料可以為表面包覆銀粉、金粉、鎳粉等的銅粒子中的一種或幾種。 The conductive filler may be one or more of copper particles whose surface is coated with silver powder, gold powder, nickel powder or the like.

在本實施例中,該導電填料優選為表面包覆銀粉的銅粒子,即為銀包銅粉。 In this embodiment, the conductive filler is preferably copper particles coated with silver powder on the surface, that is, silver-coated copper powder.

該添加劑可以為矽烷增黏劑、有機高分子型的防沉劑等。 The additive may be a decane tackifier or an organic polymer type anti-settling agent.

在本實施例中,該添加劑為矽烷增黏劑,其化學式為: In this embodiment, the additive is a decane tackifier having a chemical formula of:

該電阻元件31位於該第一導電線路層14及該第二導電線路層24之間。 The resistive element 31 is located between the first conductive trace layer 14 and the second conductive trace layer 24.

在本實施例中,該電阻元件31分別與一條該第一導電線路141的該第一表面1411、第一側面1412及該第二導電線路層24的一條第二導電線路241的第二表面2411、第二側面2412相貼合且電連接。該電阻元件31的至少一與該第一側面1412相背的表面與該第一導電線路層14的第一導電線路141之間形成有第一間隙148,該電阻元件31的至少一與該第二側面2412相背的表面與該第二導電線路層24的第二導電線路241之間形成有第二間隙248。 In this embodiment, the resistive element 31 is respectively associated with the first surface 1411 of the first conductive trace 141, the first side 1412, and the second surface 2411 of the second conductive trace 241 of the second conductive trace layer 24. The second side 2412 is attached and electrically connected. A first gap 148 is formed between at least one surface of the resistive element 31 opposite the first side surface 1412 and the first conductive line 141 of the first conductive circuit layer 14 , at least one of the resistive elements 31 and the first A second gap 248 is formed between the opposite surface of the two side faces 2412 and the second conductive line 241 of the second conductive wiring layer 24.

由於該電阻元件31與該第一表面1411及該第二表面2411相貼合且電連接,使得該電阻元件31部分覆蓋該第一導電線路141及該第二導電線路 241,可以增加該電阻元件31與該第一電路基板70及該第二電路基板80之間的接觸面積,進而增強該電阻元件31與該第一導電線路層14及該第二導電線路層24之間的結合力,防止該電阻元件31從該第一導電線路層14及該第二導電線路層24之間剝離。 The resistive element 31 is in contact with and electrically connected to the first surface 1411 and the second surface 2411, so that the resistive element 31 partially covers the first conductive line 141 and the second conductive line. 241, the contact area between the resistive element 31 and the first circuit substrate 70 and the second circuit substrate 80 can be increased, thereby enhancing the resistive element 31 and the first conductive circuit layer 14 and the second conductive circuit layer 24. The bonding force prevents the resistive element 31 from being peeled off between the first conductive wiring layer 14 and the second conductive wiring layer 24.

該膠層41迭設在該第一導電線路層14和第二導電線路層24之間且填充於該第一間隙148及該第二間隙248內。 The adhesive layer 41 is stacked between the first conductive circuit layer 14 and the second conductive circuit layer 24 and filled in the first gap 148 and the second gap 248.

該電路板100還包括至少一貫穿該電路板100的導電通孔60,該導電通孔60電連接該第三導電線路層16、該第一導電線路層14、該第二導電線路層24及該第四導電線路層26。其中,該第一防焊層17及該第二防焊層27還填充於該導電通孔60內。 The circuit board 100 further includes at least one conductive via 60 extending through the circuit board 100. The conductive via 60 electrically connects the third conductive circuit layer 16, the first conductive circuit layer 14, the second conductive circuit layer 24, and The fourth conductive circuit layer 26. The first solder resist layer 17 and the second solder resist layer 27 are also filled in the conductive vias 60.

請參閱圖1-12,本發明提供一種含有電阻元件31的電路板100的製作方法,其步驟如下:第一步,請參閱圖2~8,提供一第一電路基板中間體71、一膠層41及一第二電路基板中間體81。 Referring to FIG. 1-12, the present invention provides a method for fabricating a circuit board 100 including a resistive element 31. The steps are as follows: First, please refer to FIG. 2-8 to provide a first circuit substrate intermediate body 71 and a glue. The layer 41 and a second circuit substrate intermediate body 81.

具體地,請參閱圖3~4,該第一電路基板中間體71的製作方法包括如下步驟:首先,請參閱圖3,提供一第一覆銅基板10,該第一覆銅基板10包括一絕緣的第一基材層11、形成在該第一基材層11的相背兩表面上的第一銅箔層12和第二銅箔層13。 Specifically, referring to FIG. 3 to FIG. 4, the method for fabricating the first circuit substrate intermediate body 71 includes the following steps. First, referring to FIG. 3, a first copper clad substrate 10 is provided. The first copper clad substrate 10 includes a first An insulating first substrate layer 11 and a first copper foil layer 12 and a second copper foil layer 13 formed on opposite surfaces of the first substrate layer 11.

其次,請參閱圖4,將該第一銅箔層12製作形成第一導電線路層14,進而形成該第一電路基板中間體71。 Next, referring to FIG. 4, the first copper foil layer 12 is formed into a first conductive wiring layer 14, and the first circuit substrate intermediate body 71 is formed.

具體地,該第一導電線路層14是經由影像轉移制程製作而成。 Specifically, the first conductive circuit layer 14 is fabricated through an image transfer process.

其中,該第一導電線路層14包括至少一條第一導電線路141。每條該第一導電線路141包括一與該第一電路基板中間體71延伸方向平行的第一表面1411及與該第一表面1411垂直相連的第一側面1412。該第一表面1411遠離該第一基材層11。 The first conductive circuit layer 14 includes at least one first conductive line 141. Each of the first conductive lines 141 includes a first surface 1411 parallel to the extending direction of the first circuit substrate intermediate body 71 and a first side surface 1412 perpendicularly connected to the first surface 1411. The first surface 1411 is away from the first substrate layer 11.

請參閱圖5~6,該第二電路基板中間體81的製作方法包括如下步驟: 首先,請參考圖5,提供一第二覆銅基板20,該第二覆銅基板20包括一絕緣的第二基材層21、形成在該第二基材層21的相背兩表面上的第三銅箔層22和第四銅箔層23。 Referring to FIGS. 5-6, the manufacturing method of the second circuit substrate intermediate body 81 includes the following steps: First, referring to FIG. 5, a second copper clad substrate 20 is provided. The second copper clad substrate 20 includes an insulative second substrate layer 21 formed on opposite surfaces of the second substrate layer 21. The third copper foil layer 22 and the fourth copper foil layer 23.

其次,請參閱圖6,將該第三銅箔層22製作形成一第二導電線路層24,進而形成該第二電路基板中間體81。 Next, referring to FIG. 6, the third copper foil layer 22 is formed into a second conductive circuit layer 24, thereby forming the second circuit substrate intermediate body 81.

具體地,該第二導電線路層24是經由影像轉移制程製作而成。 Specifically, the second conductive circuit layer 24 is fabricated through an image transfer process.

其中,該第二導電線路層24包括至少一條第二導電線路241。每條該第二導電線路241包括一與該第二電路基板80延伸方向平行的第二表面2411及一與該第二表面2411垂直相連的第二側面2412。該第二表面2411遠離該第二基材層21。 The second conductive circuit layer 24 includes at least one second conductive line 241. Each of the second conductive lines 241 includes a second surface 2411 parallel to the extending direction of the second circuit substrate 80 and a second side surface 2412 perpendicularly connected to the second surface 2411. The second surface 2411 is away from the second substrate layer 21.

請參閱圖7~8,該膠層41的製作方法包括如下步驟:首先,請參閱圖7,提供一膠片40。 Referring to FIGS. 7-8, the manufacturing method of the adhesive layer 41 includes the following steps: First, referring to FIG. 7, a film 40 is provided.

其次,請參閱圖8,在該膠片40上形成貫穿該膠片40的第一通槽414,進而形成該膠層41。 Next, referring to FIG. 8, a first through groove 414 is formed in the film 40 to penetrate the film 40, thereby forming the glue layer 41.

具體地,可以藉由沖型的方式形成該第一通槽414。 Specifically, the first through groove 414 can be formed by punching.

第二步,請參閱圖9,先將該膠層41壓合在該第二導電線路層24上,並提供一電阻材料30,將該電阻材料30印刷在該第二導電線路層24的導電線路間隙內,並使得該電阻材料30貫穿該第一通槽414。 In the second step, referring to FIG. 9, the adhesive layer 41 is first pressed onto the second conductive circuit layer 24, and a resistive material 30 is provided. The conductive material 30 is printed on the conductive layer of the second conductive circuit layer 24. The wiring material 30 is inserted into the first through slot 414.

在本實施例中,該電阻材料30凸出於該膠層41。在其他實施例中,該電阻材料30還可以與該膠層41平齊。 In the present embodiment, the resistive material 30 protrudes from the adhesive layer 41. In other embodiments, the resistive material 30 can also be flush with the glue layer 41.

具體地,該電阻材料30為一熱固化膠體,該電阻材料30與該第二導電線路層24的第二導電線路241的第二表面2411、第二側面2412相貼合且電連接。該電阻材料30的至少一與該第二側面2412相背的表面與該第二導電線路層24的第二導電線路241之間形成有第二間隙248,在壓合該膠層41的過程中,該膠層41填充於該第二間隙248內。 Specifically, the resistive material 30 is a thermosetting colloid, and the resistive material 30 is in contact with and electrically connected to the second surface 2411 and the second side 2412 of the second conductive trace 241 of the second conductive trace layer 24. A second gap 248 is formed between at least one surface of the resistive material 30 opposite the second side surface 2412 and the second conductive line 241 of the second conductive circuit layer 24, in the process of pressing the adhesive layer 41 The glue layer 41 is filled in the second gap 248.

該電阻材料30用於製作電阻元件31。 This resistive material 30 is used to fabricate the resistive element 31.

該電阻材料30為一種熱固化膠體,該電阻材料30主要由樹脂、硬化劑、觸媒、導電填料及添加劑攪拌混合而成。 The resistive material 30 is a thermosetting colloid, and the resistive material 30 is mainly composed of a resin, a hardener, a catalyst, a conductive filler and an additive.

在該電阻材料30中,該樹脂所佔的重量百分比為19.5~35%,該硬化劑所佔的重量百分比為10~17%,該觸媒所佔的重量百分比為0~1%,該導電填料所佔的重量百分比為46~69%,該添加劑所佔的重量百分比為0.2~2%。 In the resistive material 30, the resin accounts for 19.5-35% by weight, the hardener accounts for 10-17% by weight, and the catalyst accounts for 0~1% by weight. The filler accounts for 46 to 69% by weight, and the additive accounts for 0.2 to 2% by weight.

該樹脂可以為單一樹脂,也可以為多種樹脂的混合物。 The resin may be a single resin or a mixture of a plurality of resins.

在本實施例中,該樹脂包括環氧樹脂、二聚酸改性聚酯及聚丙二醇二縮水甘油基醚。其中,該環氧樹脂的結構式為:;該聚丙二醇二縮水甘油基醚的結 構式為:In this embodiment, the resin includes an epoxy resin, a dimer acid-modified polyester, and a polypropylene glycol diglycidyl ether. Wherein, the structural formula of the epoxy resin is: The structural formula of the polypropylene glycol diglycidyl ether is: .

該硬化劑可以為脂肪胺固化劑、聚醯胺固化劑、脂環胺固化劑等常規硬化劑。 The hardener may be a conventional hardener such as a fatty amine curing agent, a polyamide curing agent, or an alicyclic amine curing agent.

該觸媒可以為咪唑類物質。 The catalyst may be an imidazole.

在本實施例中,該觸媒優選為2-十一烷基咪唑,該2-十一烷基咪 唑的化學式為In this embodiment, the catalyst is preferably 2-undecylimidazole, and the chemical formula of the 2-undecylimidazole is .

該導電填料可以為表面包覆銀粉、金粉、鎳粉等的銅粒子中的一種或幾種。 The conductive filler may be one or more of copper particles whose surface is coated with silver powder, gold powder, nickel powder or the like.

在本實施例中,該導電填料優選為表面包覆銀粉的銅粒子,即為銀包銅粉。 In this embodiment, the conductive filler is preferably copper particles coated with silver powder on the surface, that is, silver-coated copper powder.

該添加劑可以為矽烷增黏劑、有機高分子型的防沉劑等。 The additive may be a decane tackifier or an organic polymer type anti-settling agent.

在本實施例中,該添加劑為矽烷增黏劑,其化學式為: In this embodiment, the additive is a decane tackifier having a chemical formula of:

第三步,請參閱圖10,將該第一電路基板中間體71迭設在該第二電路基板中間體81上,並加熱加壓,使該第二電路基板中間體81與該第一電路基板中間體71黏合在一起。 In the third step, referring to FIG. 10, the first circuit substrate intermediate body 71 is stacked on the second circuit substrate intermediate body 81, and heated and pressurized to make the second circuit substrate intermediate body 81 and the first circuit. The substrate intermediate body 71 is bonded together.

其中,該電阻材料30與該第一導電線路141的該第一表面1411、第一側面1412相貼合且電連接,該電阻材料30的至少一與該第一側面1412相背的表面與該第一導電線路層14的第一導電線路141之間形成有第一間隙148,該膠層41在加熱加壓的過程中,填充入該第一間隙148內。 The resistive material 30 is in contact with and electrically connected to the first surface 1411 and the first side 1412 of the first conductive line 141. At least one surface of the resistive material 30 opposite to the first side 1412 is A first gap 148 is formed between the first conductive lines 141 of the first conductive circuit layer 14, and the glue layer 41 is filled into the first gap 148 during heating and pressurization.

另外,在加熱加壓過程中,該電阻材料30會固化成型,固化成型後的該電阻材料30為電阻元件31。 In addition, the resistive material 30 is solidified during heating and pressurization, and the resistive material 30 after solidification molding is the resistive element 31.

由於該電阻元件31位於該第一電路基板中間體71與該第二電路基板中間體81之間,可以藉由調整該膠層41的厚度,控制該電阻元件31的厚度,進而控制該電阻元件31的厚度方向的截面的截面積的大小,以在電阻率及電阻長度不變的情況下,改變該電阻元件31的電阻值的大小。 Since the resistive element 31 is located between the first circuit substrate intermediate body 71 and the second circuit substrate intermediate body 81, the thickness of the adhesive layer 41 can be controlled to adjust the thickness of the resistive element 31, thereby controlling the resistive element. The magnitude of the cross-sectional area of the cross section in the thickness direction of 31 is such that the resistance value of the resistive element 31 is changed when the resistivity and the resistance length are not changed.

第四步,請參閱圖11,在壓合後的該第一電路基板中間體71及該第二電路基板中間體81上形成至少一導電通孔60。 In the fourth step, referring to FIG. 11 , at least one conductive via 60 is formed on the first circuit substrate intermediate body 71 and the second circuit substrate intermediate body 81 after pressing.

其中,該導電通孔60電連接該第一導電線路層14、該第二導電線路層24、該第二銅箔層13及該第四銅箔層23。 The conductive vias 60 electrically connect the first conductive wiring layer 14 , the second conductive wiring layer 24 , the second copper foil layer 13 , and the fourth copper foil layer 23 .

具體地,可以先藉由鐳射蝕孔或機械鑽孔形成至少一通孔,再藉由電鍍的方法在該通孔的壁上形成一電鍍層,進而形成該導電通孔60。 Specifically, at least one through hole may be formed by laser etching or mechanical drilling, and a plating layer is formed on the wall of the through hole by electroplating to form the conductive via 60.

第五步,請參閱圖12,將該第二銅箔層13及該第四銅箔層23分別製作形成第三導電線路層16及第四導電線路層26。 In the fifth step, referring to FIG. 12, the second copper foil layer 13 and the fourth copper foil layer 23 are respectively formed into a third conductive wiring layer 16 and a fourth conductive wiring layer 26.

其中,該導電通孔60電連接該第一導電線路層14、該第二導電線路層24、該第三導電線路層16及該第四導電線路層26。 The conductive vias 60 electrically connect the first conductive wiring layer 14 , the second conductive wiring layer 24 , the third conductive wiring layer 16 , and the fourth conductive wiring layer 26 .

第六步,請參閱圖1,在該第三導電線路層16的遠離該第一基材層11的表面上形成一第一防焊層17,在該第四導電線路層26的遠離該第二基材層21的表面上形成一第二防焊層27,並使得該第一防焊層17及該第二防焊層27填充於該導電通孔60內,進而形成該電路板100。 In a sixth step, referring to FIG. 1 , a first solder resist layer 17 is formed on a surface of the third conductive circuit layer 16 away from the first substrate layer 11 , and the fourth conductive circuit layer 26 is away from the first A second solder resist layer 27 is formed on the surface of the second substrate layer 21, and the first solder resist layer 17 and the second solder resist layer 27 are filled in the conductive via hole 60 to form the circuit board 100.

請參閱圖13,本發明第二實施例提供一種電路板200,該電路板200與該電路板100的結構基本相同,其區別點在於,該電阻元件31並未覆蓋該第一導電線路141及該第二導電線路241。也即,該電阻元件31僅與該第一側面1412及該第二側面2412相貼合且電連接,不與該第一表面1411及該第二表面2411相貼合且電連接。 Referring to FIG. 13, a second embodiment of the present invention provides a circuit board 200. The circuit board 200 has substantially the same structure as the circuit board 100. The difference is that the resistive element 31 does not cover the first conductive line 141 and The second conductive line 241. That is, the resistive element 31 is only in contact with and electrically connected to the first side surface 1412 and the second side surface 2412, and is not in contact with and electrically connected to the first surface 1411 and the second surface 2411.

當然,該電阻元件31也可以只覆蓋該第一導電線路141及該第二導電線路241中的其中一個。 Of course, the resistive element 31 may cover only one of the first conductive line 141 and the second conductive line 241.

與現有技術相比,本發明提供的製作電阻元件的電阻材料的製作成本低。 Compared with the prior art, the resistor material for manufacturing a resistor element provided by the present invention has a low manufacturing cost.

另外,本發明提供的電路板及製作方法,採用上述電阻材料作為該電阻元件的製作材料,可以藉由印刷的方式將電阻元件形成兩個電路基板中間體中間,並在增層的過程中固化成型,可以簡化制程。 In addition, the circuit board and the manufacturing method of the present invention use the above-mentioned resistive material as a material for manufacturing the resistive element, and the resistive element can be formed into the middle of the two circuit substrate intermediates by printing, and solidified in the process of layering. Forming can simplify the process.

以上所述,僅是本發明的較佳實施方式而已,並非對本發明任何形式上的限制,雖然本發明已是較佳實施方式揭露如上,並非用以限定本發明,任何熟悉本專業的技術人員,在不脫離本發明技術方案範圍內,當可利用上述揭示的技術內容做出些許更動或修飾為等同變化的等效實施方式,但凡是未脫離本發明技術方案內容,依據本發明的技術實質對以上實施方式所做的任何簡單修改、等同變化與修飾,均仍屬於本發明技術方案的範圍內。 The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, although the present invention has been described above, and is not intended to limit the present invention, any person skilled in the art. The equivalents of the above-described technical contents may be modified or modified to equivalent changes without departing from the technical scope of the present invention, and the technical essence according to the present invention is not deviated from the technical scope of the present invention. Any simple modifications, equivalent changes and modifications made to the above embodiments are still within the scope of the technical solutions of the present invention.

Claims (8)

一種電路板,該電路板包括一第一電路基板、一第二電路基板及至少一電阻元件;該第一電路基板包括至少一第一導電線路層,該第一導電線路層包括至少一第一導電線路,該第二電路基板包括至少一第二導電線路層,該第二導電線路層包括至少一第二導電線路,其中,該電阻元件形成在該第一導電線路層及該第二導電線路層之間,該電阻元件的一端與該第一導電線路相貼合且電性連接,另一端與該第二導電線路相貼合且電性連接;該第一導電線路包括一垂直於該第一電路基板延伸方向的第一側面,該第二導電線路包括一垂直於該第二電路基板延伸方向的第二側面,該電阻元件分別與該第一側面及該第二側面相貼合且電性連接;該電阻元件的至少一與該第一側面相背的表面與該第一導電線路層的第一導電線路之間形成有第一間隙,該電阻元件的至少一與該第二側面相背的表面與該第二導電線路層的第二導電線路之間形成有第二間隙;該第一電路基板及該第二電路基板藉由一膠層黏合在一起,該膠層疊設在該第一導電線路層和第二導電線路層之間且填充於該第一間隙及該第二間隙內。 A circuit board comprising a first circuit substrate, a second circuit substrate and at least one resistive component; the first circuit substrate comprises at least one first conductive circuit layer, the first conductive circuit layer comprising at least one first a conductive circuit, the second circuit substrate includes at least one second conductive circuit layer, the second conductive circuit layer includes at least one second conductive line, wherein the resistive element is formed on the first conductive circuit layer and the second conductive line Between the layers, one end of the resistive element is in contact with the first conductive line and electrically connected, and the other end is in contact with and electrically connected to the second conductive line; the first conductive line includes a vertical a first side of the circuit board extending direction, the second conductive line includes a second side perpendicular to the extending direction of the second circuit substrate, and the resistive element is respectively attached to the first side and the second side and electrically a first gap formed between at least one surface of the resistive element opposite the first side and the first conductive line of the first conductive circuit layer, the resistive element a second gap is formed between a surface opposite to the second side surface and the second conductive line of the second conductive circuit layer; the first circuit substrate and the second circuit substrate are bonded together by a glue layer, The glue is laminated between the first conductive circuit layer and the second conductive circuit layer and filled in the first gap and the second gap. 如請求項第1項所述的電路板,其中,該第一導電線路還包括一與該第一側面垂直相連的第一表面,該第二導電線路還包括一與該第二側面垂直相連的第二表面,該電阻元件與該第一表面及該第二表面中的至少一個相貼合且電性連接。 The circuit board of claim 1, wherein the first conductive line further comprises a first surface vertically connected to the first side, the second conductive line further comprising a vertical connection to the second side The second surface, the resistive element is in contact with and electrically connected to at least one of the first surface and the second surface. 如請求項第1項所述的電路板,其中,該電阻元件由一電阻材料製成,該電阻材料為一種熱固化膠體,該電阻材料主要由樹脂、硬化劑、觸媒及導電填料組成,在該電阻材料中,該樹脂所佔的重量百分比為19.5~35%,該硬化劑所佔的重量百分比為10~17%,該觸媒所佔的重量百分比為0~1%,該導電填料所佔的重量百分比為46~69%,該樹脂由環氧樹脂、二聚酸改性聚酯及聚丙二醇二縮水甘油基醚中的一種或多種組成。 The circuit board of claim 1, wherein the resistive element is made of a resistive material, the resistive material is a thermosetting colloid, and the resistive material is mainly composed of a resin, a hardener, a catalyst, and a conductive filler. In the resistive material, the resin accounts for 19.5-35% by weight, the hardener accounts for 10-17% by weight, and the catalyst accounts for 0-1% by weight. The percentage by weight is 46 to 69%, and the resin is composed of one or more of an epoxy resin, a dimer acid-modified polyester, and a polypropylene glycol diglycidyl ether. 如請求項第3項所述的電路板,其中,該電阻材料中還含有添加劑,該添加劑所佔的重量百分比為0.2~2%。 The circuit board of claim 3, wherein the resistor material further comprises an additive, and the additive accounts for 0.2 to 2% by weight. 一種電路板的製作方法,其包括如下步驟:提供一第一電路基板中間體及一第二電路基板中間體;該第一電路基板中間體包括一第一導電線路層,該第一導電線路層包括至少一第一導電線路;該第二電路基板中間體包括一第二導電線路層,該第二導電線路層包括至少一第二導電線路;提供一膠層,並將該膠層壓合在該第二導電線路層上,該膠層包括一第一通槽;提供一電阻材料並將該電阻材料印刷在該第一通槽內,以形成電阻元件,該電阻元件的一端與該第二導電線路相貼合且電性連接;及將該第一電路基板中間體壓合在該第二電路基板中間體上,並使得該電阻元件的另一端與該第一導電線路相貼合且電性連接。 A method for manufacturing a circuit board, comprising the steps of: providing a first circuit substrate intermediate body and a second circuit substrate intermediate; the first circuit substrate intermediate body comprises a first conductive circuit layer, the first conductive circuit layer Including at least one first conductive line; the second circuit substrate intermediate body includes a second conductive circuit layer, the second conductive circuit layer includes at least one second conductive line; providing a glue layer and laminating the glue On the second conductive circuit layer, the adhesive layer includes a first through groove; a resistive material is provided and the resistive material is printed in the first through groove to form a resistive element, one end of the resistive element and the second The conductive circuit is bonded and electrically connected; and the first circuit substrate intermediate is pressed onto the second circuit substrate intermediate body, and the other end of the resistive element is bonded to the first conductive line and electrically Sexual connection. 如請求項第5項所述的電路板的製作方法,其中,該第一導電線路包括一垂直於該第一電路基板延伸方向的第一側面,該第二導電線路包括一垂直於該第二電路基板延伸方向的第二側面,該電阻元件分別與該第一側面及該第二側面相貼合且電性連接。 The method of manufacturing the circuit board of claim 5, wherein the first conductive line comprises a first side perpendicular to an extending direction of the first circuit substrate, and the second conductive line comprises a second perpendicular to the second The second side surface of the circuit board extending direction is electrically connected to the first side surface and the second side surface. 如請求項第6項所述的電路板的製作方法,其中,該第一導電線路還包括一與該第一側面垂直相連的第一表面,該第二導電線路還包括一與該第二側面垂直相連的第二表面,該電阻元件與該第一表面及該第二表面中的至少一個相貼合且電性連接。 The method of manufacturing the circuit board of claim 6, wherein the first conductive line further comprises a first surface vertically connected to the first side, the second conductive line further comprising a second side a second surface that is vertically connected, the resistive element is in contact with and electrically connected to at least one of the first surface and the second surface. 如請求項第6項所述的電路板的製作方法,其中,該電阻元件的至少一與該第一側面相背的表面與該第一導電線路層的第一導電線路之間形成有第一間隙,該電阻元件的至少一與該第二側面相背的表面與該第二導電線路層的第二導電線路之間形成有第二間隙;該膠層填充於該第一間隙及該第二間隙內。 The method of manufacturing the circuit board of claim 6, wherein the first surface of the resistive element opposite the first side and the first conductive line of the first conductive layer are first formed a second gap formed between the surface of the resistive element opposite to the second side and the second conductive line of the second conductive layer; the adhesive layer is filled in the first gap and the second Within the gap.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI727627B (en) * 2020-01-15 2021-05-11 大陸商碁鼎科技秦皇島有限公司 Buried circuit board and method for manufacturing the same

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW457652B (en) * 2000-10-03 2001-10-01 Advanced Semiconductor Eng Substrate structure and manufacture thereof having build-in passive elements
JP2008210986A (en) * 2007-02-26 2008-09-11 Mitsubishi Electric Corp Ceramic multilayer board and manufacturing method thereof
WO2013118455A1 (en) * 2012-02-08 2013-08-15 パナソニック株式会社 Resist-forming substrate and method for manufacturing same
TW201425445A (en) * 2012-12-22 2014-07-01 Zhen Ding Technology Co Ltd Epoxy resin composite material and circuit board and manufacturing method thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW457652B (en) * 2000-10-03 2001-10-01 Advanced Semiconductor Eng Substrate structure and manufacture thereof having build-in passive elements
JP2008210986A (en) * 2007-02-26 2008-09-11 Mitsubishi Electric Corp Ceramic multilayer board and manufacturing method thereof
WO2013118455A1 (en) * 2012-02-08 2013-08-15 パナソニック株式会社 Resist-forming substrate and method for manufacturing same
TW201425445A (en) * 2012-12-22 2014-07-01 Zhen Ding Technology Co Ltd Epoxy resin composite material and circuit board and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI727627B (en) * 2020-01-15 2021-05-11 大陸商碁鼎科技秦皇島有限公司 Buried circuit board and method for manufacturing the same

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